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Relevant bibliographies by topics / Near-memory-computing (NMC)

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Journal articles
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Academic literature on the topic 'Near-memory-computing (NMC)'

Author: Grafiati

Published: 19 July 2023

Last updated: 31 July 2025

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Journal articles on the topic "Near-memory-computing (NMC)"

1

Ponzina, Flavio, Marco Rios, Alexandre Levisse, Giovanni Ansaloni, and David Atienza. "Overflow-free Compute Memories for Edge AI Acceleration." ACM Transactions on Embedded Computing Systems 22, no. 5s (2023): 1–23. http://dx.doi.org/10.1145/3609387.

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Compute memories are memory arrays augmented with dedicated logic to support arithmetic. They support the efficient execution of data-centric computing patterns, such as those characterizing Artificial Intelligence (AI) algorithms. These architectures can provide computing capabilities as part of the memory array structures (In-Memory Computing, IMC) or at their immediate periphery (Near-Memory Computing, NMC). By bringing the processing elements inside (or very close to) storage, compute memories minimize the cost of data access. Moreover, highly parallel (and, hence, high-performance) comput

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2

Gul, Waqas, Maitham Shams, and Dhamin Al-Khalili. "FinFET 6T-SRAM All-Digital Compute-in-Memory for Artificial Intelligence Applications: An Overview and Analysis." Micromachines 14, no. 8 (2023): 1535. http://dx.doi.org/10.3390/mi14081535.

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Artificial intelligence (AI) has revolutionized present-day life through automation and independent decision-making capabilities. For AI hardware implementations, the 6T-SRAM cell is a suitable candidate due to its performance edge over its counterparts. However, modern AI hardware such as neural networks (NNs) access off-chip data quite often, degrading the overall system performance. Compute-in-memory (CIM) reduces off-chip data access transactions. One CIM approach is based on the mixed-signal domain, but it suffers from limited bit precision and signal margin issues. An alternate emerging

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3

Iskandar, Veronia, Mohamed A. Abd El Ghany, and Diana Goehringer. "Near-Memory Computing on FPGAs with 3D-stacked Memories: Applications, Architectures, and Optimizations." ACM Transactions on Reconfigurable Technology and Systems, July 18, 2022. http://dx.doi.org/10.1145/3547658.

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The near-memory computing (NMC) paradigm has transpired as a promising method for overcoming the memory wall challenges of future computing architectures. Modern systems integrating 3D-stacked DRAM memory can be leveraged to prevent unnecessary data movement between the main memory and the CPU. FPGA vendors have started introducing 3D memories to their products in an effort to remain competitive on bandwidth requirements of modern memory-intensive applications. Recent NMC proposals target various types of data processing workloads such as graph processing, MapReduce, sorting, machine learning,

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Li, Yueting, Xueyan Wang, He Zhang, et al. "Toward Energy Efficient STT-MRAM-based Near Memory Computing Architecture for Embedded Systems." ACM Transactions on Embedded Computing Systems, March 7, 2024. http://dx.doi.org/10.1145/3650729.

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Convolutional Neural Networks (CNNs) have significantly impacted embedded system applications across various domains. However, this exacerbates the real-time processing and hardware resource-constrained challenges of embedded systems. To tackle these issues, we propose spin-transfer torque magnetic random-access memory (STT-MRAM)-based near memory computing (NMC) design for embedded systems. We optimize this design from three aspects: Fast-pipelined STT-MRAM readout scheme provides higher memory bandwidth for NMC design, enhancing real-time processing capability with a non-trivial area overhea

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Dissertations / Theses on the topic "Near-memory-computing (NMC)"

1

Ezzadeen, Mona. "Conception d'un circuit dédié au calcul dans la mémoire à base de technologie 3D innovante." Electronic Thesis or Diss., Aix-Marseille, 2022. http://theses.univ-amu.fr.lama.univ-amu.fr/221212_EZZADEEN_955e754k888gvxorp699jljcho_TH.pdf.

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Avec le développement de l'internet des objets et de l'intelligence artificielle, le "déluge de données" est une réalité, poussant au développement de systèmes de calcul efficaces énergétiquement. Dans ce contexte, en effectuant le calcul directement à l'intérieur ou à proximité des mémoires, le paradigme de l'in/near-memory-computing (I/NMC) semble être une voie prometteuse. En effet, les transferts de données entre les mémoires et les unités de calcul sont très énergivores. Cependant, les classiques mémoires Flash souffrent de problèmes de miniaturisation et ne semblent pas facilement adapté

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Conference papers on the topic "Near-memory-computing (NMC)"

1

Huang, Chi-Tse, Cheng-Yang Chang, Yu-Chuan Chuang, and An-Yeu Andy Wu. "BWA-NIMC: Budget-based Workload Allocation for Hybrid Near/In-Memory-Computing." In 2023 60th ACM/IEEE Design Automation Conference (DAC). IEEE, 2023. http://dx.doi.org/10.1109/dac56929.2023.10247819.

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2

Wu, Yu-Cheng, Chi-Tse Huang, and An-Yeu Andy Wu. "DEA-NIMC: Dynamic Energy-Aware Policy for Near/In-Memory Computing Hybrid Architecture." In 2023 IEEE 36th International System-on-Chip Conference (SOCC). IEEE, 2023. http://dx.doi.org/10.1109/socc58585.2023.10256898.

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