Relevant bibliographies by topics / Non-Volatile Main Memory (NVMM)

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  1. Journal articles
  2. Dissertations / Theses
  3. Book chapters
  4. Conference papers

Academic literature on the topic 'Non-Volatile Main Memory (NVMM)'

Author: Grafiati
Published: 27 January 2024

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Journal articles on the topic "Non-Volatile Main Memory (NVMM)"

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OMORI, Yu, and Keiji KIMURA. "Non-Volatile Main Memory Emulator for Embedded Systems Employing Three NVMM Behaviour Models." IEICE Transactions on Information and Systems E104.D, no. 5 (2021): 697–708. http://dx.doi.org/10.1587/transinf.2020edp7092.

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Cheng, Wen, Chunyan Li, Lingfang Zeng, Yingjin Qian, Xi Li, and André Brinkmann. "NVMM-Oriented Hierarchical Persistent Client Caching for Lustre." ACM Transactions on Storage 17, no. 1 (2021): 1–22. http://dx.doi.org/10.1145/3404190.

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In high-performance computing (HPC), data and metadata are stored on special server nodes and client applications access the servers’ data and metadata through a network, which induces network latencies and resource contention. These server nodes are typically equipped with (slow) magnetic disks, while the client nodes store temporary data on fast SSDs or even on non-volatile main memory (NVMM). Therefore, the full potential of parallel file systems can only be reached if fast client side storage devices are included into the overall storage architecture. In this article, we propose an NVMM-ba
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Kawata, Hirotaka, Gaku Nakagawa, and Shuichi Oikawa. "Using DRAM as Cache for Non-Volatile Main Memory Swapping." International Journal of Software Innovation 4, no. 1 (2016): 61–71. http://dx.doi.org/10.4018/ijsi.2016010105.

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The performance of mobile devices such as smartphones and tablets has been rapidly improving in recent years. However, these improvements have been seriously affecting power consumption. One of the greatest challenges is to achieve efficient power management for battery-equipped mobile devices. To solve this problem, the authors focus on the emerging non-volatile memory (NVM), which has been receiving increasing attention in recent years. Since its performance is comparable with that of DRAM, it is possible to replace the main memory with NVM, thereby reducing power consumption. However, the p
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Haywood Dadzie, Thomas, Jiwon Lee, Jihye Kim, and Hyunok Oh. "NVM-Shelf: Secure Hybrid Encryption with Less Flip for Non-Volatile Memory." Electronics 9, no. 8 (2020): 1304. http://dx.doi.org/10.3390/electronics9081304.

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The Non-Volatile Memory (NVM), such as PRAM or STT-MRAM, is often adopted as the main memory in portable embedded systems. The non-volatility triggers a security issue against physical attacks, which is a vulnerability caused by memory extraction and snapshots. However, simply encrypting the NVM degrades the performance of the memory (high energy consumption, short lifetime), since typical encryption causes an avalanche effect while most NVMs suffer from the memory-write operation. In this paper, we propose NVM-shelf: Secure Hybrid Encryption with Less Flip (shelf) for Non-Volatile Memory (NVM
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Khan, Mohammad Nasim Imtiaz, and Swaroop Ghosh. "Comprehensive Study of Security and Privacy of Emerging Non-Volatile Memories." Journal of Low Power Electronics and Applications 11, no. 4 (2021): 36. http://dx.doi.org/10.3390/jlpea11040036.

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Several promising non-volatile memories (NVMs) such as magnetic RAM (MRAM), spin-transfer torque RAM (STTRAM), ferroelectric RAM (FeRAM), resistive RAM (RRAM), and phase-change memory (PCM) are being investigated to keep the static leakage within a tolerable limit. These new technologies offer high density and consume zero leakage power and can bridge the gap between processor and memory. The desirable properties of emerging NVMs make them suitable candidates for several applications including replacement of conventional memories. However, their unique characteristics introduce new data privac
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Li, Xiaochang, and Zhengjun Zhai. "UHNVM: A Universal Heterogeneous Cache Design with Non-Volatile Memory." Electronics 10, no. 15 (2021): 1760. http://dx.doi.org/10.3390/electronics10151760.

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During the recent decades, non-volatile memory (NVM) has been anticipated to scale up the main memory size, improve the performance of applications, and reduce the speed gap between main memory and storage devices, while supporting persistent storage to cope with power outages. However, to fit NVM, all existing DRAM-based applications have to be rewritten by developers. Therefore, the developer must have a good understanding of targeted application codes, so as to manually distinguish and store data fit for NVM. In order to intelligently facilitate NVM deployment for existing legacy applicatio
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Wang, Tse-Yuan, Chun-Feng Wu, Che-Wei Tsao, Yuan-Hao Chang, Tei-Wei Kuo, and Xue Liu. "Rethinking the Interactivity of OS and Device Layers in Memory Management." ACM Transactions on Embedded Computing Systems 21, no. 4 (2022): 1–21. http://dx.doi.org/10.1145/3530876.

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In the big data era, a huge number of services has placed a fast-growing demand on the capacity of DRAM-based main memory. However, due to the high hardware cost and serious leakage power/energy consumption, the growth rate of DRAM capacity cannot meet the increased rate of the required main memory space when the energy or hardware cost is a critical concern. To tackle this issue, hybrid main-memory devices/modules have been proposed to replace the pure DRAM main memory with a hybrid main memory module that provides a large main memory space by integrating a small-sized DRAM and a large-sized
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Bez, Roberto, Emilio Camerlenghi, and Agostino Pirovano. "Materials and Processes for Non-Volatile Memories." Materials Science Forum 608 (December 2008): 111–32. http://dx.doi.org/10.4028/www.scientific.net/msf.608.111.

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The development of the semiconductor industry through the CMOS technology has been possible thanks to the unique properties of the silicon and silicon dioxide material. Nevertheless the continuous scaling of the device dimension and the increase of the integration level, i.e. the capability to follow for more than 20 years the so-called Moore’s law, has been enabled not only by the Si-SiO2 system, but also by the use of other materials. The introduction of new materials every generation has allowed the integration of sub-micron and now of nanometer scale devices: different types of dielectrics
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Shen, Zongjie, Chun Zhao, Yanfei Qi, et al. "Memristive Non-Volatile Memory Based on Graphene Materials." Micromachines 11, no. 4 (2020): 341. http://dx.doi.org/10.3390/mi11040341.

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Resistive random access memory (RRAM), which is considered as one of the most promising next-generation non-volatile memory (NVM) devices and a representative of memristor technologies, demonstrated great potential in acting as an artificial synapse in the industry of neuromorphic systems and artificial intelligence (AI), due its advantages such as fast operation speed, low power consumption, and high device density. Graphene and related materials (GRMs), especially graphene oxide (GO), acting as active materials for RRAM devices, are considered as a promising alternative to other materials in
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Liu, Gang, Leying Chen, and Shimin Chen. "Zen." Proceedings of the VLDB Endowment 14, no. 5 (2021): 835–48. http://dx.doi.org/10.14778/3446095.3446105.

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Emerging <u>N</u>on-<u>V</u>olatile <u>M</u>emory (NVM) technologies like 3DX-point promise significant performance potential for OLTP databases. However, transactional databases need to be redesigned because the key assumptions that non-volatile storage is orders of magnitude slower than DRAM and only supports blocked-oriented access have changed. NVMs are byte-addressable and almost as fast as DRAM. The capacity of NVM is much (4-16x) larger than DRAM. Such NVM characteristics make it possible to build OLTP database entirely in NVM main memory. This paper
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Dissertations / Theses on the topic "Non-Volatile Main Memory (NVMM)"

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Dulong, Rémi. "Towards new memory paradigms : Integrating non-volatile main memory and remote direct memory access in modern systems." Electronic Thesis or Diss., Institut polytechnique de Paris, 2023. http://www.theses.fr/2023IPPAS027.

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Les ordinateurs modernes sont construits autour de deux éléments : leur CPU etleur mémoire principale volatile, ou RAM. Depuis les années 1970, ce principe a étéconstamment amélioré pour offrir toujours plus de fonctionnalités et de performances.Dans cette thèse, nous étudions deux paradigmes de mémoire qui proposent denouvelles façons d'interagir avec la mémoire dans les systèmes modernes : la mémoirenon-volatile et les accès mémoire distants. Nous mettons en œuvre des outils logicielsqui exploitent ces nouvelles approches afin de les rendre compatibles et d'exploiterleurs performances avec d
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Grönberg, Axel. "Emerging Non-Volatile Memory and Initial Experiences with PCM Main Memory." Thesis, Uppsala universitet, Institutionen för informationsteknologi, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-407070.

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A group of new non-volatile memory technologies with characteristics making them worthy of consideration for different parts of the memory hierarchy, including the main memory, are emerging. In this thesis I discuss the state of STT-RAM, ReRAM and PCM technologies which are three of the front runners in this group of new technologies. I also simulate the performance of PCM used as main memory using Intel’s binary instrumentation framework Pin and compare it to DRAM to explore three research questions. Firstly, in the case of horizontally integrated PCM and DRAM I test a data mapping policy whe
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Chang, Yi-Kang, and 張逸康. "Extending file-system journaling to non-volatile main memory." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/96230303244532253749.

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碩士<br>國立交通大學<br>資訊科學與工程研究所<br>101<br>In general system, all data in main memory are lost when occur power interruption.Use UPS(uninterruptible power supply) to protect entire system is a approach for reduce data losing. But it is also expensive for large system which need a high capacity UPS.We propose a new apporach:use standby power to protect main memory instead protect entire system. Maintain in-memory data until power restore and then write data to disk.We integrate characteristic of non-volatile memory and file-system journaling for reduce data losing in on power interrupt.
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Wu, Michael. "The architecture of eNVy, a non-volatile, main memory storage system." Thesis, 1994. http://hdl.handle.net/1911/17039.

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This paper describes the architecture of eNVy, a large non-volatile main memory storage system built primarily with Flash memory. Flash provides persistent storage with solid-state memory access times at a lower cost than other solid-state technologies. eNVy presents its storage space as a linear, memory mapped array rather than as a disk emulator in order to provide an efficient and easy to use software interface. Flash chips are write-once, bulk-erase devices whose contents cannot be updated in-place. They suffer from slow write times and limited program/erase cycles. eNVy uses a copy-on-wri
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Liang, Li-Zheng, and 梁立錚. "xB+-Tree: Access-Locality-Aware Cache-Optimized Tree for Non-Volatile Main Memory Architecture." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/77901345655131640211.

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碩士<br>國立清華大學<br>資訊工程學系<br>104<br>The non-volatile main memory architecture is often proposed, because it can solve the problem of data storage of in-memory database when encountering a system failure (e.g., system crash, power failure). To achieve fast execution time, we proposed a cache-optimized tree, referred to as xB+-tree. It focuses on access the smallest number of cache lines and reduce the cache miss rate by using access-locality in insertion and query operations. The experimental results show that compared with previous unsorted leaf scheme, xB+-tree achieves up to 33.48% speedups for
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Book chapters on the topic "Non-Volatile Main Memory (NVMM)"

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Yu, Songping, Mingzhu Deng, Yuxuan Xing, Nong Xiao, Fang Liu, and Wei Chen. "Pyramid: Revisiting Memory Extension with Remote Accessible Non-Volatile Main Memory." In Security, Privacy, and Anonymity in Computation, Communication, and Storage. Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-72395-2_65.

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Agrawal, Rakesh, and H. V. Jagadish. "Recovery algorithms for database machines with non-volatile main memory." In Database Machines. Springer Berlin Heidelberg, 1989. http://dx.doi.org/10.1007/3-540-51324-8_41.

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Jang, Sung-In, Cheong-Ghil Kim, and Shin-Dug Kim. "An Efficient DRAM Converter for Non-Volatile Based Main Memory." In IT Convergence and Security 2012. Springer Netherlands, 2012. http://dx.doi.org/10.1007/978-94-007-5860-5_49.

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Lee, Do-Heon, Chung-Pyo Hong, and Shin-Dug Kim. "A Non-Volatile Buffered Main Memory Using Phase-Change RAM." In IT Convergence and Security 2012. Springer Netherlands, 2012. http://dx.doi.org/10.1007/978-94-007-5860-5_53.

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Oikawa, Shuichi. "Independent Kernel/Process Checkpointing on Non-Volatile Main Memory for Quick Kernel Rejuvenation." In Architecture of Computing Systems – ARCS 2014. Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-04891-8_20.

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Yan, Tian, Linpeng Huang, and Shengan Zheng. "Cheetah: An Adaptive User-Space Cache for Non-volatile Main Memory File Systems." In Web and Big Data. Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-85896-4_17.

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Qin, Xiongpai, and Yueguo Chen. "Database Techniques for New Hardware." In Advances in Computer and Electrical Engineering. IGI Global, 2019. http://dx.doi.org/10.4018/978-1-5225-7598-6.ch040.

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In the last decade, computer hardware progressed by leaps and bounds. The advancements of hardware include the application of multi-core CPUs, use of GPUs in data intensive tasks, bigger and bigger main memory capacity, maturity and production use of non-volatile memory, etc. Database systems immediately benefit from faster CPU/GPU and bigger memory and run faster. However, there are some pitfalls. For example, database systems running on multi-core processors may suffer from cache conflicts when the number of concurrently executing DB processes increases. To fully exploit advantages of new hardware to improve the performance of database systems, database software should be more or less revised. This chapter introduces some efforts of database research community in this aspect.
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Qin, Xiongpai, and Yueguo Chen. "Database Techniques for New Hardware." In Encyclopedia of Information Science and Technology, Fourth Edition. IGI Global, 2018. http://dx.doi.org/10.4018/978-1-5225-2255-3.ch169.

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In the last decade, computer hardware progresses with leaps and bounds. The advancements of hardware include: widely application of multi-core CPUs, using of GPUs in data intensive tasks, bigger and bigger main memory capacity, maturity and production use of non-volatile memory etc. Database systems immediately benefit from faster CPU/GPU and bigger memory, and run faster. However, there are some pitfalls. For example, database systems running on multi-core processors may suffer from cache conflicts when the number of concurrently executing DB processes increases. To fully exploit advantages of new hardware to improve the performance of database systems, database software should be more or less revised. This chapter introduces some efforts of database research community in this aspect.
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Chand Verma, Kuldeep. "Synthesis and Characterization of Multiferroic BiFeO3 for Data Storage." In Bismuth - Fundamentals and Optoelectronic Applications. IntechOpen, 2020. http://dx.doi.org/10.5772/intechopen.94049.

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Multiferroic BiFeO3 deals with spintronic devices involved spin-charge processes and applicable in new non-volatile memory devices to store information for computing performance and the magnetic random access memories storage. Since multiferroic leads to the new generation memory devices for which the data can be written electrically and read magnetically. The main advantage of present study of multiferroic BiFeO3 is that to observe magnetoelectric effects at room temperature. The nanostructural growth (for both size and shape) of BiFeO3 may depend on the selection of appropriate synthesis route, reaction conditions and heating processes. In pure BiFeO3, the ferroelectricity is induced by 6s2 lone-pair electrons of Bi3+ ions and the G-type antiferromagnetic ordering resulting from Fe3+ spins order of cycloidal (62-64 nm wavelength) occurred below Neel temperature, TN = 640 K. The multiferroicity of BiFeO3 is disappeared due to factors such as impurity phases, leakage current and low value of magnetization. Therefore, to overcome such factors to get multiferroic enhancement in BiFeO3, there are different possible ways like changes dopant ions and their concentrations, BiFeO3 composites as well as thin films especially multilayers.
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Conference papers on the topic "Non-Volatile Main Memory (NVMM)"

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Omori, Yu, and Keiji Kimura. "Performance Evaluation on NVMM Emulator Employing Fine-Grain Delay Injection." In 2019 IEEE Non-Volatile Memory Systems and Applications Symposium (NVMSA). IEEE, 2019. http://dx.doi.org/10.1109/nvmsa.2019.8863522.

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Dang, Huynh Tu, Jaco Hofmann, Yang Liu, et al. "Consensus for Non-volatile Main Memory." In 2018 IEEE 26th International Conference on Network Protocols (ICNP). IEEE, 2018. http://dx.doi.org/10.1109/icnp.2018.00056.

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Oikawa, Shuichi, and Satoshi Miki. "File-Based Memory Management for Non-volatile Main Memory." In 2013 IEEE 37th Annual Computer Software and Applications Conference (COMPSAC). IEEE, 2013. http://dx.doi.org/10.1109/compsac.2013.90.

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Ren, Jinglei, Qingda Hu, Samira Khan, and Thomas Moscibroda. "Programming for Non-Volatile Main Memory Is Hard." In APSys '17: 8th Asia-Pacific Workshop on Systems. ACM, 2017. http://dx.doi.org/10.1145/3124680.3124729.

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Chen, Jie, Ron C. Chiang, H. Howie Huang, and Guru Venkataramani. "Energy-aware writes to non-volatile main memory." In the 4th Workshop. ACM Press, 2011. http://dx.doi.org/10.1145/2039252.2039258.

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Xie, Mimi, Yawen Wu, Zhenge Jia, and Jingtong Hu. "In-memory AES Implementation for Emerging Non-Volatile Main Memory." In 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, 2019. http://dx.doi.org/10.1109/isvlsi.2019.00027.

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Mladenov, Radoslav. "An efficient non-volatile main memory using phase change memory." In the 13th International Conference. ACM Press, 2012. http://dx.doi.org/10.1145/2383276.2383284.

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Tian, Wanyong, Jianhua Li, Yingchao Zhao, Chun Jason Xue, Minming Li, and Enhong Chen. "Optimal task allocation on non-volatile memory based hybrid main memory." In the 2011 ACM Symposium. ACM Press, 2011. http://dx.doi.org/10.1145/2103380.2103382.

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Jin, Weitong, Yanmin Zhu, and Linpeng Huang. "Accelerating Traditional File Systems on Non-volatile Main Memory." In 2017 IEEE 23rd International Conference on Parallel and Distributed Systems (ICPADS). IEEE, 2017. http://dx.doi.org/10.1109/icpads.2017.00066.

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Song, Shihao, Anup Das, Onur Mutlu, and Nagarajan Kandasamy. "Aging-Aware Request Scheduling for Non-Volatile Main Memory." In ASPDAC '21: 26th Asia and South Pacific Design Automation Conference. ACM, 2021. http://dx.doi.org/10.1145/3394885.3431529.

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