Relevant bibliographies by topics / Partial virtualization

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Book chapters
  4. Conference papers

Academic literature on the topic 'Partial virtualization'

Author: Grafiati
Published: 4 June 2021
Last updated: 1 February 2022

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Journal articles on the topic "Partial virtualization"

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Rodrigues, Pablo, Mateus Saquetti, Guilherme Bueno, Weverton Cordeiro, and Jose Azambuja. "Virtualization of Programmable Forwarding Planes with P4VBox." Journal of Integrated Circuits and Systems 16, no. 2 (August 15, 2021): 1–8. http://dx.doi.org/10.29292/jics.v16i2.329.

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Networking virtualization has shown to enable faster service provioning and server as a main driver of innovation, from Software-Defined Networking (SDN) to Network Function Virtualization (NFV) and Local Area Networks (VLAN). Recent investigations began assessing the feasibility of virtualization in Programmable Data Planes (PDP). Despite the progress achieved, much work remains to assess their effectiveness for programmable virtual switches. In a prior work, we introduced P4VBox, an architecture for virtualization of programmable switches written using the P4 language. P4VBox provides the execution of multiple P4 based switch instances running in parallel, with the ability of hot-swapping through full and partial reconfiguration. In this work, we build upon P4VBox to provide novel insights, substantiated by experimental evaluation on a real-world testbed, on the evaluation of the real power of switch virtualization in a NetFPGASUME board, deploying three use cases. We measured resource utilization and performance to observe the behavior of P4VBox when handling large flows. Our results demonstrate that P4VBox incurs a small overhead compared with the canonical NetFPGA reference design. Yet, it increases orders of magnitude considering the existing works.
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Raczkowski, Tomasz. "Wirtualne sale i globalne sieci. Partycypacja w kulturze filmowej w kontekście pandemii." Prace Etnograficzne 48, no. 1 (2020): 39–55. http://dx.doi.org/10.4467/22999558.pe.20.003.12628.

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Virtual Screens, Global Networks. Film Culture Participation in the Wake of Pandemic The article discusses the subject of virtualization – the process of partial transmission significant discursive fields into the Internet – of the film culture, which is defined as the group of practices and discourses accompanying cinema, which connect it with the socio-cultural environment. According to the author, the virtualization process is specifically exposed during pandemics and social isolation, what is presented in the text from the perspective of film audience. Pandemic is treated here as liminoidal moment, in which, due to the disorder of cinema’s functioning, its social networks happen to transform in certain manner. By interpreting results of his own fieldwork, author points at general dynamics of virtualization as an element of contemporary film culture, highlighting both the possibilities opened by such situation and dangers it brings.
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Gui, Anderes, Hasnah Haron, Suryanto, and Sumarwan. "Virtualization Technology Investment Feasibility Study (Case Study at Regional Development Bank in Indonesia)." Advanced Science Letters 21, no. 4 (April 1, 2015): 976–79. http://dx.doi.org/10.1166/asl.2015.5957.

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The purpose of this feasibility study is to provide recommendations to management to make decisions related to investment virtualization technology on one of the regional development banks in Indonesia as an alternative solution to replace the infrastructure that currently exists and is obsolete, with the hope to improve the performance of the company. Method of data collection is through survey, interviews and viewing documentation. Analysis method is using the Fit/Gap Analysis and discounted cash flow to compute net present value. The results of this study indicate only 22.2% of the current system has fit, 55.6% of the current system has partial fit, and 22.2% of the current system has gap, and has positive value of net present value. The conclusion was that companies need to invest in virtualization technologies, by replacing obsolete systems in order to address the gaps and partial so as to improve efficiency and effectiveness.
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Chydzinski, Andrzej. "Analysis of the scheduling mechanism for virtualization of links with partial isolation." Applied Mathematics and Computation 281 (April 2016): 39–54. http://dx.doi.org/10.1016/j.amc.2016.01.047.

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Chai, Zhilei, Wei Liu, Qin Wu, Qunfang He, and Wenjie Chen. "FPGA Virtualization Mechanism Based on Heterogeneous Zynq Platforms." Journal of Circuits, Systems and Computers 28, no. 12 (November 2019): 1950199. http://dx.doi.org/10.1142/s0218126619501998.

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FPGA (Field Programmable Gate Array) has the advantages of parallelism and reconfigurability, therefore, it is widely used in areas such as image processing, robotics and artificial intelligence. However, the development of FPGA currently involves too many hardware details, so it lacks extensibility for different platforms and flexibility for system level management and scheduling. In this paper, we propose an FPGA Virtualization Mechanism (FVM), which divides physical resources into pages (virtual resources). We use the technology of PR (Partial Reconfiguration) and the method of intermediate form to lift the extensibility and performance. We implement FVM in our platform VSC (Vary Super Computer System). Experiment results show that FVM can solve the problem of extensibility and flexibility, with high performance.
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Dr B Raghu, Dr V Khanaa, Niraja Jain,. "Probabilistic Model for Resource Demand Prediction in Cloud." Turkish Journal of Computer and Mathematics Education (TURCOMAT) 12, no. 6 (April 5, 2021): 1766–71. http://dx.doi.org/10.17762/turcomat.v12i6.3908.

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Dynamic cloud infrastructure provisioning is possible with the virtualization technology. Cost, agility and time to market are the key elements of the cloud services. Virtualization is the software layer responsible for interaction with multiple servers, bringing entire IT resources together and provide standardized Virtual compute centers that drives the entire infrastructure. The increased pooling of shared resources helps in improving self-provisioning and automation of service delivery. Probabilistic model proposed in this article is based on the hypothesis that the accurate resource demand predictions can benefit in improving the virtualization layer efficiency. The probabilistic method, uses the laws of combinatorics. The probability space gives an idea about both the partial certainty and randomness of the variable. The method is popular in theoretical computer science. The probabilistic models provide the predictions considering the randomness of the variables. In the cloud environment there are multiple factors dynamically affecting the resource demand needs. The resource demand has a certain degree of certainty but the randomness of requirements. This further leads to decrease in risk related to leveraging cloud services. It accelerates development and implementation of cloud services that overall improves the services pertaining to SLA.
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Song, Young Eun, Peter Kovacs, Mihoko Niitsuma, and Hideki Hashimoto. "Spatial Memory for Augmented Personal Working Environments." Journal of Advanced Computational Intelligence and Intelligent Informatics 16, no. 2 (March 20, 2012): 349–57. http://dx.doi.org/10.20965/jaciii.2012.p0349.

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Augmented Personal Working Environments (APWEs) are 3D environments in which the physical surroundings of the user are overlaid with representations of a virtual reality. With the rapid technological evolution of personal informatics devices as well as a growing demand for more comfortable and efficient working environments, the partial virtualization of resources used in our everyday work settings is expected to gradually become inevitable. Irrespective of whether someone is working in an office environment or in industrial settings, this trend in virtualization is expected to lead to more collaborative working environments in which the available resources and the interfaces for dealing with those resources can be both physical and virtual in nature. SpatialMemory, which is a memory system embedded in 3-dimensional physical reality, may without doubt be a central subsystem of future APWEs. In this paper, our goal is to contribute to the development of a theoretical background for Spatial Memory from a cognitive infocommunications perspective, and to outline the future research directions of Spatial Memory in APWEs based on some key applications.
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Kang, JiHun, JongBeom Lim, and HeonChang Yu. "Partial migration technique for GPGPU tasks to Prevent GPU Memory Starvation in RPC‐based GPU Virtualization." Software: Practice and Experience 50, no. 6 (February 11, 2020): 948–72. http://dx.doi.org/10.1002/spe.2801.

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Darintsev, O. V. "The use of virtualization technologies in control systems of micro-robots and microsystems." Proceedings of the Mavlyutov Institute of Mechanics 9, no. 2 (2012): 47–52. http://dx.doi.org/10.21662/uim2012.2.047.

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When synthesizing control systems of microrobots, the weakest information support is a very serious problem: miniature sizes of robots, limited computing and energy resources do not allow to fully implement all the necessary channels for collecting (processing) information. Some parameters of the external environment and microobjects (microsystems) that have a significant influence on the operational characteristics and functioning of microsystems cann’t be measured: roughness, contact patch profile, magnitude of charge distributed over the surface of the object, etc. The way out of this situation can be the use of virtual information systems built on the basis of intelligent algorithms that allow you to determine the necessary parameters by indirect signs based on expert data and accumulated interaction statistics. In this case, the control system of micro-robots becomes slightly more complicated, information coming from real and virtual measuring systems is not divided: to be a partial
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Chen, Qianqiao, Vaibhawa Mishra, Jose Nunez-Yanez, and Georgios Zervas. "Reconfigurable Network Stream Processing on Virtualized FPGA Resources." International Journal of Reconfigurable Computing 2018 (2018): 1–11. http://dx.doi.org/10.1155/2018/8785903.

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The software defined network and network function virtualization are proposed to address the network ossification issue in current Internet infrastructure. Network functions and services are implemented as software applications to increase the programmability of network. However, involving general purpose processors in data plane restricts the bandwidth of network services. Therefore, to keep both the bandwidth and flexibility, a FPGA platform is suggested as a reconfigurable platform to deliver high bandwidth virtual network functions on data plane. In this paper, the FPGA resource has been virtualized by interconnecting partial reconfigurable regions to deliver high bandwidth reconfigurable processing on network streams. With the help of partial reconfiguration technology, network functions on our platform can be configured without affecting other functions on the same FPGA device. The on-chip interconnect system is further evaluated by comparing with existing network-on-chip system. A reconfiguration process is also proposed and demonstrated that it can be performed on our platform. The process can happen in the real time of network services and it is able to keep the original function working during the download of partial bitstream.
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Dissertations / Theses on the topic "Partial virtualization"

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Pareschi, Federico. "Applying partial virtualization on ELF binaries through dynamic loaders." Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2013. http://amslaurea.unibo.it/5065/.

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The technology of partial virtualization is a revolutionary approach to the world of virtualization. It lies directly in-between full system virtual machines (like QEMU or XEN) and application-related virtual machines (like the JVM or the CLR). The ViewOS project is the flagship of such technique, developed by the Virtual Square laboratory, created to provide an abstract view of the underlying system resources on a per-process basis and work against the principle of the Global View Assumption. Virtual Square provides several different methods to achieve partial virtualization within the ViewOS system, both at user and kernel levels. Each of these approaches have their own advantages and shortcomings. This paper provides an analysis of the different virtualization methods and problems related to both the generic and partial virtualization worlds. This paper is the result of an in-depth study and research for a new technology to be employed to provide partial virtualization based on ELF dynamic binaries. It starts with a mild analysis of currently available virtualization alternatives and then goes on describing the ViewOS system, highlighting its current shortcomings. The vloader project is then proposed as a possible solution to some of these inconveniences with a working proof of concept and examples to outline the potential of such new virtualization technique. By injecting specific code and libraries in the middle of the binary loading mechanism provided by the ELF standard, the vloader project can promote a streamlined and simplified approach to trace system calls. With the advantages outlined in the following paper, this method presents better performance and portability compared to the currently available ViewOS implementations. Furthermore, some of itsdisadvantages are also discussed, along with their possible solutions.
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Cardace, Antonio. "UMView, a Userspace Hypervisor Implementation." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2017. http://amslaurea.unibo.it/13184/.

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UMView is a partial virtual machine and userspace hypervisor capable of intercepting system calls and modifying their behavior according to the calling process' view. In order to provide flexibility and modularity UMView supports modules loadable at runtime using a plugin architecture. UMView in particular is the implementation of the View-OS concept which negates the global view assumption which is so radically established in the world of OSes and virtualization.
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Preston, Ian Christopher. "Massively parallel computing for particle physics." Thesis, University of Oxford, 2010. http://ora.ox.ac.uk/objects/uuid:4e8aec56-b23b-4ccc-b3ed-5340a525d445.

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This thesis presents methods to run scientific code safely on a global-scale desktop grid. Current attempts to harness the world’s idle desktop computers face obstacles such as donor security, portability of code and privilege requirements. Nereus, a Java-based architecture, is a novel framework that overcomes these obstacles and allows the creation of a globally-scalable desktop grid capable of executing Java bytecode. However, most scientific code is written for the x86 architecture. To enable the safe execution of unmodified scientific code, we created JPC, a pure Java x86 PC emulator. The Nereus framework is applied to two tasks, a trivially parallel data generation task, BlackMax, and a parallelization and fault tolerance framework, Mycelia. Mycelia is an implementation of the Map-Reduce parallel programming paradigm. BlackMax is a microscopic blackhole event generator, of direct relevance for the Large Hadron Collider (LHC). The Nereus based BlackMax adaptation dramatically speeds up the production of data, limited only by the number of desktop machines available.
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Bila, Nilton. "Energy-oriented Partial Desktop Virtual Machine Migration." Thesis, 2013. http://hdl.handle.net/1807/35778.

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Modern offices are crowded with personal computers. While studies have shown these to be idle most of the time, they remain powered, consuming up to 60% of their peak power. Hardware based solutions engendered by PC vendors (e.g., low power states, Wake-on-LAN) have proven unsuccessful because, in spite of user inactivity, these machines often need to remain network active in support of background applications that maintain network presence. Recent solutions have been proposed that perform consolidation of idle desktop virtual machines. However, desktop VMs are often large requiring gigabytes of memory. Consolidating such VMs, creates large network transfers lasting in the order of minutes, and utilizes server memory inefficiently. When multiple VMs migrate simultaneously, each VM’s experienced migration latency grows, and this limits the use of VM consolidation to environments in which only a few daily migrations are expected per VM. This thesis introduces partial VM migration, an approach that transparently migrates only the working set of an idle VM, by migrating memory pages on-demand. It creates a partial replica of the desktop VM on the consolidation server by copying only VM metadata, and transferring pages to the server, as the VM accesses them. This approach places desktop PCs in low power state when inactive and resumes them to running state when pages are needed by the VM running on the consolidation server. Jettison, our software prototype of partial VM migration for off-the-shelf PCs, can deliver 78% to 91% energy savings during idle periods lasting more than an hour, while providing low migration latencies of about 4 seconds, and migrating minimal state that is under an order of magnitude of the VM’s memory footprint. In shorter idle periods of up to thirty minutes, Jettison delivers savings of 7% to 31%. We present two approaches that increase energy savings attained with partial VM migration, especially in short idle periods. The first, Context-Aware Selective Resume, expedites PC resume and suspend cycle times by supplying a context identifier at desktop resume, and initializing only devices and code that are relevant to the context. CAESAR, the Context-Aware Selective Resume framework, enables applications to register context vectors that are invoked when the desktop is resumed with matching context. CAESAR increases energy savings in short periods of five minutes to an hour by up to 66%. The second approach, the low power page cache, embeds network accessible low power hardware in the PC, to enable serving of pages to the consolidation server, while the PC is in low power state. We show that Oasis, our prototype page cache, addresses the shortcomings of energy-oriented on-demand page migration by increasing energy savings, especially during short idle periods. In periods of up to an hour, Oasis increases savings by up to twenty times.
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Unnikrishnan, Deepak C. "Reconfigurable Technologies for Next Generation Internet and Cluster Computing." 2013. https://scholarworks.umass.edu/open_access_dissertations/823.

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Modern web applications are marked by distinct networking and computing characteristics. As applications evolve, they continue to operate over a large monolithic framework of networking and computing equipment built from general-purpose microprocessors and Application Specific Integrated Circuits (ASICs) that offers few architectural choices. This dissertation presents techniques to diversify the next-generation Internet infrastructure by integrating Field-programmable Gate Arrays (FPGAs), a class of reconfigurable integrated circuits, with general-purpose microprocessor-based techniques. Specifically, our solutions are demonstrated in the context of two applications - network virtualization and distributed cluster computing. Network virtualization enables the physical network infrastructure to be shared among several logical networks to run diverse protocols and differentiated services. The design of a good network virtualization platform is challenging because the physical networking substrate must scale to support several isolated virtual networks with high packet forwarding rates and offer sufficient flexibility to customize networking features. The first major contribution of this dissertation is a novel high performance heterogeneous network virtualization system that integrates FPGAs and general-purpose CPUs. Salient features of this architecture include the ability to scale the number of virtual networks in an FPGA using existing software-based network virtualization techniques, the ability to map virtual networks to a combination of hardware and software resources on demand, and the ability to use off-chip memory resources to scale virtual router features. Partial-reconfiguration has been exploited to dynamically customize virtual networking parameters. An open software framework to describe virtual networking features using a hardware-agnostic language has been developed. Evaluation of our system using a NetFPGA card demonstrates one to two orders of improved throughput over state-of-the-art network virtualization techniques. The demand for greater computing capacity grows as web applications scale. In state-of-the-art systems, an application is scaled by parallelizing the computation on a pool of commodity hardware machines using distributed computing frameworks. Although this technique is useful, it is inefficient because the sequential nature of execution in general-purpose processors does not suit all workloads equally well. Iterative algorithms form a pervasive class of web and data mining algorithms that are poorly executed on general purpose processors due to the presence of strict synchronization barriers in distributed cluster frameworks. This dissertation presents Maestro, a heterogeneous distributed computing framework that demonstrates how FPGAs can break down such synchronization barriers using asynchronous accumulative updates. These updates allow for the accumulation of intermediate results for numerous data points without the need for iteration-based barriers. The benefits of a heterogeneous cluster are illustrated by executing a general-class of iterative algorithms on a cluster of commodity CPUs and FPGAs. Computation is dynamically prioritized to accelerate algorithm convergence. We implement a general-class of three iterative algorithms on a cluster of four FPGAs. A speedup of 7× is achieved over an implementation of asynchronous accumulative updates on a general-purpose CPU. The system offers 154× speedup versus a standard Hadoop-based CPU-workstation cluster. Improved performance is achieved by clusters of FPGAs.
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Huang, Chun-Hsian, and 黃駿賢. "Model-Based Platform-Specific Co-Design Methodology for Dynamically Partially Reconfigurable Systems with Hardware Virtualization and Preemption." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/55989893944353657248.

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博士
國立中正大學
資訊工程研究所
99
The dynamic partial reconfiguration capability of FPGA devices enables the dynamic adaptation of the set of simultaneously executing hardware functions such that the varying requirements in a dynamically partially reconfigurable system (DPRS) can be satisfied. Dynamic adaptation enhances system flexibility, scalability, and performance; however, system design, analysis, and validation become much more difficult. Existing design methodologies focus mainly on functional code generation from UML models of DPRS, with simulation-based validation. There is an estimation gap between models and the final developed system because physical design correctness is verified mostly after the UML models are implemented into concrete system designs. Furthermore, reconfigurable hardware functions are usually managed as conventional hardware devices in most DPRS designs, as a result of which the enhancement in system performance brought about by the partial reconfiguration technology becomes quite limited, thus resulting in poor utilization of reconfigurable hardware designs. As a solution to the above issues, we propose a model-based platform-specific co-design (MPC) methodology that includes a model-based verification and estimation (MOVE) framework and a hierarchical DPRS design architecture with hardware virtualization and preemption. MOVE provides reusable UML models of physical DPRS that can be customized according to user applications. By taking advantage of the inherent features of DPRS and considering real-time system requirements, a semi-automatic model translator converts the user-given UML models of DPRS into timed automata models with transition urgency semantics for model checking. Furthermore, a UML-based hardware/software co-design platform (UCoP) is proposed in MOVE to support the direct interaction between the UML models and the real hardware architecture. Through the two-phase verification process, including exhaustive functional verification and physical-aware performance estimation, the DPRS validation is thus more effective and accurate at the system model level than the state-of-the-art methods. Besides the verification and estimation of a conventional DPRS design, to solve the problem of the limitations in infrastructure support for DPRS, MPC further proposes a hierarchical DPRS design architecture that not only enhances the transparency of system design, but also supports hardware virtualization and preemption. As a result, a configured hardware function can be virtualized to support more than one user space software application, while it can be preempted to release its occupied hardware logic resources for another high-priority hardware function. In this work, we used a dynamically partially reconfigurable network security system (DPRNSS) to show the applicability and practicability of the MPC methodology. The related experiments have demonstrated that the model checker in MOVE can alleviate the impact of the state-space-explosion problem. Compared to the synthesis-based estimation method having inaccuracies ranging from -43.4% to 18.4%, UCoP in MOVE can provide accurate and efficient platform-specific verification and estimation through actual time measurements. To apply real ubiquitous computing applications to the DPRNSS more effectively, we extended DPRNSS into a ubiquitous computing infrastructure, called SAHA. Experiments with a ubiquitous application for information encryption have also demonstrated that, when both the hardware virtualization and preemption techniques are used, SAHA can reduce the turnaround time by at least 22.04% of that required by using the conventional DPRS design.
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Book chapters on the topic "Partial virtualization"

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Fortuna, Tomasz, and Andrzej Chydzinski. "Scheduler for Virtualization of Links with Partial Performance Isolation." In Computer Networks, 446–55. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-38865-1_45.

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Mehta, Shikha, and Parmeet Kaur. "Scheduling Data Intensive Scientific Workflows in Cloud Environment Using Nature Inspired Algorithms." In Nature-Inspired Algorithms for Big Data Frameworks, 196–217. IGI Global, 2019. http://dx.doi.org/10.4018/978-1-5225-5852-1.ch008.

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Workflows are a commonly used model to describe applications consisting of computational tasks with data or control flow dependencies. They are used in domains of bioinformatics, astronomy, physics, etc., for data-driven scientific applications. Execution of data-intensive workflow applications in a reasonable amount of time demands a high-performance computing environment. Cloud computing is a way of purchasing computing resources on demand through virtualization technologies. It provides the infrastructure to build and run workflow applications, which is called ‘Infrastructure as a Service.' However, it is necessary to schedule workflows on cloud in a way that reduces the cost of leasing resources. Scheduling tasks on resources is a NP hard problem and using meta-heuristic algorithms is an obvious choice for the same. This chapter presents application of nature-inspired algorithms: particle swarm optimization, shuffled frog leaping algorithm and grey wolf optimization algorithm to the workflow scheduling problem on the cloud. Simulation results prove the efficacy of the suggested algorithms.
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Conference papers on the topic "Partial virtualization"

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Xia, Tian, Jean-Christophe Prevotet, and Fabienne Nouvel. "Mini-NOVA: A Lightweight ARM-based Virtualization Microkernel Supporting Dynamic Partial Reconfiguration." In 2015 IEEE International Parallel and Distributed Processing Symposium Workshop (IPDPSW). IEEE, 2015. http://dx.doi.org/10.1109/ipdpsw.2015.72.

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Seon Yeong Han, Byoungheon Shin, and Dongman Lee. "A fine-grain partial MAC virtualization to support cross layer design in wireless ad hoc networks." In 2014 IEEE 39th Conference on Local Computer Networks (LCN). IEEE, 2014. http://dx.doi.org/10.1109/lcn.2014.6925828.

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Vu, Duy Viet, Oliver Sander, Timo Sandmann, Steffen Baehr, Jan Heidelberger, and Juergen Becker. "Enabling partial reconfiguration for coprocessors in mixed criticality multicore systems using PCI express single-root I/O virtualization." In 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, 2014. http://dx.doi.org/10.1109/reconfig.2014.7032516.

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Liao, Lingxia, and Victor C. M. Leung. "Genetic algorithms with particle swarm optimization based mutation for distributed controller placement in SDNs." In 2017 IEEE Conference on Network Function Virtualization and Software-Defined Networks (NFV-SDN). IEEE, 2017. http://dx.doi.org/10.1109/nfv-sdn.2017.8169836.

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Souza, Rafael, Marcelo Santos, and Stênio Fernandes. "Alocação de Recursos em Funções de Redes Virtualizadas: Desafios e Perspectivas Aplicado em Data enter." In IV Workshop Pré-IETF. Sociedade Brasileira de Computação - SBC, 2017. http://dx.doi.org/10.5753/wpietf.2017.3608.

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A implementação de uma Network Function Virtualization (NFV) denota uma mudança generalizada nos serviços de comunicação e rede de uma rede de provedores de serviços para uma rede baseada em nuvem. Seu uso tem o potencial de fornecer serviços de rede baseados em nuvem com menores custos operacionais e de capital. Neste contexto, este trabalho visa identificar e discutir aplicações de NFV em arquiteturas de data center. Este estudo realiza uma revisão da literatura, para levantar as principais pesquisas sobre alocação de recurso de NFV no data center. A partir dessa pesquisa, foi identificado evidências sobre os problemas e soluções associadas a alocação de recursos de NFV em data centers. Finalmente, identificamos lacunas, desafios abertos que podem ser usadas para direcionar pesquisa futura.
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Bazurto, Nychol, Helbert Espitia, and Carlos Martinez. "Analysis of virtualization implementation for the simulation of a multiple-particle-swarms model for expansion of the Coffee Berry Borer." In 2015 Workshop on Engineering Applications - International Congress on Engineering (WEA). IEEE, 2015. http://dx.doi.org/10.1109/wea.2015.7370141.

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