Log in

Relevant bibliographies by topics / Pipeline FFT / Journal articles

To see the other types of publications on this topic, follow the link: Pipeline FFT.

Journal articles on the topic 'Pipeline FFT'

Author: Grafiati

Published: 3 June 2025

Last updated: 5 July 2025

Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles

Select a source type:

Consult the top 50 journal articles for your research on the topic 'Pipeline FFT.'

Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.

You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.

Browse journal articles on a wide variety of disciplines and organise your bibliography correctly.

1

Dai, Bo, and Ming Lu Ma. "An Automatic Measurement for Pipeline Thickness Detection Using Ultrasonic Method." Applied Mechanics and Materials 229-231 (November 2012): 1427–36. http://dx.doi.org/10.4028/www.scientific.net/amm.229-231.1427.

Full text

Abstract:

The measurement of wall thickness of pipelines is an important procedure of pipeline corrosion inspection. This procedure can be done automatically in a computer by processing data acquired from ultrasound probe, forming C-scan image, and running thickness detection algorithms. This paper presents in detail the comparison of three ways of processing, which are FFT algorithm, twice FFT algorithm, and improved twice FFT algorithm. The final results show that improved twice FFT algorithm has the best precision compared with the other two algorithms. It has higher accuracy than FFT algorithm and less decision error than twice FFT algorithm. Using this method, defects of a pipeline can be identified and measured effectively using ultrasonic wave.

APA, Harvard, Vancouver, ISO, and other styles

2

Prasanna Kumar, G., Maturi Sarath Chandra, K. Shiva Prasanna, and M. Mahesh. "Design and Implementation of AGU based FFT Pipeline Architecture." Journal of Physics: Conference Series 2089, no. 1 (2021): 012070. http://dx.doi.org/10.1088/1742-6596/2089/1/012070.

Full text

Abstract:

Abstract Present it is most needful task to get various applications with parallel computations by using a Fast Fourier Transform (FFT) and the derived outputs should be in regular format. This can be achieved by using an advanced technique called Multipath delay commutator (MDC) Pipelining FFT processor and this processor will be capable to perform the computation of a different data streams at a time. In this paper the design and implementation of AGU based Pipelined FFT architecture is done Caluclation of a butterfly is done within 2 cycles by the instructions proposed. A Data Processing Unit (DPU) is employed in this pipeline architecture and supports the instructions & an FFT Adress Generation Unit (FAGU) caluclates butterfly input & output data adresses automatically. The DPU proposed sysyem requires less area compared to commericial DSP chips. Futhermore, the proposed FAGU reduces the number of FFT computation cycles. The FFT design architecture will have real data paths. With various FFT sizes, different radix & various parallesim levels, the FFT can be mapped to the pipeline architecture. The most attractive feature of the pipelined FFT architecture is it consists of bit reversal operation so it requires little number of registers and better throughput.

APA, Harvard, Vancouver, ISO, and other styles

3

Lay-Ekuakille, Aimé, Giuseppe Griffo, Paolo Visconti, Patrizio Primiceri, and Ramiro Velazquez. "Leak Detection in Waterworks: Comparison Between STFT and FFT with an Overcoming of Limitations." Metrology and Measurement Systems 24, no. 4 (2017): 631–44. http://dx.doi.org/10.1515/mms-2017-0049.

Full text

Abstract:

AbstractDetection of leakages in pipelines is a matter of continuous research because of the basic importance for a waterworks system is finding the point of the pipeline where a leak is located and − in some cases − a nature of the leak. There are specific difficulties in finding leaks by using spectral analysis techniques like FFT (Fast Fourier Transform), STFT (Short Term Fourier Transform), etc. These difficulties arise especially in complicated pipeline configurations, e.g. a zigzag one. This research focuses on the results of a new algorithm based on FFT and comparing them with a developed STFT technique. Even if other techniques are used, they are costly and difficult to be managed. Moreover, a constraint in the leak detection is the pipeline diameter because it influences accuracy of the adopted algorithm. FFT and STFT are not fully adequate for complex configurations dealt with in this paper, since they produce ill-posed problems with an increasing uncertainty. Therefore, an improved Tikhonov technique has been implemented to reinforce FFT and STFT for complex configurations of pipelines. Hence, the proposed algorithm overcomes the aforementioned difficulties due to applying a linear algebraic approach.

APA, Harvard, Vancouver, ISO, and other styles

4

Singh, S., J. Roy, U. Panda, et al. "The GMRT High Resolution Southern Sky Survey for Pulsars and Transients. III. Searching for Long-period Pulsars." Astrophysical Journal 934, no. 2 (2022): 138. http://dx.doi.org/10.3847/1538-4357/ac7b91.

Full text

Abstract:

Abstract Searching for periodic non-accelerated signals in the presence of ideal white noise using the fully phase-coherent fast-folding algorithm (FFA) is theoretically established as a more sensitive search method than the fast Fourier transform (FFT) search with incoherent harmonic summing. In this paper, we present a comparison of the performance of an FFA search implementation using RIPTIDE and an FFT search implementation using PRESTO, over a range of signal parameters with white noise and with real telescope noise from the Giant Meterwave Radio Telescope (GMRT) High Resolution Southern Sky (GHRSS) survey with the upgraded GMRT (uGMRT). We find that the FFA search with appropriate de-reddening of the time series performs better than the FFT search with spectral whitening for long-period pulsars under real GHRSS noise conditions. We describe an FFA-search pipeline implemented for the GHRSS survey looking for pulsars over a period of 0.1–100 s and up to a dispersion measure of 500 pc cm−3. We processed GHRSS survey data covering ∼1500 deg2 of the sky with this pipeline. We re-detected 43 known pulsars with a better signal-to-noise ratio in the FFA search than in the FFT search. We also report the discovery of two new pulsars, including a long-period pulsar with a short duty cycle, using this FFA-search pipeline. A population of long-period pulsars with periods of several seconds or higher could help constrain the pulsar death line.

APA, Harvard, Vancouver, ISO, and other styles

5

Kavitha, MV S.Ranjitha Dr Suresh H. N. "REVIEW PAPER ON EFFICIENT VLSI AND FAST FOURIER TRANSFORM ARCHITECTURES." INTERNATIONAL JOURNAL OF ENGINEERING SCIENCES & RESEARCH TECHNOLOGY 6, no. 3 (2017): 15–20. https://doi.org/10.5281/zenodo.345685.

Full text

Abstract:

A fast Fourier transform (FFT) is any fast algorithm for computing the DFT. The development of FFT algorithms had a tremendous impact on computational aspects of signal processing and applied science. The decimation-in-time (DIT) fast Fourier transform (FFT) very often has advantage over the decimation-in-frequency (DIF) FFT for most real-valued applications, like speech/image/video processing, biomedical signal processing, and time-series analysis, etc., since it does not require any output reordering. Fast Fourier Transform (FFT) has the major role in obtaining the signal characteristics with minimum use of resources. Some of the algorithms have been proposed on FFT, such kind of algorithms were less effective in the performance parameters. In this paper, a variety of available FFT algorithms are presented and then different architectures are outlined by exploring the techniques and algorithms involved in each of the architectures. The widely adopted architectures and trends in architectural modification to reduce power consumption and area and to achieve high throughput are discussed.

APA, Harvard, Vancouver, ISO, and other styles

6

Zhou, Bin, Yingning Peng, and David Hwang. "Pipeline FFT Architectures Optimized for FPGAs." International Journal of Reconfigurable Computing 2009 (2009): 1–9. http://dx.doi.org/10.1155/2009/219140.

Full text

Abstract:

This paper presents optimized implementations of two different pipeline FFT processors on Xilinx Spartan-3 and Virtex-4 FPGAs. Different optimization techniques and rounding schemes were explored. The implementation results achieved better performance with lower resource usage than prior art. The 16-bit 1024-point FFT with the R22SDF architecture had a maximum clock frequency of 95.2 MHz and used 2802 slices on the Spartan-3, a throughput per area ratio of 0.034 Msamples/s/slice. The R4SDC architecture ran at 123.8 MHz and used 4409 slices on the Spartan-3, a throughput per area ratio of 0.028 Msamples/s/slice. On Virtex-4, the 16-bit 1024-point R22SDF architecture ran at 235.6 MHz and used 2256 slice, giving a 0.104 Msamples/s/slice ratio; the 16-bit 1024-point R4SDC architecture ran at 219.2 MHz and used 3064 slices, giving a 0.072 Msamples/s/slice ratio. The R22SDF was more efficient than the R4SDC in terms of throughput per area due to a simpler controller and an easier balanced rounding scheme. This paper also shows that balanced stage rounding is an appropriate rounding scheme for pipeline FFT processors.

APA, Harvard, Vancouver, ISO, and other styles

7

Szwarc, V., L. Desormeaux, W. Wong, C. P. S. Yeung, C. H. Chan, and T. A. Kwasniewski. "A chip set for pipeline and parallel pipeline FFT architectures." Journal of VLSI signal processing systems for signal, image and video technology 8, no. 3 (1994): 253–65. http://dx.doi.org/10.1007/bf02106450.

Full text

APA, Harvard, Vancouver, ISO, and other styles

8

Takahashi, Yukio, and Satoshi Sekine. "A VLSI architecture for pipeline fft processor." Systems and Computers in Japan 18, no. 12 (1987): 18–28. http://dx.doi.org/10.1002/scj.4690181203.

Full text

APA, Harvard, Vancouver, ISO, and other styles

9

Nibouche, O., S. Boussakta, M. Darnell, and M. Benaissa. "Algorithms and pipeline architectures for 2-D FFT and FFT-like transforms." Digital Signal Processing 20, no. 4 (2010): 1072–86. http://dx.doi.org/10.1016/j.dsp.2009.10.028.

Full text

APA, Harvard, Vancouver, ISO, and other styles

10

Yan, Baoyong, Jialin Tian, Xianghui Meng, and Zhe Zhang. "Vibration Characteristics and Location of Buried Gas Pipeline under the Action of Pulse Excitation." Processes 11, no. 10 (2023): 2849. http://dx.doi.org/10.3390/pr11102849.

Full text

Abstract:

In this paper, the attenuation of sound waves in underground gas pipelines and the vibration characteristics of pipelines are studied, and the feasibility and effectiveness of acoustic measurement of PE pipelines are verified. In this paper, the attenuation equation of sound waves in an underground gas transmission pipeline is derived based on the propagation characteristics of gas and the vibration characteristics of the pipeline itself. In order to verify the experimental results, we conducted an experimental test on the air pipeline model and verified the feasibility and effectiveness of the acoustic measurement of the PE pipeline through the test under the action of pulse excitation. Then, we detect the background noise, design the test scheme according to the characteristics of the buried pipeline, and select the test site for field test. In the test process, we collected the test data and obtained the spectrum diagram of the test data by fast Fourier transform (FFT). By analyzing the results of the spectrogram, we find that the pulse signal can penetrate the medium composed of the pipe formation, but the amplitude of the sound will be sharply attenuated. At the same time, according to the size of the peak in the spectrum, we can determine the location of the pipe. In summary, the feasibility and effectiveness of acoustic measurement of the PE pipeline are verified through experimental tests, and attenuation equations based on acoustic wave propagation characteristics and pipeline vibration characteristics are proposed. It has important practical application value for the safety monitoring and positioning of the buried gas pipeline.

APA, Harvard, Vancouver, ISO, and other styles

11

Lay-Ekuakille, A., G. Griffo, D. Pellicanò, P. Maris, and M. Cacciola. "A Hardware for Processing Magnetic Pressure Sensor Signals from Leak Detection in Waterworks." International Journal of Measurement Technologies and Instrumentation Engineering 3, no. 3 (2013): 35–45. http://dx.doi.org/10.4018/ijmtie.2013070103.

Full text

Abstract:

Leaks in pipelines and waterworks are detected using different methods and among them spectral analysis is one of the most interesting ones. Sources of signals to be processed are different, for example: reflected signals from ground penetrating radar and acoustic sources, signals from dedicated sensors mounted on pipelines, etc… In the latter case, magnetic pressure sensors located on the pipeline acquire vibrations and oscillations of liquids (e.g. water) in the pipeline, following a leak in the pipeline. These vibrations and oscillations are transformed in electrical signal and processed using different methods and techniques like FFT (Fast Fourier Transform), ANN (Artificial Neural Network), STFT (Short-Term Fourier Transform), and Impedance Method (IM). But there are other advanced methodical approaches that can improve the quality of the signal related to the leak; one of them is FDM (Filter Diagonalization Method). Even in presence of an advanced method, recovered signal displays undesired attenuation and noisy behavior due to different reasons, namely, hardware, background noise, materials used for pipeline construction, sensors, etc.. This paper presents a complementary hardware for processing the above signals. The hardware is based on innovating approach that minimizes additional noisy components.

APA, Harvard, Vancouver, ISO, and other styles

12

Jung, Yongchul, Jaechan Cho, Seongjoo Lee, and Yunho Jung. "Area-Efficient Pipelined FFT Processor for Zero-Padded Signals." Electronics 8, no. 12 (2019): 1397. http://dx.doi.org/10.3390/electronics8121397.

Full text

Abstract:

This paper proposes an area-efficient fast Fourier transform (FFT) processor for zero-padded signals based on the radix-2 2 and the radix-2 3 single-path delay feedback pipeline architectures. The delay elements for aligning the data in the pipeline stage are one of the most complex units and that of stage 1 is the biggest. By exploiting the fact that the input data sequence is zero-padded and that the twiddle factor multiplication in stage 1 is trivial, the proposed FFT processor can dramatically reduce the required number of delay elements. Moreover, the 256-point FFT processors were designed using hardware description language (HDL) and were synthesized to gate-level circuits using a standard cell library for 65 nm CMOS process. The proposed architecture results in a logic gate count of 40,396, which can be efficient and suitable for zero-padded FFT processors.

APA, Harvard, Vancouver, ISO, and other styles

13

Ingemarsson, Carl, Petter Kallstrom, Fahad Qureshi, and Oscar Gustafsson. "Efficient FPGA Mapping of Pipeline SDF FFT Cores." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, no. 9 (2017): 2486–97. http://dx.doi.org/10.1109/tvlsi.2017.2710479.

Full text

APA, Harvard, Vancouver, ISO, and other styles

14

Singh, S., J. Roy, B. Bhattacharyya, U. Panda, B. W. Stappers, and M. A. McLaughlin. "The GMRT High Resolution Southern Sky Survey for Pulsars and Transients. IV. Discovery of Four New Pulsars with an FFA Search." Astrophysical Journal 944, no. 1 (2023): 54. http://dx.doi.org/10.3847/1538-4357/acb05a.

Full text

Abstract:

Abstract The fast Fourier transform (FFT) based periodicity search methods provide an efficient way to search for millisecond and binary pulsars but encounter significant sensitivity degradation while searching for long period and short duty cycle pulsars. An alternative to FFT-based search methods called the fast folding algorithm (FFA) search provides superior sensitivity to search for signals with long periods and short duty cycles. In the GMRT High Resolution Southern Sky (GHRSS) survey, we are using an FFA-based pipeline to search for isolated pulsars in a period range of 100 ms to 100 s. We have processed 2800 degree2 of the sky coverage away from the Galactic plane and discovered six new pulsars. Here, we report the discovery of four of these pulsars with the FFA search pipeline. This includes a narrow duty cycle pulsar, J1936−30, which shows nulling behavior with an extreme nulling fraction of ∼90%. Two of the GHRSS discoveries from the FFA search lie in narrow duty cycle ranges beyond the limit of the existing population. The implementation of FFA search in the GHRSS survey and other pulsar surveys is expected to recover the missing population of long period and short duty cycle pulsars.

APA, Harvard, Vancouver, ISO, and other styles

15

Teymourzadeh, Rozita. "On-Chip Implementation of Pipeline Digit-Slicing Multiplier-Less Butterfly for FFT Architecture." American Journal of Engineering and Applied Sciences. ISSN 1941-7020 3, no. 4 (2010): 757–64. https://doi.org/10.5281/zenodo.1239897.

Full text

Abstract:

The need for wireless communication has driven the communication systems to high performance. However, the main bottleneck that affects the communication capability is the Fast Fourier Transform (FFT), which is the core of most modulators. This study presents an on-chip implementation of pipeline digit-slicing multiplier-less butterfly for FFT structure. The approach is taken; in order to reduce computation complexity in the butterfly, digit-slicing multiplier-less single constant technique was utilized in the critical path of Radix-2 Decimation In Time (DIT) FFT structure. The proposed design focused on the trade-off between the speed and active silicon area for the chip implementation. The new architecture was investigated and simulated with MATLAB software. The Verilog HDL code in Xilinx ISE environment was derived to describe the FFT Butterfly functionality and was downloaded to Virtex II FPGA board. Consequently, the Virtex-II FG456 Proto board was used to implement and test the design on the real hardware. As a result, from the findings, the synthesis report indicates the maximum clock frequency of 549.75 MHz with the total equivalent gate count of 31,159 is a marked and significant improvement over Radix 2 FFT butterfly. In comparison with the conventional butterfly architecture, the design that can only run at a maximum clock frequency of 198.987 MHz and the conventional multiplier can only run at a maximum clock frequency of 220.160 MHz, the proposed system exhibits better results. The resulting maximum clock frequency increases by about 276.28% for the FFT butterfly and about 277.06% for the multiplier. It can be concluded that on-chip implementation of pipeline digit-slicing multiplier-less butterfly for FFT structure is an enabler in solving problems that affect communications capability in FFT and possesses huge potentials for future related works and research areas.

APA, Harvard, Vancouver, ISO, and other styles

16

Shen, Ji Chen, Shi Rong Zhao, and Jing Min Chen. "The Processing Way of Pipeline Vibration Signal Based on Wavelet Transform." Advanced Materials Research 317-319 (August 2011): 1525–28. http://dx.doi.org/10.4028/www.scientific.net/amr.317-319.1525.

Full text

Abstract:

The vibration phenomenon of pipeline for conveying liquid and gas is very common. Based on the feature of pipeline vibration and multi-resolution of wavelet, this paper has mainly simulated the vibration signal of pipeline and made muti-scale analysis of the signal. At the same time, this paper points out that the selected frequency band which causes the vibration can be found out, by using frequency spectrum analysis of pipeline vibration signal, combined with Fast Fourier Transform (FFT).So this paper shows that the processing way of pipeline vibration signal based on wavelet transform is available.

APA, Harvard, Vancouver, ISO, and other styles

17

Lee, Sangmin, Yunho Jung, and Jaeseok Kim. "Low complexity pipeline FFT processor for MIMO-OFDM systems." IEICE Electronics Express 4, no. 23 (2007): 750–54. http://dx.doi.org/10.1587/elex.4.750.

Full text

APA, Harvard, Vancouver, ISO, and other styles

18

Sansaloni, T., A. Pérez-Pascual, V. Torres, and J. Valls. "Efficient pipeline FFT processors for WLAN MIMO-OFDM systems." Electronics Letters 41, no. 19 (2005): 1043. http://dx.doi.org/10.1049/el:20052597.

Full text

APA, Harvard, Vancouver, ISO, and other styles

19

Qu, Xiujie, Cuimei Ma, Shixin Zhang, and Sitong Lian. "High Real-Time Design of Digital Pulse Compression Based on FPGA." Mathematical Problems in Engineering 2015 (2015): 1–7. http://dx.doi.org/10.1155/2015/792862.

Full text

Abstract:

Because of the poor real-time performance of in-place fast Fourier transforms, a reconfigurable radix-4 FFT processor is studied and designed, which is based on decimation-in-time and single floating-point computation. The proposed method adopts “pipeline and parallel” structure for accessing multiple memories to improve the FFT processing speed, and then it is applied to digital pulse compression. The experimental result shows that the proposed FFT based on radix-4 computation can implement digital pulse compression rapidly under no adding hardware resources. The proposed method can be also applied to other radix FFTs.

APA, Harvard, Vancouver, ISO, and other styles

20

Cortés, A., I. Vélez, I. Zalbide, A. Irizar, and J. F. Sevillano. "An FFT Core for DVB-T/DVB-H Receivers." VLSI Design 2008 (March 27, 2008): 1–9. http://dx.doi.org/10.1155/2008/610420.

Full text

Abstract:

This paper presents the design and implementation of a 2K/4K/8K multiple mode FFT core for DVB-T/DVB-H receivers. The proposed core is based on a pipeline radix-22 SDF architecture. The necessary changes in the radix-22 SDF architecture to achieve an efficient FFT implementation are detailed. Quantization effects and timing design parameters are analyzed for DVB-T/DVB-H. Area and power results are provided for the proposed core.

APA, Harvard, Vancouver, ISO, and other styles

21

G, Ganesh Kumar. "Area and Power Efficient Pipeline FFT Architecture for QPSK-OFDM." International Journal of Advanced Trends in Computer Science and Engineering 8, no. 3 (2019): 909–12. http://dx.doi.org/10.30534/ijatcse/2019/87832019.

Full text

APA, Harvard, Vancouver, ISO, and other styles

22

Thota, Mary Roseline, Mounika Dandamudi, and Ramana Reddy R. "Design of Processing Element (PE3) for Implementing Pipeline FFT Processor." International Journal on Cybernetics & Informatics 5, no. 4 (2016): 323–31. http://dx.doi.org/10.5121/ijci.2016.5435.

Full text

APA, Harvard, Vancouver, ISO, and other styles

23

OH, J. Y. "New Radix-2 to the 4th Power Pipeline FFT Processor." IEICE Transactions on Electronics E88-C, no. 8 (2005): 1740–46. http://dx.doi.org/10.1093/ietele/e88-c.8.1740.

Full text

APA, Harvard, Vancouver, ISO, and other styles

24

Chen, Liang-Gee, Yeu-Shen Jehng, and Tzi-Dar Chiueh. "Pipeline interleaving design for FIR, IIR, and FFT array processors." Journal of VLSI signal processing systems for signal, image and video technology 10, no. 3 (1995): 275–93. http://dx.doi.org/10.1007/bf02120033.

Full text

APA, Harvard, Vancouver, ISO, and other styles

25

Meng, Xiang Bin, Jin Xiang Wang, and Hai Long Yan. "A Variable-Length FFT Processor Base on Mixed-Radix Algorithm for PAPR Reduction in OFDM Systems." Advanced Materials Research 588-589 (November 2012): 826–29. http://dx.doi.org/10.4028/www.scientific.net/amr.588-589.826.

Full text

Abstract:

An attractive technique of variable-length Fast Fourier transform (FFT) processor is proposed for PAPR reduction in orthogonal frequency division multiplexing (OFDM) systems. Mixed-radix algorithm and single path delay feedback (SDF) pipeline architecture is adopted to obtain low computation complexity and preferable flexibility for its VLSI implementation. The FFT processor can be reconfigured as 512, 1024, 2048, 4096-points, moreover, the only one RAM unit is used for store sine/cosine tables. The chip is mapped to the 0.18 CMOS technology and the core area is 7.896mm2. The experiment results show that the proposed FFT processor is suitable for PAPR reduction in OFDM communication systems.

APA, Harvard, Vancouver, ISO, and other styles

26

Zeng, Gui Gen, and Jiang Zhe Ren. "Design and Implementation of Configurable FFT/IFFT Soft-Core Based on FPGA." Applied Mechanics and Materials 241-244 (December 2012): 2901–9. http://dx.doi.org/10.4028/www.scientific.net/amm.241-244.2901.

Full text

Abstract:

As a Basic Transforming Operation between Time Field and Frequency Field, FFT Has Been Widely Used in Detection, Telecommunication, Signal Processing, Multimedia Communication Etc. the Implementation of the FFT Algorithms on FPGA Is Always the Hot Research Spots. in Order to Overcome the Shortcomings on the FPGA Resource Reusability Used in FFT Algorithm, this Article Discusses a New Configurable and High Efficient FFT/IFFT Soft-core Solution. the FFT/IFFT Soft-core Adopts Radix-22 Algorithm and Single-Path Delay Feedback (SDF) Pipeline Structure. its Configurable Factors Include: FFT/IFFT, FFT Points (2n, [3,12] ), Fixed-point Bit Width, Clock Delay of Complex Multiplier. the Design Takes FPGA Chip Stratix II EP2S130F780C4 as Hardware Platform, and the Complete Simulation and Synthesis Is Taken. the Maximum Operating Frequency Is up to 306.30MHz. if 300MHz Clock Frequency Used, 4096-point FFT Could Be Realized in 26.73us, and the Consumption of Memory Resources Is only 148Kbit. Compared with Altera FFT IP-core, Our FFT/IFFT Soft-core Has a Little Bit Longer Computing Time (0.6%). however, the LE Resource Consumption Is only 79% of Altera FFT IP-core. Platform, and the Complete Simulation and Synthesis Is Taken. the Maximum Operating Frequency Is up to 306.30MHz. if 300MHz Clock Frequency Used, 4096-point FFT Could Be Realized in 26.73us, and the Consumption of Memory Resources Is only 148Kbit. Compared with Altera FFT IP-core, Our FFT/IFFT Soft-core Has a Little Bit Longer Computing Time (0.6%). however, the LE Resource Consumption Is only 79% of Altera FFT IP-core.

APA, Harvard, Vancouver, ISO, and other styles

27

Kim, Eun-Ji, and Myung-Hoon SunWoo. "High Speed 8-Parallel Fft/ifft Processor using Efficient Pipeline Architecture and Scheduling Scheme." Journal of Korean Institute of Communications and Information Sciences 36, no. 3C (2011): 175–82. http://dx.doi.org/10.7840/kics.2011.36c.3.175.

Full text

APA, Harvard, Vancouver, ISO, and other styles

28

Garcia, J., J. A. Michell, and A. M. Buron. "VLSI configurable delay commutator for a pipeline split radix FFT architecture." IEEE Transactions on Signal Processing 47, no. 11 (1999): 3098–107. http://dx.doi.org/10.1109/78.796442.

Full text

APA, Harvard, Vancouver, ISO, and other styles

29

Storn, R. "Radix-2 FFT-pipeline architecture with reduced noise-to-signal ratio." IEE Proceedings - Vision, Image, and Signal Processing 141, no. 2 (1994): 81. http://dx.doi.org/10.1049/ip-vis:19949915.

Full text

APA, Harvard, Vancouver, ISO, and other styles

30

Alia, G., and E. Martinelli. "Optimal VLSI complexity design for high speed pipeline FFT using RNS." Computers & Electrical Engineering 24, no. 3-4 (1998): 167–82. http://dx.doi.org/10.1016/s0045-7906(97)00033-5.

Full text

APA, Harvard, Vancouver, ISO, and other styles

31

Vladimirsky, A. A., I. A. Vladimirsky, and D. N. Semenyuk. "Data Processing Based on Fast Fourier Transform in a Correlation Leak Detector." Èlektronnoe modelirovanie 46, no. 3 (2024): 97–113. http://dx.doi.org/10.15407/emodel.46.03.097.

Full text

Abstract:

Fast Fourier transform (FFT) algorithms are widely used in correlation leak detectors (CD) in the implementation of digital data processing. The combination of the computa-tional efficiency of FFT with modern high-performance mobile computing means pro-vides acceptable data processing time during leak detection. Due to the increase in the general wear and tear of pipeline networks in many countries, the requirements for reliabil-ity and efficiency in detecting and repairing damage are increasing. Meeting these re-quirements means complicating data processing algorithms to more fully take into ac-count the diversity of the acoustic environment. This is the reason for the special interest in FFT as a basic, universal algorithm, on the basis of which it is promising to further develop data processing in CD. The article describes the experience of the authors in the application of FFT in parametric CD, in particular, the use of FFT in spectral evaluation and digital filtering of signals, calculations of digital filters, calculation and further pro-cessing of correlation functions is considered.

APA, Harvard, Vancouver, ISO, and other styles

32

XIA, Kai-Feng, Bin WU, Tao XIONG, Tian-Chun YE, and Cheng-Ying CHEN. "A Hardware Efficient Multiple-Stream Pipeline FFT Processor for MIMO-OFDM Systems." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E100.A, no. 2 (2017): 592–601. http://dx.doi.org/10.1587/transfun.e100.a.592.

Full text

APA, Harvard, Vancouver, ISO, and other styles

33

Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen. "A low-power 64-point pipeline FFT/IFFT processor for OFDM applications." IEEE Transactions on Consumer Electronics 57, no. 1 (2011): 40. http://dx.doi.org/10.1109/tce.2011.5735479.

Full text

APA, Harvard, Vancouver, ISO, and other styles

34

Yunho Jung, Hongil Yoon, and Jaeseok Kim. "New efficient FFT algorithm and pipeline implementation results for OFDM/DMT applications." IEEE Transactions on Consumer Electronics 49, no. 1 (2003): 14–20. http://dx.doi.org/10.1109/tce.2003.1205450.

Full text

APA, Harvard, Vancouver, ISO, and other styles

35

Chuen-Ching Wang and Yih-Chuan Lin. "An Efficient FFT Processor for DAB Receiver Using Circuit-Sharing Pipeline Design." IEEE Transactions on Broadcasting 53, no. 3 (2007): 670–77. http://dx.doi.org/10.1109/tbc.2007.896962.

Full text

APA, Harvard, Vancouver, ISO, and other styles

36

Chang, Yun-Nan. "An Efficient VLSI Architecture for Normal I/O Order Pipeline FFT Design." IEEE Transactions on Circuits and Systems II: Express Briefs 55, no. 12 (2008): 1234–38. http://dx.doi.org/10.1109/tcsii.2008.2008074.

Full text

APA, Harvard, Vancouver, ISO, and other styles

37

Lenart, Thomas, and Viktor Owall. "Architectures for Dynamic Data Scaling in 2/4/8K Pipeline FFT Cores." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14, no. 11 (2006): 1286–90. http://dx.doi.org/10.1109/tvlsi.2006.886407.

Full text

APA, Harvard, Vancouver, ISO, and other styles

38

Chin-Teng Lin, Yuan-Chu Yu, and Lan-Da Van. "Cost-Effective Triple-Mode Reconfigurable Pipeline FFT/IFFT/2-D DCT Processor." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16, no. 8 (2008): 1058–71. http://dx.doi.org/10.1109/tvlsi.2008.2000676.

Full text

APA, Harvard, Vancouver, ISO, and other styles

39

Abdulzhraa AL-Sagheer, Radhwan Hussein, K. I. Mohammed, Alaa Abdul Hussein Mezher, and Karrar Abdullah Mohammed Habeeban. "Impact of Crack Length into Pipe Conveying Fluid Utilizing Fast Fourier transform Computer Algorithm." International Journal of Electrical and Computer Engineering (IJECE) 9, no. 4 (2019): 2541. http://dx.doi.org/10.11591/ijece.v9i4.pp2541-2547.

Full text

Abstract:

<p>One of the most prominent problems experienced by the oil facilities is leakage of oil from the pipes. This problem caused 55% of oil refineries to be shut off. Oil leakage is a common problem that often results in oil waste, damage, and hazard to public health. Therefore, it is necessary to use Modern technologies to reduce this phenomenon and avoid them in advance. Pipes that convey fluids have many uses in various industries and living facilities. Risk increases when the fluid inside the pipe is flammable. In this work, main case that cause damage to the pipe, longitudinal crack is investigate.This work presents a new experimental model based on computer applications with a Fast Fourier transform (FFT) algorithm for testing the effect of longitudinal crack length by frequency and ultrasonic measurements to measure fluid velocity. The method is used for plastic pipe with 2 cm internal diameter, 3 cm external diameter, and 1 m length. The modulus of elasticity of the material is 800 N/mm2 according to the ISO 178 test method. The pipe conveys oil with simply supported ends. The results show that FFT model shows better features compared with other ways that depends on visual inspection or localized measurements which gave an external perception of pipeline damage. FFT model offers a reliable and cheap style for ensuring pipeline integrity and warning the risks before its occurrence. From the observations made the fundamental natural frequency (FNF) decreases by increasing of crack length in the pipe that conveys fluid</p>

APA, Harvard, Vancouver, ISO, and other styles

40

Radhwan, Hussein Abdulzhraa Al-Sagheer, I. Mohammed K., Abdul Hussein Mezher Alaa, and Abdullah Mohammed Habeeban Karrar. "Impact of crack length into pipe conveying fluid utilizing fast fourier transform computer algorithm." International Journal of Electrical and Computer Engineering (IJECE) 9, no. 4 (2019): 2542–48. https://doi.org/10.11591/ijece.v9i4.pp2542-2548.

Full text

Abstract:

One of the most prominent problems experienced by the oil facilities is leakage of oil from the pipes. This problem caused 55% of oil refineries to be shut off. Oil leakage is a common problem that often results in oil waste, damage, and hazard to public health. Therefore, it is necessary to use Modern technologies to reduce this phenomenon and avoid them in advance. Pipes that convey fluids have many uses in various industries and living facilities. Risk increases when the fluid inside the pipe is flammable. In this work, main case that cause damage to the pipe, longitudinal crack is investigate.This work presents a new experimental model based on computer applications with a Fast Fourier transform (FFT) algorithm for testing the effect of longitudinal crack length by frequency and ultrasonic measurements to measure fluid velocity. The method is used for plastic pipe with 2 cm internal diameter, 3 cm external diameter, and 1 m length. The modulus of elasticity of the material is 800 N/mm2 according to the ISO 178 test method. The pipe conveys oil with simply supported ends. The results show that FFT model shows better features compared with other ways that depends on visual inspection or localized measurements which gave an external perception of pipeline damage. FFT model offers a reliable and cheap style for ensuring pipeline integrity and warning the risks before its occurrence. From the observations made the fundamental natural frequency (FNF) decreases by increasing of crack length in the pipe that conveys fluid.

APA, Harvard, Vancouver, ISO, and other styles

41

Kirubanandasarathy, N., and K. Karthikeyan. "Design of pipeline R2MDC FFT for implementation of MIMO OFDM transceivers using FPGA." Telecommunication Systems 63, no. 3 (2016): 465–71. http://dx.doi.org/10.1007/s11235-016-0136-8.

Full text

APA, Harvard, Vancouver, ISO, and other styles

42

Meng, Baoping, Guangbao Shan, and Yanwen Zheng. "Design of Spectrum Processing Chiplet Based on FFT Algorithm." Micromachines 14, no. 2 (2023): 402. http://dx.doi.org/10.3390/mi14020402.

Full text

Abstract:

With the rapid development of electronic information and computer science, the fast Fourier transform (FFT) has played an increasingly important role in digital signal processing (DSP). This paper presented a spectrum processing chiplet design method to solve slow speed, low precision, and low resource utilization in spectrum processing of general-purpose spectrum chips and field programmable gate array (FPGA). To realize signal processing, the Radix-2 4096-point FFT algorithm with pipeline structure is used to process spectral signals extracted from the time domain. To reduce the harm caused by spectrum leakage, a windowing module is added to optimize the input data, and the clock gating unit (CGU) is used to perform low-power management on the entire clock reset. The result shows the chiplet takes 0.368 ms to complete a 4096-point frequency sweep under a clock frequency of 61.44 MHz. The chiplet significantly improves speed and accuracy in spectrum processing, which has great application potential in wireless communication.

APA, Harvard, Vancouver, ISO, and other styles

43

Zhu, Huichao, Jun Tu, Chen Cai, Zhiyang Deng, Qiao Wu, and Xiaochun Song. "A Fast Signal-Processing Method for Electromagnetic Ultrasonic Thickness Measurement of Pipelines Based on UKF and SMO." Energies 15, no. 18 (2022): 6554. http://dx.doi.org/10.3390/en15186554.

Full text

Abstract:

Electromagnetic ultrasonic testing technology has advantages in measuring the thickness of pipelines in service. However, the ultrasonic signal is susceptible to corrosions on the internal and external surfaces of the pipeline. Since the electromagnetic ultrasonic signal is nonlinear, and a dynamic model is difficult to establish accurately, in this paper, a new unscented Kalman filter (UKF) method based on a sliding mode observer (SMO) is proposed. The experiments, conducted on five different testing samples, validate that the proposed method can effectively process the signals drowned in noise and accurately measure the wall thickness. Compared with FFT and UKF, the signal-to-noise ratio of the signals processed by SMO–UKF shows a maximum increase of 155% and 171%. Meanwhile, a random assignment method is proposed for the self-regulation of hyper parameters in the process of Kalman filtering. Experimental results show that the automatic adjustment of hyper parameters can be accomplished in finite cycle numbers and greatly shortens the overall filtering time.

APA, Harvard, Vancouver, ISO, and other styles

44

YOSHIZAWA, Shingo, and Yoshikazu MIYANAGA. "Design of Area- and Power-Efficient Pipeline FFT Processors for 8x8 MIMO-OFDM Systems." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E95-A, no. 2 (2012): 550–58. http://dx.doi.org/10.1587/transfun.e95.a.550.

Full text

APA, Harvard, Vancouver, ISO, and other styles

45

C, Lakshmi, and Dr P. Jesu Jayarin. "Design of Pipeline Based Low Power and Area efficient FFT for MIMO-OFDM System." International Journal of Engineering Trends and Technology 68, no. 9 (2020): 71–77. http://dx.doi.org/10.14445/22315381/ijett-v68i9p212.

Full text

APA, Harvard, Vancouver, ISO, and other styles

46

Siddiq, F., H. Jamal, T. Muhammad, and M. Iqbal. "Area Efficient Radix 4 2 64 Point Pipeline FFT Architecture Using Modified CSD Multiplier." Nucleus 51, no. 3 (2014): 345–53. https://doi.org/10.71330/thenucleus.2014.689.

Full text

Abstract:

A modified Fast Fourier Transform (FFT) based radix 42 algorithm for Orthogonal Frequency Division Multiplexing (OFDM) systems is presented. When compared with similar schemes like Canonic signed digit (CSD) Constant Multiplier, the modified CSD multiplier can provide a improvement of more than 36% in terms of multiplicative complexity. In Comparison of area being occupied the amount of full adders is reduced by 32% and amount of half adders is reduced by 42%. The modified CSD multiplier scheme is implemented on Xilinx ISE 10.1 using Spartan-III XC3S1000 FPGA as a target device. The synthesis results of modified CSD Multiplier on Xilinx show efficient Twiddle Factor ROM Design and effective area reduction in comparison to CSD constant multiplier.

APA, Harvard, Vancouver, ISO, and other styles

47

Bae, Chanhee, Seongjoo Lee, and Yunho Jung. "High-Speed Continuous Wavelet Transform Processor for Vital Signal Measurement Using Frequency-Modulated Continuous Wave Radar." Sensors 22, no. 8 (2022): 3073. http://dx.doi.org/10.3390/s22083073.

Full text

Abstract:

This paper proposes a high-speed continuous wavelet transform (CWT) processor to analyze vital signals extracted from a frequency-modulated continuous wave (FMCW) radar sensor. The proposed CWT processor consists of a fast Fourier transform (FFT) module, complex multiplier module, and inverse FFT (IFFT) module. For high-throughput processing, the FFT and IFFT modules are designed with the pipeline FFT architecture of radix-2 single-path delay feedback (R2SDF) and mixed-radix multipath delay commutator (MRMDC) architecture, respectively. In addition, the IFFT module and the complex multiplier module perform a four-channel operation to reduce the processing time from repeated operations. Simultaneously, the MRMDC IFFT module minimizes the circuit area by reducing the number of non-trivial multipliers by using a mixed-radix algorithm. In addition, the proposed CWT processor can support variable lengths of 8, 16, 32, 64, 128, 256, 512, and 1024 to analyze various vital signals. The proposed CWT processor was implemented in a field-programmable gate array (FPGA) device and verified through the measurement of heartbeat and respiration from an FMCW radar sensor. Experimental results showed that the proposed CWT processor can reduce the processing time by 48.4-fold and 40.7-fold compared to MATLAB software with Intel i7 CPU. Moreover, it can be confirmed that the proposed CWT processor can reduce the processing time by 73.3% compared to previous FPGA-based implementations.

APA, Harvard, Vancouver, ISO, and other styles

48

Ding, Jun, and Na Li. "A FPGA-Based Design of Floating-Point FFT Processor with Dual-Core." Advanced Materials Research 811 (September 2013): 441–46. http://dx.doi.org/10.4028/www.scientific.net/amr.811.441.

Full text

Abstract:

This paper presents a dual-core floating point FFT processor design based on CORDIC algorithm, enabling high-speed floating-point real-time FFT computation, and its time complexity is (N / 4) Log (N / 2). The design unifiesthe floating complex multiplication and the evaluationof twiddle factors into an iteration, which not only reduces the complexity of complex multiplication but also reduces the difficulty when the butterfly unit deals with floating-point in fast Fourier transform. The butterfly unit unaffected by the size of external memory can handle the Fourier transform with high sample number, both having wider handling range and high handling precision. It uses two logical cores and pipeline technology to improve overall system throughput, with simple hardware structure and system stability.At the end, it does the post-simulation on the Altera chip EP2C35F672C6, and its timing simulation can be run properly under the 50 MHz clock frequency.

APA, Harvard, Vancouver, ISO, and other styles

49

Laxmi Koley, Bijoy, Anupam Kumar Biswas, Surajit Batabyal, Subhadra Deb Roy, Subhasish Debroy, and Saradindu Mandal. "Ultrasonic Leak Detection Using MEMS Sensors For Industrial Pneumatic Pipeline Monitoring." Journal of Neonatal Surgery 14, no. 8S (2025): 632–44. https://doi.org/10.52783/jns.v14.2585.

Full text

Abstract:

This study presents an ultrasonic leak detection system for industrial pneumatic pipelines utilizing MEMS-based sensors. The system incorporates a conical horn (electronic gun) design to enhance signal focusing and improve detection sensitivity. Controlled experiments were conducted using six leak diameters (1–6 mm) and six pressure levels (5–30 PSI). Fast Fourier Transform (FFT) analysis was employed for feature extraction, improving the system's robustness over conventional CWT-based methods. The CNN model achieved 90% accuracy for binary leak detection, while a reduced feature-based model maintained 88.9% accuracy with improved computational efficiency. Results indicate higher detection accuracy for larger leaks at elevated pressures, while small leaks at low pressures posed greater challenges. The integration of the conical horn significantly enhanced signal clarity, particularly in detecting minor leaks. The proposed system's effective balance of accuracy, sensitivity, and computational efficiency makes it suitable for real-time industrial monitoring applications.

APA, Harvard, Vancouver, ISO, and other styles

50

Zamiri, Farshad, and Abdolreza Nabavi. "A modified Fresnel-based algorithm for 3D microwave imaging of metal objects." International Journal of Microwave and Wireless Technologies 11, no. 4 (2018): 313–25. http://dx.doi.org/10.1017/s175907871800123x.

Full text

Abstract:

AbstractMicrowave holography technique reconstructs a target image using recorded amplitudes and phases of the signals reflected from the target with Fast Fourier Transform (FFT)-based algorithms. The reconstruction algorithms have two or more steps of two- and three-dimensional Fourier transforms, which have a high computational load. In this paper, by neglecting the impact of target depth on image reconstruction, an efficient Fresnel-based algorithm is proposed, involving only one-step FFT for both single- and multi-frequency microwave imaging. Numerous tests have been performed to show the effectiveness of the proposed algorithm including planar and non-planar targets, using the raw data gathered by means of a scanner operating in X-band. Finally, a low-cost and high-speed hardware architecture based on fixed-point arithmetic is introduced which reconstructs the planar targets. This pipeline architecture was tested on field programmable gate arrays operating at 200 MHz clock frequency, which illustrates more than 30 times improvement in computation time compared with a computer.

APA, Harvard, Vancouver, ISO, and other styles

We offer discounts on all premium plans for authors whose works are included in thematic literature selections. Contact us to get a unique promo code!