Academic literature on the topic 'Pipelined Data Converters'
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Journal articles on the topic "Pipelined Data Converters"
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BARRA, SAMIR, ABDELGHANI DENDOUGA, SOUHIL KOUDA, and NOUR-EDDINE BOUGUECHAL. "CONTRIBUTION TO THE ANALYSIS AND MODELING OF THE NON-IDEAL EFFECTS OF PIPELINED ADCs USING MATLAB." Journal of Circuits, Systems and Computers 22, no. 02 (February 2013): 1250085. http://dx.doi.org/10.1142/s0218126612500855.
Full textAbstract:
The present work analyses the non-ideal effects of pipelined analog-to-digital converters (ADCs), also sometimes referred to as pipeline ADCs, including the non-ideal effects in operational amplifiers (op-amps or OAs), switches and sampling circuits. We study these nonlinear effects in pipelined ADCs built using CMOS technology and switched-capacitor (SC) techniques. The proposed improved model of a pipelined ADC includes most of the non-idealities which affect its performance. This model, simulated using MATLAB, can determine the basic blocks specifications that allow the designer to meet given data converter requirements.
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Gao, Bo, Xin Li, Jie Sun, and Jianhui Wu. "Modeling of High-Resolution Data Converter: Two-Step Pipelined-SAR ADC based on ISDM." Electronics 9, no. 1 (January 10, 2020): 137. http://dx.doi.org/10.3390/electronics9010137.
Full textAbstract:
The features of high-resolution and high-bandwidth are in an increasing demand considering to the wide range application fields based on high performance data converters. In this paper, a modeling of high-resolution hybrid analog-to-digital converter (ADC) is proposed to meet those requirements, and a 16-bit two-step pipelined successive approximation register (SAR) analog-to-digital converter (ADC) with first-order continuous-time incremental sigma-delta modulator (ISDM) assisted is presented to verify this modeling. The combination of high-bandwidth two-step pipelined-SAR ADC with low noise ISDM and background comparator offset calibration can achieve higher signal-to-noise ratio (SNR) without sacrificing the speed and plenty of hardware. The usage of a sub-ranging scheme consists of a coarse SAR ADC followed by an fine ISDM, can not only provide better suppression of the noise added in 2nd stage during conversion but also alleviate the demands of comparator’s resolution in both stages for a given power budget, compared with a conventional Pipelined-SAR ADC. At 1.2 V/1.8 V supply, 33.3 MS/s and 16 MHz input sinusoidal signal in the 40 nm complementary metal oxide semiconductor (CMOS) process, the post-layout simulation results show that the proposed hybrid ADC achieves a signal-to-noise distortion ratio (SNDR) and a spurious free dynamic range (SFDR) of 86.3 dB and 102.5 dBc respectively with a total power consumption of 19.2 mW.
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Rezapour, Arash, Farbod Setoudeh, and Mohammad Bagher Tavakoli. "Design an Improved Structure for 10-Bit Pipeline Analog to Digital Converter Based on 0.18µm CMOS Technology." Journal of Applied Engineering Sciences 9, no. 2 (December 1, 2019): 169–76. http://dx.doi.org/10.2478/jaes-2019-0023.
Full textAbstract:
Abstract This paper proposed a novel structure of a 10-bit, 400MS/s pipelined analog to digital convertor using 0.18 µm TSMC technology. In this paper, two stages are used to converter design and a new method is proposed to increase the speed of the pipeline analog to digital convertor. For this purpose, the amplifier is not used at the first stage and the buffer is used for data transfer to the second stage, in the second stage an amplifier circuit with accurate gain of 8 that is open loop with a new structure was used to speed up, also the design is such that the first 4 bits are extracted simultaneously with sampling. On the other hand, in this structure, since in the first stage the information is not amplified and transferred to the second stage, the accuracy of the comparator circuit should be high, therefore a new structure is proposed to design a comparator circuit that can detect unwanted offsets and eliminate them without delay, and thus can detect the smallest differences in input voltage. The proposed analog to digital convertor was designed with a resolution of 10 bits and a speed of 400MS/s, with the total power consumption 74.3mW using power supply of 1.8v.
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Tsyganchuk, V. V., L. S. Shlapak, O. M. Matviienkiv, and P. Ya Sydor. "Remote monitoring of gas pipelines on the basis of magnetic elastic sensors of mechanical voltage." JOURNAL OF HYDROCARBON POWER ENGINEERING 6, no. 2 (December 30, 2019): 48–55. http://dx.doi.org/10.31471/2311-1399-2019-2(12)-48-55.
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A method of controlling the stress state of gas pipelines with a four-pole magnetoanisotropic converter has been suggested. The Arduino hardware and software platform has been used to enhance the capabilities of the INI-1C basic mechanical stress measuring device. The system of remote monitoring for periodic measurements of pipeline voltages, accumulation and analysis of the received data has been described in order to provide objective information for making technological decisions.
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Ju, Haiyang, Xinhua Wang, and Yizhen Zhao. "Variational Specific Mode Extraction: A Novel Method for Defect Signal Detection of Ferromagnetic Pipeline." Algorithms 13, no. 4 (April 24, 2020): 105. http://dx.doi.org/10.3390/a13040105.
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The non-contact detection of buried ferromagnetic pipeline is a long-standing problem in the field of inspection of outside pipelines, and the extraction of magnetic anomaly signal is a prerequisite for accurate detection. Pipeline defects can cause the fluctuation of magnetic signals, which are easily submerged in wide-band background noise without external excitation sources. Previously, Variational Mode Decomposition (VMD) was used to separate modal components; however, VMD is based on narrow-band signal processing algorithm and the calculation is complex. In this article, a method of pipeline defect signal based on Variational Specific Mode Extraction (VSME) is employed to extract the signal of a specific central frequency by signal modal decomposition, i.e., the specific mode is weak magnetic anomaly signal of pipeline defects. VSME is based on the fact that a wide-band signal can be converted into a narrow-band signal by demodulation method. Furthermore, the problem of wide-band signal decomposition is expressed as an optimal demodulation problem, which can be solved by alternating direction method of multipliers. The proposed algorithm is verified by artificially synthesized signals, and its performance is better than that of VMD. The results showed that the VSME method can extract the magnetic anomaly signal of pipeline damage using experimental data, while obtaining a better accuracy.
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Shipman, R. F., S. F. Beaulieu, D. Teyssier, P. Morris, M. Rengel, C. McCoey, K. Edwards, et al. "Data processing pipeline for Herschel HIFI." Astronomy & Astrophysics 608 (December 2017): A49. http://dx.doi.org/10.1051/0004-6361/201731385.
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Context. The HIFI instrument on the Herschel Space Observatory performed over 9100 astronomical observations, almost 900 of which were calibration observations in the course of the nearly four-year Herschel mission. The data from each observation had to be converted from raw telemetry into calibrated products and were included in the Herschel Science Archive. Aims. The HIFI pipeline was designed to provide robust conversion from raw telemetry into calibrated data throughout all phases of the HIFI missions. Pre-launch laboratory testing was supported as were routine mission operations. Methods. A modular software design allowed components to be easily added, removed, amended and/or extended as the understanding of the HIFI data developed during and after mission operations. Results. The HIFI pipeline processed data from all HIFI observing modes within the Herschel automated processing environment as well as within an interactive environment. The same software can be used by the general astronomical community to reprocess any standard HIFI observation. The pipeline also recorded the consistency of processing results and provided automated quality reports. Many pipeline modules were in use since the HIFI pre-launch instrument level testing. Conclusions. Processing in steps facilitated data analysis to discover and address instrument artefacts and uncertainties. The availability of the same pipeline components from pre-launch throughout the mission made for well-understood, tested, and stable processing. A smooth transition from one phase to the next significantly enhanced processing reliability and robustness.
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Kostyuk, Yu, A. Tertishnik, and S. Nesterenko. "ENERGY SAVING TECHNOLOGIES IN THE IMPLEMENTATION OF CATHODIC PROTECTION OF PIPELINES AND TANKS." Municipal economy of cities 3, no. 163 (June 29, 2021): 109–16. http://dx.doi.org/10.33042/2522-1809-2021-3-163-109-116.
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The data on the introduction of new energy-saving technologies of cathodic protection – the installation of magnetite ground electrodes, the use of new activators based on coke breeze, a pulse converter for automatic control of cathodic protection objects are considered. Practical results show that the use of magnetite anodes allows maintaining a high permissible current density, therefore, it is suitable for widespread use in various soils and seawater. The rate of dissolution of magnetite is 0.02 kg / (A • year). Magnetite anodes are also successfully used for the repair of GAZ wells (deep earthing conductors made of metal pipes). To perform this type of work, a typical project has been developed, which allows restoring the operability of deep anode grounding with minimal costs and without the use of expensive drilling operations. The use of activated coke breeze significantly reduces the transition resistance of the anode grounding. It has been practically proven that when using a coke-mineral activator, the transition resistance is significantly reduced due to an increase in the electrical conductivity of the filler at the anode space, the geometric dimensions and current of the diverting object increase, and the transition resistance of the anode - ground is stabilized. LLC "Elmet" has developed a pulse converter of automatic control IPAU designed to convert alternating current into rectified direct current with the possibility of automatic adjustments in several parameters. The basis of the converters is a high-frequency transistor inverter, developed on the basis of the latest achievements in power electronics. The use of stations of the IPAU type with telemetry allows to reduce labor costs for their maintenance in accordance with clause R.6.1 DSTU B V.2.5-29: 2006 Gas supply system. Underground steel gas pipelines and p. 8.9 of DSTU 4219: 2003 Steel main pipelines, which will make it possible to use the freed up personnel in other areas.
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Suenaga, Tsuyoshi, Kentaro Takemura, Jun Takamatsu, and Tsukasa Ogasawara. "Data Communication Support for Reusability of RT-Components – Converter Classification and Prototype Supporting Tool –." Journal of Robotics and Mechatronics 24, no. 1 (February 20, 2012): 64–70. http://dx.doi.org/10.20965/jrm.2012.p0064.
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In RT-Middleware, a data-centric communication pipeline between RT-Components called Data Port is designed for improving software reusability. OMG standardization such as the Robotic Localization Service is also promoted. However, the actual I/O specification is different in each developer. In this paper, we first enumerate all connection patterns of possible communication by adjusting protocols. We then propose a supporting tool for flexible data communication. The proposed tool generates source code based on information on the desired conversion. We actually implement the prototype tool of the automatic source code generator and evaluate it.
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Kroupin, Pavel, Victoria Kuznetsova, Dmitry Romanov, Alina Kocheshkova, Gennady Karlov, Thi Xuan Dang, Thi Mai L. Khuat, et al. "Pipeline for the Rapid Development of Cytogenetic Markers Using Genomic Data of Related Species." Genes 10, no. 2 (February 1, 2019): 113. http://dx.doi.org/10.3390/genes10020113.
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Repetitive DNA including tandem repeats (TRs) is a significant part of most eukaryotic genomes. TRs include rapidly evolving satellite DNA (satDNA) that can be shared by closely related species, their abundance may be associated with evolutionary divergence, and they have been widely used for chromosome karyotyping using fluorescence in situ hybridization (FISH). The recent progress in the development of whole-genome sequencing and bioinformatics tools enables rapid and cost-effective searches for TRs including satDNA that can be converted into molecular cytogenetic markers. In the case of closely related taxa, the genome sequence of one species (donor) can be used as a base for the development of chromosome markers for related species or genomes (target). Here, we present a pipeline for rapid and high-throughput screening for new satDNA TRs in whole-genome sequencing of the donor genome and the development of chromosome markers based on them that can be applied in the target genome. One of the main peculiarities of the developed pipeline is that preliminary estimation of TR abundance using qPCR and ranking found TRs according to their copy number in the target genome; it facilitates the selection of the most prospective (most abundant) TRs that can be converted into cytogenetic markers. Another feature of our pipeline is the probe preparation for FISH using PCR with primers designed on the aligned TR unit sequences and the genomic DNA of a target species as a template that enables amplification of a whole pool of monomers inherent in the chromosomes of the target species. We demonstrate the efficiency of the developed pipeline by the example of FISH probes developed for A, B, and R subgenome chromosomes of hexaploid triticale (BBAARR) based on a bioinformatics analysis of the D genome of Aegilops tauschii (DD) whole-genome sequence. Our pipeline can be used to develop chromosome markers in closely related species for comparative cytogenetics in evolutionary and breeding studies.
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Akrami, Y., F. Argüeso, M. Ashdown, J. Aumont, C. Baccigalupi, M. Ballardini, A. J. Banday, et al. "Planck2018 results." Astronomy & Astrophysics 641 (September 2020): A2. http://dx.doi.org/10.1051/0004-6361/201833293.
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We present a final description of the data-processing pipeline for thePlanckLow Frequency Instrument (LFI), implemented for the 2018 data release. Several improvements have been made with respect to the previous release, especially in the calibration process and in the correction of instrumental features such as the effects of nonlinearity in the response of the analogue-to-digital converters. We provide a brief pedagogical introduction to the complete pipeline, as well as a detailed description of the important changes implemented. Self-consistency of the pipeline is demonstrated using dedicated simulations and null tests. We present the final version of the LFI full sky maps at 30, 44, and 70 GHz, both in temperature and polarization, together with a refined estimate of the solar dipole and a final assessment of the main LFI instrumental parameters.
Dissertations / Theses on the topic "Pipelined Data Converters"
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Cho, Chang-Hyuk. "A Power Optimized Pipelined Analog-to-Digital Converter Design in Deep Sub-Micron CMOS Technology." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7578.
Full textAbstract:
High-speed, medium-resolution, analog-to-digital converters (ADCs) are important building blocks in a wide range of applications. High-speed, medium-resolution ADCs have been implemented by various ADC architectures such as a folding ADC, a subranging ADC, and a pipeline ADC. Among them, pipeline ADCs have proven to be efficient architectures for applications such as digital communication systems, data acquisition systems and video systems. Especially, power dissipation is a primary concern in applications requiring portability. Thus, the objective of this work is to design and build a low-voltage low-power medium-resolution (8-10bits) high-speed pipeline ADC in deep sub-micron CMOS technology.
The non-idealities of the circuit realization are carefully investigated in order to identify the circuit requirements for a low power circuit design of a pipeline ADC. The resolution per stage plays an important role in determining overall power dissipation of a pipeline ADC. The pros and cons of both large and small number of bits per-stage are examined. A power optimization algorithm is developed to decide more accurately which approach is better for lower power dissipation. Both identical and non-identical number of bit per-stage approaches are considered and their differences are analyzed.
A low-power, low-voltage 10-bit 100Msamples/s pipeline ADC was designed and implemented in a 0.18mm CMOS process. The power consumption was minimized with the right selection of the per-stage resolution based on the result of the power optimization algorithm and by the scaling down the sampling capacitor size in subsequent stages.
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"A 1.2V 25MSPS Pipelined ADC Using Split CLS with Op-amp Sharing." Master's thesis, 2012. http://hdl.handle.net/2286/R.I.15206.
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abstract: ABSTRACT As the technology length shrinks down, achieving higher gain is becoming very difficult in deep sub-micron technologies. As the supply voltages drop, cascodes are very difficult to implement and cascade amplifiers are needed to achieve sufficient gain with required output swing. This sets the fundamental limit on the SNR and hence the maximum resolution that can be achieved by ADC. With the RSD algorithm and the range overlap, the sub ADC can tolerate large comparator offsets leaving the linearity and accuracy requirement for the DAC and residue gain stage. Typically, the multiplying DAC requires high gain wide bandwidth op-amp and the design of this high gain op-amp becomes challenging in the deep submicron technologies. This work presents `A 12 bit 25MSPS 1.2V pipelined ADC using split CLS technique' in IBM 130nm 8HP process using only CMOS devices for the application of Large Hadron Collider (LHC). CLS technique relaxes the gain requirement of op-amp and improves the signal-to-noise ratio without increase in power or input sampling capacitor with rail-to-rail swing. An op-amp sharing technique has been incorporated with split CLS technique which decreases the number of op-amps and hence the power further. Entire pipelined converter has been implemented as six 2.5 bit RSD stages and hence decreases the latency associated with the pipelined architecture - one of the main requirements for LHC along with the power requirement. Two different OTAs have been designed to use in the split-CLS technique. Bootstrap switches and pass gate switches are used in the circuit along with a low power dynamic kick-back compensated comparator.Dissertation/Thesis
M.S. Electrical Engineering 2012
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"Triple Sampling an Application to a 14b 10 MS/s Cyclic Converter." Doctoral diss., 2012. http://hdl.handle.net/2286/R.I.15818.
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abstract: Semiconductor device scaling has kept up with Moore's law for the past decades and they have been scaling by a factor of half every one and half years. Every new generation of device technology opens up new opportunities and challenges and especially so for analog design. High speed and low gain is characteristic of these processes and hence a tradeoff that can enable to get back gain by trading speed is crucial. This thesis proposes a solution that increases the speed of sampling of a circuit by a factor of three while reducing the specifications on analog blocks and keeping the power nearly constant. The techniques are based on the switched capacitor technique called Correlated Level Shifting. A triple channel Cyclic ADC has been implemented, with each channel working at a sampling frequency of 3.33MS/s and a resolution of 14 bits. The specifications are compared with that based on a traditional architecture to show the superiority of the proposed technique.Dissertation/Thesis
Ph.D. Electrical Engineering 2012
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Gandara, Miguel Francisco. "A 12-bit, 10 Msps two stage SAR-based pipeline ADC." 2012. http://hdl.handle.net/2152/19973.
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The market for battery powered communications devices has grown significantly in recent years. These devices require a large number of analog to digital converters (ADCs) to transform wireless and other physical data into the digital signals required for digital signal processing elements and micro-processors. For these applications, power efficiency and accuracy are of the
utmost importance. Successive approximation register (SAR) ADCs are frequently used in power constrained applications, but their main limitation is their low sampling rate. In this work, a two stage pipelined ADC is presented
that attempts to mitigate some of the sampling rate limitations of a SAR while maintaining its power and resolution advantages. Special techniques are used to reduce the overall sampling capacitance required in both SAR stages and
to increase the linearity of the multiplying digital to analog converter (MDAC) output. The SAR sampling network, control logic, and MDAC blocks are completely
implemented. Ideal components were used for the clocking, comparators, and switches. At the end of this design, a figure of merit of 51 fJ/conversion-step was achieved.text
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Kuo, Ming-Hung. "Low-power high-linearity digital-to-analog converters." Thesis, 2012. http://hdl.handle.net/1957/28313.
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In this thesis work, a design of 14-bit, 20MS/s segmented digital-to-analog converter
(DAC) is presented. The segmented DAC uses switched-capacitor configuration to
implement 8 (LSB) + 6 (MSB) segmented architecture to achieve high performance for
minimum area. The implemented LSB DAC is based on quasi-passive pipelined DAC
that has been proven to provide low power and high speed operation. Typically, capacitor
matching is the best among all integrated circuit components but the mismatch among
nominally equal value capacitors will introduce nonlinear distortion. By using dynamic
element matching (DEM) technique in the MSB DAC, the nonlinearity caused by
capacitor mismatch is greatly reduced. The output buffer employed direct charge transfer
(DCT) technique that can minimize kT/C noise without increasing the power dissipation.
This segmented DAC is designed and simulated in 0.18 μm CMOS technology, and the
simulated core DAC block only consumes 403 μW.Graduation date: 2012
Book chapters on the topic "Pipelined Data Converters"
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Lin, Yu, Athon Zanikopoulos, Kostas Doris, Hans Hegt, and Arthur H. M. van Roermund. "A Power-Optimized High-Speed and High-Resolution Pipeline ADC with a Parallel Sampling First Stage for Broadband Multi-Carrier Systems." In Design, Modeling and Testing of Data Converters, 3–28. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-39655-7_1.
Full textConference papers on the topic "Pipelined Data Converters"
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Yu Lin, V. Katyal, and R. Geiger. "New over-range protection scheme in pipelined data converters." In 48th Midwest Symposium on Circuits and Systems, 2005. IEEE, 2005. http://dx.doi.org/10.1109/mwscas.2005.1594094.
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Gines, Antonio, and Gildas Leger. "Sigma-delta testability for pipeline A/D converters." In Design Automation and Test in Europe. New Jersey: IEEE Conference Publications, 2014. http://dx.doi.org/10.7873/date.2014.384.
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Chia-Chi Ho and Tai-Cheng Lee. "A 10-bit 200-MS/s reconfigurable pipelined A/D converter." In 2012 International Symposium on VLSI Design, Automation and Test (VLSI-DAT). IEEE, 2012. http://dx.doi.org/10.1109/vlsi-dat.2012.6212593.
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Danielson, Erik C. "GIS Tools and Techniques for Environmental Assessment of Pipeline Construction." In 2008 7th International Pipeline Conference. ASMEDC, 2008. http://dx.doi.org/10.1115/ipc2008-64428.
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The purpose of this paper is to demonstrate GIS and GPS tools for the assessment and mapping of environmental features for natural gas pipeline construction projects. Environmental permitting of pipeline projects typically involve the integration of construction design drawings, GPS-delineated field data, and various Federal, State, or local GIS data layers. Accelerated project schedules and frequent changes to routes and construction footprints emphasize the need for efficient geoprocessing tools and procedures. A standard protocol for GPS field data collection of environmental features ensures consistency and facilitates analysis of the data. Geoprocessing tools such as linear referencing allow for rapid analysis of proximity and potential impacts. Interoperability tools in ArcGIS™ software facilitates integration of AutoCAD® or Microstation™ files provided by pipeline engineers and allow environmental layers to be converted for inclusion on alignment sheets. Cartographic tools and capabilities in ArcGIS provide an efficient means for generating maps and figures for reports.
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Shyu, Ya-Ting, Cheng-Wu Lin, Jin-Fu Lin, and Soon-Jyh Chang. "A gm/ID-based synthesis tool for pipelined analog to digital converters." In 2009 International Symposium on VLSI Design, Automation and Test (VLSI-DAT). IEEE, 2009. http://dx.doi.org/10.1109/vdat.2009.5158154.
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Smith, Bruce, Yan Wong, and Steve Adam. "The Use of Lidar to Facilitate Design and Construction of Pipelines." In 2008 7th International Pipeline Conference. ASMEDC, 2008. http://dx.doi.org/10.1115/ipc2008-64057.
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Within the last decade, airborne lidar (Light Detection And Ranging) equipment has evolved to the point where it can provide accurate ground surface elevations on a dense grid (often 1m by 1m) along pipeline corridors, at a cost that is a fraction of the cost for a comparable ground based topographic survey. This paper explains how lidar is used to acquire topographic data and how the data are converted to digital terrain models referenced to geodetic benchmarks. The accuracy and density of topographic data acquired by lidar surveys can be used to greatly facilitate pipeline design and reduce pipeline construction costs. The major benefits include: 1) The density of ground surface elevations obtained using lidar are significantly better than can be obtained using photogrammetry or conventional ground based survey methods. 2) The survey data can be collected over large areas in a matter of days and with virtually no disturbance to landowners. 3) The digital terrain models derived from lidar survey data can be imported into existing drafting (CAD) software and used to efficiently generate centerline profiles, cross-sections and alignment sheets as required for pipeline design and construction. 4) Hillshade maps derived from lidar data have proven extremely useful in pipeline route studies because they allow surface features to be identified and often avoided, thereby minimizing pipeline construction and operating costs.
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Dupuis, Bruce, and Jason Humber. "The Evolution of Data Management to Empower Integrity Management Decisions: A Case Study of an Enterprise Implementation." In 2002 4th International Pipeline Conference. ASMEDC, 2002. http://dx.doi.org/10.1115/ipc2002-27415.
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BP’s Natural Gas Liquids business unit (NGLBU) has conducted integrity investigation and mitigation activities on its pipelines and has been following this best practice for numerous years. In recent times, NGLBU’s data management initiatives focused on establishing an enterprise Geographic Information System (GIS) coupled tightly with a derivative of the Pipeline Open Data Standard (PODS) data model. During successful implementation of the GIS, an analysis identified gaps in existing data management processes for pipeline integrity information. Consequently, the business unit adopted Baseline Technology’s Pipeline Information Control System (PICS) and its modules to support the pipeline integrity decision-making process on its 9000km of pipeline. The PICS implementation leverages the existing GIS implementation while addressing a number of unresolved data management and integration issues, including: • Integration of inline inspection with excavation results; • Migration of above ground surveys to a common repository; • Integration of multiple inline inspections; • Facilitation of corrosion growth modeling; • Structured process for prioritization of remediation; • Structured process for integration of inline inspections with risk parameters; • Defined data collection, storage, and integration standards. Data management solutions based solely on a GIS require pipeline surveys without explicit positional information to be converted into a common linear reference system (typically chainage or stationing) such that disparate data sets may be overlaid and compared. This conversion, or spatial normalization, process is where much of the data management effort is spent and is often prone to error introduction. Even when small errors are introduced, the normalization process is often performed such that it is not auditable. If the underlying spatial errors are not reported, addressed, and understood, the value of the data integration and any subsequent analysis of the combined data set is questionable.
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Goplen, Stig, Pa˚l Stro̸m, Erik Levold, and Kim J. Mo̸rk. "HotPipe JIP: HP/HT Buried Pipelines." In ASME 2005 24th International Conference on Offshore Mechanics and Arctic Engineering. ASMEDC, 2005. http://dx.doi.org/10.1115/omae2005-67524.
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The HotPipe Project is a Joint Industry Project, whose overall objective is to prepare a DNV Recommended Practice to be used in structural design of high temperature/high pressure pipelines. The developed design criteria are based on the application of structural reliability methods to calibrate the partial safety factors involved. One of the three scenarios covered in this DNV-RP is buried pipes subjected to upheaval buckling which is discussed in this paper. The most significant factor in this scenario is uncertainty in the pipeline configuration and uncertainty in the pipe-soil interaction. The paper presents the background of the proposed soil capacities and the associated uncertainties for both uplift resistance and downward resistance in cohesive and non-cohesive soil. The paper links these soil models with the design requirements to upheaval buckling including: - Functional requirements i.e. survey data accuracy, smoothing of survey data, modeling of the pipeline, design conditions, soil cover etc.; - Trenching technology; - Qualification of the minimum soil cover, natural or artificial, with the aim to guarantee pipeline stability; - Assessment of pipeline response; - Pipe integrity checks and design criteria. The internal confidential project guideline has been completed and is currently in the process of being converted into an official DNV-RP-F110, to be published later this year.
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Sharp, Andrew, and Mitch Pryor. "Data Driven Virtual Fixtures for Improved Shared Control." In ASME 2018 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. American Society of Mechanical Engineers, 2018. http://dx.doi.org/10.1115/detc2018-86209.
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The Department of Energy desires to increase radioactive waste treatment automation in order to minimize radiation worker exposure. Many treatment processes require maintaining tool orientation and surface distance including inspection and dismantling tasks. This paper expands on previous shape primitive virtual fixture generation techniques to increase their expressiveness based on surface models. A robotic hardware-agnostic virtual fixture generation pipeline is constructed and tested with varied superellipsoid and supertoroid models. The pipeline converts surface models into a bi-directional graphs representing layers of offset guidance virtual fixtures. Surface models function as forbidden region virtual fixtures and are combined with the graph structure into task virtual fixtures. Results show a correlation between distance to the surface and graph layer vertices. Surface model concavity also affects the growth of offset layer vertices. Incorrect model surface normals do result in irregular graph layers and the pipeline has been tested on CAD models.
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Rosenfeld, M. J., Benjamin Zand, and Adam Steiner. "Power Spectral Density Analysis of Pipeline Pressures for Probabilistic Assessment." In 2020 13th International Pipeline Conference. American Society of Mechanical Engineers, 2020. http://dx.doi.org/10.1115/ipc2020-9587.
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Abstract Pipeline pressure-cycle fatigue analysis is typically performed by analyzing pressure data in the amplitude domain and then calculating incremental fatigue crack growth in accordance with the Paris Law. Alternatively, the stochastic pressure history is converted to an equivalent number of uniform-amplitude cycles using a cumulative damage rule. The fatigue life may then be estimated by integration of the Paris Law. This second approach is computationally less involved and therefore lends itself to a probabilistic analysis because of the large number of iterations necessary with techniques such as Monte Carlo analysis. However, studies have shown that for a broadband stochastic signal, applying linear cumulative damage can introduce large errors. The presence and magnitude of error cannot be easily determined by inspection of the pressure signal. This paper describes the analysis of the pipeline pressure signal in the frequency domain to determine the power spectral density. The result can be used to estimate correction factors to the estimated linear cumulative damage fraction. The corrections may then be applied with a simplified integration of the Paris Law in closed form to improve both accuracy and speed for probabilistic assessment. The computation time for a probabilistic assessment may potentially be reduced by a significant factor.