Relevant bibliographies by topics / Post Etch Residue Removal

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Academic literature on the topic 'Post Etch Residue Removal'

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Published: 4 June 2021
Last updated: 1 February 2022

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Journal articles on the topic "Post Etch Residue Removal"

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Lee, Hong-Ji, Che-Lun Hung, Chia-Hao Leng, Nan-Tzu Lian, Ling-Wu Young, Tahone Yang, Kuang-Chao Chen, and Chih-Yuan Lu. "Etch Defect Characterization and Reduction in Hard-Mask-Based Al Interconnect Etching." International Journal of Plasma Science and Engineering 2008 (September 23, 2008): 1–5. http://dx.doi.org/10.1155/2008/154035.

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This paper identifies the defect adders, for example, post hard-mask etch residue, post metal etch residue, and blocked etch metal island and investigates the removal characteristics of these defects within the oxide-masked Al etching process sequence. Post hard-mask etch residue containing C atom is related to the hardening of photoresist after the conventional post-RIE ashing at 275∘C. An in situ O2-based plasma ashing on RIE etcher was developed to prevent the photoresist hardening from the high-ashing temperature; followed wet stripping could successfully eliminate such hardened polymeric residue. Post metal etch residue was caused from the attack of the Al sidewall by Cl atoms, and too much CHF3 addition in the Al main etch step passivated the surface of Al resulting in poor capability to remove the Al-containing residue. The lower addition of CHF3 in the Al main etch step would benefit from the residue removal. One possibility of blocked etch metal island creating was due to the micromasking formed on the opening of TiN during the hard-mask patterning. We report that an additional TiN surface pretreatment with the Ar/CHF3/N2 plasmas could reduce the impact of the micromasking residues on blocked metal etch.
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Pollard, Kimberly, Meng Guo, Richie Peters, Mike Phenis, Laura Mauer, John Taddei, Ramey Youssef, and John Clark. "Efficient TSV Resist and Residue Removal in 3DIC." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, DPC (January 1, 2014): 001435–69. http://dx.doi.org/10.4071/2014dpc-wp12.

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The continuing challenge to meet the need for lighter, smaller, faster and smarter electronic systems has pushed the advancement of 2.5D and 3D technology. The ability to create and integrate through-silicon vias (TSV) into device designs in 2.5- and 3-D platforms allows a decrease in interconnection path length, which results in improved device performance and reliability in a small form factor. Mainly due to its high silicon etch rate and selectivity to mask materials, the Bosch process is often used in the TSV fabrication. In this process, the silicon via is created by the deep reactive ion etching (DRIE). DRIE is comprised of repeating a combination of steps: an etch step and a passivation step. The passivation created in the DRIE process results in a fluoropolymer residue remaining on the wafer at the end of the process. The residue must be removed to enable deposition of a defect-free barrier, which enables a defect-free seed layer and void-free plating into the via. There are numerous technical papers and presentations on the etching and filling of these vias but the process for cleaning remains under addressed. Initially, standard processes used after RIE and consisting of an ashing process to remove any remaining photoresist, followed by immersion in a solution-based post etch residue remover were adopted for post-TSV cleans. However, the fluoropolymer does not have the same chemical characteristics as typical post-RIE etch residues and the major challenge has been the difficulty to completely remove it, especially on the via sidewall, using traditional post etches residue removers. Therefore, new formulated cleaning solutions and processes are actively sought for the removal of post etch residue for TSVs. This paper will describe a robust cleaning process for one step removal of both the photoresist and sidewall polymer residues from TSVs. A combination soak and high pressure spray process using a proprietary environmentally friendly chemistry, coupled with a megasonic final rinse provides a unique solution for both polymer residue and photoresist removals on high aspect ratio vias. SEM, EDX and Auger analysis will illustrate the cleanliness levels achieved.
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young-tack, Hong, Young il Kim, Moon-chul Lee, Park sunhee, Shim dongha, C. M. Park, Byungyou Hong, Yonghan Roh, Sung hae Jung, and Insang Song. "Post-etch residue removal in BCB/Cu interconnection structure." Thin Solid Films 435, no. 1-2 (July 2003): 238–41. http://dx.doi.org/10.1016/s0040-6090(03)00332-8.

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Thanu, D. P. R., S. Raghavan, and M. Keswani. "Post Plasma Etch Residue Removal in Dilute HF Solutions." Journal of The Electrochemical Society 158, no. 8 (2011): H814. http://dx.doi.org/10.1149/1.3597618.

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Cazes, M., Christian Pizzetti, Jerome Daviot, Philippe Garnier, Lucile Broussous, Laurence Gabette, and Pascal Besson. "Customized Chemical Compositions Adaptable for Cleaning Virtually all Post-Etch Residues." Solid State Phenomena 282 (August 2018): 121–25. http://dx.doi.org/10.4028/www.scientific.net/ssp.282.121.

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A post-etch residue cleaning formulation, based on balancing the aggressiveness of hydrofluoric acid with its well-known residue removal properties is introduced. In a series of investigations originally motivated by the cleaning challenge provided by high-k dielectric-based residues, a formulation platform is developed that successfully cleans residues resulting from the plasma patterning of tantalum oxide and similar materials while maintaining metal and dielectric compatibility. It is further shown that the fundamental advantages of this solution can be extended to the cleaning of other, more traditional post-etch residues, with no sacrifice in compatibility, as demonstrated by measurements on blanket films and through SEM data.
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Le, Quoc Toan, F. Drieskens, T. Conard, M. Lux, J. F. de Marneffe, H. Struyf, and G. Vereecke. "Modification of Post-Etch Residues by UV for Wet Removal." Solid State Phenomena 187 (April 2012): 207–10. http://dx.doi.org/10.4028/www.scientific.net/ssp.187.207.

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In back-end of line processing, the polymer deposited on the dielectric sidewalls during the etch must be removed prior to subsequent processing steps to achieve high adhesion and good coverage of materials deposited in the etched features [1,. Typically, this is done by a combination of short plasma treatment and diluted wet clean, or by wet cleans alone. On the one hand, for porous dielectric stacks, a mild plasma treatment that preserves the integrity of the low-k dielectrics would not be sufficient to efficiently remove this residue. Furthermore, aqueous cleaning solutions is not efficient to achieve a complete removal without etching the underlying layer. Hence appropriate wet clean chemistries are needed to dissolve/decompose these polymers without etching the dielectric. On the other hand, analytical techniques available for direct characterization of sidewall polymer are limited. For a fast screening of potential chemistries capable of dissolving/removing polymer residues generated during the low-k etch, a fluoropolymer deposited on a blanket, checkerboard low-k substrate was used as a model polymer. In our recent study [, using X-ray photoelectron spectroscopy (XPS), it was shown that the polymer was composed of CF, CF2, and CF3 groups. This model polymer was found to be very similar to the polymer residue generated during the etch of the low-k stack using similar plasma. The present study mainly focused on the effect of UV treatment and the concentration of active component in wet clean solution on the structure change of the polymer and the enhancement of polymer removal.
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Mauer, Laura, John Taddei, Ramey Youssef, Kimberly Pollard, and Allison Rector. "TSV Resist and Residue Removal." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2011, DPC (January 1, 2011): 001596–620. http://dx.doi.org/10.4071/2011dpc-wp14.

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3D integration is the most active methodology for increasing device performance. The ability to create Through Silicon Vias (TSV) provides the shortest path for interconnections and will result in increased device speed and reduced package footprint. There are numerous technical papers and presentations on the etching and filling of these vias, however the process for cleaning is seldom mentioned. Historically, after reactive ion etching (RIE), cleaning is accomplished using an ashing process to remove any remaining photoresist, followed by dipping the wafer in a solution-based post etch residue remover. However, in the case of TSV formation, deep reactive ion etching (DRIE) is used to create the vias. A byproduct of this etching process is the formation of a fluorinated passivation layer, often referred to as a fluoropolymer. The fluoropolymer is not easily removed using traditional post etch residue removers, thus creating the opportunity for new and improved formulations and processes for its removal. This paper will describe a robust cleaning process for one step removal of both the photoresist and sidewall polymer residues from TSVs. A combination soak and high pressure spray process using Dynastrip™ AP7880™-C, coupled with a megasonic final rinse provides clean results for high aspect ratio vias. SEM, EDX and Auger analysis will illustrate the cleanliness levels achieved.
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Le, Quoc Toan, Els Kesters, I. Hoflijk, T. Conard, M. Shen, S. Braun, Y. Burk, and Frank Holsteyns. "Characterization of Etch Residues Generated on Damascene Structures." Solid State Phenomena 255 (September 2016): 227–31. http://dx.doi.org/10.4028/www.scientific.net/ssp.255.227.

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For patterned TiN/silicon oxide/low-k dielectric stack, fluorinated etch residues were detected on the TiN surface, the dielectric sidewall and bottom, regardless of the low-k material used in the stack. XPS results showed that they consisted of polymer-based (CFx) residues deposited on trench sidewall and bottom, and metal-based (TiFx) residues mainly deposited on top surface. In terms of post-etch residue removal, the efficiency of various wet clean solutions can be clearly distinguished for CFx, and TiFx using the same patterned porous low-k stack. These results also demonstrate that the removal of both TiFx and CFx residues generated during the plasma is possible in one step with optimized chemical and process.
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Myneni, Satyanarayana, and Dennis W. Hess. "Post-Plasma-Etch Residue Removal Using CO[sub 2]-Based Fluids." Journal of The Electrochemical Society 150, no. 12 (2003): G744. http://dx.doi.org/10.1149/1.1621879.

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Akanishi, Yuya, Quoc Toan Le, and Efrain Altamirano Sánchez. "Removal of Post Etch Residue on BEOL Low-K with Nanolift." Solid State Phenomena 314 (February 2021): 277–81. http://dx.doi.org/10.4028/www.scientific.net/ssp.314.277.

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Particle removal from BEOL low-k structures is studied using a novel particle removal technique, called Nanolift which removes particles from the substrate by forming a thin polymer film on the surface and removing the polymer film together with the particles. It was confirmed that Nanolift is capable to remove TiFx particles successfully which are generated during the low-k dry etch process for dual damascene structure formation for BEOL interconnect fabrication. Pattern collapse of the fragile low-k structure was confirmed to be prevented by Nanolift in comparison with conventional dual fluid spray cleaning method. FTIR results show that Nanolift leaves no residual polymer remain in low-k films and K-value shift by the Nanolift process was negligible and comparable with the conventional formulated chemistry cleaning process. From these results, Nanolift can be concluded as a suitable cleaning process for advanced BEOL fabrication process.
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Dissertations / Theses on the topic "Post Etch Residue Removal"

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Timmons, Christopher L. "Fluorocarbon Post-Etch Residue Removal Using Radical Anion Chemistry." Diss., Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/10583.

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During fabrication of integrated circuits, fluorocarbon plasma etching is used to pattern dielectric layers. As a byproduct of the process, a fluorocarbon residue is deposited on exposed surfaces and must be removed for subsequent processing. Conventional fluorocarbon cleaning processes typically include at least one plasma or liquid treatment that is oxidative in nature. Oxidative chemistries, however, cause material degradation to next generation low-dielectric constant (low-k) materials that are currently being implemented into fabrication processes. This work addresses the need for alternative fluorocarbon-residue removal chemistries that are compatible with next generation low-k materials. Radical anion chemistries are known for their ability to defluorinate fluorocarbon materials by a reductive mechanism. Naphthalene radical anion solutions, generated using sodium metal, are used to establish cleaning effectiveness with planar model residue films. The penetration rate of the defluorination reaction into model fluorocarbon film residues is measured and modeled. Because sodium is incompatible with integrated circuit processing, naphthalene radical anions are alternatively generated using electrochemical techniques. Using electrochemically-generated radical anions, residue removal from industrially patterned etch structures is used to evaluate the process cleaning efficiency. Optimization of the radical anion concentration and exposure time is important for effective residue removal. The efficiency of removal also depends on the feature spacing and the electrochemical solvent chosen. The synergistic combination of radical anion defluorination and wetting or swelling of the residue by the solvent is necessary for complete removal. In order to understand the interaction between the solvent and the residue, the surface and interfacial energy are determined using an Owens/Wendt analysis. These studies reveal chemical similarities between specific solvents and the model residue films. This approach can also be used to predict residue or film swelling by interaction with chemically similar solvents.
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Myneni, Satyanarayana. "Post Plasma Etch Residue Removal Using Carbon Dioxide Based Fluids." Diss., Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/7605.

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As feature sizes in semiconductor devices become smaller and newer materials are incorporated, current methods for photoresist and post plasma etch residue removal face several challenges. A cleaning process should be environmentally benign, compatible with dielectric materials and copper, and provide residue removal from narrow and high aspect ratio features. In this work, sub-critical CO2 based mixtures have been developed to remove the etch residues; these mixtures satisfy the above requirements and can potentially replace the two step residue removal process currently used in the integrated circuit (IC) industry. Based on the chemical nature of the residue being removed, additives or co-solvents to CO2 have been identified that can remove the residues without damaging the dielectric layers. Using the phase behavior of these additives as a guide, the composition of the co-solvent was altered to achieve a single liquid phase at moderate pressures without compromising cleaning ability. The extent of residue removal has been analyzed primarily by x-ray photoelectron spectroscopy (XPS) and scanning electron microscopy (SEM). Various techniques such as attenuated total reflection - Fourier transform infrared (ATR-FTIR) spectroscopy, angle-resolved XPS (ARXPS), and interferometry were used to probe the interaction of cleaning fluids with residues. Model films of photoresists and plasma deposited residues were used to assist in understanding the mechanism of residue removal. From these studies, it was concluded that residue removal takes place primarily by attack of the interface between the residue and the substrate; a solvent rinse then lifts these residues from the wafer. It has been shown that transport of the additives to the interface is enhanced in the presence of CO2. From positronium annihilation lifetime spectroscopy (PALS) studies on a porous dielectric film, it has been shown that these high pressure fluids do not cause significant changes to the pore sizes or the bonding structure of the film. Hence, this method can be used to remove post etch residues from low-k dielectric films.
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Mukherjee, Tamal. "Investigation of Post-Plasma Etch Fluorocarbon Residue Characterization, Removal and Plasma-Induced Low-K Damage for Advanced Interconnect Applications." Thesis, University of North Texas, 2016. https://digital.library.unt.edu/ark:/67531/metadc849649/.

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Modern three-dimensional integrated circuit design is rapidly evolving to more complex architecture. With continuous downscaling of devices, there is a pressing need for metrology tool development for rapid but efficient process and material characterization. In this dissertation work, application of a novel multiple internal reflection infrared spectroscopy metrology is discussed in various semiconductor fabrication process development. Firstly, chemical bonding structure of thin fluorocarbon polymer film deposited on patterned nanostructures was elucidated. Different functional groups were identified by specific derivatization reactions and model bonding configuration was proposed for the first time. In a continued effort, wet removal of these fluorocarbon polymer was investigated in presence of UV light. Mechanistic hypothesis for UV-assisted enhanced polymer cleaning efficiency was put forward supported by detailed theoretical consideration and experimental evidence. In another endeavor, plasma-induced damage to porous low-dielectric constant interlayer dielectric material was studied. Both qualitative and quantitative analyses of dielectric degradation in terms of increased silanol content and carbon depletion provided directions towards less aggressive plasma etch and strip process development. Infrared spectroscopy metrology was also utilized in surface functionalization evaluation of very thin organic films deposited by wet and dry chemistries. Palladium binding by surface amine groups was examined in plasma-polymerized amorphous hydrocarbon films and in self-assembled aminosilane thin films. Comparison of amine concentration under different deposition conditions guided effective process optimization. A time- and cost-effective method such as current FTIR metrology that provides in-depth chemical information about thin films, surfaces, interfaces and bulk layers can be increasingly valuable as critical dimensions continue to scale down and subtle process variances begin to have a significant impact on device performance.
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Padmanabhan, Ramalekshmi Thanu Dinesh. "USE OF DILUTE HYDROFLUORIC ACID AND DEEP EUTECTIC SOLVENT SYSTEMS FOR BACK END OF LINE CLEANING IN INTEGRATED CIRCUIT FABRICATION." Diss., The University of Arizona, 2011. http://hdl.handle.net/10150/202981.

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Fabrication of current generation integrated circuits involves the creation of multilevel copper/low-k dielectric structures during the back end of line processing. This is done by plasma etching of low-k dielectric layers to form vias and trenches, and this process typically leaves behind polymer-like post etch residues (PER) containing copper oxides, copper fluorides and fluoro carbons, on underlying copper and sidewalls of low-k dielectrics. Effective removal of PER is crucial for achieving good adhesion and low contact resistance in the interconnect structure, and this is accomplished using wet cleaning and rinsing steps. Currently, the removal of PER is carried out using semi-aqueous fluoride based formulations. To reduce the environmental burden and meet the semiconductor industry's environmental health and safety requirements, there is a desire to completely eliminate solvents in the cleaning formulations and explore the use of organic solvent-free formulations.The main objective of this work is to investigate the selective removal of PER over copper and low-k (Coral and Black Diamond®) dielectrics using all-aqueous dilute HF (DHF) solutions and choline chloride (CC) - urea (U) based deep eutectic solvent (DES) system. Initial investigations were performed on plasma oxidized copper films. Copper oxide and copper fluoride based PER films representative of etch products were prepared by ashing g-line and deep UV photoresist films coated on copper in CF4/O2 plasma. PER removal process was characterized using scanning electron microscopy and X-ray photoelectron spectroscopy and verified using electrochemical impedance spectroscopy measurements.A PER removal rate of ~60 Å/min was obtained using a 0.2 vol% HF (pH 2.8). Deaeration of DHF solutions improved the selectivity of PER over Cu mainly due to reduced Cu removal rate. A PER/Cu selectivity of ~20:1 was observed in a 0.05 vol% deaerated HF (pH 3). DES systems containing 2:1 U/CC removed PER at a rate of ~10 and ~20 Å/min at 40 and 70oC respectively. A mixture of 10-90 vol% de-ionized water (W) with 2:1 U/CC in the temperature range of 20 to 40oC also effectively removed PER. Importantly, etch rate of copper and low-k dielectric in DES formulations were lower than that in conventional DHF cleaning solutions.
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Song, Ingu. "Role of carbon dioxide in gas expanded liquids for removal of photoresist and etch residue." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/26473.

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Thesis (Ph.D)--Chemical Engineering, Georgia Institute of Technology, 2008.
Committee Chair: Hess, Dennis; Committee Member: Eckert, Charles; Committee Member: Frazier, Bruno; Committee Member: Henderson, Clifford; Committee Member: Liotta, Charles. Part of the SMARTech Electronic Thesis and Dissertation Collection.
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Ahner, Nicole. "Wetting Optimized Solutions for Plasma Etch Residue Removal for Application in Interconnect Systems of Integrated Circuits." Doctoral thesis, Universitätsbibliothek Chemnitz, 2013. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-102773.

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In multi-level Co/low-k based interconnect systems of ultralarge-scale integrated electronic devices the removal of plasma etch residues by common plasma cleaning processes has been shown to alter material properties like k-value and leakage current of the low-k dielectric. Besides the development of less damaging plasma processes their substitution by wet cleaning steps is in the focus of research and development. With further decreasing feature dimensions the development of wet cleaning processes has to include wetting issues like the non-wetting of small features due to the surface energy of the liquid or pattern collapse effects of low-k dielectric trenches due to high capillary forces This work at first focuses on the determination of the surface energetic character of common cleaning solutions for PERR and differently etched or ashed low-k dielectric surfaces by contact angle analysis, to outline which combinations of solid and liquid will be critical regarding their wetting behavior. Besides the determination of the wetting behavior the contact angle analysis turned out to be a fast and sensible analytic tool to understand the surface modifications introduced by different plasma processes and can help to understand the mechanisms of plasma damage of low-k dielectric surfaces. The analysis showed that especially polymerizing plasma etch processes produce a low-energetic low-k dielectric surface with a negligible polar energy contributions, which inhibits their wetting by high energetic water based cleaning solutions, which actually are favored by semiconductor manufacturers. The strategy to overcome these wetting issues followed in the present work is the reduction of the surface energy of the cleaning liquids by the application of surfactants. Several types of surfactants have been applied to the cleaning liquids and the compatibility of the surfactant solutions to BEOL materials like low-k dielectrics, copper and diffusion barriers as well as their dynamic behavior has been studied. The analysis showed that choosing the appropriate rinsing solution after the cleaning process is essential to ensure its compatibility to porous low-k dielectrics. Optical, electrical and structural data indicated that DIW rinse in most of the cases was not able to remove residual surfactant species within the material, while for an IPA rinse most of the residual surfactants have been removed. Considering the data received for compatibility to low-k materials, copper and barriers, the dynamic behavior of the surfactant solutions as well as influences of increased bath temperature and long term stability a general advice about surfactant selection and processing of surfactant aided solutions within BEOL is given
In mehrlagigen Kupfer/low-k basierten Metallisierungssystemen hochintegrierter elektronischer Bauelemente kann die Entfernung von Residuen nach der Plasmastrukturierung des Dielektrikums mittels herkömmlicher Plasmareinigungsprozesse zur Schädigung der Isolatorschicht und damit zum Ansteigen der relativen Dielektrizitätszahl sowie der Leckströme führen. Neben der Entwicklung schädigungsarmer Plasmaprozesse stellt der Ersatz dieser Prozesse durch Nassreinigungsschritte zur Ätzresiduenentfernung eine vielversprechende Alternative dar. Mit stetig abnehmenden Strukturabmaßen ist bei der Entwicklung dieser Nassreinigungsprozesse neben der Materialkompatibilität auch das Benetzungsverhalten der Reinigungsflüssigkeit von entscheidender Bedeutung, da die Oberflächenenergie der Reinigungslösung das Eindringen dieser in kleinste Strukturen verhindern und es durch hohe Kapillarkräfte zum Kollaps von Grabenstrukturen im Dielektrikum kommen kann. In der vorliegenden Arbeit wurde zunächst mittels Kontaktwinkelanalyse die Oberflächenenergie verschieden prozessierter low-k Dielektrikaschichten sowie herkömmlicher Lösungen zur Entfernung von Ätzresiduen untersucht, um hinsichtlich ihres Benetzungsverhaltens besonders kritische Materialkombinationen aufzuzeigen. Neben der Bestimmung des Benetzungsverhaltens hat sich die Kontaktwinkelanalyse zur Oberflächenenergieberechnung als schnelle und empfindliche Methode zur Analyse der Auswirkung von Plasmaprozessen auf die Oberfläche von low-k Dielektrika erwiesen. Die Untersuchungen haben gezeigt, dass besonders polymerisierende Plasmaprozesse eine niederenergetische Oberfläche erzeugen, welche von den derzeit in der Halbleiterfertigung bevorzugten hochenergetischen wasserbasierten Reinigungslösungen nur schlecht benetzt wird. Um diesem Effekt entgegenzuwirken wurde in der vorliegenden Arbeit die Senkung der Oberflächenenergie der Reinigungslösungen durch Zugabe von Tensiden untersucht. Es wurden mehrere Tenside unterschiedlichen Typs den Reinigungsflüssigkeiten zugemischt und die Kompatibilität dieser Lösungen mit low-k Dielektrika, Kupferschichten und Diffusionsbarrieren untersucht sowie ihr dynamisches Verhalten analysiert. Dabei hat sich gezeigt, dass die Auswahl der geeigneten Spüllösung nach dem eigentlichen Reinigungsprozess von entscheidender Bedeutung ist. Optische, elektrische sowie strukturelle Daten deuten darauf hin, dass bei Verwendung einer Spülung mit deionisiertem Wasser in den meisten Fällen Tensidrückstände im porösen Dielektrikum verbleiben. Eine Spülung mit Isopropanol war hingegen in der Lage, einen Großteil dieser Tensidrückstände zu entfernen. Unter Einbeziehung der Daten zur Materialkompatibilität und dem dynamischen Verhalten der Tensidlösungen bei Raumtemperatur und erhöhter Badtemperatur sowie ihrer Langzeitstabilität konnte schließlich eine Prozessempfehlung für die Verwendung der benetzungsoptimierten Reinigungslösungen in der BEOL-Prozessierung gefunden werden
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Taubert, Jenny. "Use of Formulations Based On Choline Chloride-Malonic Acid Deep Eutectic Solvent for Back End of Line Cleaning in Integrated Circuit Fabrication." Diss., The University of Arizona, 2013. http://hdl.handle.net/10150/283692.

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Interconnection layers fabricated during back end of line processing in semiconductor manufacturing involve dry etching of a low-k material and deposition of copper and metal barriers to create copper/dielectric stacks. After plasma etching steps used to form the trenches and vias in the dielectric, post etch residues (PER) that consist of organic polymer, metal oxides and fluorides, form on top of copper and low-k dielectric sidewalls. Currently, most semiconductor companies use semi aqueous fluoride (SAF) based formulations containing organic solvent(s) for PER removal. Unfortunately, these formulations adversely impact the environmental health and safety (EHS) requirements of the semiconductor industry. Environmentally friendly "green" formulations, free of organic solvents, are preferred as alternatives to remove PER. In this work, a novel low temperature molten salt system, referred as deep eutectic solvent (DES) has been explored as a back end of line cleaning (BEOL) formulation. Specifically, the DES system comprised of two benign chemicals, malonic acid (MA) and choline chloride (CC), is a liquid at room temperature. In certain cases, the formulation was modified by the addition of glacial acetic acid (HAc). Using these formulations, selective removal of three types of PER generated by timed CF₄/O₂ etching of DUV PR films on Cu was achieved. Type I PER was mostly organic in character (fluorocarbon polymer type) and had a measured thickness of 160 nm. Type II PER was much thinner (25 nm) and consisted of a mixture of organic and inorganic compounds (copper fluorides). Further etching generated 17 nm thick Type III PER composed of copper fluorides and oxides. Experiments were also conducted on patterned structures. Cleaning was performed by immersing samples in a temperature controlled (30 or 40° C) double jacketed vessel for a time between 1 and 5 minutes. Effectiveness of cleaning was characterized using SEM, XPS and single frequency impedance measurements. Type II and III residues, which contained copper compounds were removed in CC/MA DES within five minutes through dissolution and subsequent complexation of copper by malonic acid. Removal of Type I PER required the addition of glacial acetic acid to the DES formulation. Single frequency impedance measurement appears to be a good in situ method to follow the removal of the residues. High water solubility of the components of the system in conjunction with their environmental friendly nature, make the DES an attractive alternative to SAF.
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Ahner, Nicole [Verfasser], Thomas [Akademischer Betreuer] Geßner, Thomas [Gutachter] Geßner, Stefan E. [Akademischer Betreuer] Schulz, and Michael [Gutachter] Hietschold. "Wetting Optimized Solutions for Plasma Etch Residue Removal for Application in Interconnect Systems of Integrated Circuits / Nicole Ahner ; Gutachter: Thomas Geßner, Michael Hietschold ; Thomas Geßner, Stefan E. Schulz." Chemnitz : Universitätsbibliothek Chemnitz, 2013. http://d-nb.info/1214244793/34.

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Ahner, Nicole. "Wetting Optimized Solutions for Plasma Etch Residue Removal for Application in Interconnect Systems of Integrated Circuits: Benetzungsoptimierte Reinigungslösungen für die Entfernung von Plasmaätzresiduen für die Anwendung im Verdrahtungssystem integrierter Schaltungen." Doctoral thesis, Universitätsverlag der Technischen Universität Chemnitz, 2011. https://monarch.qucosa.de/id/qucosa%3A19826.

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In multi-level Co/low-k based interconnect systems of ultralarge-scale integrated electronic devices the removal of plasma etch residues by common plasma cleaning processes has been shown to alter material properties like k-value and leakage current of the low-k dielectric. Besides the development of less damaging plasma processes their substitution by wet cleaning steps is in the focus of research and development. With further decreasing feature dimensions the development of wet cleaning processes has to include wetting issues like the non-wetting of small features due to the surface energy of the liquid or pattern collapse effects of low-k dielectric trenches due to high capillary forces This work at first focuses on the determination of the surface energetic character of common cleaning solutions for PERR and differently etched or ashed low-k dielectric surfaces by contact angle analysis, to outline which combinations of solid and liquid will be critical regarding their wetting behavior. Besides the determination of the wetting behavior the contact angle analysis turned out to be a fast and sensible analytic tool to understand the surface modifications introduced by different plasma processes and can help to understand the mechanisms of plasma damage of low-k dielectric surfaces. The analysis showed that especially polymerizing plasma etch processes produce a low-energetic low-k dielectric surface with a negligible polar energy contributions, which inhibits their wetting by high energetic water based cleaning solutions, which actually are favored by semiconductor manufacturers. The strategy to overcome these wetting issues followed in the present work is the reduction of the surface energy of the cleaning liquids by the application of surfactants. Several types of surfactants have been applied to the cleaning liquids and the compatibility of the surfactant solutions to BEOL materials like low-k dielectrics, copper and diffusion barriers as well as their dynamic behavior has been studied. The analysis showed that choosing the appropriate rinsing solution after the cleaning process is essential to ensure its compatibility to porous low-k dielectrics. Optical, electrical and structural data indicated that DIW rinse in most of the cases was not able to remove residual surfactant species within the material, while for an IPA rinse most of the residual surfactants have been removed. Considering the data received for compatibility to low-k materials, copper and barriers, the dynamic behavior of the surfactant solutions as well as influences of increased bath temperature and long term stability a general advice about surfactant selection and processing of surfactant aided solutions within BEOL is given.
In mehrlagigen Kupfer/low-k basierten Metallisierungssystemen hochintegrierter elektronischer Bauelemente kann die Entfernung von Residuen nach der Plasmastrukturierung des Dielektrikums mittels herkömmlicher Plasmareinigungsprozesse zur Schädigung der Isolatorschicht und damit zum Ansteigen der relativen Dielektrizitätszahl sowie der Leckströme führen. Neben der Entwicklung schädigungsarmer Plasmaprozesse stellt der Ersatz dieser Prozesse durch Nassreinigungsschritte zur Ätzresiduenentfernung eine vielversprechende Alternative dar. Mit stetig abnehmenden Strukturabmaßen ist bei der Entwicklung dieser Nassreinigungsprozesse neben der Materialkompatibilität auch das Benetzungsverhalten der Reinigungsflüssigkeit von entscheidender Bedeutung, da die Oberflächenenergie der Reinigungslösung das Eindringen dieser in kleinste Strukturen verhindern und es durch hohe Kapillarkräfte zum Kollaps von Grabenstrukturen im Dielektrikum kommen kann. In der vorliegenden Arbeit wurde zunächst mittels Kontaktwinkelanalyse die Oberflächenenergie verschieden prozessierter low-k Dielektrikaschichten sowie herkömmlicher Lösungen zur Entfernung von Ätzresiduen untersucht, um hinsichtlich ihres Benetzungsverhaltens besonders kritische Materialkombinationen aufzuzeigen. Neben der Bestimmung des Benetzungsverhaltens hat sich die Kontaktwinkelanalyse zur Oberflächenenergieberechnung als schnelle und empfindliche Methode zur Analyse der Auswirkung von Plasmaprozessen auf die Oberfläche von low-k Dielektrika erwiesen. Die Untersuchungen haben gezeigt, dass besonders polymerisierende Plasmaprozesse eine niederenergetische Oberfläche erzeugen, welche von den derzeit in der Halbleiterfertigung bevorzugten hochenergetischen wasserbasierten Reinigungslösungen nur schlecht benetzt wird. Um diesem Effekt entgegenzuwirken wurde in der vorliegenden Arbeit die Senkung der Oberflächenenergie der Reinigungslösungen durch Zugabe von Tensiden untersucht. Es wurden mehrere Tenside unterschiedlichen Typs den Reinigungsflüssigkeiten zugemischt und die Kompatibilität dieser Lösungen mit low-k Dielektrika, Kupferschichten und Diffusionsbarrieren untersucht sowie ihr dynamisches Verhalten analysiert. Dabei hat sich gezeigt, dass die Auswahl der geeigneten Spüllösung nach dem eigentlichen Reinigungsprozess von entscheidender Bedeutung ist. Optische, elektrische sowie strukturelle Daten deuten darauf hin, dass bei Verwendung einer Spülung mit deionisiertem Wasser in den meisten Fällen Tensidrückstände im porösen Dielektrikum verbleiben. Eine Spülung mit Isopropanol war hingegen in der Lage, einen Großteil dieser Tensidrückstände zu entfernen. Unter Einbeziehung der Daten zur Materialkompatibilität und dem dynamischen Verhalten der Tensidlösungen bei Raumtemperatur und erhöhter Badtemperatur sowie ihrer Langzeitstabilität konnte schließlich eine Prozessempfehlung für die Verwendung der benetzungsoptimierten Reinigungslösungen in der BEOL-Prozessierung gefunden werden.
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Tai, Wen-Haw, and 戴雯華. "Post Aluminum Metal Etch Residue Removal." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/43949151733738468483.

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碩士
萬能科技大學
材料科技研究所
98
In semiconductor industry, when dry etch step of Al process has been finished, there will always be polymer residue left on side wall or surface of the metal lines. To guaranty cleanness and stability of subsequent processes, the polymer residue must be removed. With the progressing of new technology, the size of semiconductor devices is shrunk to nano-scale when the demand of integration circuit requires higher density as well as smaller size. As the result, the highly corrosive single component organic solvent which is operated in high temperature becomes no more applicable. To satisfy the demand of advanced process, a safer and newer chemistry which is not as corrosive as traditional formulation is necessary. In this study firstly, I adopted post etch polymer residue from DUV 193nm photoresist to be our objection. Secondly, I selected high polarity alcohol solvent which is able to swell polymer cluster to be our control factor of this Design of Experiment. Thirdly, I used Al etch rate to be the quality characteristic and orthogonal table to design my experiment. Finally, I analyzed my result by ANOVA to find out the best operation condition, and the Al etch rate could also be controlled to be less than 1 Å/min.
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Book chapters on the topic "Post Etch Residue Removal"

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Daviot, Jerome, C. Reid, and Douglas Holmes. "Advanced Aqueous Cleaner I, Dilute Solutions for the Selective Removal of Post Etch Residues in the Presence of Aluminium." In Solid State Phenomena, 377–80. Stafa: Trans Tech Publications Ltd., 2005. http://dx.doi.org/10.4028/3-908451-06-x.377.

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Claes, M., Vasile Paraschiv, S. Beckx, M. Demand, W. Deweerd, Sylvain Garaud, H. Kraus, et al. "Selective Wet Removal of Hf-Based Layers and Post-Dry Etch Residues in High-k and Metal Gate Stacks." In Solid State Phenomena, 93–96. Stafa: Trans Tech Publications Ltd., 2005. http://dx.doi.org/10.4028/3-908451-06-x.93.

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Choi, Jae Gon, Hyo Geun Yoon, Woo Jin Kim, Geun Min Choi, Young Wook Song, and Jin Goo Park. "The Dependence of Chemical Mechanical Polishing Residue Removal on Post-Cleaning Treatments." In Solid State Phenomena, 303–6. Stafa: Trans Tech Publications Ltd., 2007. http://dx.doi.org/10.4028/3-908451-46-9.303.

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Mellies, Raimund, Stefan Kunz, Franz Nilius, Dieter Mayer, and Andreas Kühner. "New Post Etch Polymer Removal Process for Al-Interconnects and Vias in Tank and Spray Tools Using a New Inorganic Chemistry." In Solid State Phenomena, 381–84. Stafa: Trans Tech Publications Ltd., 2005. http://dx.doi.org/10.4028/3-908451-06-x.381.

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Conference papers on the topic "Post Etch Residue Removal"

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Peng, Libbert, Bing Liu, Yong Gong, and Shumin Wang. "Challenges and solutions of post etch post ash residue removal." In 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT). IEEE, 2008. http://dx.doi.org/10.1109/icsict.2008.4734772.

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Mertens, P. W., T. G. Kim, M. Claes, Q. T. Le, G. Vereecke, E. Kesters, S. Suhard, et al. "Challenges and novel approaches for photo resist removal and post-etch residue removal for 22 nm interconnects." In 2009 IEEE International Interconnect Technology Conference - IITC. IEEE, 2009. http://dx.doi.org/10.1109/iitc.2009.5090397.

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Liew, S. F., K. A. Mohammad, L. J. Liu, S. F. Chong, D. G. Lee, S. F. Lee, and B. C. Lee. "A Study to Remove Heavy Polymer Remain on Thick Metal (> 3 micron) Sidewall Profile after Metal Etch Solvent Clean Step." In ISTFA 2008. ASM International, 2008. http://dx.doi.org/10.31399/asm.cp.istfa2008p0468.

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Abstract Heavy polymer residue has been observed on the sidewall of thick metal during the process release. The thickness of metal line is more than 3 micron. This thick polymer residue on the aluminum metal sidewall is seen from tilt Scanning Electron Microscope (SEM) profile analysis. This polymer residue on the metal sidewall with chlorine (Cl2) trapped will result in metal corrosion. The focus on this paper is on the removal of this polymer residue on the thick metal sidewall. The experiments were run with splits of varying the chemical dispensing time and the rinsing time in the process. The success criteria are determined by passing the Defect Source Analysis (DSA) and tilt SEM profile analysis. These wafers are sent for electrical test, wet box test (corrosion test) and electrical sort test to ensure the reliability of the post metal cleaning condition.
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Younan, Hua, Nistala Ramesh Rao, and Chen Shuting. "Fluorosilicate Glass (FSG) Outgassing Induced Aluminum Bond Pad Corrosion during Post-Fab Wafer Storage." In ISTFA 2012. ASM International, 2012. http://dx.doi.org/10.31399/asm.cp.istfa2012p0305.

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Abstract A case study of Fluorine (F)-outgassing is presented in this paper that caused the corrosion of Aluminum bond pad. It will be shown that the source of F-contamination is not the typical residue left behind after the passivation etch with Fluorine-based gas chemistry and the subsequent removal of the etch polymer generated with solvent (chemical) clean. Rather, it is introduced as a result of F-outgas over a period of time from the intermetallic dielectric (IMD) film, fluorosilicate glass (FSG), during the post-fab wafer storage. The methodology used in our failure analysis (FA) lab to identify and characterize this type of failure mode is presented in the paper.
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Mulder, Randal. "DuPont EKC265™ PERR as a Copper Metallization Etchant for the Physical Deprocessing of Failing 0.12 μm Technology Devices." In ISTFA 2004. ASM International, 2004. http://dx.doi.org/10.31399/asm.cp.istfa2004p0636.

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Abstract DuPont EKC265 Post Etch Residue Remover has been available for many years as post reactive ion etch photo-resist etchant for semiconductor wafer processing. It has also proven useful for the physical analysis of failing semiconductor devices. This paper shows how EKC265 can be used as copper metallization wet etchant to aid in the physical deprocessing. It provides the EKC265 copper metallization etch results and physical deprocessing results using EKC265. An ancillary effect of wet etching copper metallization rather than removing by means of mechanical polishing is that only the thin layer of underlying barrier metal layer has to be removed by means of mechanical polishing. As the barrier metal is a metal-silicon nitride compound, the polishing rate to remove it is close to that of the surrounding oxide. Therefore, less total polishing time is required to remove the copper metallization layer when EKC is used.
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Liu, Jialei, Huanxin Liu, Yonggen He, Haihui Liang, and Huojin Tu. "Post ion implantation photoresist residue removal study." In 2016 China Semiconductor Technology International Conference (CSTIC). IEEE, 2016. http://dx.doi.org/10.1109/cstic.2016.7464008.

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Busnaina, Ahmed A., and Naim Moumen. "Slurry Residue Removal in Post Chemical Mechanical Polishing." In ASME 1999 Design Engineering Technical Conferences. American Society of Mechanical Engineers, 1999. http://dx.doi.org/10.1115/detc99/cie-9049.

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Abstract The megasonic cleaning process proved to be an essential process in cleaning silicon wafers after processes such as pre-oxidation, pre-CVD, pre-EPI, post-ASH and lately post-CMP. Current post-CMP cleans are contact cleaning techniques. These contact techniques have a low throughput and may cause wafer scratching. In addition, in contact cleaning, brush shedding which occurs under many operating conditions causes additional particulate contamination. There is a need for an effective post-CMP cleaning process. Megasonic cleaning provides the best alternative or compliment to brush clean.
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Cui, Hua, Simon J. Kirk, and David Maloney. "Metal Hardmask Etch Residue Removal For Advanced Copper / Low-k Devices." In 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference. IEEE, 2007. http://dx.doi.org/10.1109/asmc.2007.375065.

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Hua Cui. "TiN metal hardmask etch residue removal with mask pullback and complete mask removal for Cu dual damascene device." In 2012 23rd Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC). IEEE, 2012. http://dx.doi.org/10.1109/asmc.2012.6212916.

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Krishtab, M., K. Vanstreels, S. De Gendt, and M. Baklanov. "Post-etch template removal strategy for reduction of plasma induced damage in spin-on OSG low-k dielectrics." In 2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM). IEEE, 2015. http://dx.doi.org/10.1109/iitc-mam.2015.7325642.

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