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Relevant bibliographies by topics / Post Etch Residue Removal

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Journal articles

Academic literature on the topic 'Post Etch Residue Removal'

Author: Grafiati

Published: 4 June 2021

Last updated: 1 February 2022

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Journal articles on the topic "Post Etch Residue Removal"

1

Lee, Hong-Ji, Che-Lun Hung, Chia-Hao Leng, et al. "Etch Defect Characterization and Reduction in Hard-Mask-Based Al Interconnect Etching." International Journal of Plasma Science and Engineering 2008 (September 23, 2008): 1–5. http://dx.doi.org/10.1155/2008/154035.

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This paper identifies the defect adders, for example, post hard-mask etch residue, post metal etch residue, and blocked etch metal island and investigates the removal characteristics of these defects within the oxide-masked Al etching process sequence. Post hard-mask etch residue containing C atom is related to the hardening of photoresist after the conventional post-RIE ashing at 275∘C. An in situ O2-based plasma ashing on RIE etcher was developed to prevent the photoresist hardening from the high-ashing temperature; followed wet stripping could successfully eliminate such hardened polymeric

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2

Pollard, Kimberly, Meng Guo, Richie Peters, et al. "Efficient TSV Resist and Residue Removal in 3DIC." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, DPC (2014): 001435–69. http://dx.doi.org/10.4071/2014dpc-wp12.

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The continuing challenge to meet the need for lighter, smaller, faster and smarter electronic systems has pushed the advancement of 2.5D and 3D technology. The ability to create and integrate through-silicon vias (TSV) into device designs in 2.5- and 3-D platforms allows a decrease in interconnection path length, which results in improved device performance and reliability in a small form factor. Mainly due to its high silicon etch rate and selectivity to mask materials, the Bosch process is often used in the TSV fabrication. In this process, the silicon via is created by the deep reactive ion

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3

young-tack, Hong, Young il Kim, Moon-chul Lee, et al. "Post-etch residue removal in BCB/Cu interconnection structure." Thin Solid Films 435, no. 1-2 (2003): 238–41. http://dx.doi.org/10.1016/s0040-6090(03)00332-8.

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4

Thanu, D. P. R., S. Raghavan, and M. Keswani. "Post Plasma Etch Residue Removal in Dilute HF Solutions." Journal of The Electrochemical Society 158, no. 8 (2011): H814. http://dx.doi.org/10.1149/1.3597618.

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5

Cazes, M., Christian Pizzetti, Jerome Daviot, et al. "Customized Chemical Compositions Adaptable for Cleaning Virtually all Post-Etch Residues." Solid State Phenomena 282 (August 2018): 121–25. http://dx.doi.org/10.4028/www.scientific.net/ssp.282.121.

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A post-etch residue cleaning formulation, based on balancing the aggressiveness of hydrofluoric acid with its well-known residue removal properties is introduced. In a series of investigations originally motivated by the cleaning challenge provided by high-k dielectric-based residues, a formulation platform is developed that successfully cleans residues resulting from the plasma patterning of tantalum oxide and similar materials while maintaining metal and dielectric compatibility. It is further shown that the fundamental advantages of this solution can be extended to the cleaning of other, mo

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6

Le, Quoc Toan, F. Drieskens, T. Conard, et al. "Modification of Post-Etch Residues by UV for Wet Removal." Solid State Phenomena 187 (April 2012): 207–10. http://dx.doi.org/10.4028/www.scientific.net/ssp.187.207.

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In back-end of line processing, the polymer deposited on the dielectric sidewalls during the etch must be removed prior to subsequent processing steps to achieve high adhesion and good coverage of materials deposited in the etched features [1,. Typically, this is done by a combination of short plasma treatment and diluted wet clean, or by wet cleans alone. On the one hand, for porous dielectric stacks, a mild plasma treatment that preserves the integrity of the low-k dielectrics would not be sufficient to efficiently remove this residue. Furthermore, aqueous cleaning solutions is not efficient

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7

Mauer, Laura, John Taddei, Ramey Youssef, Kimberly Pollard, and Allison Rector. "TSV Resist and Residue Removal." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2011, DPC (2011): 001596–620. http://dx.doi.org/10.4071/2011dpc-wp14.

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3D integration is the most active methodology for increasing device performance. The ability to create Through Silicon Vias (TSV) provides the shortest path for interconnections and will result in increased device speed and reduced package footprint. There are numerous technical papers and presentations on the etching and filling of these vias, however the process for cleaning is seldom mentioned. Historically, after reactive ion etching (RIE), cleaning is accomplished using an ashing process to remove any remaining photoresist, followed by dipping the wafer in a solution-based post etch resid

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8

Le, Quoc Toan, Els Kesters, I. Hoflijk, et al. "Characterization of Etch Residues Generated on Damascene Structures." Solid State Phenomena 255 (September 2016): 227–31. http://dx.doi.org/10.4028/www.scientific.net/ssp.255.227.

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For patterned TiN/silicon oxide/low-k dielectric stack, fluorinated etch residues were detected on the TiN surface, the dielectric sidewall and bottom, regardless of the low-k material used in the stack. XPS results showed that they consisted of polymer-based (CFx) residues deposited on trench sidewall and bottom, and metal-based (TiFx) residues mainly deposited on top surface. In terms of post-etch residue removal, the efficiency of various wet clean solutions can be clearly distinguished for CFx, and TiFx using the same patterned porous low-k stack. These results also demonstrate that the re

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9

Myneni, Satyanarayana, and Dennis W. Hess. "Post-Plasma-Etch Residue Removal Using CO[sub 2]-Based Fluids." Journal of The Electrochemical Society 150, no. 12 (2003): G744. http://dx.doi.org/10.1149/1.1621879.

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10

Akanishi, Yuya, Quoc Toan Le, and Efrain Altamirano Sánchez. "Removal of Post Etch Residue on BEOL Low-K with Nanolift." Solid State Phenomena 314 (February 2021): 277–81. http://dx.doi.org/10.4028/www.scientific.net/ssp.314.277.

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Particle removal from BEOL low-k structures is studied using a novel particle removal technique, called Nanolift which removes particles from the substrate by forming a thin polymer film on the surface and removing the polymer film together with the particles. It was confirmed that Nanolift is capable to remove TiFx particles successfully which are generated during the low-k dry etch process for dual damascene structure formation for BEOL interconnect fabrication. Pattern collapse of the fragile low-k structure was confirmed to be prevented by Nanolift in comparison with conventional dual flui

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