Relevant bibliographies by topics / Power Factor Correction

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Power Factor Correction'

Author: Grafiati
Published: 4 June 2021
Last updated: 11 September 2023

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Journal articles on the topic "Power Factor Correction"

1

Saied, M. M. "Optimal power factor correction." IEEE Transactions on Power Systems 3, no. 3 (1988): 844–51. http://dx.doi.org/10.1109/59.14531.

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Dr.S.N.Dhurvey, Sagar Sakhare, Shubham Wase, and Nikhil Manawar. "Active Power Factor Correction." international journal of engineering technology and management sciences 7, no. 3 (2023): 510–15. http://dx.doi.org/10.46647/ijetms.2023.v07i03.72.

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Lower in Power Factor of electrical equipment's will draws high current from supply power. The effect of this is affected by impedance of electrical equipment. Power factor correction of boost converter is done by using predictive control strategy. In this project predictive control algorithm is presented based on this algorithm all of the duty cycles required to achieve unity power factor in one half line period are calculated in advance by proportional Integral (PI) controller, the simulation results show that the proposed predictive strategy for PFC achieves near unity power factor. The power factor and input current distortion are analyzed using with control and without control techniques. Simulation results are shows that the power factor is higher than 0.99, and current total harmonics distortion (THD) is smaller than 20% under full load condition. In this project is how impedance of electrical equipment affects the power factor of electrical loads, and then distributed power as the whole. This project is important to verify the right action to increase low power factor effectively for electrical energy efficiency concern.
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Ngwe, Thida Win, Soe Winn, and Su Mon Myint. "Design and Control of Automatic Power Factor Correction APFC for Power Factor Improvement in Oakshippin Primary Substation." International Journal of Trend in Scientific Research and Development Volume-2, Issue-5 (August 31, 2018): 2368–72. http://dx.doi.org/10.31142/ijtsrd18320.

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Демченко, Ю. С., and В. В. Рогаль. "Methods of power factor correction." Electronics and Communications 18, no. 6 (January 27, 2014): 24–29. http://dx.doi.org/10.20535/2312-1807.2013.18.6.142455.

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Chen, Minjie, Sombuddha Chakraborty, and David J. Perreault. "Multitrack Power Factor Correction Architecture." IEEE Transactions on Power Electronics 34, no. 3 (March 2019): 2454–66. http://dx.doi.org/10.1109/tpel.2018.2847284.

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Zupiunski, I. Z., L. M. Holicek, and V. V. Vujicic. "Correction to "Power-factor Calibrator"." IEEE Transactions on Instrumentation and Measurement 46, no. 5 (October 1997): 1212. http://dx.doi.org/10.1109/tim.1997.676746.

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Jardim França, Gleisson, and Braz de Jesus Cardoso Filho. "Series-shunt compensation for harmonic mitigation and dynamic power factor correction." Eletrônica de Potência 17, no. 3 (August 1, 2012): 641–50. http://dx.doi.org/10.18618/rep.2012.3.641650.

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Shubbar, Mafaz M., Laith A. Abdul-Rahaim, and Ahmed A. Hamad. "Cloud-Based Automated Power Factor Correction and Power Monitoring." Mathematical Modelling of Engineering Problems 8, no. 5 (October 31, 2021): 757–62. http://dx.doi.org/10.18280/mmep.080510.

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Energetic life-sustaining needs, such as electrical power, are essential for everyday existence. It is commonly used in residential, industrial, farming, and medical facilities. Life without energy is minimal. Despite the vital need for electricity demand, losses curtailments and additional energy bills are still problems. Power factor correction is a method to fix or minimize mentioned problems. Automated power factor correction (APFC) will precede good contrivance for correction. Several studies on established systems endeavoured to improve power factor via local calculation and correction, android application, or web monitoring with disparity results and node types. The purpose of this treatise is to suggest a neoteric cloud APFC with neural network design advances to recent designs of APFC that depend on IoT and cloud. This design used a private cloud utilizing raspberry pi and a neural network to correct the power factor of homes in a single algorithm, and cloud helping in hosting and accessed on-demand at any time and from everywhere as long as the Internet is accessible and the neural for determining the capacitance value for power factor correction. In addition, this design will minimize devices used, give precise results, minimize the cost of the bill and make the easy utility monitoring of the power factor before and after correction.
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Hurley, W. G. "The Fundamentals of Power Factor Correction." International Journal of Electrical Engineering & Education 31, no. 3 (July 1994): 213–29. http://dx.doi.org/10.1177/002072099403100303.

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The fundamentals of power factor correction The fundamental issues of power factor analysis for non-sinusoidal waveforms are described. A full-wave rectifier circuit is analysed and original approximations are derived for voltage ripple, peak diode current and input power factor. A power factor correction technique, based on a switching mode power supply, is presented.
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Schlecht, Martin F., and Brett A. Miwa. "Active Power Factor Correction for Switching Power Supplies." IEEE Transactions on Power Electronics PE-2, no. 4 (October 1987): 273–81. http://dx.doi.org/10.1109/tpel.1987.4307862.

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Dissertations / Theses on the topic "Power Factor Correction"

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Amarasinghe, Kanishka A. "Resonance mode power supplies with power factor correction." Thesis, Loughborough University, 1990. https://dspace.lboro.ac.uk/2134/23672.

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There is an increasing need for AC-DC converters to draw a pure sinusoidal current at near unity power factor from the AC mains. Most conventional power factor correcting systems employ PWM techniques to overcome the poor power factor being presented to the mains. However, the need for smaller and lighter power processing equipment has motivated the use of higher internal conversion frequencies in the past. In this context, resonant converters are becoming a viable alternative to the conventional PWM controlled power supplies. The thesis presents the implementation of active power factor correction in power supplies, using resonance mode techniques. It reviews the PWM power factor correction circuit topologies previously used. The possibility of converting these PWM topologies to resonant mode versions is discussed with a critical assessment as to the suitability of the semiconductor switching devices available today for deployment in these resonant mode supplies. The thesis also provides an overview of the methods used to model active semiconductor devices. The computer modelling is done using the PSpice microcomputer simulation program. The modifications that are needed to the built in MOSFET model in PSpice, when modeling high frequency circuits is discussed. A new two transistor model which replicates the action of a OTO thyristor is also presented. The new model enables the designer to estimate the device parameters with ease by adopting a short calculation and graphical design procedure, based on the manufacturer's data sheets. The need for a converter with a high efficiency, larger power/weight ratio, high input power factor with reduced line current distortion and reduced cost has led to the development of a new resonant mode converter topology, for power processing. The converter presents a near resistive load to the mains thus ensuring a high input power factor, while providing a stabilised de voltage at the output with a small lOOHz ripple. The supply is therefore ideal for preregulation applications. A description of the modes of operation and the analysis of the power circuit are included in the thesis. The possibility of using the converter for low output voltage applications is also discussed. The design of a 300W, 80kHz prototype model of this circuit is presented in the thesis. The design of the isolation transformer and other magnetic components are described in detail. The selection of circuit components and the design and implementation of the variable frequency control loop are also discussed. An evaluation of the experimental and computer simulated results obtained from the prototype model are included in the presentation. The thesis further presents a zero-current switching quasi-resonant flyback circuit topology with power factor correction. The reasons for using this topology for off-line power conversion applications are discussed. The use of a cascoded combination of a bipolar power transistor and two power MOSFETs i~ the configuration has enabled the circuit to process moderate levels of power while simultaneously switching at high frequencies. This fulfils the fundamental precondition for miniaturisation. It also provides a well regulated DC output voltage with a very small ripple while maintaining a high input power factor. The circuit is therefore ideal for use in mobile applications. A preliminary design of the above circuit, its analysis using PSpice, the design of the control circuit, current limiting and overcurrent protection circuitry and the implementation of closed-loop control are all included in the thesis. The experimental results obtained from a bread board model is also presented with an evaluation of the circuit performance. The power factor correction circuit is finally installed in this supply and the overall converter performance is assessed.
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Xie, Manjing. "Digital Control for Power Factor Correction." Thesis, Virginia Tech, 2003. http://hdl.handle.net/10919/34258.

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This thesis focuses on the study, implementation and improvement of a digital controller for a power factor correction (PFC) converter. The development of the telecommunications industry and the Internet demands reliable, cost-effective and intelligent power. Nowadays, the telecommunication power systems have output current of up to several kilo amperes, consisting of tens of modules. The high-end server system, which holds over 100 CPUs, consumes tens of kilowatts of power. For mission-critical applications, communication between modules and system controllers is critical for reliability. Information about temperature, current, and the total harmonic distortion (THD) of each module will enable the availability of functions such as dynamic temperature control, fault diagnosis and removal, and adaptive control, and will enhance functions such as current sharing and fault protection. The dominance of analog control at the modular level limits system-module communications. Digital control is well recognized for its communication ability. Digital control will provide the solution to system-module communication for the DC power supply. The PFC converter is an important stage for the distributed power system (DPS). Its controller is among the most complex with its three-loop structure and multiplier/divider. This thesis studies the design method, implementation and cost effectiveness of digital control for both a PFC converter and for an advanced PFC converter. Also discussed is the influence of digital delay on PFC performance. A cost-effective solution that achieves good performance is provided. The effectiveness of the solution is verified by simulation. The three level PFC with range switch is well recognized for its high efficiency. The range switch changes the circuit topology according to the input voltage level. Research literature has discussed the optimal control for both range-switch-off and range-switch-on topologies. Realizing optimal analog control requires a complex structure. Until now optimal control for the three-level PFC with analog control has not been achieved. Another disadvantage of the three-level PFC is the output capacitor voltage imbalance. This thesis proposes an active balancing solution to solve this problem.
Master of Science
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Yeh, Thomas. "Analysis of power factor correction converters /." Online version of thesis, 1992. http://hdl.handle.net/1850/11220.

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Qian, Jinrong. "Advanced Single-Stage Power Factor Correction Techniques." Diss., Virginia Tech, 1997. http://hdl.handle.net/10919/30773.

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Five new single-stage power factor correction (PFC) techniques are developed for single-phase applications. These converters are: Integrated single-stage PFC converters, voltage source charge pump power factor correction (VS-CPPFC) converters, current source CPPFC converters, combined voltage source current source (VSCS) CPPFC converters, and continuous input current (CIC) CPPFC converters. Integrated single-stage PFC converters are first developed, which combine the PFC converter with a DC/DC converter into a single-stage converter. DC bus voltage stress at light load for the single-stage PFC converters are analyzed. DC bus voltage feedback concept is proposed to reduce the DC bus voltage stress at light load. The principle of operations of proposed converters are presented, implemented and evaluated. The experimental results verify the theoretical analysis. VS-CPPFC technique use a capacitor in series with a high frequency voltage source to achieve the PFC function. In this way, the input inductor is eliminated. VS-CPPFC AC/DC converters are developed, and their performance is evaluated. VS-CPPFC electronic ballasts with and without dimming function are also presented. The average lamp current control with duty ratio modulation is developed so that the lamp operates in constant power with a low crest factor over the line variation. The experimental results verify the CPPFC concept. CS-CPPFC technique employs a capacitor in parallel with a high frequency current source to obtain the PFC function. The unity power factor condition and principle of operation are analyzed. By doing so, the switch has less switching current stress, and deals only with the resonant inductor current. Design considerations and experimental results of the CS-CPPFC electronic ballast are presented. VSCS-CPPFC technique integrates the VS-CPPFC with the CS-CPPFC converters. The circuit derivation, unity power factor condition and design considerations are presented. The developed VSCS-CPPFC converters has constant lamp operation, low crest factor with a high power factor even without any feedback control. CIC-CPPFC technique is developed by inserting a small inductor in series with the line rectifier for the conceptual VS-CPPFC, CS-CPPFC and VSCS-CPPFC circuits. The circuit derivation and its unity power factor condition are discussed. The input current can be designed to be continuous, and a small line input filter can be used. The circulating current in the resonant tank and the switching current stress are minimized. The average lamp current control with switching frequency modulation is developed, so the developed electronic ballast operates in constant power, low crest factor. The developed CIC-CPPFC electronic ballast has features of low line input current harmonics, constant lamp power, low crest factor, continuous input current, low DC bus voltage stress, small circulating current and switching current stress over a wide range of line input voltage.
Ph. D.
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Jiang, Yimin. "Development of advanced power factor correction techniques." Diss., Virginia Polytechnic Institute and State University, 1994. http://hdl.handle.net/10919/53609.

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Three novel power factor correction (PFC) techniques are developed for both single-phase and three-phase applications. These techniques have advantages over the conventional approaches with regard to the converter efficiency, power density, cost, and reliability for many applications. The single-phase parallel PFC (PPFC) technique was established. Different from the conventional two-cascade-stage scheme, the PPFC technique allows 68% of input power to go to the output through only one time high frequency power conversion, but still achieves both unity power factor and tight output regulation. A family of PPFC converters were proposed for different power levels, which are simpler and more efficient than the conventional two-cascade-stage systems. Since isolated boost converters are adopted as the main power stage in some of the PPFC converters, a device based soft-switching technique was proposed for using IGBTs as the main power switches, which ensures the lower cost and higher efficiency benefits of the PPFC technique. The single-ended boost converter is the most frequently used converter in the single-phase PFC applications. For high power and/or high voltage applications, the major concerns of the conventional boost converter are the inductor volume and weight, and Iosses on the power devices, which will affect converter efficiency, power density, and cost. In this dissertation, a novel three-level boost converter was developed, which can use a much smaller inductor and lower voltage devices than the conventional one, yielding higher power density, higher efficiency, and lower cost. In three-phase applications, the three-phase boost rectifier is the most popular topology for the PFC purpose. A novel high performance boost PFC rectifier was developed, which provides several superior features than the conventional one with nearly no cost increase. lt inherently provides six-step PWM operation, which is the optimal PWM scheme with no circulating energy, minimum input ripple current, and minimum . switching events. It also greatly reduces the bridge diode reverse recovery loss, which is one of the major switching Iosses in the conventional three-phase boost rectifier. Furthermore, it can adopt very simple soft-switching techniques even with three independent analog controllers to further improve the performance. Several simple soft switched three-phase boost rectifiers have been developed. Besides, the bridge shoot-through problem is virtually eliminated. As a result, these new three-phase boost rectifiers have higher efficiency, higher power density, lower cost, and higher reliability compared with the conventional one.
Ph. D.
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Anand, Aniket. "Power factor correction in switched reluctance motor drives." Thesis, IIT Delhi, 2019. http://eprint.iitd.ac.in:80//handle/2074/8125.

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Williams, David. "Active power decoupling for a boost power factor correction circuit." Thesis, University of British Columbia, 2016. http://hdl.handle.net/2429/59145.

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During AC-DC conversion, the ripple power at the input of the converter must be filtered from the output. This filtering can be easily done by placing a capacitor on the DC bus. For systems with power output of hundreds of Watts or more, this capacitor must be quite high to effectively perform the filtering, and in order to be cost effective, an aluminum electrolytic capacitor (Al e-caps) needs to be used. The lifespan of Al e-caps is notoriously short, so for long lifespan systems, their use is not advisable. Film capacitors have longer lifespans than Al e-caps but are more expensive on a cost per Farad basis. Methods have been proposed to reduce the required capacitance so that film capacitors can be cost effectively used. One of these methods is to use a separate decoupling port in the circuit that can filter the ripple power without the limitation of being connected directly to the DC bus. The first contribution is a method of using an active power decoupling (APD) port with a buck-based circuit that does not require direct measurement of the AC input signal for controlling the ripple power to the port. This APD port requires only two extra switches and some simple signal processing circuitry to generate a reference signal and control the voltage to the APD port capacitor. The second contribution is a design guide for a sliding mode control (SMC) system for the APD port. SMC shows promise as a control system for power electronics circuits and has never been demonstrated on an APD port before. The proposed circuit and control system is used in a 700 Watt AC-DC converter with power factor correction and is compared in simulation to a benchmark converter using a passive capacitor on the DC bus. The capacitance is reduced from 300μF to a 35μF and a 75μF capacitor without any effect on performance as indicated by measures of the voltage ripple, power factor and total harmonic distortion. The capacitance reduction results in a cost savings of $175 on capacitors when using prices that were current at time of publication.
Applied Science, Faculty of
Engineering, School of (Okanagan)
Graduate
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Niezrecki, Christopher. "Power factor correction and power consumption characterization of piezoelectric actuators." Thesis, Virginia Tech, 1992. http://hdl.handle.net/10919/42619.

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A piezoceramic actuator used for structural control behaves electrically as a nearly pure capacitance. When conventional amplifiers are used to drive these actuators, the current and voltage is close to 90 degrees out of phase. This causes the power factor (PF) of the load to be close to zero and results in excessive power requirements. This thesis reports the results of a study of the following question: What effect does applying power factor correction methods to piezoceramic actuators have on their power consumption characteristics? A subproblem we explored was to detennine the qualitative relationship between the power consumption of a piezoceramic actuator and the damping that actuator added to a structure. To address the subproblem, a feedback control experiment was built which used a ceramic piezoceramic actuator and a strain rate sensor configured to add damping to a cantilevered beam. A disturbance was provided by a shaker attached to the beam. The power consumption of the actuator was detennined by measuring the current and voltage of the signal to the actuator. The energy dissipated in the beam by the feedback control loop was assumed to be modeled by an ideal structural damping model. A model relating structural damping as a function of the apparent power consumed by the actuator was developed, qualitatively verified, and physically justified. Power factor correction methods were employed by adding an inductor in both parallel to and in series with the piezoceramic actuator. The inductance values were chosen such that each inductor-capacitor (LC) circuit was in resonance at the second natural frequency of the beam. Implementing the parallel LC circuit reduced the current consumption of the piezoceramic actuator by 75% when compared to the current consumption of the actuator used without an inductor. Implementing the series LC circuit produced a 300% increase in the voltage applied to the actuator compared to the case when no inductor was used. In both cases, employing power factor correction methods corrected the power factor to near unity and reduced the apparent power by 12 dB. A theoretical model of each circuit was developed. The analytical and empirical results are virtually identical. The results of this study can be used to synthesize circuits to modify piezoceramic actuators, reducing the voltage or current requirements of the amplifiers used to drive those actuators
Master of Science
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Zhang, Jindong. "Advanced Integrated Single-Stage Power Factor Correction Techniques." Diss., Virginia Tech, 2001. http://hdl.handle.net/10919/26480.

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This dissertation presents the in-depth study and innovative solutions of the advanced integrated single-stage power-factor-correction (S2PFC) techniques, which target at the low- to medium-level power supplies, for wide range of applications, from power adapters and computers to various communication equipment. To limit the undesirable power converter input-current-harmonicâ s impact on the power line and other electronics equipment, stringent current harmonic regulations such as IEC 61000-3-2 have already been enforced. The S2PFC techniques have been proposed and intensively studied, in order to comply these regulations with minimal additional component count and cost. This dissertation provides a systematic study of the S2PFC input-current-shaping (ICS) mechanism, circuit topology generalization and variation, bulk capacitor voltage stress and switch current stress, converter design and optimization, and evaluation of the state-of-the-art S2PFC techniques with universal-line input. Besides, this presentation also presents the development of novel S2PFC techniques with a voltage-doubler-rectifier front end to both improve the performance and reduce the cost of S2PFC converters for (international voltage range) universal-line applications. The calculation and experimental results show that the proposed techniques offer a more cost-effective and efficient solution than industriesâ current practice, with universal-line input and converter power level up to 600 W. Finally, further improved technique is also presented with reduced filter inductor size and increased power density.
Ph. D.
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Chan, Weng Hong. "Harmonic reduction and power factor correction in low power supply system." Thesis, University of Macau, 2002. http://umaclib3.umac.mo/record=b1445817.

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Books on the topic "Power Factor Correction"

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C, Lee Fred, Borojeviċ Dusa̧n, and Virginia Power Electronics Center, eds. Switching rectifiers for power factor correction. [Virginia]: Virginia Power Electronics Center, 1994.

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Kappenman, Russell F. Estimation of the fishing power correction factor. [Seattle, Wash.]: Alaska Fisheries Science Center, National Marine Fisheries Service, U.S. Dept. of Commerce, 1992.

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Capacitor, Commonwealth Sprague, ed. Power factor correction: A guide for the plant engineer. North Adams, MA: Commonwealth Sprague Capacitor, Inc., 1996.

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Alasooly, Hedaya Mahmood. Power Factor Correction. Dr. Hidaya Mahmoud Al-Assouly -, 2021.

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Paeg, Heinz. Power Factor Correction. John Wiley and Sons Ltd, 1990.

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Amarasinghe, Kanishka Anushal. Resonance mode power supplies with power factor correction. 1990.

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Clayton, Albert Edmund. Power Factor Correction: Explaining The Meaning And Importance Of Power Factor, And Describing Methods For The Improvement Of Power Factor. Franklin Classics, 2018.

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Clayton, Albert Edmund. Power Factor Correction: Explaining The Meaning And Importance Of Power Factor, And Describing Methods For The Improvement Of Power Factor. Franklin Classics, 2018.

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Clayton, Albert Edmund. Power Factor Correction: Explaining the Meaning and Importance of Power Factor, and Describing Methods for the Improvement of Power Factor. Franklin Classics Trade Press, 2018.

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Boles, Melanie. Low-Voltage Power Factor Correction Development Kit User's Guide. Microchip Technology Incorporated, 2019.

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Book chapters on the topic "Power Factor Correction"

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Neacșu, Dorin O. "Power Factor Correction." In Telecom Power Systems, 275–98. Boca Raton: CRC Press, 2017. http://dx.doi.org/10.4324/9781315104140-10.

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Tooley, Mike, and Lloyd Dingle. "Power, power factor and power factor correction." In Engineering Science, 469–76. 2nd edition. | Boca Raton, FL : Routledge [2021]: Routledge, 2020. http://dx.doi.org/10.1201/9781003002246-29.

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Kumar, Pradeep, P. R. Sharma, and Ashok Kumar. "Power Factor Correction Based on RISC Controller." In Communications in Computer and Information Science, 83–87. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-20499-9_14.

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Sun, Yuan, Jie Chen, Fei Meng, Ruichang Qiu, and Zhigang Liu. "Research on Active Power Factor Correction Technology." In Lecture Notes in Electrical Engineering, 191–98. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-2862-0_19.

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Hsien, Tsung-Lieh, Chien-Hua Lee, and Cheng-Hung Hung. "Analysis and Implementation of SEPIC Power-Factor-Correction Rectifiers." In Lecture Notes in Electrical Engineering, 705–13. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-04573-3_88.

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Anjappa, P., K. Naresh, V. Ramesh, P. Lakshmipathi, and K. Reddy Swathi. "Single Phase Soft Switching Techniques Power Factor Correction Converter." In Lecture Notes in Electrical Engineering, 563–71. New Delhi: Springer India, 2014. http://dx.doi.org/10.1007/978-81-322-2119-7_56.

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Dhage, Y. Y., R. R. Tambekar, R. B. Lasurkar, L. Dhole, P. J. Kathote, and Atul Lilhare. "Monitoring and correction of power factor for residential loads." In Recent Advances in Material, Manufacturing, and Machine Learning, 228–34. London: CRC Press, 2023. http://dx.doi.org/10.1201/9781003358596-23.

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Kumar, Sanatan, Devashish, and Madhu Singh. "Comparative Analysis of Power Factor Correction Converters for Different Topologies." In Recent Advances in Power Electronics and Drives, 409–20. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-8586-9_36.

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Sarala, P., S. F. Kodad, and B. Sarvesh. "BLDC Motor Drive with Power Factor Correction Using PWM Rectifier." In Advances in Intelligent Systems and Computing, 11–25. Singapore: Springer Singapore, 2017. http://dx.doi.org/10.1007/978-981-10-3156-4_2.

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Xie, Fuhong, Xiaofei Liu, Shumei Cui, and Kang Li. "Design of Power Factor Correction System for On-board Charger." In Communications in Computer and Information Science, 529–38. Berlin, Heidelberg: Springer Berlin Heidelberg, 2014. http://dx.doi.org/10.1007/978-3-662-45286-8_55.

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Conference papers on the topic "Power Factor Correction"

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"Power factor correction." In 2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551). IEEE, 2004. http://dx.doi.org/10.1109/pesc.2004.1355454.

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"Power factor correction techniques." In 2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551). IEEE, 2004. http://dx.doi.org/10.1109/pesc.2004.1355188.

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Khan, A., I. Batarseh, K. Siri, and J. Elias. "Boost power factor correction circuits." In Proceedings of SOUTHCON '94. IEEE, 1994. http://dx.doi.org/10.1109/southc.1994.498165.

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Chen, Minjie, Sombuddha Chakraborty, and David J. Perreault. "Multitrack power factor correction architecture." In 2018 IEEE Applied Power Electronics Conference and Exposition (APEC). IEEE, 2018. http://dx.doi.org/10.1109/apec.2018.8341094.

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Khan, Muhammad Bilal, and Muhammad Owais. "Automatic power factor correction unit." In 2016 International Conference on Computing, Electronic and Electrical Engineering (ICE Cube). IEEE, 2016. http://dx.doi.org/10.1109/icecube.2016.7495239.

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"Session I Power factor correction." In 2008 11th IEEE International Power Electronics Congress. IEEE, 2008. http://dx.doi.org/10.1109/ciep.2008.4653793.

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Zheng Minhua, Wang Binbin, and Hong Qunhuan. "TOPSwitch in power factor correction circuit." In 2010 2nd International Conference on Computer Technology and Development (ICCTD). IEEE, 2010. http://dx.doi.org/10.1109/icctd.2010.5646429.

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8

Postiglione, Cicero S., Arnaldo J. Perin, and Claudinor B. Nascimento. "Single-Stage Power Factor Correction Switched Power Supply." In IECON 2006 - 32nd Annual Conference on IEEE Industrial Electronics. IEEE, 2006. http://dx.doi.org/10.1109/iecon.2006.347776.

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Graham, Jeff, Paul Gantz, and Levent Gokdere. "Modular Digital Power Factor Correction for Aerospace Applications." In Power Systems Conference. 400 Commonwealth Drive, Warrendale, PA, United States: SAE International, 2010. http://dx.doi.org/10.4271/2010-01-1777.

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Karimeh, AbdulSalam, Nabil Karami, and Hiba El-Sheikh. "A modified adaptive power factor correction technique." In 2016 IEEE International Multidisciplinary Conference on Engineering Technology (IMCET). IEEE, 2016. http://dx.doi.org/10.1109/imcet.2016.7777434.

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Reports on the topic "Power Factor Correction"

1

Meth, M., and J. Sandberg. POWER FACTOR CORRECTION and HARMONIC FILTERS AT THE AGS. Office of Scientific and Technical Information (OSTI), January 1995. http://dx.doi.org/10.2172/1151319.

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Zabar, Z., and N. Kaish. Power factor correction system by means of continuous modulation. Final report. Office of Scientific and Technical Information (OSTI), August 1997. http://dx.doi.org/10.2172/510606.

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3

Ishaque, Mohammed. A new method for calculating the economic benefits of varying degrees of power factor correction for industrial plant loads. Portland State University Library, January 2000. http://dx.doi.org/10.15760/etd.6206.

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4

Tow Leong, Tiang, Mohd Saufi Ahmad, Ang Qian Yee, Syahrun Nizam Md Arshad@Hashim, Mohd Faizal Mohd Zahir, Mohd Azlizan Moh Adib, Nazril Husny, Tan Kheng Kwang, and Dahaman Ishak. HANDBOOK OF ELECTRICAL SYSTEM DESIGN FOR NON-DOMESTIC BUILDING. Penerbit Universiti Malaysia Perlis, 2023. http://dx.doi.org/10.58915/techrpt2023.001.

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This technical report presents the electrical system installation design for development of a factory with 1 storey and 2 storey of offices. Firstly, the general methodology of designing the electrical system are elaborated in this report. As overall, the methodologies in designing the components of the electrical system are explained and elaborated, which included: (a) load and maximum demand estimation; (b) miniature circuit breaker (MCB) selection; (c) moulded case circuit breaker (MCCB) selection; (d) air circuit breaker (ACB) selection, (e) residual current device (RCD) selection; (f) protection relay selection; (g) current transformer (CT) selection; (h) sizing selection for cable and live conductors; (i) capacitor bank selection for power factor correction (PFC); and (j) distribution transformer and its protection devices selection. Then, the electrical system of this project is computed and designed by using the methodologies aforementioned. Firstly, the electrical system of various distribution boards (DBs) with the protection/metering devices along with its phase and earthing cables for every final circuits are designed and installed in the factory. Next, the installation is proceeded with the electrical system of main switchboard (MSB) with the protection/metering devices along with its phase and earthing cables for every DBs. Also, the electrical system of PFC by using detuned capacitor bank with various protection/metering devices is designed and built in the plant. Apart from that, the factory is equipped with the electrical system of high tension (HT) room that included the distribution power transformer with the protection/metering devices along with its phase and earthing cables. Lastly, the methodologies and the computation design of the electrical system installation in the context of connected load, load currents, maximum demand, MCB, MCCB, ACB, RCD, protection relay, metering CTs, live cable, protection conductor/earth cable, detuned capacitor bank, and distribution transformer, are prepared according to several important standards, for instance, the MS IEC 60364, Electrical Installations for Buildings, Suruhanjaya Tenaga (ST) – Non-Domestic Electrical Installation Safety Code, Electricity Supply Application Handbook, Tenaga Nasional Berhad (TNB).
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Robinett, Fred. PR-471-14207-Z03 Evaluation of Field Pump Performance Testing Procedure. Chantilly, Virginia: Pipeline Research Council International, Inc. (PRCI), August 2019. http://dx.doi.org/10.55274/r0011616.

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In situ pump performance testing was performed at the TransCanada pipeline Monitor station in Alberta Canada and Liebenthal station in Saskatchewan Canada in accordance with the Field Pump Performance Testing Procedure (PRCI report PR-471-14207-R01). Testing at the Monitor station was performed by Sulzer with two different batches of crude oil with slightly different viscosities and densities. Because of the pipeline operation limitations the flow could not be varied appreciably, however the flow points were near the pumps bep flow and therefore believed to be beneficial. To help validate field pump performance testing techniques measurements were taken using two methods to measure flow and two to measure pump power-in. Testing at the Liebenthal station was performed by TransCanada personnel on one fixed speed and one variable speed unit. All testing was performed with one batch of crude oil. The fixed speed unit power was measured with electrical power to the motor and the variable speed unit power was measured with a torque meter and electrical power. A full description of the Excel sheets used to calculate the field pump performance and the factory test data corrected to field conditions is made. The spreadsheet is included with this report. This work will benefit the liquids pipeline operators by validating the field test procedure, thereby providing assurance and acceptance of the methods. Using these field pump performance testing methods on additional pumps will help populate the database of measured viscous pump performances. This data can then be used to further improve the Hydraulic Institutes viscous correction calculations. Additionally, improved field pump performance measurements will allow the pipeline users to optimize their pipeline operation.
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Law, Edward, Samuel Gan-Mor, Hazel Wetzstein, and Dan Eisikowitch. Electrostatic Processes Underlying Natural and Mechanized Transfer of Pollen. United States Department of Agriculture, May 1998. http://dx.doi.org/10.32747/1998.7613035.bard.

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The project objective was to more fully understand how the motion of pollen grains may be controlled by electrostatic forces, and to develop a reliable mechanized pollination system based upon sound electrostatic and aerodynamic principles. Theoretical and experimental analyses and computer simulation methods which investigated electrostatic aspects of natural pollen transfer by insects found that: a) actively flying honeybees accumulate ~ 23 pC average charge (93 pC max.) which elevates their bodies to ~ 47 V likely by triboelectrification, inducing ~ 10 fC of opposite charge onto nearby pollen grains, and overcoming their typically 0.3-3.9 nN detachment force resulting in non-contact electrostatic pollen transfer across a 5 mm or greater air gap from anther-to-bee, thus providing a theoretical basis for earlier experimental observations and "buzz pollination" events; b) charge-relaxation characteristics measured for flower structural components (viz., 3 ns and 25 ns time constants, respectively, for the stigma-style vs. waxy petal surfaces) ensure them to be electrically appropriate targets for electrodeposition of charged pollen grains but not differing sufficiently to facilitate electrodynamic focusing onto the stigma; c) conventional electrostatic focusing beneficially concentrates pollen-deposition electric fields onto the pistill tip by 3-fold as compared to that onto underlying flower structures; and d) pollen viability is adequately maintained following exposure to particulate charging/management fields exceeding 2 MV/m. Laboratory- and field-scale processes/prototype machines for electrostatic application of pollen were successfully developed to dispense pollen in both a dry-powder phase and in a liquid-carried phase utilizing corona, triboelectric, and induction particulate-charging methods; pollen-charge levels attained (~ 1-10 mC/kg) provide pollen-deposition forces 10-, 77-, and 100-fold greater than gravity, respectively, for such charged pollen grains subjected to a 1 kV/cm electric field. Lab and field evaluations have documented charged vs. ukncharged pollen deposition to be significantly (a = 0.01-0.05) increased by 3.9-5.6 times. Orchard trials showed initial fruit set on branches individually treated with electrostatically applied pollen to typically increase up to ~ 2-fold vs. uncharged pollen applications; however, whole-tree applications have not significantly shown similar levels of benefit and corrective measures continue. Project results thus contribute important basic knowledge and applied electrostatics technology which will provide agriculture with alternative/supplemental mechanized pollination systems as tranditional pollen-transfer vectors are further endangered by natural and man-fade factors.
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