Relevant bibliographies by topics / Power Factor Correction (PFC)

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  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Power Factor Correction (PFC)'

Author: Grafiati
Published: 4 June 2021
Last updated: 20 February 2023

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Journal articles on the topic "Power Factor Correction (PFC)"

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Reddy, N. Chaitanya, J. Akhil Reddy, EVS Rahul Rajkumar, and M. Ravikanth. "Power Factor Correction Using a Series Active Filter." International Journal for Research in Applied Science and Engineering Technology 10, no. 6 (June 30, 2022): 1543–48. http://dx.doi.org/10.22214/ijraset.2022.44098.

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Abstract: Power factor correction (PFC) for single-phase diode rectifiers utilising a series active filter is demonstrated in this project at a minimal cost. When compared to the typical PFC, the suggested PFC has reduced power device ratings requirements, which results in cheaper costs and improved efficiency. It can also eliminate the requirement for a large inductor in the typical PFC, making it more compact. This study examines the proposed PFC's topology, operating principle, and application concerns. The control approach and simulation results are presented in detail. Prototypes of 1-kW are made and the experimental findings are shown to verify the theoretical analysis. Index Terms: Harmonic resonance, hybrid active filter, industrial power system.
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Stojce Ilcev, Dimov. "Analysis of power factor corrections for obtaining improved power factors of switching mode power supply." International Journal of Engineering & Technology 9, no. 3 (September 30, 2020): 826. http://dx.doi.org/10.14419/ijet.v9i3.31086.

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This article discusses such an important issue as the power factor of Switching Mode Power Supply (SMPS) and its improvement through Power Factor Correction (PFC). The power factor shows how effectively uses the consumption of electric energy by certain loads connected to the power distribution system with Alternative Current (AC), which is very critical for the electricity-producing industry. The number of power factors is a dimensionless value that can vary from -1 to 1. Thus, in an electric power system, a load with a low power factor draws more current than a load with a high power factor for the same amount of transferring useful power, which may cause overloading of the power grid and lead to over-expenditure of electricity. Otherwise, designing power factor correction (PFC) into modern switched-mode power supplies (SMPS) has evolved over the past few years due to the introduction of many new controller integrated circuits (IC). Today, it is possible to design a variety of PFC circuits with different modes of operation, each with its own set of challenges. As the number of choices has increased, so has the complexity of making the choice and then executing the new design. In this article, the design considerations and details of operation for the most popular approaches are provided.
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Do, Hyun Lark. "AC-DC Converter with Power Factor Correction Function." Applied Mechanics and Materials 241-244 (December 2012): 763–66. http://dx.doi.org/10.4028/www.scientific.net/amm.241-244.763.

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An AC -DC converter with power factor correction (PFC) function is proposed in this paper. In the proposed converter, the boost PFC stage and the active-clamp DC-DC converter stage are merged into a single converter to reduce the overall cost and improve the power density. An active-clamp DC-DC converter stage can suppress the switch voltage stresses and provide zero-voltage-switching (ZVS) operation of the switches. The boost converter in PFC stage operates in discontinuous conduction mode (DCM) and it provides naturally high power factor. Due to the ZVS operation, the switching losses of the proposed converter are significantly reduced and the efficiency is improved. Steady-state analysis is performed. Simulation results are also provided to verify the effectiveness of the proposed converter.
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Sun, Bao Wen, and Yun Xi Wu. "Single-Stage Power Factor Correction (PFC) Converter Design." Applied Mechanics and Materials 687-691 (November 2014): 3383–86. http://dx.doi.org/10.4028/www.scientific.net/amm.687-691.3383.

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A single-stage PFC converter was introduced in this paper, then the converter EMI filters, converters inductors, high-frequency transformers and power components were designed and chosen, proven to good effect.
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Krachangchaeng, Napat, and Sakorn Po-Ngam. "The Three-Level Sine-Wave Inverter with Power Factor Correction (PFC)." Applied Mechanics and Materials 781 (August 2015): 402–5. http://dx.doi.org/10.4028/www.scientific.net/amm.781.402.

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Nowadays, the uninterruptible power supply (UPS) is important in reliability for electric device. The UPS need high quality electricity. Therefore, the simulation of the three-level sine-wave inverter with power factor correction (PFC) is proposed in this paper. Moreover, the circuit’s guidelines of the active PFC controller in the active PFC and the sinusoidal output voltage are also presented. Validity of the proposed the three-level sine-wave inverter with the active PFC is confirmed by simulation. The simulation results show the very small current harmonics, the input power factor most nearly unity and constant output voltage when the suddenly step-load changed.
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Xiao, Qian Hua, and Hai Jing Liu. "Research on Soft Switching Power Supply with High Power Factor Based on Boost Converter." Applied Mechanics and Materials 29-32 (August 2010): 2422–27. http://dx.doi.org/10.4028/www.scientific.net/amm.29-32.2422.

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With the development of power electronics，the technology of Switching Mode Power Supply(SMPS) is gradually perfected. However，there is no end to the demand for a high power and high performance power supply. Nowadays, Power Factor Correction (PFC) technique is widely researched. This paper mainly analyzes the fundamental configuration of the switching power supply. And we study the basic structure and the operating principles of ZVT-boost soft-switching PFC circuit and the implementing principle of soft switch. For the power requirements, the two-stage PFC circuit is used. The forward stage is a single-phase Boost Power Factor Correction circuit and the backward stage main circuit is a full-bridge converter with the phase-shifting control soft-switching technique. Finally the simulating analysis is performed to the designed system.
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Zhang, Rui, Wei Ma, Lei Wang, Min Hu, Longhan Cao, Hongjun Zhou, and Yihui Zhang. "Line Frequency Instability of One-Cycle-Controlled Boost Power Factor Correction Converter." Electronics 7, no. 9 (September 17, 2018): 203. http://dx.doi.org/10.3390/electronics7090203.

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Power Factor Correction (PFC) converters are widely used in engineering. A classical PFC control circuit employs two complicated feedback control loops and a multiplier, while the One-Cycle-Controlled (OCC) PFC converter has a simple control circuit. In OCC PFC converters, the voltage loop is implemented with a PID control and the multiplier is not needed. Although linear theory is used in designing the OCC PFC converter control circuit, it cannot be used in predicting non-linear phenomena in the converter. In this paper, a non-linear model of the OCC PFC Boost converter is proposed based on the double averaging method. The line frequency instability of the converter is predicted by studying the DC component, the first harmonic component and the second harmonic component of the main circuit and the control circuit. The effect of the input voltage and the output capacitance on the stability of the converter is studied. The correctness of the proposed model is verified with numerical simulations and experimental measurements.
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Wang, Shu Hai, Shu Wang Chen, and Yue Su. "Design of Laptop Power Adapter Circuit." Applied Mechanics and Materials 427-429 (September 2013): 909–12. http://dx.doi.org/10.4028/www.scientific.net/amm.427-429.909.

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In the design of laptop power adapter, the former stage is the power factor correction PFC converter; the after stage is DC/DC converter. The control part controls chip through an integrated PFC and PFM control integrated. In this two structures, the former stage PFC often using traditional inductor current critical conduction mode Boost converter to achieve sinusoidal input current to the whole form, thus reducing input current harmonics with a high power factor, keep a long time , simple structure and low cost.
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Sasikala, K., and R. Krishna Kumar. "An Improved Power Factor Correction for Interleaved Flyback Switched Mode Power Supply." International Journal of Engineering & Technology 7, no. 3.27 (August 15, 2018): 166. http://dx.doi.org/10.14419/ijet.v7i3.27.17752.

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Nowadays the use of electronic equipment finds a progressive development in the modern world. Hence it becomes a mandate to check whether the harmonic content of line current of any electronic device which is connected to the ac supply meets the appropriate standards. This demand is satisfied by implementing the Power Factor Correction (PFC) circuit in order to make the input current to be in sinusoidal in nature and in-phase with the input voltage. Numerous solutions are available to make the line current almost sinusoidal. This paper deals with the inclusion of passive PFC in the interleaved Fly back SMPS to improve the power factor. The proposed work also examines the reduction of current ripple at the output using interleaved converter.
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Udhayakumar, G., Rashmi M R, K. Patel, G. P. Ramesh, and Suresh A. "Supply Power Factor Improvement in Ozone Generator System Using Active Power Factor Correction Converter." International Journal of Power Electronics and Drive Systems (IJPEDS) 6, no. 2 (June 1, 2015): 326. http://dx.doi.org/10.11591/ijpeds.v6.i2.pp326-336.

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<p>Artificial Ozone Generating system needs High Voltage, High Frequency supply. The Ozonator distorts the supply currents and henceforth affect the supply power factor. This paper presents the performance comparison of PWM inverter to Power Factor Corrected (PFC) converter with PWM inverter based High-voltage High-frequency power supply for ozone generator system. The conventional inverter has front end bridge rectifier with smoothing capacitor. It draws non-sinusoidal current from ac mains; as a result input supply has more harmonics and poor power factor. Hence, there is a continuous need for power factor improvement and reduction of line current harmonics. The proposed system has active power factor correction converter which is used to achieve sinusoidal current and improve the supply power factor. The active PFC converter with PWM inverter fed ozone generator generates more ozone output compared to the conventional inverter. Thus the proposed system has less current harmonics and better input power factor compared to the conventional system. The performance of the both inverters are compared and analyzed with the help of simulation results presented in this paper.</p>
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Dissertations / Theses on the topic "Power Factor Correction (PFC)"

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Xie, Manjing. "Digital Control for Power Factor Correction." Thesis, Virginia Tech, 2003. http://hdl.handle.net/10919/34258.

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This thesis focuses on the study, implementation and improvement of a digital controller for a power factor correction (PFC) converter. The development of the telecommunications industry and the Internet demands reliable, cost-effective and intelligent power. Nowadays, the telecommunication power systems have output current of up to several kilo amperes, consisting of tens of modules. The high-end server system, which holds over 100 CPUs, consumes tens of kilowatts of power. For mission-critical applications, communication between modules and system controllers is critical for reliability. Information about temperature, current, and the total harmonic distortion (THD) of each module will enable the availability of functions such as dynamic temperature control, fault diagnosis and removal, and adaptive control, and will enhance functions such as current sharing and fault protection. The dominance of analog control at the modular level limits system-module communications. Digital control is well recognized for its communication ability. Digital control will provide the solution to system-module communication for the DC power supply. The PFC converter is an important stage for the distributed power system (DPS). Its controller is among the most complex with its three-loop structure and multiplier/divider. This thesis studies the design method, implementation and cost effectiveness of digital control for both a PFC converter and for an advanced PFC converter. Also discussed is the influence of digital delay on PFC performance. A cost-effective solution that achieves good performance is provided. The effectiveness of the solution is verified by simulation. The three level PFC with range switch is well recognized for its high efficiency. The range switch changes the circuit topology according to the input voltage level. Research literature has discussed the optimal control for both range-switch-off and range-switch-on topologies. Realizing optimal analog control requires a complex structure. Until now optimal control for the three-level PFC with analog control has not been achieved. Another disadvantage of the three-level PFC is the output capacitor voltage imbalance. This thesis proposes an active balancing solution to solve this problem.
Master of Science
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Grote, Tobias [Verfasser]. "Digital control for interleaved boost power factor correction (PFC) rectifiers / Tobias Grote." Paderborn : Universitätsbibliothek, 2014. http://d-nb.info/105184813X/34.

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Gamboa, Gustavo. "REALIZATION OF POWER FACTOR CORRECTION AND MAXIMUM POWER POINT TRACKING FOR LOW POWER WIND TURBINES." Master's thesis, University of Central Florida, 2009. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/4283.

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In recent years, wind energy technology has become one of the top areas of interest for energy harvesting in the power electronics world. This interest has especially peaked recently due to the increasing demand for a reliable source of renewable energy. In a recent study, the American Wind Energy Association (AWEA) ranked the U.S as the leading competitor in wind energy harvesting followed by Germany and Spain. Although the United States is the leading competitor in this area, no one has been able successfully develop an efficient, low-cost AC/DC convertor for low power turbines to be used by the average American consumer. There has been very little research in low power AC/DC converters for low to medium power wind energy turbines for battery charging applications. Due to the low power coefficient of wind turbines, power converters are required to transfer the maximum available power at the highest efficiency. Power factor correction (PFC) and maximum power point tracking (MPPT) algorithms have been proposed for high power wind turbines. These turbines are out of the price range of what a common household can afford. They also occupy a large amount of space, which is not practical for use in one's home. A low cost AC/DC converter with efficient power transfer is needed in order to promote the use of cheaper low power wind turbines. Only MPPT is implemented in most of these low power wind turbine power converters. The concept of power factor correction with MPPT has not been completely adapted just yet. The research conducted involved analyzing the effect of power factor correction and maximum power point tracking algorithm in AC/DC converters for wind turbine applications. Although maximum power to the load is always desired, most converters only take electrical efficiency into consideration. However, not only the electrical efficiency must be considered, but the mechanical energy as well. If the converter is designed to look like a purely resistive load and not a switched load, a wind turbine is able to supply the maximum power with lower conduction loss at the input side due to high current spikes. Two power converters, VIENNA with buck converter and a Buck-boost converter, were designed and experimentally analyzed. A unique approach of controlling the MPPT algorithm through a conductance G for PFC is proposed and applied in the VIENNA topology. On the other hand, the Buck-boost only operates MPPT. With the same wind profile applied for both converters, an increase in power drawn from the input increased when PFC was used even when the power level was low. Both topologies present their own unique advantages. The main advantage for the VIENNA converter is that PFC allowed more power extraction from the turbine, increasing both electrical and mechanical efficiency. The buck-boost converter, on the other hand, presents a very low component count which decreases the overall cost and volume. Therefore, a small, cost-effective converter that maximizes the power transfer from a small power wind turbine to a DC load, can motivate consumers to utilize the power available from the wind.
M.S.E.E.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering MSEE
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Lee, Moonhyun. "Digital-Based Zero-Current Switching (ZCS) Control Schemes for Three-Level Boost Power-Factor Correction (PFC) Converter." Diss., Virginia Tech, 2020. http://hdl.handle.net/10919/99694.

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With the increasing demands on electronic loads (e.g. desktop, laptop, monitor, LED lighting and server) in modern technology-driven lives, performance of switched-mode power supply (SMPS) for electronics have been growing to prominence. As front-end converters in typical SMPS structure, ac-dc power-factor correction (PFC) circuits play a key role in regulations of input power factor, harmonics and dc output voltage, which has a decisive effect on entire power-supply performances. Universal ac-line and low-power system (90–264 Vrms, up to 300–400 W) is one of the most common power-supply specifications and boost-derived PFC topologies have been widely used for the purpose. In order to concurrently achieve high efficiency and low-cost system in the PFC stage, zero-current switching (ZCS) control schemes are highly employed in control principles. Representative schemes are discontinuous conduction mode (DCM) and critical conduction mode (CRM). Both modes can realize ZCS turn-on without diode reverse recovery so that low switching losses and low-cost diode utilizations are obtainable. Among various boost-family PFC topologies, three-level boost (TLB) converter has generated considerable research interest in high-voltage high-power applications. It is mainly due to the fact that the topology can have halved component voltage stresses, improved waveform qualities and electromagnetic interference (EMI) from phase interleaved continuous conduction mode (CCM) operations, compared to other two-level boost PFC converters. On the other hand, in the field of universal-line low-power applications, TLB PFC has been thoroughly out of focus since doubled component counts and increased control complexity than two-level topologies are practical burden for the low-cost systems. However, recent researches on TLB PFC with ZCS control schemes have found that cost-competitiveness of the topology is actually comparable to two-level boost PFC converters because the halved component voltage stresses enable usage of low voltage-rating components of which unit prices are cheaper than higher-rating ones. Based on the justification, researches on ZCS control schemes for TLB PFC have been conducted to get enhanced waveform qualities and performance factors. Following the research stream, a three-level current modulation scheme that can be adopted in both DCM and CRM is proposed in Chapter 2 of this dissertation. Main concept of the proposed current modulation is additional degree-of-freedom in current-slope shaping by differentiating on-times of two active switches, which cannot be found from any other single-phase boost-derived PFC topologies. Using the multilevel feature, proposed operations in one switching period consist of three steps: common-switch on-time, single-switch on-time and common-switch off-time. The single-switch on-time step is key design factor of the proposed modulation that can be utilized either in fixed or adjustable form depending on control purpose. Based on the basic modulation concept, three-level CRM control scheme, adjustable three-level DCM control scheme, and spread-spectrum frequency modulation (SSFM) with adjustable three-level DCM scheme are proposed in Chapter 3–5, respectively. In each chapter, implemented control scheme aims to improve different performance factors. In Chapter 3, the proposed three-level CRM scheme uses increased single-switch on-time period to reduce peak inductor current and magnitude of variable switching frequency. It is generally accepted fact that CRM operations suffer from high switching losses and poor efficiency at light load due to considerable increment of switching frequency. Thus, efficiency improvement effect by the proposed CRM scheme becomes remarkable as load condition goes lighter. In experimental verifications, maximum improvement is measured by 1.2% at light load (20%) and overall efficiency is increased by at least 0.4% all over the load range. In Chapter 4, three-level DCM control scheme adopts adjustable single-switch on-time period in fixed switching-frequency framework. The purpose of adjustable control scheme is to widen the length of non-zero inductor current period as much as possible so that discontinued current period and high peak current of DCM operations can be minimized. Experiment results show that, compared to conventional two-level DCM control, full-load peak inductor currents are reduced by 20.2% and 17.1% at 110 and 220 Vrms input voltage conditions, respectively. Moreover, due to turn-off switching energy decrements by the turn-off current reductions, efficiency is also improved by at least 0.4% regardless of input voltage and load conditions. In Chapter 5, a downward SSFM technique is developed first for DCM operations of boosting PFC converters including two-level topologies. This chapter aims to achieve significant reduction of high differential-mode (DM) EMI amplitudes from DCM operations, which is major drawback of DCM control. By using the simple linearized frequency modulation, peak DM EMI noise at full load condition is reduced by 12.7 dBμV than conventional fixed-frequency DCM control. On top of the proposed SSFM, the adjustable three-level DCM control scheme in Chapter 4 is adopted to get further reductions of EMI noises. Experimental results prove that the collaborations of SSFM and adjustable DCM scheme reduce the EMI amplitudes further by 2.5 dBμV than the result of SSFM itself. The reduced EMI amplitudes are helpful to design input EMI filter with higher cut-off frequency and smaller size. Different from two-level boosting PFC converters, TLB PFC topology has two output capacitors in series and inherently suffers from voltage unbalancing issue, which can be noted as topological trade-off. In Chapter 6, two simple but effective voltage balancing schemes are introduced. The balancing schemes can be easily built into the proposed ZCS control schemes in Chapter 3–5 and experimental results validate the effectiveness of the proposed balancing principles. For all the proposed control schemes in this dissertation, detailed operation principles, derivation process of key equations, comparative analyses, implementation method with digital controller and experimental verifications with TLB PFC prototype are provided.
Doctor of Philosophy
Electronic-based devices and loads have been essential parts of modern society founded on rapid advancements of information technologies. Along with the progress, power supplying and charging of electronic products become routinized in daily lives, but still remain critical requisites for reliable operations. In many power-electronics-based supplying systems, ac-dc power-factor correction (PFC) circuits are generally located at front-end to feed back-end loads from universal ac-line sources. Since PFC stages have a key role in regulating ac-side current quality and dc-side voltage control, the importance of PFC performances cannot be emphasized enough from entire system point of view. Thus, advanced control schemes for PFC converters have been developed in quantity to achieve efficient operations and competent power qualities such as high power factor, low harmonic distortions and low electromagnetic interferences (EMI) noises. In this dissertation, a sort of PFC topologies named three-level boost (TLB) converter is chosen for target topology. Based on inherent three-level waveform capability of the topology, multiple zero-current switching (ZCS) control schemes are proposed. Compared to many conventional two-level PFC topologies, TLB PFC can provide additional degree-of-freedom to current modulation. The increased control flexibility can realize improvements of various waveform qualities including peak current stress, switching frequency range, harmonics and EMI amplitude. From the experimental results in this dissertation, improvements of waveform qualities in TLB PFC with the proposed schemes are verified with comparison to two-level current control schemes; in terms of efficiency, the results show that TLB PFC with the proposed schemes can have similar converter efficiency with conventional two-level boost converter in spite of increased component counts in the topology. Further, the proposed three-level control schemes can be utilized in adjustable forms to accomplish different control objectives depending on system characteristics and applications. In each chapter of this dissertation, a novel control scheme is proposed and explained with details of operation principle, key equations and digital implementation method. All the effectiveness of proposals and analyses are validated by a proper set of experimental results with a TLB PFC prototype.
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Koh, Hyunsoo. "Modeling and Control of Single Switch Bridgeless SEPIC PFC Converter." Thesis, Virginia Tech, 2012. http://hdl.handle.net/10919/34125.

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Due to increasing concerns on the power quality, power factor correction (PFC) has become an important issue in light-emitting diode (LED) lighting applications. A boost converter is one of the most well-known PFC topologies, due to its simple circuitry, simple control scheme and small number of passive components. Even though a boost converter is recognized as a typical PFC converter, its output voltage must be higher than its input voltage. This feature is disadvantageous because the device requires an additional buck-stage for LED lighting systems. As an alternative to the boost converter, a single-ended primary-inductor converter (SEPIC) allows output voltage to be lower or higher than the input voltage. Thus, the SEPIC converter is gaining popularity as a LED driver because it does not require additional power conversion stage. However, designing a controller to meet stability requirements and international standards is quite challenging for SEPIC converters. Additionally, if the digital controller is adopted for its built-in communication features, creating a digitally controlled SEPIC converter would be even more challenging. This thesis focuses on the state-space averaging modeling of the SEPIC PFC converter and the design of controllers based on both analog and digital controls with precise modeling. The proposed SEPIC converter incorporates RC damping circuits to avoid the instability, and thus the entire SEPIC converter becomes a 5th order system. Such a high-order system model was derived mathematically and verified with circuit simulator modeling. After verification of the circuit model, the controller was designed with analog transfer functions and converted to and the discrete domain for digital controller implementation. A 150-W single-switch bridgeless SEPIC PFC converter prototype was built accordingly to verify the design. In addition to the current loop controller design for stability, a feed-forward compensator for is introduced and derived for better waveform quality. Simulation results and experiment results are also presented to verify the complete controller with feed-forward compensation. The Texas Instruments (TI) digital signal processor (DSP) TMS320F28335 was adopted for digital controller implementation. For comparison purpose, the TI UC3854 controller was implemented to verify the analog controller design results.
Master of Science
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Yilmaz, Hasan. "Design, Application And Comparison Of Single Stage Flybackand Sepic Pfc Ac/dc Converters For Power Led Lighting Application." Master's thesis, METU, 2012. http://etd.lib.metu.edu.tr/upload/12615097/index.pdf.

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In this work, single stage power factor corrected AC/DC converters for LEDs
single stage Flyback converter having different configuration from the traditional Flyback and single stage SEPIC converter is investigated. The study involves analysis, circuit design, performance comparisons and implementation. The study covers LEDs
their developments, characteristics and state-of-art in this new technology. The circuits are investigated by means of computer simulations. Operating principles and operating modes are studied along with design calculations. After applying prototypes in laboratory, the simulation results and theoretical analyses are confirmed. The single stage Flyback converter has high voltage input (220-240 Vac), and the output feeds up to 216 HB-LEDs, with the ratings of 24 V, 3.25 A with 90 W. The single stage SEPIC converter with universal input (80-265 Vac) has an output that feeds 21 power LEDs, with 67 V, 0.30 and 20 W ratings.
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Muhammad, Khairul Safuan Bin. "Design and Practical Implementation of Bridgeless Boost PFC Rectifier With Zero-Current Switching And Fault-Tolerant Operation." Thesis, The University of Sydney, 2015. http://hdl.handle.net/2123/14309.

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In this thesis, a new family of zero-current switching (ZCS) BBR with high power factor using only two active switches is proposed. The proposed BBR is based on a totem-pole BBR (TPBBR) configuration which allows the current to flow from high side to low side and vice versa during resonance. Hence, no auxiliary active switch is needed to provide soft-switching for all semiconductor devices. The soft-switching also reduces the body diode reverse recovery problem hence allows the TPBLB to operate in continuous conduction mode (CCM). Design considerations and parameter values calculations are given. An experimental prototype is developed and tested to verify the converter performance. The proposed FTBBR is based on an H-bridge rectifier configuration. Only two out of the four switches are needed to be working in order to ensure the continuity of the converter operation. A detailed analysis of the FTBBR operation under all open-circuit faults of the switches is presented. In addition, adding resonant networks to the FTBBR is also analysed. The FTBBR is controlled using similar PWM controller as proposed in the new ZCS BBR. An experimental prototype is developed and tested to verify the converter performance. The TPBBR requires a special switching techniques and sequences, where isolated gate driver is the best solution which allows both high and low side switches to be turned on simultaneously during resonance. As a solution to the gate driver, a magnetically isolated gate driver with high immunity to leakage inductance is proposed. The proposed gate driver (PGD) is developed based on a bipolar totem-pole gate driver (non-inverting) located on the secondary side of the coupling transformer. It is able to drive a MOSFET/IGBT from standard CMOS to TTL output and down to LSTTL level. It also achieves large duty cycle ratio and small input to output delay and provides reliable isolation. The PGD is analysed and verified experimentally.
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Damasceno, Daniel da Motta Souto. "Metodologia de projeto de conversores boost para correção de fator de potência apliocada a sistemas ininterruptos de energia." Universidade Federal de Santa Maria, 2006. http://repositorio.ufsm.br/handle/1/8539.

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This Master Thesis presents a design methodology to a boost PFC converter operating as an Uninterruptible Power Supply rectifier input stage. This methodology defines, making use of a group of current ripples and switching frequencies, the converter minimum volume point analyzing the volumes of the boost inductor, the electromagnetic interference filter and the heat-sinks. Thus, it's developed along this work, each design mentioned above, analyzing the impact of different magnetic materiaIs, input filter topologies and semiconductors technologies. Previously, it is designed the controller and it is developed a simulation structure. ln a second moment, it's designed the boost inductor for a predetermined temperature elevation. After this, it's designed the electromagnetic filter analyzing the impact of different topologies. The heat-sinks are also designed to guarantee the semiconductors operation within the temperature limits. Finally, the methodology based on the previous designs is accomplished, using the procedures and equations already mentioned, becoming possible to define the converter minimum volume point.
Esta Dissertação de Mestrado apresenta uma metodologia de projeto para o conversor boost operando como estágio retificador de entrada em uma fonte de alimentação ininterrupta. Essa metodologia se baseia em definir, através de um conjunto de freqüências de comutação e ondulações de corrente, o ponto de minimização do volume do conversor considerando o volume do indutor, do filtro de interferência eletromagnética conduzida e dos dissipadores. Assim, é desenvolvido ao longo desse trabalho o projeto de cada elemento mencionado estudando o impacto do uso de diferentes materiais magnéticos, topologias de filtro de entrada e tecnologias de semicondutores. Inicialmente é projetado o controlador e desenvolvida a estrutura de simulação do conversor. Em um segundo momento é projetado o indutor boost para uma determinada elevação de temperatura. A seguir é projetado o filtro de interferência eletromagnética analisando o impacto de diferentes topologias. Também são projetados os dissipadores que garantem a operação dos semicondutores dentro dos limites de temperatura estabelecidos pelos fabricantes. Por fim, é formalizada a metodologia baseada nos projetos anteriores, pela qual, fazendo uso dos procedimentos e equações fornecidos, torna-se possível definir o ponto de minimização do volume do conversor.
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Pham, Thi Thuy Linh. "Contribution à l’étude de nouveaux convertisseurs sécurisés à tolérance de panne pour systèmes critiques à haute performance. Application à un PFC Double- Boost 5 Niveaux." Thesis, Toulouse, INPT, 2011. http://www.theses.fr/2011INPT0095/document.

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Les conditionneurs alternatifs – continu à absorption sinusoïdale (PFC) pour les applications critiques se distinguent par un haut niveau de performances tel que les THD réduits, un haut rendement et une bonne fiabilité. Leur importance est d’autant plus nécessaire qu’une continuité de service des alimentations est requise même en présence d’une défaillance interne de composant. Deux types de structures associées à leur commande sont réalisés à cet effet, les structures à redondance parallèle et les structure à redondance en série. Elles consistent respectivement en l’ajout d’un bras d’interrupteur dans le cas de la redondance parallèle, qui est une option plus compliquée et en une suppression d’une cellule de commutation dans le deuxième cas. L’étude présentée ici, consiste en premier lieu en une exploration et une évaluation de nouvelles familles de topologies multi-niveaux, caractérisée par un partitionnement cellulaire en série. Ces nouvelles topologies, ainsi que leurs variantes, comportent au moins une redondance structurelle avec des cellules mono-transistor à défaut de commande non critique et symétriques à point-milieu. Elles sont donc génériques pour la mise en parallèle et l’extension en triphasé. Cependant, elles sont pour la plupart peu compétitives à cause des composants qui sont souvent surdimensionnés et donc plus onéreuses, en comparaison avec la structure PFC Double-Boost 5 Niveaux à composants standards 600 V (brevetée par l’INPT – LAPLACE –CNRS en 2008) que nous étudions. Cette dernière constitue le meilleur compromis entre un bon rendement et une maîtrise des contraintes en mode dégradé. Sur le plan théorique nous montrons que le seul calcul de fiabilité basé uniquement sur un critère de premier défaut est inadapté pour décrire ce type de topologie. La prise en compte de la tolérance de panne est nécessaire et permet d'évaluer la fiabilité globale sur une panne effective (i.e. au second défaut). L'adaptation de modèles théoriques de fiabilité à taux de défaillance constant mais prenant en compte, au niveau de leurs paramètres, le report de contrainte en tension et l'augmentation de température qui résulte d'un premier défaut, permet de chiffrer en valeur relative, le gain obtenu sur un temps court. Ce résultat est compatible avec les systèmes embarqués et la maintenance conditionnelle. Un prototype monophasé de PFC double-boost 5 niveaux à commande entièrement numérique et à MLI optimisée reconfigurable en temps réelle a été réalisé afin de valider l’étude. Il permet une adaptation automatique de la topologie de 5 à 4 puis 3 niveaux par exemple. Ce prototype a également servi de test d'endurance aux transistors CoolMos et diodes SiC volontairement détruits dans des conditions d'énergie maîtrisée et reproductibles. D’autres campagnes d'endurance en modes dégradés ont été réalisées en laboratoire sur plusieurs centaines d’heures en utilisant ce même prototype. Nous nous sommes axés sur la détection de défauts internes et le diagnostic (localisation) rapide, d'une part par la surveillance directe et le seuillage des tensions internes (tensions flottantes) et d'autre part, par la détection d’harmoniques (amplitude et phase) en temps réel. Ces deux techniques ont été intégrées numériquement et évaluées sur le prototype, en particulier la seconde qui ne requiert qu'un seul capteur. Enfin, nous proposons une nouvelle variante PFC expérimentée en fin de mémoire, utilisant deux fois moins de transistors et de drivers pour les mêmes performances fréquentielles au prix d'un rendement et d'une répartition des pertes légèrement moins favorable que la structure brevetée
This work is an exploration and an evaluation of new variants of multi-level AC/DC topologies (PFC) considering their global reliability and availability: electrical safety with an internal failure and post-failure operation. They are based on a non-differential AC and centre tap connection that led to symmetrical arrangement cells in series. These topologies permit an intrinsic active redundancy between cells in a same group and a segregation capability between the two symmetrical groups of cells. More again, they are modular and they can be paralleled and derived to any number of levels. Only single low-voltage (600V) transistor pear cell is used avoiding the short-circuit risk due to an unwanted control signal. Comparisons, taking into account losses, distribution losses, rating and stresses (overvoltage and over-temperature) during the post-operation are presented. Results highlight the proposed 5-level Double-Boost Flying Capacitor topology. This one was patented at the beginning of thesis, as a solution with the best compromise. On the theoretical side, we show that the reliability calculation based only on a "first fault occurrence" criterion is inadequate to really describe this type of topology. The inclusion of fault tolerance capability is needed to evaluate the overall reliability law (i.e. including a second failure). The adaptation of theoretical models with constant failure rate including overvoltage and over-temperature dependencies exhibit an increasing of the reliability over a short time. This property is an advantage for embedded systems with monitoring condition. Local detection and rapid diagnosis of an internal failure were also examined in this work. Two methods are proposed firstly, by a direct flying caps monitoring and secondly, by a realtime and digital synchronous demodulation of the input sampled voltage at the switching frequency (magnitude and phase). Both techniques have been integrated on FPGA and DSP frame and evaluated on a AC230V-7kW DC800V – 31kHz lab. set-up. We put forward the interest of the second method which only uses one input voltage sensor. Finally, we propose in this dissertation a new generic X-level PFC Vienna using, in 5-level version, half transistors and drivers for identical input frequency and levels. At the cost of a slight increase of losses and density losses, this topology appears very attractive for the future. A preliminary lab. set-up and test were also realized and presented at the end of the thesis
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10

Wang, Chuanyun. "Investigation on Interleaved Boost Converters and Applications." Diss., Virginia Tech, 2009. http://hdl.handle.net/10919/28635.

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With the rapid evolving IT technologies, today, the power factor correction (PFC) design is facing many challenges, such as power scalability, high entire-load-range efficiency, and high power density. Power scalability is a very desirable and cost-effective approach in the PFC design in order to keep up with serversâ growing power requirements. Higher power density can eventually reduce the converter cost and allows for accommodating more equipment in the existing infrastructures. Driven strongly by economic and environmental concerns, high entire-load-range efficiency is more and more required by various organizations and programs, such as the U.S. Energy Star, Climate Savers, and German Blue Angel. Today, the existing boost PFC is reaching its limitations to meet these challenges simultaneously. Using the cutting-edge semiconductor devices, further efficiency improvement at light load is still needed. There are limited approaches available for increasing the power density due to the large EMI filter and inductor size. Interleaved multi-channel boost PFC is a promising candidate to meet those challenges, but the interleaved boost converter is a less explored area. On the other hand, the multi-channel interleaved buck converter for the VR application has been intensively studied and thoroughly explored. One basic approach of this study is trying to extend the existing knowledge and techniques obtained from multiphase buck converters to the multi-channel interleaved boost converters since there are similarities existed between the multi-phase buck and the multi-channel boost converters. The existing studies about the interleaving impact on the EMI filter design are based on the time domain ripple cancellation effect. This approach is good enough for most of the filter designs. However, unlike the conventional filter designs, the EMI filter design is a specification related process. Both the EMI standard and the EMI measurement are based on the frequency domain spectrum. Limited by the existing analysis approaches, it is difficult to provide a clear picture about how exactly the multi-channel interleaving will impact the EMI filter design. The interleaving impact on the Common Mode (CM) noise also has not been studied in any existing literatures for the same reason. In this study, the frequency domain analysis method was adopted. With the double Fourier integral transformation, a closed-form expression of all the harmonics of the noise sources can be obtained. With all the detailed phase relationship of the switching frequency harmonics and all the side band harmonics, the multi-channel interleaving impact on both the differential mode (DM) and CM filter design can be clearly understood and summarized. According to the design curves provided, the EMI filter size can be effectively reduced by properly choosing the interleaving channel number and the switching frequency. The multi-channel interleaving impact on the output capacitor current ripple is also studied and summarized in this dissertation. It should be pointed out that interleaving only reduces the total input and output current ripples; the inductor current in each channel still has large ripple if small inductance is used. Similar to the multi-phase buck converter, coupling inductors result in different equivalent inductances for input current ripple and inductor current ripple for boost converters. Keeping the inductor current ripple magnitude the same, inverse coupling inductors between the interleaved channels can reduce the inductor size. However, the DM filter size is increased due to larger input current. Based on the investigation on the total magnetic component weight, inverse coupling inductor can reduce the total magnetic component weight. The reduction is more pronounced for lower switching frequency design when the inductor size is dominating among the total magnetic components. Based on the harmonic cancellation, and with all the detailed phase relationship of the switching frequency harmonics and all the side band harmonics, a novel phase angle control method is proposed to maximize the reduction of the EMI filter. For example, in a 2-channel interleaved PFC, just by changing the interleaving scheme to 90 degree phase shift, 39% total volume reduction of the EMI filter can be achieved. The proposed phase angle controlled multi-channel PFC is experimentally demonstrated and verified on a digital controlled 4-channel PFC. The phase angle control method proposed in the multi-channel boost converter can be applied back to the multi-phase buck converter as well. The harmonic cancellation principle will be the same as the multi-channel boost converter. The same benefits can be obtained when the requirement is defined in the frequency domain, e.g. the EMI Standard. The interleaved multi-channel configuration makes it possible to implement the phase-shedding to improve the PFC light load efficiency. By decreasing the number of active channels according to the load, the PFC light load efficiency can be optimized. However, shedding phases can reduce the ripple cancellation effect as well, which will result in the EMI noise increase and losing the benefit on the EMI filter. By applying the proposed phase-shedding with phase angle control strategy, the phase shedding impact on the EMI filter design can be minimized. The light load efficiency can be improved without compromising the EMI filter size. Then, adaptive frequency controlled PFC is proposed to further improve the PFC light load efficiency. The proposed light load efficiency improvement strategies are combined and implemented on the platform of the digital controlled 4-channel PFC. The benefit of improving the light load efficiency is experimentally verified. The EMI performance is also evaluated with the EMI measurement results obtained from the PFC prototype. Following the same approach explored, the benefits of interleaved boost converter can be further extended other applications, such as the boost converter in the Hybrid Electric Vehicles (HEV) and photovoltaic (PV) system.
Ph. D.
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Books on the topic "Power Factor Correction (PFC)"

1

Kappenman, Russell F. Estimation of the fishing power correction factor. [Seattle, Wash.]: Alaska Fisheries Science Center, National Marine Fisheries Service, U.S. Dept. of Commerce, 1992.

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Aiyappa, Rekha. Integrated Power Factor Correction (PFC) and Sensorless Field Oriented Control (FOC) System for Microchip 32-Bit MCU An. Microchip Technology Incorporated, 2017.

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Yang, Ada. Integrated Power Factor Correction (PFC) and Sensorless Field Oriented Control (FOC) System for Microchip 32-Bit MCU An. Microchip Technology Incorporated, 2018.

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Paeg, Heinz. Power Factor Correction. John Wiley and Sons Ltd, 1990.

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Alasooly, Hedaya Mahmood. Power Factor Correction. Dr. Hidaya Mahmoud Al-Assouly -, 2021.

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C, Lee Fred, Borojeviċ Dusa̧n, and Virginia Power Electronics Center, eds. Switching rectifiers for power factor correction. [Virginia]: Virginia Power Electronics Center, 1994.

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Amarasinghe, Kanishka Anushal. Resonance mode power supplies with power factor correction. 1990.

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Capacitor, Commonwealth Sprague, ed. Power factor correction: A guide for the plant engineer. North Adams, MA: Commonwealth Sprague Capacitor, Inc., 1996.

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Clayton, Albert Edmund. Power Factor Correction: Explaining The Meaning And Importance Of Power Factor, And Describing Methods For The Improvement Of Power Factor. Franklin Classics, 2018.

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Clayton, Albert Edmund. Power Factor Correction: Explaining the Meaning and Importance of Power Factor, and Describing Methods for the Improvement of Power Factor. Franklin Classics Trade Press, 2018.

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Book chapters on the topic "Power Factor Correction (PFC)"

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Schlienz, Ulrich. "PFC Power-Factor-Corrector." In Schaltnetzteile und ihre Peripherie, 135–52. Wiesbaden: Springer Fachmedien Wiesbaden, 2020. http://dx.doi.org/10.1007/978-3-658-29490-8_13.

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Abu-Qulbain, Mohammed, and Stuart Hill. "A review of reactive electrical power and power factor correction (PFC) in the Crossrail Low Voltage (LV) systems." In Crossrail Project, 235–48. London: ICE Publishing, 2022. http://dx.doi.org/10.1680/cpidc.66502.235.

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Neacșu, Dorin O. "Power Factor Correction." In Telecom Power Systems, 275–98. Boca Raton: CRC Press, 2017. http://dx.doi.org/10.4324/9781315104140-10.

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Tooley, Mike, and Lloyd Dingle. "Power, power factor and power factor correction." In Engineering Science, 469–76. 2nd edition. | Boca Raton, FL : Routledge [2021]: Routledge, 2020. http://dx.doi.org/10.1201/9781003002246-29.

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Kumar, Pradeep, P. R. Sharma, and Ashok Kumar. "Power Factor Correction Based on RISC Controller." In Communications in Computer and Information Science, 83–87. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-20499-9_14.

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Sun, Yuan, Jie Chen, Fei Meng, Ruichang Qiu, and Zhigang Liu. "Research on Active Power Factor Correction Technology." In Lecture Notes in Electrical Engineering, 191–98. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-2862-0_19.

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Hsien, Tsung-Lieh, Chien-Hua Lee, and Cheng-Hung Hung. "Analysis and Implementation of SEPIC Power-Factor-Correction Rectifiers." In Lecture Notes in Electrical Engineering, 705–13. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-04573-3_88.

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Anjappa, P., K. Naresh, V. Ramesh, P. Lakshmipathi, and K. Reddy Swathi. "Single Phase Soft Switching Techniques Power Factor Correction Converter." In Lecture Notes in Electrical Engineering, 563–71. New Delhi: Springer India, 2014. http://dx.doi.org/10.1007/978-81-322-2119-7_56.

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Kumar, Sanatan, Devashish, and Madhu Singh. "Comparative Analysis of Power Factor Correction Converters for Different Topologies." In Recent Advances in Power Electronics and Drives, 409–20. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-8586-9_36.

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Sarala, P., S. F. Kodad, and B. Sarvesh. "BLDC Motor Drive with Power Factor Correction Using PWM Rectifier." In Advances in Intelligent Systems and Computing, 11–25. Singapore: Springer Singapore, 2017. http://dx.doi.org/10.1007/978-981-10-3156-4_2.

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Conference papers on the topic "Power Factor Correction (PFC)"

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Attaianese, C., V. Nardi, F. Parillo, and G. Tomasso. "Dual Boost High performances Power Factor Correction (PFC)." In 2008 IEEE Applied Power Electronics Conference and Exposition - APEC 2008. IEEE, 2008. http://dx.doi.org/10.1109/apec.2008.4522848.

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Sahoo, Sukanta Kumar, and Hitesh R. Jariwala. "A new power factor correction technique using PFC boost converter." In 2012 11th International Conference on Environment and Electrical Engineering (EEEIC). IEEE, 2012. http://dx.doi.org/10.1109/eeeic.2012.6221488.

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Liu Ping, Meng Yu, Kang Yong, Zhang Hui, and Chen Jian. "Analysis of single-phase boost power factor correction (PFC) converter." In Proceedings of the IEEE 1999 International Conference on Power Electronics and Drive Systems. PEDS'99 (Cat. No.99TH8475). IEEE, 1999. http://dx.doi.org/10.1109/peds.1999.792832.

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Kamalapathi, Mr K., M. Naresh, and Dr Rafi Kiran. "A New Power Factor Correction Technique Using PFC Boost Converter." In National Conference on Trends in Engineering and Technology. AI Publications, 2017. http://dx.doi.org/10.22161/ijaers/nctet.2017.eee.50.

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Mohanty, Pratap Ranjan, Anup Kumar Panda, and Dhiman Das. "An active PFC boost converter topology for power factor correction." In 2015 Annual IEEE India Conference (INDICON). IEEE, 2015. http://dx.doi.org/10.1109/indicon.2015.7443118.

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Tan, Jingtao, Yang Li, Zhiqiang Jiang, Li Cai, and Jianping Ying. "A Novel Three-Phase Three-Level Power Factor Correction (PFC) Converter Using Two Single-Phase PFC Modules." In 2007 IEEE Power Electronics Specialists Conference. IEEE, 2007. http://dx.doi.org/10.1109/pesc.2007.4342513.

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Halder, Tapas. "Suitability of the Static Converters For the Power Factor Correction (PFC)." In 2021 Devices for Integrated Circuit (DevIC). IEEE, 2021. http://dx.doi.org/10.1109/devic50843.2021.9455860.

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Attaianese, C., V. Nardi, F. Parillo, and G. Tomasso. "High performances supercapacitor recovery system including Power Factor Correction (PFC) for elevators." In 2007 European Conference on Power Electronics and Applications. IEEE, 2007. http://dx.doi.org/10.1109/epe.2007.4417439.

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Beams, David, and Sriram Boppana. "Modeling and simulation of off-line boost power factor correction (PFC) circuits." In 2010 42nd Southeastern Symposium on System Theory (SSST 2010). IEEE, 2010. http://dx.doi.org/10.1109/ssst.2010.5442845.

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Mahmud, Khizir, and Lei Tao. "Power factor correction by PFC boost topology using average current control method." In 2013 IEEE Global High Tech Congress on Electronics (GHTCE). IEEE, 2013. http://dx.doi.org/10.1109/ghtce.2013.6767232.

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Reports on the topic "Power Factor Correction (PFC)"

1

Meth, M., and J. Sandberg. POWER FACTOR CORRECTION and HARMONIC FILTERS AT THE AGS. Office of Scientific and Technical Information (OSTI), January 1995. http://dx.doi.org/10.2172/1151319.

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Zabar, Z., and N. Kaish. Power factor correction system by means of continuous modulation. Final report. Office of Scientific and Technical Information (OSTI), August 1997. http://dx.doi.org/10.2172/510606.

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Ishaque, Mohammed. A new method for calculating the economic benefits of varying degrees of power factor correction for industrial plant loads. Portland State University Library, January 2000. http://dx.doi.org/10.15760/etd.6206.

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Law, Edward, Samuel Gan-Mor, Hazel Wetzstein, and Dan Eisikowitch. Electrostatic Processes Underlying Natural and Mechanized Transfer of Pollen. United States Department of Agriculture, May 1998. http://dx.doi.org/10.32747/1998.7613035.bard.

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The project objective was to more fully understand how the motion of pollen grains may be controlled by electrostatic forces, and to develop a reliable mechanized pollination system based upon sound electrostatic and aerodynamic principles. Theoretical and experimental analyses and computer simulation methods which investigated electrostatic aspects of natural pollen transfer by insects found that: a) actively flying honeybees accumulate ~ 23 pC average charge (93 pC max.) which elevates their bodies to ~ 47 V likely by triboelectrification, inducing ~ 10 fC of opposite charge onto nearby pollen grains, and overcoming their typically 0.3-3.9 nN detachment force resulting in non-contact electrostatic pollen transfer across a 5 mm or greater air gap from anther-to-bee, thus providing a theoretical basis for earlier experimental observations and "buzz pollination" events; b) charge-relaxation characteristics measured for flower structural components (viz., 3 ns and 25 ns time constants, respectively, for the stigma-style vs. waxy petal surfaces) ensure them to be electrically appropriate targets for electrodeposition of charged pollen grains but not differing sufficiently to facilitate electrodynamic focusing onto the stigma; c) conventional electrostatic focusing beneficially concentrates pollen-deposition electric fields onto the pistill tip by 3-fold as compared to that onto underlying flower structures; and d) pollen viability is adequately maintained following exposure to particulate charging/management fields exceeding 2 MV/m. Laboratory- and field-scale processes/prototype machines for electrostatic application of pollen were successfully developed to dispense pollen in both a dry-powder phase and in a liquid-carried phase utilizing corona, triboelectric, and induction particulate-charging methods; pollen-charge levels attained (~ 1-10 mC/kg) provide pollen-deposition forces 10-, 77-, and 100-fold greater than gravity, respectively, for such charged pollen grains subjected to a 1 kV/cm electric field. Lab and field evaluations have documented charged vs. ukncharged pollen deposition to be significantly (a = 0.01-0.05) increased by 3.9-5.6 times. Orchard trials showed initial fruit set on branches individually treated with electrostatically applied pollen to typically increase up to ~ 2-fold vs. uncharged pollen applications; however, whole-tree applications have not significantly shown similar levels of benefit and corrective measures continue. Project results thus contribute important basic knowledge and applied electrostatics technology which will provide agriculture with alternative/supplemental mechanized pollination systems as tranditional pollen-transfer vectors are further endangered by natural and man-fade factors.
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