Journal articles: 'Power supply circuits'

1

He, Guo, Chao Jie Zhang, Guang Hui Chang, and Shu Hai Liang. "Testing Analog Circuits by PCA of Power Supply Current." Applied Mechanics and Materials 157-158 (February 2012): 641–45. http://dx.doi.org/10.4028/www.scientific.net/amm.157-158.641.

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A method using principal component analysis (PCA) of dynamic power supply current was proposed for testing of analog circuits in this paper. The basic model of the proposed method and the general rule for analog fault detection were described in detail. At first, the principal component model of fault-free circuits was constructed. Then the circuits-under-test was compared with the principal component model to calculate the statistic for fault detection. The features of power supply current in both time and frequency domain were combined by PCA, and it could overcome the difficulty to determine threshold by empirical knowledge. The proposed method was applied to detect faults of the signal filtering and amplifying circuit, which is used in the ultrasonic liquid-level sensor. The results show that the power supply current contains information about the circuit’s faults, and can be used for fault detection of analog circuits by analyzing this signal.

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LEHMANN, TORSTEN, HOSUNG CHUN, and YUANYUAN YANG. "POWER SAVING CIRCUIT DESIGN TECHNIQUES FOR IMPLANTABLE NEURO-STIMULATORS." Journal of Circuits, Systems and Computers 21, no. 06 (October 2012): 1240016. http://dx.doi.org/10.1142/s0218126612400166.

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Keeping power consumption low in implantable neuro-stimulators such as Cochlear Implants or Vision Prostheses is one of the major design challenges in their circuit design. Usually electrode impedance and stimulation currents required to elicit physiological responses mandates the use of large stimulation voltages, again dictating the use of high-voltage integrated circuit technologies. Power consumption in the stimulating circuits and associated supply generation circuits are the major contributors to overall system power dissipation. In this paper we present circuit design techniques that address power consumption in both stimulating circuits and power supply circuits. First, our power supply design approach is to recycle currents between the two low-voltage power supply needed for the stimulating circuits, whereby power consumption in these circuits can be close to halved. Second, our stimulating circuits design approach is to use very small quiescent currents, fast turn-on time and pre-stimulating dynamic calibration which allow the delivery of charge balanced bi-phasic stimulation pulses with very good power efficiency. A variation of this include passive charge recovery for further power reduction. In combination, significant implant power consumption reduction is achieved.

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N, Vengadeswari, and Priscilla Whitin. "Review a Low Power CMOS Charge Pump using Power Gating Techniques to Reduce Leakage Power." International Journal of Engineering & Technology 7, no. 3.1 (August 4, 2018): 27. http://dx.doi.org/10.14419/ijet.v7i3.1.16790.

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In most case, charge pump circuit is designed based on capacitor, where voltage is increased at each stage depending on each stage voltage gain. Major elements are all charge pumps circuits one is Pumping capacitors and diode connected MOS.To increases pumping efficiency is very higher for each stage of charge pump circuits. Pumping efficiency are limiting by two parameters one is parasitic capacitance and threshold voltage. The power dissipated from the circuit can be increased by attain of leakage current .To resist this leakage in the circuits the supply voltage is major concern. To reduce the leakage with the help of power gating technique .Charge pump circuits are to be designed and verified by using tanner t-spice tools.

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Varetsky, Yuriy. "Overvoltages on power filters under energizing industrial power system transformer." Energy engineering and control systems 6, no. 2 (2020): 97–103. http://dx.doi.org/10.23939/jeecs2020.02.097.

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The practice of operating industrial power supply systems containing filter circuits has shown that filter tuning can have a significant impact on filter performance. On the basis of simulations of a real power supply system carried out by the Matlab / Simulink package, the results of a study of the impact of filter manufacturing tolerances on the filter transients under transformer energizing are presented. The most severe transients are observed for filter circuits in the power supply systems of electric arc furnaces due to frequently repeated operating energizing furnace transformers. This article summarizes the analysis of overvoltages on capacitors and reactors for various configurations of the filter circuit, arising during energizing the arc furnace transformer, taking into account the possible detuning of the filters.

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D., Vaithiyanathan, Megha Singh Kurmi, Alok Kumar Mishra, and Britto Pari J. "Performance analysis of multi-scaling voltage level shifter for low-power applications." World Journal of Engineering 17, no. 6 (August 17, 2020): 803–9. http://dx.doi.org/10.1108/wje-02-2020-0043.

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Purpose In complementary metal-oxide-semiconductor (CMOS) logic circuits, there is a direct square proportion of supply voltage on dynamic power. If the supply voltage is high, then more amount of energy will be consumed. Therefore, if a low voltage supply is used, then dynamic power will also be reduced. In a mixed signal circuit, there can be a situation when lower voltage circuitry has to drive large voltage circuitry. In such a case, P-type metal-oxide-semiconductor of high-voltage circuitry may not be switched off completely by applying a low voltage as input. Therefore, there is a need for level shifter where low-voltage and high-voltage circuits are connected. In this paper the multi-scaling voltage level shifter is presented which overcomes the contention problems and suitable for low-power applications. Design/methodology/approach The voltage level shifter circuit is essential for digital and analog circuits in the on-chip integrated circuits. The modified voltage level shifter and reported energy-efficient voltage level shifter have been optimally designed to be functional in all process voltage and temperature corners for VDDH = 5V, VDDL = 2V and the input frequency of 5 MHz. The modified voltage level shifter and reported shifter circuits are implemented using Cadence Virtuoso at 90 nm CMOS technology and the comparison is made based on speed and power consumed by the circuit. Findings The voltage level shifter circuit discussed in this paper removes the contention problem that is present in conventional voltage level shifter. Moreover, it has the capability for up and down conversion and reduced power and delay as compared to conventional voltage level shifter. The efficiency of the circuit is improved in two ways, first, the current of the pull-up device is reduced and second, the strength of the pull-down device is increased. Originality/value The modified level shifter is faster for switching low input voltage to high output voltage and also high input voltage to low output voltage. The average power consumption for the multi-scaling voltage level shifter is 259.445 µW. The power consumption is very less in this technique and it is best suitable for low-power applications.

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Badalyan, N. P., D. P. Andrianov, A. A. Mitrofanov, E. A. Chashchin, S. A. Balashova, and G. V. Maslakova. "Power flows in multi-junction power supply circuits." MATEC Web of Conferences 336 (2021): 01008. http://dx.doi.org/10.1051/matecconf/202133601008.

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The article discusses a methodology that allows for an accurate calculation of the parameters of electrical equipment from the point of view of optimizing the power supply system. Taking into account the characteristics of transients processes makes it possible to select equipment in maximum load modes. Modeling of power flows caused by changes in the load of consumers is carried out on the example of calculating the power supply circuit of five junctions. It is shown that it is possible to change the direction of flows of transmitted electric power at certain ratios of parameters in individual elements of the circuit. Purpose of research: to show the possibility of changing the picture of the transmitted capacities by the elements of the power supply system, depending on consumer loads.

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Cao, Ruiping, and Jianping Hu. "Near-Threshold Computing and Minimum Supply Voltage of Single-Rail MCML Circuits." Journal of Electrical and Computer Engineering 2014 (2014): 1–10. http://dx.doi.org/10.1155/2014/836019.

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In high-speed applications, MOS current mode logic (MCML) is a good alternative. Scaling down supply voltage of the MCML circuits can achieve low power-delay product (PDP). However, the current almost all MCML circuits are realized with dual-rail scheme, where the NMOS configuration in series limits the minimum supply voltage. In this paper, single-rail MCML (SRMCML) circuits are described, which can avoid the devices configuration in series, since their logic evaluation block can be realized by only using MOS devices in parallel. The relationship between the minimum supply voltage of the SRMCML circuits and the model parameters of MOS transistors is derived, so that the minimum supply voltage can be estimated before circuit designs. An MCML dynamic flop-flop based on SRMCML is also proposed. The optimization algorithm for near-threshold sequential circuits is presented. A near-threshold SRMCML mode-10 counter based on the optimization algorithm is verified. Scaling down the supply voltage of the SRMCML circuits is also investigated. The power dissipation, delay, and power-delay products of these circuits are carried out. The results show that the near-threshold SRMCML circuits can obtain low delay and small power-delay product.

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8

Caselli, Michele, Marco Ronchi, and Andrea Boni. "Power Management Circuits for Low-Power RF Energy Harvesters." Journal of Low Power Electronics and Applications 10, no. 3 (September 19, 2020): 29. http://dx.doi.org/10.3390/jlpea10030029.

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The paper describes the design and implementation of power management circuits for RF energy harvesters suitable for integration in wireless sensor nodes. In particular, we report the power management circuits used to provide the voltage supply of an integrated temperature sensor with analog-to-digital converter. A DC-DC boost converter is used to transfer efficiently the energy harvested from a generic radio-frequency rectifier into a charge reservoir, whereas a linear regulator scales the voltage supply to a suitable value for a sensing and conversion circuit. Implemented in a 65 nm CMOS technology, the power management system achieves a measured overall efficiency of 20%, with an available power of 4.5 μW at the DC-DC converter input. The system can sustain a temperature measurement rate of one sample/s with an RF input power of −28 dBm, making it compatible with the power levels available in generic outdoor environments.

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9

Gramatikov, Pavlin, Roumen Nedkov, and Doino Petkov. "Secondary power systems for videometric complex "Fregat"." Aerospace Research in Bulgaria 30 (2018): 134–42. http://dx.doi.org/10.3897/arb.v30.e11.

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The power supply for the video-spectrometric complex (VSC) "Fregat" is being considered. This secondary power supply systems have the following functions: Reception and switching of the voltages; Protection from overload and short circuit in the internal circuits and the exit circuits; Transformation of primary voltage in stabilized secondary voltages; Galvanically untethered secondary circuits by primary and Hull; Protection of the users from the electromagnetic noises; Provision of "Cold" and "Hot" reserve, etc. A set of technical documentation and test-measuring equipment for testing were created. Four sets of Secondary Power Systems for "Fregat" are designed and implemented for two flights to planet Mars.

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10

Deng, An-Chang. "Power Estimation and Power Noise Analysis for CMOS Circuits." Journal of Circuits, Systems and Computers 07, no. 01 (February 1997): 17–30. http://dx.doi.org/10.1142/s0218126697000036.

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Power consumption is a primary concern for today's IC designers. However, determining an IC's power consumption is a difficult task, as consumption varies according to input stimulus conditions. This paper will focus on (1) the principal phenomena involved in the power consumption of CMOS circuits, (2) a brief survey of power estimation techniques, and (3) the effect of power-supply noise on circuit performance plus possible solutions to this problem.

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11

SHENG, CAIWANG, and XIAOQING ZHANG. "A CIRCUIT SIMPLIFICATION FOR AC POWER SUPPLY SPD." Journal of Circuits, Systems and Computers 23, no. 05 (May 8, 2014): 1450064. http://dx.doi.org/10.1142/s0218126614500649.

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An attempt is made for simplifying the circuit structure of the surge protective device (SPD) installed on single-phase AC power supply lines of electronic systems. In the light of the drawback of the traditional circuit, a simplified circuit is proposed. The simplified circuit can substantially reduce the number of the protective components and the size of the SPD chassis. In order to compare the protective performances between the traditional and simplified circuits, an impulse experimental arrangement is built to measure their residual voltages. The measured results show that the voltage protection level of the simplified circuit is the same as that of the traditional circuit. Therefore, replacement of the traditional circuit by the simplified circuit is really feasible in lightning overvoltage protection of AC power supplies of electronic systems.

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12

Zharkov, Yu I., N. A. Popova, and E. P. Figurnov. "Accounting power supply schemes for traction substations in the calculation of short circuits in the AC traction network." Vestnik of the Railway Research Institute 78, no. 1 (May 13, 2019): 10–18. http://dx.doi.org/10.21780/2223-9731-2019-78-1-10-18.

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When calculating short-circuit currents in the AC traction network, it is assumed that each of the traction substations receives power from uncoupled external power supply sources with known resistances. In some cases, especially when powering a group of traction substations from a high-voltage power line of a longitudinal power supply, the external power supply system affects not only the magnitude of short-circuit currents, but also their redistribution between adjacent traction substations of the interstation area where this circuit is considered. Such unrecorded redistribution can have a negative effect on short circuit protection. The article considers the equivalent circuit of the traction network, taking into account resistance of the external power supply system. Particular attention is paid to the fact that in replacement circuits of direct and negative sequence value of reduced resistance of one phase of a multiwinding transformer, calculated from the short circuit voltage, does not depend on the connection scheme of its windings. It is noted that in some cases it is difficult to obtain a complete scheme of an external power supply system. Considering that the short circuit in the traction network for the external power supply system is remote, it is proposed taking into account the reference network or traction substations as power sources, from which high-voltage transmission lines power the traction substations. Resistance of the supporting substations as power sources must takes into account connected equivalent power system.Such equivalenting should be carried out by known values of currents or short-circuit powers at the inputs of the reference substation or, if such information is not available, by the rated values of the switched-off currents or powers of the switches of high-voltage line connections.The following power schemes for traction substations are considered: each from its own supporting substation, which is part of an electrically uncoupled external power supply system; from the double-circuit high-voltage line of longitudinal power supply when it is powered from different supporting substations; from the supporting network substation, the traction substation receives power from two lines, and from this the traction substations receive power from two lines in a circle pattern.These three common cases cover all the most common power schemes for traction substations. For each of them formulas are given to determine the resulting equivalent resistance of the external power supply circuit, which should be taken into account in the replacement circuit of the traction network.

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Gülden, Mehmet Ali, Ertan Zencir, and Enver Çavuş. "A Novel Current-Controlled Oscillator-Based Low-Supply-Voltage Microbolometer Readout Architecture." Journal of Circuits, Systems and Computers 29, no. 10 (January 6, 2020): 2050169. http://dx.doi.org/10.1142/s0218126620501698.

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In this paper, we present a novel, almost-digital approach for bolometer readout circuits to overcome the area and power dissipation bottlenecks of analog-based classical microbolometer circuits. A current-controlled oscillator (CCO)-based analog-to-digital converter (ADC) is utilized instead of a capacitive transimpedance amplifier (CTIA) in the classical readout circuits. This approach, which has not been reported before, both produces the required gain in the bolometer input circuit and directly digitizes the bolometer signal. With the proposed architecture, the need for large capacitances (of the order of 10–15[Formula: see text]pF for each column) at which the current is accumulated in the bolometer circuits and the voltage headroom limitation of classical microbolometer circuits are eliminated. Therefore, the proposed architecture permits to design readout circuits with reduced pixel pitch and lower power supply, both of which in turn lead to higher-resolution Focal Plane Arrays (FPAs) with lower power dissipation. The new architecture is modeled and simulated using a 180-nm CMOS process for sensitivity, noise performance, and power dissipation. Unlike the 3.3-V power supply usage of classical readout circuits, the proposed design utilizes 1.2-V analog and 0.9-V digital supply voltages with a power dissipation of almost half of the classical approach.

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Hirose, Tetsuya, Tetsuya Asai, and Yoshihito Amemiya. "Power-supply circuits for ultralow-power subthreshold MOS-LSIs." IEICE Electronics Express 3, no. 22 (2006): 464–68. http://dx.doi.org/10.1587/elex.3.464.

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PRAMOD, M., and T. LAXMINIDHI. "LOW POWER CONTINUOUS TIME COMMON MODE SENSING FOR COMMON MODE FEEDBACK CIRCUITS." Journal of Circuits, Systems and Computers 19, no. 03 (May 2010): 519–28. http://dx.doi.org/10.1142/s0218126610006268.

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Continuous common mode feedback (CMFB) circuits having high input impedance and low distortion are proposed. The proposed circuits are characterized for 0.18 μm CMOS process with 1.8 V supply. Simulation results indicate that the proposed common mode detector consumes no standby power and CMFB circuit consumes 27–34% less power than previous high swing CMFB circuits.

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16

Frenzel, J. F. "Power-supply current diagnosis of VLSI circuits." IEEE Transactions on Reliability 43, no. 1 (March 1994): 30–38. http://dx.doi.org/10.1109/24.285105.

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Kumar, Manish, Md Anwar Hussain, and Sajal K. Paul. "Effective Circuit Design Methodologies for Standby Leakage Power Reduction." Advanced Science, Engineering and Medicine 12, no. 2 (February 1, 2020): 168–72. http://dx.doi.org/10.1166/asem.2020.2484.

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This paper presents circuit level design methodologies for significantly reducing the standby leakage power. Layout of different CMOS logic circuits such as a 2-input XOR, a 2-input XNOR, and a 4-input XNOR are designed and simulated by using BSIM4 MOS transistor model parameters. Layout simulations are done at a supply voltage of 0.4 V in 45 nm CMOS technology. Logic circuits designed by using the proposed circuit design methodologies proved to be effective in minimizing the standby leakage power. All layout design and simulation of the circuits are carried out by using Microwind EDA software (version 3.1).

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Yamaguchi, Kazuya, Takuya Hirata, and Ichijo Hodaka. "Using Square Wave Input for Wireless Power Transfer." International Journal of Electrical and Computer Engineering (IJECE) 6, no. 1 (February 1, 2016): 431. http://dx.doi.org/10.11591/ijece.v6i1.pp431-438.

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A wireless power transfer (WPT) circuit is composed of a transmitting circuit with an AC power supply and a receiving circuit with a load, and the circuits are wirelessly connected each other. Then a designer chooses the wave form of the AC power supply. Many papers about WPT adopt a sinusoidal wave as the input. The frequency of the sinusoidal wave is generally determined to the resonant frequency of the circuit for high power transfer. Since the number of circuit elements in the power supply to generate a square wave is much less than that of a sinusoidal wave, WPT with a square wave input should be treated. In fact, some papers about WPT adopt a square wave as the input, and adjust the frequency of the square wave to the resonant frequency of the circuit. In this paper, we examine how the frequency of a square wave input affects power and efficiency of WPT circuits, and propose a procedure how to determine the frequency of the input to improve power and efficiency. Finally we discuss which wave should be adopted as an input and how the frequency of the input should be determined, regardless of whether resonant phenomena occur or not.

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Yamaguchi, Kazuya, Takuya Hirata, and Ichijo Hodaka. "Using Square Wave Input for Wireless Power Transfer." International Journal of Electrical and Computer Engineering (IJECE) 6, no. 1 (February 1, 2016): 431. http://dx.doi.org/10.11591/ijece.v6n1.9039.

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A wireless power transfer (WPT) circuit is composed of a transmitting circuit with an AC power supply and a receiving circuit with a load, and the circuits are wirelessly connected each other. Then a designer chooses the wave form of the AC power supply. Many papers about WPT adopt a sinusoidal wave as the input. The frequency of the sinusoidal wave is generally determined to the resonant frequency of the circuit for high power transfer. Since the number of circuit elements in the power supply to generate a square wave is much less than that of a sinusoidal wave, WPT with a square wave input should be treated. In fact, some papers about WPT adopt a square wave as the input, and adjust the frequency of the square wave to the resonant frequency of the circuit. In this paper, we examine how the frequency of a square wave input affects power and efficiency of WPT circuits, and propose a procedure how to determine the frequency of the input to improve power and efficiency. Finally we discuss which wave should be adopted as an input and how the frequency of the input should be determined, regardless of whether resonant phenomena occur or not.

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Zhou, Zhi Wen, Cai Xia Wang, and An Ren Ma. "Research on Coating Devices with Applied Technology in Magnetron Sputtering Regulated Switching Power Supply Design." Applied Mechanics and Materials 540 (April 2014): 134–37. http://dx.doi.org/10.4028/www.scientific.net/amm.540.134.

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Magnetron power supply is one of the most important components in coating devices in applied technology. Magnetron regulated power supply with high power and high efficiency is studied and designed on the basis of high-frequency switching power supply technology. The principle of the main circuit and control circuit design are introduced. A MATLAB simulating model is composed to study parameters and waveforms of the designed circuits. The hardware circuit and software program are designed based on simulation results. The adjustment and display of the output voltage and the output current of the power supply under different work modes are achieved with TMS320F2812 DSP system. Practical applications confirm that the designed power supply has good constant current control effect, high reliability and working stability.

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21

Pandey, A. K., R. A. Mishra, and R. K. Nagaria. "Static Switching Dynamic Buffer Circuit." Journal of Engineering 2013 (2013): 1–11. http://dx.doi.org/10.1155/2013/646214.

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We proposed footless domino logic buffer circuit. It minimizes redundant switching at the dynamic and the output nodes. The proposed circuit avoids propagation of precharge pulse to the output node and allows the dynamic node which saves power consumption. Simulation is done using 0.18 µm CMOS technology. We have calculated the power consumption, delay, and power delay product of the proposed circuit and compared the results with the existing circuits for different logic function, loading condition, clock frequency, temperature, and power supply. Our proposed circuit reduces power consumption and power delay product as compared to the existing circuits.

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Guang, Yang, Bin Yu, and Huang Hai. "Design of a High Performance CMOS Bandgap Voltage Reference." Advanced Materials Research 981 (July 2014): 90–93. http://dx.doi.org/10.4028/www.scientific.net/amr.981.90.

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Bandgap voltage reference, to provide a temperature and power supply insensitive output voltage, is a very important module in the analog integrated circuits and mixed-signal integrated circuits. In this paper, a high performance CMOS bandgap with low-power consumption has been designed. It can get the PTAT (Proportional to absolute temperature) current, and then get the reference voltage. Based on 0.35μm CMOS process, using HSPICE 2008 software for circuit simulation, the results showed that , when the temperature changes from -40 to 80 °C, the proposed circuit’s reference voltage achieve to 1.2V, temperature coefficient is 3.09ppm/°C. Adopt a series of measures, like ESD protection circuit, in layout design. The ultimately design through the DRC and LVS verification, and the final layout size is 700μm * 560μm.

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Kushwaha, Dinesh, and D. K. Mishra. "Nano Power Current Reference Circuit consisting of Sub-threshold CMOS Circuits." Circulation in Computer Science 2, no. 1 (January 24, 2017): 1–4. http://dx.doi.org/10.22632/ccs-2016-251-36.

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This paper proposes a low voltage CMOS Nano power current reference circuit and presents its performance with circuit simulation in 180- nm UMC CMOS technology. The proposed circuit consists of start-up, Bias-voltage, current-source sub-circuits with most of the MOSFETs operating in sub-threshold region. Simulation results shows that the circuit generates a stable reference current of 4-nA in supply voltage range 1 V- 1.8 V with line sensitivity of 0.203%/V.The temperature coefficient of the current was 7592ppm/°C at 1.8 V in the range of 0°C-100°C. The power dissipation was 380 NW at 1.8 V Supply. The proposed circuit would be suitable for use in sub-threshold –operated power-aware large-scale integration

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Dokic, B. L. "A Review on Energy Efficient CMOS Digital Logic." Engineering, Technology & Applied Science Research 3, no. 6 (December 18, 2013): 552–61. http://dx.doi.org/10.48084/etasr.389.

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Autonomy of power supply used in portable devices directly depends on energy efficiency of digital logic. This means that digital systems, beside high processing power and very complex functionality, must also have very low power consumption. Power consumption depends on many factors: system architecture, technology, basic cells topology-speed, and accuracy of assigned tasks. In this paper, a review and comparison of CMOS topologies techniques and operating modes is given, as CMOS technology is expected to be the optimum choice in the near future. It is shown that there is a full analogy in the behavior of digital circuits in sub-threshold and strong inversion. Therefore, synthesis of digital circuits is the same for both strong and weak operating modes. Analysis of the influence of the technology, MOS transistor threshold voltage (Vt) and power supply voltage (Vdd) on digital circuit power consumption and speed for both operating modes is given. It is shown that optimal power consumption (minimum power consumption for given speed) depends on optimal choice of threshold, and power supply voltage. Multi Vdd /Vt techniques are analyzed as well. A review and analysis of alternative logical circuit's topologies – pass logic (PL), complementary pass logic (CPL), push-pull pass logic (PPL) and adiabatic logic – is also given. As shown, adiabatic logic is the optimum choice regarding energy efficiency.

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Grishin, Aleksey, and Alexandr Alibutaev. "Circuitry solution for smart watches using a stationary power supply." E3S Web of Conferences 273 (2021): 04005. http://dx.doi.org/10.1051/e3sconf/202127304005.

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Overwork and mistakes in organizational management are the main reasons why people experience stress and fatigue in the workplace. These problems entail reduced employee productivity and additional costs for organizations. It is difficult for a person to recognize mental overwork or burnout in the early stages, primarily because of the subjectivity of his feelings. One way to diagnose mental health problems is to analyze physiological indicators such as temperature, pulse, and electrical activity of the skin. It is possible to track these indicators using a wearable watch. However, a large number of sensors may not fit into the watch form factor. The aim of the work is to create a smart watch circuit with a power supply and sensors wired on the board. The designed solution, due to the versatility of the topological equipment of the boards is the least energy-consuming, since the components of the power supply and the control circuits make up an open-frame design. This allowed them to be located in the most favorable position and to use galvanic isolation in the primary and secondary power supply circuits without affecting the auxiliary control circuit of the sensors.

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SAKUL, CHAIWAT, and KOBCHAI DEJHAN. "FLIPPED VOLTAGE FOLLOWER ANALOG NONLINEAR CIRCUITS." Journal of Circuits, Systems and Computers 21, no. 03 (May 2012): 1250024. http://dx.doi.org/10.1142/s0218126612500247.

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This paper describes squaring and square-rooting circuits operable on low voltage supplies, with their application proposed hereby as vector-summation and four-quadrant multiplier circuits. These circuits make use of a flipped voltage follower (FVF) as fundamental circuit. A detail classification of basic topologies derived from the FVF is given. The proposed circuits have simple structure, wide input range and low power consumption as well as small number of devices. All circuits are also examined and supported by a set of simulations with PSpice program. The circuits can operate at power supply of ±0.7 volts, the input voltage range of the squaring circuit is ±0.8 volts with 1.59% relative error and 1.78 μW power dispersion, the input current of the square-rooting circuit is about 50 μA with 0.55% relative error and 1.4 μW power dispersion and the vector-summation circuit have linearity error of 0.23% and 2.92 μW power dispersion. As in four-quadrant multiplier circuit, the total harmonic distortion of the multiplier is less than 1.2% for 0.8 VP-P input signal at 1 MHz fundamental frequency. Experimental result is carried out to confirm the operation by using commercial CMOS transistor arrays (CD4007). These circuits are highly expected to be effective in further application of the low voltage analog signal processing.

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Zawawi, Ruhaifi Bin Abdullah, Wajahat H. Abbasi, Seung-Hwan Kim, Hojong Choi, and Jungsuk Kim. "Wide-Supply-Voltage-Range CMOS Bandgap Reference for In Vivo Wireless Power Telemetry." Energies 13, no. 11 (June 10, 2020): 2986. http://dx.doi.org/10.3390/en13112986.

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The robustness of the reference circuit in a wide range of supply voltages is crucial in implanted devices. Conventional reference circuits have demonstrated a weak performance over wide supply ranges. Channel-length modulation in the transistors causes the circuit to be sensitive to power supply variation. To solve this inherent problem, this paper proposes a new output-voltage-line-regulation controller circuit. When a variation occurs in the power supply, the controller promptly responds to the supply deviation and removes unwanted current in the output path of the reference circuit. The proposed circuit was implemented in a 0.35-μm SK Hynix CMOS standard process. The experimental results demonstrated that the proposed reference circuit could generate a reference voltage of 0.895 V under a power supply voltage of 3.3 V, line regulation of 1.85 mV/V in the supply range of 2.3 to 5 V, maximum power supply rejection ratio (PSRR) of −54 dB, and temperature coefficient of 11.9 ppm/°C in the temperature range of 25 to 100 °C.

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Kuhn, William B., and J. Ambrose Wolf. "Thin Film Capacitor Applications in RF/Microwave Circuits." International Symposium on Microelectronics 2017, no. 1 (October 1, 2017): 000056–60. http://dx.doi.org/10.4071/isom-2017-tp25_144.

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Abstract Thin-film capacitors can be created on various substrates including glass, low-temperature co-fired ceramic (LTCC), and potentially on laminate PC board materials if the surface is sufficiently smooth. This paper looks at the circuit-design issues of how such a technology could be used in high-speed digital and microwave circuits for improving both signal integrity and power integrity (SI/PI). Two primary applications are examined: the formation of a low-inductance power-supply bypass allowing reduced supply ‘noise’, and the formation of AC coupling (DC blocking) circuits with improved signal return-loss.

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Shemelova, O. V., E. V. Yakovleva, T. G. Makuseva, I. I. Eremina, and O. N. Makusev. "Solving optimization problems when designing power supply circuits." E3S Web of Conferences 124 (2019): 04011. http://dx.doi.org/10.1051/e3sconf/201912404011.

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One of the quickly developing trends in the optimization of electric power grids is system development of operation and optimization of branch circuits which are based on linear programming problems. One of its categories is traffic problem. The paper discusses the formulation of various types of transport optimization problems used in the design of the most efficient power supply systems in the real sector of economy. The construction of arithmetic models of problems is carried out. Their optimality criterion is cost minimization for the design of electrical network diagrams consisting of power lines connecting sources and consumers. Examples of designing optimization power layout in mathematical problems considering the transmission capacity of power lines is given. The paper also touches upon a mathematical problem considering possible transit of capacities. The task is to build a mathematical model and solve problems that ensure minimization of process losses and losses of power when designing electrical networks. The results of solving problems are presented in the form of power supply circuits corresponding to the most optimal linking of source and consumer nodes. The work is of a scientific and practical significance as it considers the problem of optimizing economic costs when designing electric power network schemes. Moreover it is based on a qualitatively different level of use of the traffic problem algorithm. The algorithm for solving the minimization problem obtained in this paper allows developing the necessary computing operations as well as quickly obtaining the results of solving the cost optimization problem in the designed electric power network.

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Blinov, K. Yu, and Yu I. Blinov. "Parametric Optimization of Power Supply Circuits for Electrotechniques." Russian Electrical Engineering 90, no. 12 (December 2019): 793–96. http://dx.doi.org/10.3103/s1068371219120034.

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Maloney, T. J., and S. Dabral. "Novel clamp circuits for IC power supply protection." IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part C 19, no. 3 (July 1996): 150–61. http://dx.doi.org/10.1109/3476.558861.

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A'ain, A. K. B., A. P. Dorey, and A. H. Bratt. "Testing analogue circuits by power supply voltage control." Electronics Letters 30, no. 3 (February 3, 1994): 214–15. http://dx.doi.org/10.1049/el:19940123.

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Filipova-Petrakieva, S. K., and Y. M. Shopov. "Electrical Device Protection from Overvoltage in a DC Power Supply Network: Fast-acting Protection, Realized by an “Artificial” Short Circuit in the Input of the Protected Device." Engineering, Technology & Applied Science Research 10, no. 1 (February 3, 2020): 5314–19. http://dx.doi.org/10.48084/etasr.3316.

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In the present paper a protective device based on the so-called “artificial” short circuit in the input of the network, is proposed. To ensure the necessary time for switching on the protection, the increased power supply voltage is delayed to reach in the input of the protected device by additional inductance L, which is connected in series to the power supply. As a result of this forced short circuit, the DC-power supply is switched off by a standard protective circuit-breaker. The short circuit is realized by a fast-acting semi-conductor device (e.g. diac + thyristor, etc.). The controlling signal is formed as a voltage across a capacitor that is a part of RC-circuits connected in parallel to the DC-power supply network. An analytical expression for this voltage, using a classical method for transient analysis, is obtained. The main aim is to determine the exact time of switching on the protection. The research is confirmed with simulations by OrCAD PSpice under the exact values of the elements in the RC-circuits considered. Two rapid increase cases in the power supply voltage are considered: positive jump and linear increase. The suggested solution is applicable for overvoltage protection of different electrical devices. The electrical scheme, based on the electronic components, ensures a fast-acting breaking, which guarantees secure protection. Based on the analytical expressions, the synthesis of the circuit for control and protection is made and the respective values of its elements are calculated.

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AY, SUAT U. "A COMPACT CMOS POWER-ON-RESET PULSE GENERATOR DESIGN WITH LOW-POWER AND WIDE OPERATION RANGE." Journal of Circuits, Systems and Computers 19, no. 06 (October 2010): 1365–80. http://dx.doi.org/10.1142/s0218126610006876.

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A compact power-on-reset pulse generator (POR-PG) circuit with a low-power and low-voltage operation capability is presented. Proposed POR-PG was fabricated in 0.5 μm 2P3M CMOS process. It was determined from simulations and measurements that proposed POR-PG works supply voltage levels between 1.8 V and 3.3 V and supply voltage rise times between 100 ns and 1 ms. POR-PG has very small silicon footprint. Layout size of proposed POR-PG circuit was 120 μm × 5 μm in 0.5 μm CMOS process. Comparing with other POR-PG circuits in the literature, proposed design enjoys lowest power consumption (< 6 μW), smallest silicon footprint, widest supply voltage range, and additional features such as brown-out detection capability. These achieved by using a unique cascadable POR delay element that consumes very low-power.

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Gao, Qin, Zhen Jing Yao, and Hong Wei Peng. "Design of Emergency Power Supply Control System for Seismic Station." Applied Mechanics and Materials 229-231 (November 2012): 2343–47. http://dx.doi.org/10.4028/www.scientific.net/amm.229-231.2343.

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According to the special requirements of power supply for seismic station, a new single-phase emergency power supply control system is proposed in this paper. The principle and structure diagram of the system is illustrated. The control strategies of the system and hardware design of key circuits are discussed in detail. The emergency power supply control system adopts high-property C8051F310 single chip micro-computer. According to the monitoring value of input voltage, the system switches between charging and inverting. Main circuit of inverting uses single-phase full-bridge topology. To correct a power factor, charging system applies boost circuit to make input current follow to a given current reference. Experiments validate the feasibility of the proposed design.

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Sen, Dipanjan, Savio J. Sengupta, Swarnil Roy, Manash Chanda, and Subir K. Sarkar. "Analytical Modeling of D.C. Parameters of Double Gate Junctionless MOSFET in Near and Subthreshold Regime for RF Circuit Application." Nanoscience & Nanotechnology-Asia 10, no. 4 (August 26, 2020): 457–70. http://dx.doi.org/10.2174/2210681209666190730170031.

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Aims:: In this work, a Junction-Less Double Gate MOSFET (JLDG MOSFET) based CMOS inverter circuit is proposed for ultra-low power applications in the near and sub-threshold regime operations. Background:: D.C. performances like power, delay and voltage swing of the proposed Inverter have been modeled analytically and analyzed in depth. JLDG MOSFET has promising features to reduce the short-channel effects compared to the planner MOSFET because of better gate control mechanism. So, proposed Inverter would be efficacious to offer less power dissipation and higher speed. Objective:: Impact of supply voltage, temperature, High-k gate oxide, TOX, TSI on the power, delay and voltage swing of the Inverter circuits have been detailed here. Methods: Extensive simulations using SILVACO ATLAS have been done to validate the proposed logic based digital circuits. Besides, the optimum supply voltage has been modelled and verified through simulation for low voltage operations. In depth analysis of voltage swing is added to measure the noise immunity of the proposed logic based circuits in Sub & Near-threshold operations. For ultra-low power operation, JLDG MOSFET can be an alternative compared to conventional planar MOSFET. Result:: Hence, the analytical model of delay, power dissipation and voltage swing have been proposed of the proposed logic based circuits. Besides, the ultra-low power JLDG CMOS inverter can be an alternative in saving energy, reduction of power consumption for RFID circuit design where the frequency range is a dominant factor. Conclusion:: The power consumption can be lowered in case of UHF, HF etc. RF circuits using the Double Gate Junction-less MOSFET as a device for circuit design.

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Figurnov, E. P., Yu I. Zharkov, and N. A. Popova. "Choosing the type of equivalent circuit of traction substation when calculating short-circuit currents in 25 kV power supply system." Vestnik of the Railway Research Institute 79, no. 3 (July 8, 2020): 139–44. http://dx.doi.org/10.21780/2223-9731-2020-79-3-139-144.

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When calculating short circuit currents in the traction network, it is necessary to take into account the input resistance of the traction substation, including the resistance of the transformers of the substation and the resistance of the power supply system. The input resistance during short circuit is determined based on the equivalent circuit of the external power supply system, of which this traction substation is an integral part. Traditionally equivalent circuit of a three-phase system has the form of a star, in which the resulting resistances in each phase are connected in series with a source of phase electromotive force, and these sources have a common point. Another equivalent circuit in the form of a triangle is possible, in which on each side the resulting resistances are connected in series with the source of linear electromotive force. It is important to note that neither one nor the other type of equivalent circuit is determined by the connection scheme of the transformer windings of the traction substation. It is only necessary to take into account the absence of a circuit for zero sequence currents. All elements of the equivalent circuit, as is known, should be brought to uniform basic conditions. If the parameters of these elements are expressed in named units, then the basic values are the effective voltage values of the main stage and the rated power of the power transformer of the traction substation. If the components of one and the other equivalent circuits are reduced to one stage of the operating voltage, for example 27.5 kV, then for the same elements of the power supply system, the resistance values in the equivalent circuit in the form of a triangle are three times larger than in the equivalent circuit in the form of a star. In this case, the input resistances of the traction substation for the one and the other equivalent circuits are absolutely identical. Therefore, in the calculation of short circuit currents of the traction network, you can use any of these equivalent circuits of the power supply system and traction substation. Formulas for calculating the resistances of the elements of the power supply system and electrical installations, given in the standards, manuals and reference books, relate to the equivalent circuit of the short circuit in the form of a star. When using an equivalent circuit in the form of a triangle, these resistances must first be tripled, and then divided by three when calculating the short-circuit currents. The meaninglessness of such an operation is obvious. The equivalent circuit of the traction substation and the external power supply system in the form of a triangle when calculating short circuits in the traction network has no advantages compared to the traditional equivalent circuit in the form of a star. The information on the linear currents on the primary and secondary windings of the traction substation transformer during a short circuit in the traction network is given, which is necessary to select the settings of its relay protection kit.

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Almgotir, Hasan Ma, Enaam A. Khaliq Ali, Wedian H. Abd al ameer, and Mustafa A. Fadel Al-Qaisi. "Harmonics elimination for DC/DC power supply based on piezoelectric filters." International Journal of Power Electronics and Drive Systems (IJPEDS) 12, no. 1 (March 1, 2021): 356. http://dx.doi.org/10.11591/ijpeds.v12.i1.pp356-363.

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This research presents a study, modelling and simulation of the piezoelectric material work as filters (piezoelectric filter) used to eliminate the harmonics in power electronic circuits, high order harmonics are generating due to the high switching frequencies and circuit equipment, detailed simulation is achieved for the piezoelectric filter tested in full-bridge DC/DC converter circuit with resistive load works as dc power supply (12 to 48 volt). As a result, the uses of piezoelectric filters have a great impact on harmonics elimination, which leads to reduce the overall total harmonic distortion leads to increase the efficiency, as well as the output voltage from the dc power supply remain constant by varying the load resistance over a wide range. The dc power supply circuit including the piezoelectric filter has been simulated using PSIM (V9.1) power electronic circuit simulation software.

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WANG, XINSHENG, YIZHE HU, LIANG HAN, JINGHU LI, CHENXU WANG, and MINGYAN YU. "A LOW POWER AND VARIATION-INSENSITIVE CURRENT-MODE SIGNALING SCHEME." Journal of Circuits, Systems and Computers 22, no. 08 (September 2013): 1350068. http://dx.doi.org/10.1142/s0218126613500680.

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Process and supply variations all have a large influence on current-mode signaling (CMS) circuits, limiting their application on the fields of high-speed low power communication over long on-chip interconnects. A variation-insensitive CMS scheme (CMS-Bias) was offered, employing a particular bias circuit to compensate the effects of variations, and was robust enough against inter-die and intra-die variations. In this paper, we studied in detail the principle of variation tolerance of the CMS circuit and proposed a more suitable bias circuit for it. The CMS-Bias with the proposed bias circuit (CMS-Proposed) can acquire the same variation tolerance but consume less energy, compared with CMS-Bias with the original bias circuit (CMS-Original). Both the CMS schemes were fabricated in 180 nm CMOS technology. Simulation and measured results indicate that the two CMS interconnect circuits have the similar signal propagation delay when driving signal over a 10 mm line, but the CMS-Proposed offers about 9% reduction in energy/bit and 7.2% reduction in energy-delay-product (EDP) over the CMS-Original. Simulation results show that the two CMS schemes only change about 5% in delay when suffering intra-die variations, and have the same robustness against inter-die variations. Both simulation and measurements all show that the proposed bias circuits, employing self-biasing structure, contribute to robustness against supply variations to some extent. Jitter analysis presents the two CMS schemes have the same noise performance.

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Hu, Ye Lin, Zhi Wen Du, and Zhao Quan Chen. "Development of a Pulsed DC Power Supply for Generating Cold Plasma Jet." Advanced Materials Research 791-793 (September 2013): 1841–44. http://dx.doi.org/10.4028/www.scientific.net/amr.791-793.1841.

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This paper discusses a lithium battery-driven cold plasma jet at atmospheric pressure with a pulsed power supply of design and its simulation. H.V. DC(High voltage directed current) and pulsed discharge circuit comprise of the entire pulse power system. H.V. DC circuit using TIs TMS320F28335 chips as the core of the circuit control module, the chip improves the stability of the H.V.DC circuits. Pulsed discharge circuit design plays a crucial impact on the formation of the narrowed pulses. A new double pulsed discharge circuit is designed by the proposed program. As discharge experiment shown finally, the steep narrowed pulse of pulsed power supply can be used to stabilize the output of the pulsed front.

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Krejcar, Ondrej, and Miroslav Mahdal. "Optimized Solar Energy Power Supply for Remote Wireless Sensors Based on IEEE 802.15.4 Standard." International Journal of Photoenergy 2012 (2012): 1–9. http://dx.doi.org/10.1155/2012/305102.

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Powering of intelligent wireless sensors without a permanent electric connection is a general problem which is often solved by adopting alternative power sources. One of the most commonly used sources is solar energy in the form of solar panel and charging circuits. However, it is not possible to find a solution in the markets for operation in changeable weather conditions, where sun intensity is not so high. This fact leads us to the development of optimized solar panel and all circuits for reliable power supply of wireless sensors. A special charging circuit for Li-ION battery and DC-DC adapter circuit for stabilization of wireless sensor working voltage were developed and optimized for very low energy consumption and high efficiency.

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Wang, Yu Fei, Jian Yun Zhang, and Hua Xue. "Hardware Design for Simulating the Chaos in Electric Arc Furnace." Advanced Materials Research 860-863 (December 2013): 2360–64. http://dx.doi.org/10.4028/www.scientific.net/amr.860-863.2360.

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A chaotic circuit was designed to simulate the chaotic phenomenon observed in power supply system of electric arc furnace (EAF). Based on volt-ampere characteristic of the negative resistance converter (NRC) composed of the integrated operational amplifier (IOA), two NRCs with different parameters are connected in parallel in this circuit. The positive and negative power supply sources of the IOA are unequal in voltage amplitude. Experimental results show that the circuit has characteristics of general Chuas circuits and can generate an asymmetric double-scroll chaotic attractor, which helps establish the foundation for chaotic model of AC arc furnace used to study power quality.

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Kozu, H., Y. Jumonji, C. Yamazaki, Y. Shoji, S. Hashimoto, and A. Ando. "A crowbarless power supply for klystrons." Journal of Synchrotron Radiation 5, no. 3 (May 1, 1998): 374–75. http://dx.doi.org/10.1107/s0909049597015331.

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A new crowbarless power supply is to be installed at the New SUBARU storage ring. A high-power switching inverter unit eliminates the need for expensive and unstable crowbar circuits for the klystron power supply. It also realizes a very small voltage ripple in the low-frequency region. This is an important characteristic, especially in a quasi-isochronous storage ring such as New SUBARU.

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Stepanov, Andrew, Valdis Bogdans, Pavel Suskis, and Ilya Galkin. "Active Rectifier for Uninterruptable Power Supply." Scientific Journal of Riga Technical University. Power and Electrical Engineering 27, no. 1 (January 1, 2010): 128–33. http://dx.doi.org/10.2478/v10144-010-0034-y.

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Active Rectifier for Uninterruptable Power SupplyThe paper contains analysis of power factor correction circuits that is made in the context of elaboration of uninterruptable power supply system. Various correctors have been estimated analytically, by means of simulation and experimentally. The most significant attention has been paid to the efficiency of the analyzed converters and their compatibility with modular approach to development of power converters.

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Shepherd, Paul, Dillon Kaiser, Michael Glover, Sonia Perez, A. Matt Francis, and H. Alan Mantooth. "Integrated Protection Circuits for an NMOS Silicon Carbide Gate Driver Integrated Circuit." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, HITEC (January 1, 2014): 000218–23. http://dx.doi.org/10.4071/hitec-wp14.

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Recent work has been done to build a Silicon Carbide (SiC) gate driver IC for use with a 1,200V SiC power MOSFET. Protection circuits form an important part of the complete gate driver/power device system. Under-voltage lockout (UVLO) protection disables the gate driver when power supplies are insufficient to turn the power device fully on. Desaturation detection provides protection to the power device by recognizing over-current conditions and disabling the gate driver for a set duration. The protection circuits described in this paper are integrated with a novel SiC gate-driver architecture utilizing discrete 20 V and 40 V power supplies. Two separate UVLO circuits monitor these power supplies while being powered by the 20 V supply. The desaturation detection circuit ensures that the power device is in its safe operating area. The desaturation detection circuit is designed to work with a 20A SiC MOSFET in less than 500ns, while avoiding false triggering on leading-edge spikes. Bench test results of the two UVLOs and desaturation detection circuits were captured and are compared to simulated results.

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Hassanein, Ahmed M. D. E. "Design of Smart Hybrid Power Supply using Logic Circuits." European Journal of Engineering Research and Science 5, no. 12 (December 10, 2020): 34–38. http://dx.doi.org/10.24018/ejers.2020.5.12.2257.

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Production of electrical power from sources that depends on diesel produce large amounts of pollutants to the environment. Power sources that depend on renewable energy are becoming widely implemented to decrease the dependence on diesel oil. However, different electrical sources from renewable energies work at different weather conditions which make each not a fully independent solution. In this paper, we propose a design of a smart hybrid power supply system that mixes the output power of three sources of electricity which are solar panel, battery tank and the power grid. The system prioritizes the use of each source according to its availability and its environmental impact. The solar panel has the highest priority while the power grid has the lowest priority. A design that is based on logic gates is proposed and simulated using Simulink in Matlab. The simulation results agree with the theoretical expectations.

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Boldyrev, Alexander. "Energy-efficient inverter circuit for the low-voltage asynchronous driver controller with autonomous power supply." E3S Web of Conferences 279 (2021): 01004. http://dx.doi.org/10.1051/e3sconf/202127901004.

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The design of the energy-efficient inverter circuit for the asynchronous frequency-controlled three-phase electric driver with autonomous low-voltage DC power supply. The components analysis of the electric drive, the main components selection approach: microcontroller, three-phase driver and power transistors. R&D prototype of the energy-efficient inverter circuit was created, characterized by an average consumption current reduced by 5%. Reducing energy losses is achieved by reducing dynamic losses in the power circuits of a low-voltage inverter and using several circuit solutions.

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Wairya, Subodh, Rajendra Kumar Nagaria, and Sudarshan Tiwari. "Performance Analysis of High Speed Hybrid CMOS Full Adder Circuits for Low Voltage VLSI Design." VLSI Design 2012 (April 4, 2012): 1–18. http://dx.doi.org/10.1155/2012/173079.

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This paper presents a comparative study of high-speed and low-voltage full adder circuits. Our approach is based on hybrid design full adder circuits combined in a single unit. A high performance adder cell using an XOR-XNOR (3T) design style is discussed. This paper also discusses a high-speed conventional full adder design combined with MOSCAP Majority function circuit in one unit to implement a hybrid full adder circuit. Moreover, it presents low-power Majority-function-based 1-bit full addersthat use MOS capacitors (MOSCAP) in its structure. This technique helps in reducing power consumption, propagation delay, and area of digital circuits while maintaining low complexity of logic design. Simulation results illustrate the superiority of the designed adder circuits over the conventional CMOS, TG, and hybrid adder circuits in terms of power, delay, power delay product (PDP), and energy delay product (EDP). Postlayout simulation results illustrate the superiority of the newly designed majority adder circuits against the reported conventional adder circuits. The design is implemented on UMC 0.18 m process models in Cadence Virtuoso Schematic Composer at 1.8 V single-ended supply voltage, and simulations are carried out on Spectre S.

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Sarker, Mahidur R., Azah Mohamed, and Ramizi Mohamed. "Modelling and Simulation an AC-DC Rectifier Circuit Based on Piezoelectric Vibration Sensor for Energy Harvesting System." Applied Mechanics and Materials 785 (August 2015): 131–35. http://dx.doi.org/10.4028/www.scientific.net/amm.785.131.

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This paper presents the modeling of a full-wave rectifier circuit based on piezoelectric vibration transducer for energy-harvester system. Piezoelectric vibration crystals are a viable means of harvesting energy for low-power embedded systems e.g. wireless sensor network. Distinct power handling circuits are assessed with the presence of piezoelectric vibration based energy harvesting transducer. Inside the interface circuit, the voltage should be started up when the AC input voltage is very low to supply a regulated DC voltage up to 2V. An active technique is chosen to design an ultra-low power circuit from a piezoelectric vibration transducer. MOSFET bride ac–dc rectifier, energy storage device e.g. capacitor and boost converter with regulator are the common components of the energy harvesting circuits. An integrated promoter ac-dc rectifier circuit and boost converter that accept a maximum input voltage of 0.3V and provide a regulated output voltage of 2V serve as the supply. The MOSFET and thyristor are considered to develop the proposed circuit replacing conventional ac-dc rectifier due to low input voltage at which diode does not work.

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Panwar, Shikha, Mayuresh Piske, and Aatreya Vivek Madgula. "Performance Analysis of Modified Drain Gating Techniques for Low Power and High Speed Arithmetic Circuits." VLSI Design 2014 (July 15, 2014): 1–5. http://dx.doi.org/10.1155/2014/380362.

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This paper presents several high performance and low power techniques for CMOS circuits. In these design methodologies, drain gating technique and its variations are modified by adding an additional NMOS sleep transistor at the output node which helps in faster discharge and thereby providing higher speed. In order to achieve high performance, the proposed design techniques trade power for performance in the delay critical sections of the circuit. Intensive simulations are performed using Cadence Virtuoso in a 45 nm standard CMOS technology at room temperature with supply voltage of 1.2 V. Comparative analysis of the present circuits with standard CMOS circuits shows smaller propagation delay and lesser power consumption.

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Journal articles on the topic 'Power supply circuits'

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