Relevant bibliographies by topics / Prefetching / Dissertations / Theses
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Dissertations / Theses on the topic 'Prefetching'

Author: Grafiati
Published: 4 June 2021
Last updated: 25 July 2025

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1

Lee, Vivian Tin-Wai. "User directed prefetching." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2001. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/MQ57760.pdf.

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2

Lee, Vivian Tin-Wai 1972 Carleton University Dissertation Computer Science. "User directed prefetching." Ottawa.:, 2000.

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3

Kimbrel, Tracy. "Parallel prefetching and caching /." Thesis, Connect to this title online; UW restricted, 1997. http://hdl.handle.net/1773/6943.

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4

FIGUEROA, AMPARITO ALEXANDRA MORALES. "PREFETCHING CONTENT IN MULTIMEDIA PRESENTATIONS." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 2014. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=24285@1.

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PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO<br>COORDENAÇÃO DE APERFEIÇOAMENTO DO PESSOAL DE ENSINO SUPERIOR<br>PROGRAMA DE EXCELENCIA ACADEMICA<br>Quando entregamos e apresentamos aplicações multimídia por meio de uma rede de comunicação, a latência de exibição pode representar um fator central e crítico que afeta a qualidade da apresentação multimídia. Na entrega de uma apresentação multimídia de boa qualidade o sincronismo é prevalecido, consequentemente, os conteúdos são exibidos de forma contínua, conforme as especificações do autor da aplicação. Nesta tese, um plano de pré-busca de
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5

Charmchi, Niloofar. "Compressed cache layout aware prefetching." Thesis, Rennes 1, 2020. http://www.theses.fr/2020REN1S017.

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Le fossé de vitesse entre le processeur et la mémoire dégrade la performance. La compression de cache et le préchargement matériel sont deux techniques qui pourraient éviter ce goulet d'étranglement en diminuant les échecs du dernier niveau de cache. Pourtant, la compression et le préchargement ont des interactions positives, car le préchargement bénéficie d'une capacité de cache plus élevée et la compression augmente la taille effective du cache. Cette étude propose Compressed cache Layout Aware Prefetching (CLAP) pour exploiter les schémas de cache sectoriels compressés, comme SCC ou YACC, p
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Sharma, Mayank. "PERFORMANCE EVALUATION OF AN ENHANCED POPULARITY-BASED WEB PREFETCHING TECHNIQUE." University of Akron / OhioLINK, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=akron1164053047.

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7

Touma, Rizkallah. "Computer-language based data prefetching techniques." Doctoral thesis, Universitat Politècnica de Catalunya, 2019. http://hdl.handle.net/10803/665207.

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Data prefetching has long been used as a technique to improve access times to persistent data. It is based on retrieving data records from persistent storage to main memory before the records are needed. Data prefetching has been applied to a wide variety of persistent storage systems, from file systems to Relational Database Management Systems and NoSQL databases, with the aim of reducing access times to the data maintained by the system and thus improve the execution times of the applications using this data. However, most existing solutions to data prefetching have been based on informat
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8

Grannæs, Marius. "Bandwidth-Aware Prefetching in Chip Multiprocessors." Thesis, Norwegian University of Science and Technology, Department of Computer and Information Science, 2006. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-10115.

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<p>Chip Multiprocessors (CMP) are an increasingly popular architecture and increasing numbers of vendors are now offering CMP solutions. The shift to CMP architectures from uniprocessors is driven by the increasing complexity of cores, the processor-memory performance gap, limitations in ILP and increasing power requirements. Prefetching is a successful technique commonly used in high performance processors to hide latency. In a CMP, prefetching offers new opportunities and challenges, as current uniprocessor heuristics will need adaption or redesign to integrate with CMPs. In this thesis, I
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9

Cevikbas, Safak Burak. "Visibility Based Prefetching With Simulated Annealing." Master's thesis, METU, 2008. http://etd.lib.metu.edu.tr/upload/12609324/index.pdf.

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Complex urban scene rendering is not feasible without culling invisible geometry before the rendering actually takes place. Visibility culling can be performed on predefined regions of scene where for each region a potential visible set of scene geometry is computed. Rendering cost is reduced since instead of a bigger set only a single PVS which is associated with the region of the viewer is rendered. However, when the viewer leaves a region and enters one of its neighbors, disposing currently loaded PVS and loading the new PVS causes stalls. Prefetching policies are utilized to overcome stall
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10

Palpanas, Themistoklis. "Web prefetching using partial match prediction." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape10/PQDD_0022/MQ40748.pdf.

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11

Bilgin, Ahmet Soydan. "Deriving Efficient SQL Sequences Via Prefetching." NCSU, 2008. http://www.lib.ncsu.edu/theses/available/etd-01032008-141946/.

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Modern information architectures place business logic in an application server and persistent objects in a relational DBMS. To effectively realize such architectures, we must surmount the problem of effectively fetching objects from DBMS to the application server. Object access patterns are not random; they are driven by applications and user behaviors. Naive implementations retrieve objects from the DBMS as such objects are requested by the application, costing a DBMS roundtrip for each query. This fact, coupled with the growing performance bottleneck of computer storage systems, has resulted
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12

DE, LA OSSA PÉREZ BERNARDO ANTONIO. "Web Prefetching Techniques in Real Environments." Doctoral thesis, Universitat Politècnica de València, 2012. http://hdl.handle.net/10251/15574.

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Esta tesis estudia la aplicación a la World Wide Web (WWW) de las técnicas de prebúsqueda desde un punto de vista realista y práctico. La prebúsqueda se aplica a la web para reducir la latencia percibida por los usuarios ya que, básicamente, consiste en predecir y preprocesar los siguientes accesos de los usuarios. Hasta ahora, la literatura disponible acerca de la prebúsqueda web se ha concentrado en cuestiones teóricas y no ha considerado algunos de los problemas que aparecen al implementar la técnica en condiciones reales. Por otra parte, los trabajos de investigación existentes usan
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13

Bracamonte, Nunez Matherey. "Prefetching for the Kilo-Instruction Processor." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-174843.

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The large latency of memory accesses in modern computer systems is a key obstacle to achieving high processor utilization. Techniques to reduce or tolerate large memory latencies become essential for achieving high processor utilization. Prefetch is one of the most widely studied mechanisms at literature. This mechanism predicts the future effective addresses of loads to bring in advance their data to the upper and faster levels of the memory hierarchy. Another technique to alleviate the memory gap is the out-of-order commit, implemented in the Kilo-Instruction processors. This technique is ba
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Chen, Tien-Fu. "Data prefetching for high-performance processors /." Thesis, Connect to this title online; UW restricted, 1993. http://hdl.handle.net/1773/6871.

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15

Doshi, Punit Rameshchandra. "Adaptive prefetching for visual data exploration." Link to electronic thesis, 2003. http://www.wpi.edu/Pubs/ETD/Available/etd-0131103-203307.

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Thesis (M.S.)--Worcester Polytechnic Institute.<br>Keywords: Adaptive prefetching; Large-scale multivariate data visualization; Semantic caching; Hierarchical data exploration; Exploratory data analysis. Includes bibliographical references (p.66-70).
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16

Ainsworth, Sam. "Prefetching for complex memory access patterns." Thesis, University of Cambridge, 2018. https://www.repository.cam.ac.uk/handle/1810/277804.

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Modern-day workloads, particularly those in big data, are heavily memory-latency bound. This is because of both irregular memory accesses, which have no discernable pattern in their memory addresses, and large data sets that cannot fit in any cache. However, this need not be a barrier to high performance. With some data structure knowledge it is typically possible to bring data into the fast on-chip memory caches early, so that it is already available by the time it needs to be accessed. This thesis makes three contributions. I first contribute an automated software prefetching compiler techni
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17

Ekemark, Per. "Static Multi-Versioning for Efficient Prefetching." Thesis, Uppsala universitet, Institutionen för informationsteknologi, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-300753.

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Energy efficiency is one of the biggest challenges in modern computer architecture. Increased performance and improved energy efficiency is always in demand whether it is for battery longevity in mobile applications or thermal limits in high-performance computing. To reach the best result, hardware and software must compliment each other. Software Decoupled Access-Execute (DAE) is a technique where memory operations are rearranged and grouped together by the compiler. Larger sections of memory bound code allows more efficient use of hardware Dynamic Voltage and Frequency Scaling (DVFS), which
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18

Torrents, Lapuerta Martí. "Improving prefetching mechanisms for tiled CMP platforms." Doctoral thesis, Universitat Politècnica de Catalunya, 2016. http://hdl.handle.net/10803/404418.

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Recently, high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures to deal with instruction level parallelism limitations and, more important, to manage the power consumption that is becoming unaffordable due to the increased transistor count and clock frequency. At the present moment, this architecture, which implements multiple processing cores on a single die, is commercially available with up to twenty four processors on a single chip and there are roadmaps and research trends that suggest that number of cores will increase in the near future. The in
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19

Bowman, Ivan. "Scalpel: Optimizing Query Streams Using Semantic Prefetching." Thesis, University of Waterloo, 2005. http://hdl.handle.net/10012/1093.

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Client applications submit streams of relational queries to database servers. For simple requests, inter-process communication costs account for a significant portion of user-perceived latency. This trend increases with faster processors, larger memory sizes, and improved database execution algorithms, and this trend is not significantly offset by improvements in communication bandwidth. Caching and prefetching are well studied approaches to reducing user-perceived latency. Caching is useful in many applications, but it does not help if future requests rarely match previous request
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20

Zhang, Jun. "Spatial trend prefetching for online maps mashups." Thesis, University of British Columbia, 2008. http://hdl.handle.net/2429/5540.

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Mashups try to merge some specific information together with online maps application by displaying related markers onto maps. Sometimes markers will be displayed very slowly. In this thesis, we have presented an approach to improve the performance of related applications by reducing network latency for those responses. We use Spatial Trend Web Prefetching Model to predict the areas which can be possibly arrived at after next movements. We classified movements into three patterns. Then this model will check history operations done by a specific user, find possible pattern he may be following an
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21

Selvidge, Charles William. "Compilation-based prefetching for memory latency tolerance." Thesis, Massachusetts Institute of Technology, 1992. http://hdl.handle.net/1721.1/13236.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1992.<br>Includes bibliographical references (leaves 160-164).<br>by Charles William Selvidge.<br>Ph.D.
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22

Wuerges, Emílio. "WCET-aware prefetching of unlocked instruction caches." reponame:Repositório Institucional da UFSC, 2015. https://repositorio.ufsc.br/xmlui/handle/123456789/134804.

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Tese (doutorado) - Universidade Federal de Santa Catarina, Centro Tecnológico, Programa de Pós-Graduação em Engenharia de Automação e Sistemas, Florianópolis, 2015.<br>Made available in DSpace on 2015-09-08T04:10:00Z (GMT). No. of bitstreams: 1 334103.pdf: 474482 bytes, checksum: e8c8770f10b59df4df1e70854aa60a94 (MD5) Previous issue date: 2015<br>A computação embarcada requer crescente vazão sob baixa potência. Ela requer um aumento de eficiência energética quando se executam programas de crescente complexidade. Muitos sistemas embarcados são também sistemas de tempo real, cuja correção temp
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23

Yesilmurat, Serdar. "A Prefetching Method For Interactive Web Gis Applications." Master's thesis, METU, 2010. http://etd.lib.metu.edu.tr/upload/12611639/index.pdf.

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A Web GIS system has a major issue of serving the map data to the client applications. Since most of the GIS services provide their geospatial data as basic image formats like PNG and JPEG, constructing those images and transferring them over the internet are costly operations. To enhance this inefficient process, various approaches are offered. Caching the responses of the requests on the client side is the most commonly implemented solution. However, this method is not adequate by itself. Besides caching the responses, predicting the next possible requests of the client and updating the cach
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24

Blair, Stuart Andrew. "On the classification and evaluation of prefetching schemes." Thesis, University of Glasgow, 2003. http://theses.gla.ac.uk/2274/.

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25

Acharjee, Utpal. "Personalized and artificial intelligence Web caching and prefetching." Thesis, University of Ottawa (Canada), 2006. http://hdl.handle.net/10393/27215.

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Web caching and prefetching are the most popular and widely used solutions to remedy Internet performance problems. Performance is increased if a combination of caching and prefetching systems is used rather than if these techniques are used individually. Web caching reduces the bandwidth consumption and network latency by serving the user's request from its own cache instead of the original Internet source. Prefetching is a technique that preloads and caches the web object that is not currently requested by the user but can be requested (expected) in the near future. It provides low retrieval
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26

Waern, Jonatan. "Profiling-Assisted Prefetching with Just-In-Time Compilation." Thesis, Uppsala universitet, Institutionen för informationsteknologi, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-234483.

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The Decoupled Access/Execute(DAE) approach is a method to reduce the energy consumption of task-based programs, based on dividing tasks in two phases where the first phase prefetches data at a low CPU frequency and the following phase performs computation at a high CPU frequency. The goal of this project is to extend this approach to sequential programs and examine the benefits of optimising the access phase to better suit the architecture the program runs on, and the program input. By using a Just-In-Time compiler to dynamically optimise the program and by utilising profiling tools to obtain
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27

Song, Dong Ho. "An accurate prefetching policy for object oriented systems." Thesis, University of Newcastle Upon Tyne, 1991. http://hdl.handle.net/10443/2054.

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In the latest high-performance computers, there is a growing requirement for accurate prefetching(AP) methodologies for advanced object management schemes in virtual memory and migration systems. The major issue for achieving this goal is that of finding a simple way of accurately predicting the objects that will be referenced in the near future and to group them so as to allow them to be fetched same time. The basic notion of AP involves building a relationship for logically grouping related objects and prefetching them, rather than using their physical grouping and it relies on demand fetchi
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Thakker, Dhawal. "Prefetching and clustering techniques for network based storage." Thesis, Middlesex University, 2009. http://eprints.mdx.ac.uk/6451/.

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The usage of network-based applications is increasing, as network speeds increase, and the use of streaming applications, e.g BBC iPlayer, YouTube etc., running over network infrastructure is becoming commonplace. These applications access data sequentially. However, as processor speeds and the amount of memory available increase, the rate at which streaming applications access data is now faster than the rate at which the blocks can be fetched consecutively from network storage. In addition to sequential access, the system also needs to promptly satisfy demand misses in order for applications
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Selfa, Oliver Vicent. "Adaptive Prefetching and Cache Partitioning for Multicore Processors." Doctoral thesis, Universitat Politècnica de València, 2018. http://hdl.handle.net/10251/112423.

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El acceso a la memoria principal en los procesadores actuales supone un importante cuello de botella para las prestaciones, dado que los diferentes núcleos compiten por el limitado ancho de banda de memoria, agravando la brecha entre las prestaciones del procesador y las de la memoria principal. Distintas técnicas atacan este problema, siendo las más relevantes el uso de jerarquías de caché multinivel y la prebúsqueda. Las cachés jerárquicas aprovechan la localidad temporal y espacial que en general presentan los programas en el acceso a los datos, para mitigar las enormes latencias de acceso
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30

Berg, Stefan Georg. "A cache-based prefetching memory system for mediaprocessors /." Thesis, Connect to this title online; UW restricted, 2002. http://hdl.handle.net/1773/6877.

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31

Sair, Suleyman. "Predictor-directed data prefetching for pointer-based applications /." Diss., Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 2003. http://wwwlib.umi.com/cr/ucsd/fullcit?p3090445.

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32

Payami, Maryam. "Instruction prefetching techniques for ultra low-power multicore architectures." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2016. http://amslaurea.unibo.it/12462/.

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As the gap between processor and memory speeds increases, memory latencies have become a critical bottleneck for computing performance. To reduce this bottleneck, designers have been working on techniques to hide these latencies. On the other hand, design of embedded processors typically targets low cost and low power consumption. Therefore, techniques which can satisfy these constraints are more desirable for embedded domains. While out-of-order execution, aggressive speculation, and complex branch prediction algorithms can help hide the memory access latency in high-performance systems, yet
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33

Cortés, Toni. "Cooperative caching and prefetching in parallel/distributed file systems." Doctoral thesis, Universitat Politècnica de Catalunya, 1997. http://hdl.handle.net/10803/6009.

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34

Büttner, Markus. "Kombinatorische integrierte Prefetching- und Cachingalgorithmen für Einzel- und Mehrplattensysteme." [S.l. : s.n.], 2004. http://deposit.ddb.de/cgi-bin/dokserv?idn=97213591X.

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35

Demke, Angela K. "Automatic I/O prefetching for out-of-core applications." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp04/mq28765.pdf.

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36

Kulkarni, Amit Vasant. "Implementing and Evaluating SCM Algorithms for Rate-Aware Prefetching." NCSU, 2009. http://www.lib.ncsu.edu/theses/available/etd-12112008-154909/.

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File system prefetching has been widely studied and used to hide high latency of disk I/O. However, there are very few algorithms that explicitly take the file access rate or burstiness into account to distribute resources, especially the prefetching memory. In this work we draw parallels between file system prefetching and the field of Supply Chain Management (SCM), particularly Inventory Theory. We further describe two very commonly used algorithms in SCM that directly address access rate and uncertainty. We also implement these prefetching algorithms in the Linux kernel and present the perf
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Angelino, Elaine Lee. "Accelerating Markov chain Monte Carlo via parallel predictive prefetching." Thesis, Harvard University, 2014. http://nrs.harvard.edu/urn-3:HUL.InstRepos:13070022.

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We present a general framework for accelerating a large class of widely used Markov chain Monte Carlo (MCMC) algorithms. This dissertation demonstrates that MCMC inference can be accelerated in a model of parallel computation that uses speculation to predict and complete computational work ahead of when it is known to be useful. By exploiting fast, iterative approximations to the target density, we can speculatively evaluate many potential future steps of the chain in parallel. In Bayesian inference problems, this approach can accelerate sampling from the target distribution, without compromis
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Zacharopoulos, Georgios. "Employing Hardware Transactional Memory in Prefetching for Energy Efficiency." Thesis, Uppsala universitet, Institutionen för informationsteknologi, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-260556.

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Energy efficiency is becoming a highly significant topic regarding modern hardware. The need for decreased energy consumption in our computers and more battery life in our laptops and smart-phones is increasing, without sustaining performance loss in our machines. Much work is being conducted towards that cause and as a result our lives could become more convenient. For serving the purpose of this project, we have investigated the implementation of Hardware Transactional Memory (HTM) in the prefetching phase of Decoupled Access/Execute (DAE) model [1]. The challenge posed by using DAE model is
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Knafla, Nils. "Prefetching techniques for client server object-oriented database systems." Thesis, University of Edinburgh, 1999. http://hdl.handle.net/1842/10999.

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The performance of many object-oriented database applications suffers from the page fetch latency which is determined by the expense of disk access. In this work we suggest several prefetching techniques to avoid, or at least to reduce, page fetch latency. In practice no prediction technique is prefect and no prefetching technique can reduce the total demand fetch time. Therefore we are interested in the trade-off between the level of accuracy required for obtaining good results in terms of elapsed time reduction and the processing overhead needed to achieve this level of accuracy. If prefetch
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Khan, Muneeb. "Optimizing Performance in Highly Utilized Multicores with Intelligent Prefetching." Doctoral thesis, Uppsala universitet, Datorarkitektur och datorkommunikation, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-272095.

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Modern processors apply sophisticated techniques, such as deep cache hierarchies and hardware prefetching, to increase performance. Such complex hardware structures have helped improve performance in general, however, their full potential is not realized as software often utilizes the memory hierarchy inefficiently. Performance can be improved further by ensuring careful interaction between software and hardware. Performance can typically improve by increasing the cache utilization and by conserving the DRAM bandwidth, i.e., retaining more useful data in the caches and lowering data requests t
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Fougner, Alexander. "Increasing energy efficiency and instruction scheduling by software prefetching." Thesis, Uppsala universitet, Institutionen för informationsteknologi, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-292714.

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With the increasing problems related to semiconductor process node shrinkage and the expansion of the mobile devices market, the requirements for energy efficiency are continuously constrained. Alternative methods such as Decoupled Access/Execute adapts software to better fit dynamic voltage and frequency scaling. Targeting the energy inefficient Out-of-Order execution logic new methods propose to increase energy efficiency by moving the Out-of-Order logic from hardware level to software level by enabling reordering of loop iterations. One way to enable reordering of iterations is to transform
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42

Kim, Donglok. "Extended data cache prefetching using a reference prediction table /." Thesis, Connect to this title online; UW restricted, 1997. http://hdl.handle.net/1773/6127.

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Garside, Jamie. "Real-time prefetching on shared-memory multi-core systems." Thesis, University of York, 2015. http://etheses.whiterose.ac.uk/10711/.

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In recent years, there has been a growing trend towards using multi-core processors in real-time systems to cope with the rising computation requirements of real-time tasks. Coupled with this, the rising memory requirements of these tasks pushes demand beyond what can be provided by small, private on-chip caches, requiring the use of larger, slower off-chip memories such as DRAM. Due to the cost, power requirements and complexity of these memories, they are typically shared between all of the tasks within the system. In order for the execution time of these tasks to be bounded, the response ti
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44

Díaz, Pedro. "Mechanisms to improve the efficiency of hardware data prefetchers." Thesis, University of Edinburgh, 2011. http://hdl.handle.net/1842/5650.

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A well known performance bottleneck in computer architecture is the so-called memory wall. This term refers to the huge disparity between on-chip and off-chip access latencies. Historically speaking, the operating frequency of processors has increased at a steady pace, while most past advances in memory technology have been in density, not speed. Nowadays, the trend for ever increasing processor operating frequencies has been replaced by an increasing number of CPU cores per chip. This will continue to exacerbate the memory wall problem, as several cores now have to compete for off-chip data a
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45

Mahmood, Omer. "ADAPTIVE PROFILE DRIVEN DATA CACHING AND PREFETCHING IN MOBILE ENVIRONMENT." Thesis, The University of Sydney, 2005. http://hdl.handle.net/2123/714.

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This thesis describes a new method of calculating data priority by using adaptive mobile user and device profiles which change with user location, time of the day, available networks and data access history. The profiles are used for data prefetching, selection of most suitable wireless network and cache management on the mobile device in order to optimally utilize the device's storage capacity and available bandwidth. Some of the inherent characteristics of mobile devices due to user movements are – non-persistent connection, limited bandwidth and storage capacity, changes in mobile device's
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Mahmood, Omer. "ADAPTIVE PROFILE DRIVEN DATA CACHING AND PREFETCHING IN MOBILE ENVIRONMENT." University of Sydney. Information Technologies, 2005. http://hdl.handle.net/2123/714.

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This thesis describes a new method of calculating data priority by using adaptive mobile user and device profiles which change with user location, time of the day, available networks and data access history. The profiles are used for data prefetching, selection of most suitable wireless network and cache management on the mobile device in order to optimally utilize the device�s storage capacity and available bandwidth. Some of the inherent characteristics of mobile devices due to user movements are �non-persistent connection, limited bandwidth and storage capacity, changes in mobile device�s g
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Sundin, Albin. "Word Space Models for Web User Clustering and Page Prefetching." Thesis, Linköpings universitet, Institutionen för datavetenskap, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-82012.

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This study evaluates methods for clustering web users via vector space models, for the purpose of web page prefetching for possible applications of server optimization. An experiment using Latent Semantic Analysis (LSA) is deployed to investigate whether LSA can reproduce the encouraging results obtained from previous research with Random Indexing (RI) and a chaos based optimization algorithm (CAS-C). This is not only motivated by LSA being yet another vector space model, but also by a study indicating LSA to outperform RI in a task similar to the web user clustering and prefetching task. The
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Suryanarayana, Vidya Rao. "Credit scheduling and prefetching in hypervisors using Hidden Markov Models." Thesis, Wichita State University, 2010. http://hdl.handle.net/10057/3749.

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The advances in storage technologies like storage area networking, virtualization of servers and storage have revolutionized the storage of the explosive data of modern times. With such technologies, resource consolidation has become an increasingly easy task to accomplish which has in turn simplified the access of remote data. Recent researches in hardware has boosted the capacity of drives and the hard disks have become very inexpensive than before. However, with such an increase in the storage technologies, there come some bottlenecks in terms of performance and interoperability. When it co
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Wong, Gordon. "Web prefetching with client clustering." 2004. http://link.library.utoronto.ca/eir/EIRdetail.cfm?Resources__ID=94960&T=F.

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Esfahbod, Behdad. "Preload: An adaptive prefetching Daemon." 2006. http://link.library.utoronto.ca/eir/EIRdetail.cfm?Resources__ID=450330&T=F.

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