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Academic literature on the topic 'Prototypage matériel'
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Journal articles on the topic "Prototypage matériel"
Ait Said, N., M. Benabdenbi, and G. Villanova Magalhães. "Prototypage Matériel-Logiciel de Systèmes Intégrés avec l'architecture RISC-V." J3eA 18 (2019): 1016. http://dx.doi.org/10.1051/j3ea/20191016.
Full textAygalinc, P., and S. Calvez. "Cible p-Soc pour l’apprentissage de Linux en DUT GEII." J3eA 18 (2019): 1008. http://dx.doi.org/10.1051/j3ea/20191008.
Full textVivas, Nicolás, Fernando Zamora, and Yves Glories. "Etude des phénomènes d'oxydoréduction dans les vins. Mise au point d'une méthode rapide de mesure du potentiel d'oxydoréduction." OENO One 26, no. 4 (December 31, 1992): 271. http://dx.doi.org/10.20870/oeno-one.1992.26.4.1191.
Full textBabin, Anne Sophie, and Sylvie Tétreault. "Conception d'un modèle dynamique de la déglutition: Un outil pédagogique et clinique." Canadian Journal of Occupational Therapy 62, no. 3 (August 1995): 162–69. http://dx.doi.org/10.1177/000841749506200308.
Full textAndrade, Thais Gabrielly Marques de, Zaíne Raquel Santos Vicente, Heryverton Araujo Lemos Leite, Ana Paula Chaves Cabral, Rodrigo Baldow, Nady Rocha, and Marcelo Brito Carneiro Leão. "A robótica livre e o ensino de física e de programação: desenvolvendo um teclado musical eletrônico." Texto Livre: Linguagem e Tecnologia 11, no. 3 (December 26, 2018): 317–30. http://dx.doi.org/10.17851/1983-3652.11.3.317-330.
Full textCalderón-Muñoz, Rodrigo Fabian, Sandra Del Pilar Forero-Poveda, and Aide Suárez-Cerquera. "Implementación De Un Diseño Piloto De Bandejas De Aireación Para Aguas, Potencializado Con Microorganismos Eficientes." Revista científica 2, no. 16 (June 26, 2013): 22. http://dx.doi.org/10.14483/23448350.4020.
Full textAguair, Mateus L., and Kamran Behdinan. "Design, Prototyping, and Programming of a Bricklaying Robot." Journal of Student Science and Technology 8, no. 3 (November 29, 2015). http://dx.doi.org/10.13034/jsst.v8i3.92.
Full textDissertations / Theses on the topic "Prototypage matériel"
Blampey, Alexandre. "Interopérabilité en émulation et prototypage matériel." Grenoble INPG, 2006. http://www.theses.fr/2006INPG0168.
Full textThis thesis defines a new concept in RTL verification: interoperability between HDL simulators, hardware emulators and hardware prototyping platforms. The main purpose is to benefit from both good speed of hardware prototyping platforms and de bug capabilities of hardware emulators and HDL simulators. To achieve this purpose, this thesis introduces the notion of design state. Then, a interoperability dedicated tool is presented. This tool add interoperability to design functionnalities. Thus, ail machines working at RTL level are interoperables with each others. The main idea of interoperability is to lunch tests on fast prototyping platforms while periodically saving design state. When a bug will be faced, debug will be performed using a fast emulator or a low cost HDL simulator. The test will restart from the last database saved just before bug time. Finally, this thesis introduce a new prototyping flow which was validated on an industrial design «STM HLS25»
Maillet-Contoz, Laurent. "Construction d'un environnement d'aide à la conception incrémentale : application au prototypage d'architecture mixte matériel/logicel." Montpellier 2, 1997. http://www.theses.fr/1997MON20171.
Full textSnaidero, Sébastien. "Modélisation multidisciplinaire VHDL-AMS de systèmes complexes : vers le prototypage virtuel." Université Louis Pasteur (Strasbourg) (1971-2008), 2004. http://www.theses.fr/2004STR13186.
Full textHamon, Juan Carlos. "Méthodes et outils de la conception amont pour les systèmes et les microsystèmes." Toulouse, INPT, 2005. http://ethesis.inp-toulouse.fr/archive/00000111/.
Full textZhou, Lingfei. "Modélisation VHDL-AMS multi-domaines de structures intelligentes, autonomes et distribuées à base de MEMS." Université Louis Pasteur (Strasbourg) (1971-2008), 2007. https://publication-theses.unistra.fr/public/theses_doctorat/2007/ZHOU_Lingfei_2007.pdf.
Full textThe MEMS components involve more and more multi-physical and multi-technology features with new applications denser and more "intelligent". Few description languages or methods can truly describe and simulate the complexity of such structures. In this thesis, our goal has been the development of high-level behavioral models allowing the simulation of intelligence structures, called "smart structures", based on MEMS. A methodology of "virtual prototyping" based on VHDL-AMS was chosen. VHDL-AMS is adapted to the multi-physical and multi-technology modeling. We have developed an approach to modeling a "micromanipulation fluidics" system formed with a MEMS networks. The simulation models have described at "behavioral" level, then "structural behavioral" level and finally "components" level, before being validated by experimental comparison
Lallet, Julien. "Mozaïc : plate-forme générique de modélisation et de conception d’architectures reconfigurables dynamiquement." Phd thesis, Rennes 1, 2008. ftp://ftp.irisa.fr/techreports/theses/2008/lallet.pdf.
Full textThis thesis attempts to define an architectural description language for computer-aided design conception and exploration of dynamically reconfigurable architectures. This document presents the development framework Mozaïc which aims at designing dynamically reconfigurable architecture by automatic generation of the required hardware resources. In the first part of this document, we detail the dynamic reconfiguration concepts developed and used by Mozaïc. In a second part, we present the ADL xMAML which allows the description and the efficient exploration of the concepts presented in the first part. Parameters specific to dynamic reconfiguration have been added in ADL which is based on the MAML language. The last part of the document is dedicated to the presentation of the framework itself and especially on the dynamically reconfigurable implementation of a WCDMA decoder on both a FPGA architecture and on the DART architecture
Guilleminot, Céline. "Etude et intégration numérique d'un système multicapteurs AMRC de télécommunication basé sur un prototype virtuel utilisant le langage de haut niveau VHDL-AMS." Toulouse 2, 2005. http://www.theses.fr/2005TOU20085.
Full textToday, requirements in system designs are extending more and more from electronic design (analogue and digital) to multidiscipline design. These current needs imply implementation of methodologies to optimize and to make the CAD product reliable. The recent VHDL-AMS standard seems to fit very well. This thesis presents an application of virtual prototype dedicated to a multisensor and multiuser DS-SS (Direct Sequence Spread Spectrum) transceiver system using ISM unlicensed band. The first part describes the state of the art of system design and software tools. After this, the whole digital and analogue stages will be developed under VHDL-AMS standard. Our study will focus on the synchronization and tracking entity topology choice, which are the main functions of a spread spectrum communication device. In order to complete VHDL-AMS library dedicated to telecommunication, a model of AWGN channel including a noise generator (Box-Muller method) will be proposed. Finally, a hardware prototype will be developped, based on digital function implantations in a FPGA chipset allowing to assess such a system data rate, bit error rate and size performances
Changuel, Adel. "Prototypage rapide d'architectures mixtes logiciels/matériels à partir de modèles mixtes C-VHDL." Phd thesis, Grenoble INPG, 1996. http://tel.archives-ouvertes.fr/tel-00345356.
Full textDe, Montmorillon Louis-Anne. "Capteur photorefractif d'ultrasons : choix et optimisation d'un matériau holographique ; étude et réalisation d'un prototype. Senseur photorefractif d'ultrasons : choix et optimisation d'un matériau holographique ; étude et réalisation d'un prototype." Phd thesis, Université Paris Sud - Paris XI, 1997. http://pastel.archives-ouvertes.fr/pastel-00716009.
Full textBollengier, Théotime. "Du prototypage à l’exploitation d’overlays FPGA." Thesis, Brest, École nationale supérieure de techniques avancées Bretagne, 2018. http://www.theses.fr/2018ENTA0003/document.
Full textDue to their reconfigurable capability and the performance they offer, FPGAs are good candidates for accelerating applications in the cloud. However, FPGAs have some features that hinder their use in the Cloud as well as their adoption by customers : first, FPGA programming is done at low level and requires some expertise that usual Cloud clients do not necessarily have. Secondly, FPGAs do not have native mechanisms allowing them to easily fit in the dynamic execution model of the Cloud.In this work, we propose to use overlay architectures to facilitate FPGA adoption, integration, and operation in the Cloud. Overlays are reconfigurable architectures synthesized on FPGA. As hardware abstraction layers placed between the FPGA and applications, overlays allow to raise the abstraction level of the execution model presented to applications and users, as well as to implement mechanisms making them fit in a Cloud infrastructure.This work presents a vertical approach addressing all aspects of overlay operation in the Cloud as reconfigurable accelerators programmable by tenants : from designing and implementing overlays, integrating them on commercial FPGA platforms, setting up their operating mechanisms, to developping their programming tools. The environment developped in this work is complete, modular and extensible, it is partially based on several existing tools, and demonstrate the feasibility of our approach