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Journal articles on the topic 'Pseudo-differential amplifier'

Author: Grafiati

Published: 3 June 2025

Last updated: 31 July 2025

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1

Shainda, J. Tahseen*1 Sandeep Singh 2. "REVIEW PAPER ON PSEUDO-DIFFERENTIAL AND BULK-DRIVEN MOS TRANSISTOR TECHNIQUE FOR OTA." INTERNATIONAL JOURNAL OF ENGINEERING SCIENCES & RESEARCH TECHNOLOGY 6, no. 7 (2017): 596–601. https://doi.org/10.5281/zenodo.829785.

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This paper presents review on Pseudo-Differential amplifier technique and Bulk-Driven MOS transistor technique for ultra-low voltage and power. By using this technique, a different design of operational transconductance amplifier (OTA) is briefly explained along with their outputs and their application. By using a pseudo-differential technique a voltage drop across the tail current is avoid as the tail-current is removed in Pseudo-differential amplifier where as by using the Bulk-Driven MOS transistor a minimum supply voltage is achieved because of the possibility in reduction of threshold vol

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2

Atkin, E. V., and V. V. Shumikhin. "Charge Sensitive Amplifier with Pseudo-differential Output." Russian Microelectronics 50, no. 3 (2021): 206–10. http://dx.doi.org/10.1134/s1063739721020037.

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3

NGUYEN, Huy-Hieu, Jeong-Seon LEE, and Sang-Gug LEE. "Low Voltage Current-Reused Pseudo-Differential Programmable Gain Amplifier." IEICE Transactions on Electronics E93-C, no. 1 (2010): 148–50. http://dx.doi.org/10.1587/transele.e93.c.148.

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Giustolisi, Gianluca, Alfio Dario Grasso, and Salvatore Pennisi. "High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier." IEEE Transactions on Circuits and Systems II: Express Briefs 54, no. 2 (2007): 112–16. http://dx.doi.org/10.1109/tcsii.2006.886239.

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Manfredini, Giuseppe, Alessandro Catania, Lorenzo Benvenuti, Mattia Cicalini, Massimo Piotto, and Paolo Bruschi. "Ultra-Low-Voltage Inverter-Based Amplifier with Novel Common-Mode Stabilization Loop." Electronics 9, no. 6 (2020): 1019. http://dx.doi.org/10.3390/electronics9061019.

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This work presents a single-stage, inverter-based, pseudo-differential amplifier that can work with ultra-low supply voltages. A novel common-mode stabilization loop allows proper differential operations, without impacting over the output differential performance. Electrical simulations show the effectiveness of this amplifier for supply voltages in the range of 0.3–0.5 V. In particular, a dc voltage gain of 25.16 dB, a gain-bandwidth product of 131.9 kHz with a capacitive load of 10 pF, and a static current consumption of only 557 nA are estimated at VDD = 0.5 V. Moreover, the circuit behavio

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Babaeinik, Majid, Massoud Dousti та Mohammad Bagher Tavakoli. "A High Bandwidth (DC-40 GHz) Pseudo Differential Distributed Amplifier in 0.18-μm RF CMOS". Journal of Circuits, Systems and Computers 26, № 12 (2017): 1750191. http://dx.doi.org/10.1142/s0218126617501912.

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This study presents a CMOS distributed amplifier (DA) with pseudo differential amplifying that achieves DC-40[Formula: see text]GHz bandwidth (BW) in 0.18-[Formula: see text]m RF CMOS process. The DA with three-stage amplifying cells was proposed to improve the DA performance. The inter-stage was composed of pseudo differential amplifying for bandwidth extension. By incorporating the pseudo differential amplifier configuration and capacitor-less circuit in the stages, the DA provides average gain and high bandwidth. The simulation results showed that the DA has a S[Formula: see text] of 6.4[Fo

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Kasipogula, Bhaskara Rao, and Gurumurthy Komanapalli. "A chopper amplifier with adaptive biasing OTA for biomedical applications, featuring high gain and CMRR." PLOS ONE 19, no. 11 (2024): e0313423. http://dx.doi.org/10.1371/journal.pone.0313423.

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This paper presents a design of fully differential chopper amplifier employing the flipped voltage follower (FVF) adaptive biasing technique, focusing on its potential use in biopotential recording applications. The suggested architectural OTA incorporates self-cascoded current mirrors (SCCMs) as the active load to achieve a substantial output swing. The FVFs based adaptive biasing approach for the differential input stage boosts extra current and enhances gain and dynamic characteristics. The chopper amplifier attains a common mode rejection ratio (CMRR) of more than 100 dB through the strate

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Ballo, Andrea, Alfio Dario Grasso, and Salvatore Pennisi. "0.4-V, 81.3-nA Bulk-Driven Single-Stage CMOS OTA with Enhanced Transconductance." Electronics 11, no. 17 (2022): 2704. http://dx.doi.org/10.3390/electronics11172704.

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The paper describes a single-stage operational transconductance amplifier suitable for very-low-voltage operation in power-constrained applications. The proposed circuit avoids the tail current generator in the differential pair while preventing pseudo-differential operation. Moreover, the adoption of positive feedback allows increasing the stage transconductance while minimizing the current consumption. Experimental measurements on prototypes implemented in a standard CMOS 180-nm technology, show superior performance as compared to the state of the art.

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Karami Horestani, Fatemeh, Zahra Karami Horastani, and Niclas Björsell. "A Band-Pass Instrumentation Amplifier Based on a Differential Voltage Current Conveyor for Biomedical Signal Recording Applications." Electronics 11, no. 7 (2022): 1087. http://dx.doi.org/10.3390/electronics11071087.

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Recently, due to their abundant benefits, current-mode instrumentation amplifiers have received considerable attention in medical instrumentation and read-out circuit for biosensors. This paper is focused on the design of current-mode instrumentation amplifiers for portable, implantable, and wearable electrocardiography and electroencephalography applications. To this end, a CMOS differential voltage second-generation current conveyor (DVCCII) based on a linear transconductor is presented. A new band-pass instrumentation amplifier, based on the designed DVCCII, is also implemented in this pape

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Wang, Zhiqiang, Xiaosong Wang, and Yu Liu. "A Wideband Power Amplifier in 65 nm CMOS Covering 25.8 GHz–36.9 GHz by Staggering Tuned MCRs." Electronics 12, no. 17 (2023): 3566. http://dx.doi.org/10.3390/electronics12173566.

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Broadband millimeter-wave power amplifiers have attracted much attention and have wide applications for 5G communication, satellite communication, radar, sensing, etc. Yet, it is challenging to design a power amplifier with broadband small-signal gain and power performance simultaneously. In this study, a transformer-based symmetrical magnetically coupled resonator (MCR) matching network for broadband output matching and stagger-tuned MCRs are used to achieve both broadband small- and large-signal performance. Also, to enhance the gain for the power amplifier, a three-stage common-source pseud

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11

Zhou, Zhijun, Longbin Zhu, Rui Yang, et al. "A High CMRR Instrumentation Amplifier Employing Pseudo-Differential Inverter for Neural Signal Sensing." IEEE Sensors Journal 22, no. 1 (2022): 419–27. http://dx.doi.org/10.1109/jsen.2021.3130003.

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., D. S. Shylu. "DESIGN AND ANALYSIS OF LOW POWER PSEUDO DIFFERENTIAL CLASS-AB TELESCOPIC OPERATIONAL AMPLIFIER." International Journal of Research in Engineering and Technology 03, no. 19 (2014): 243–48. http://dx.doi.org/10.15623/ijret.2014.0319044.

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Kasipogula, Bhaskara Rao, and Gurumurthty Komanapalli. "A High Gain, High CMRR, Low Noise Bio-Potential amplifier based on Switched Capacitor Feedback Amplifier." Journal of Integrated Circuits and Systems 19, no. 2 (2024): 1–9. http://dx.doi.org/10.29292/jics.v19i2.813.

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This paper describes a biopotential amplifier based on an operational transconductance amplifier (OTA) de-signed specifically for bio-potential recordings to achieve high gain and low noise. The amplifier uses a differential architec-ture with chopper modulators and pseudo-resistors to achieve a Common Mode Rejection Ratio (CMRR) of over 100 dB. The design has several key features, including precise and high steady gain, large output swing, good load-driving capabilities, high input impedance (Zin), and a small footprint. The paper compares the proposed circuit with other bio-potential ampli-f

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Malz, Stefan, Bernd Heinemann, Rudolf Lachner та Ullrich R. Pfeiffer. "J-band amplifier design using gain-enhanced cascodes in 0.13 μm SiGe". International Journal of Microwave and Wireless Technologies 7, № 3-4 (2015): 339–47. http://dx.doi.org/10.1017/s175907871500080x.

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This paper presents two J-band amplifiers in different 0.13 μm SiGe technologies: a small signal amplifier (SSA) in a technology in which never before gain has been shown over 200 GHz; and a low noise amplifier (LNA) design for 230 GHz applications in an advanced SiGe HBT technology with higher fT/fmax, demonstrating the combination of high gain, low noise, and low power in a single amplifier. Both circuits consist of a four-stage pseudo-differential cascode topology. By employing series–series feedback at the single-stage level the small-signal gain is increased, enabling circuit operation at

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PAIK, Daehwa, Masaya MIYAHARA, and Akira MATSUZAWA. "An Analysis on a Dynamic Amplifier and Calibration Methods for a Pseudo-Differential Dynamic Comparator." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E95-A, no. 2 (2012): 456–70. http://dx.doi.org/10.1587/transfun.e95.a.456.

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16

Nagari, A., and G. Nicollini. "A 3 V 10 MHz pseudo-differential SC bandpass filter using gain enhancement replica amplifier." IEEE Journal of Solid-State Circuits 33, no. 4 (1998): 626–30. http://dx.doi.org/10.1109/4.663568.

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17

Grace, Carl, Maurice Garcia-Sciveres, Timon Heim, and Amanda Krieger. "Low-Jitter Clock Receivers for Fast Timing Applications." Sensors 25, no. 7 (2025): 2284. https://doi.org/10.3390/s25072284.

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Precision timing is a key requirement for emerging 4D particle tracking, Positron Emission Tomography (PET), beam and fusion plasma diagnostics, and other systems. Time-to-Digital Converters (TDCs) are commonly used to provide digital estimates of the relative timing between events, but the jitter performance of a TDC can be no better than the performance of the circuits that acquire the pulses and deliver them to the TDC. Several clock receiver and distribution circuits were evaluated, and a differential amplifier with resistive loads driving a pseudo-differential clock distribution network,

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18

Kong, Dameng, and Quanzhen Duan. "A Pseudo-Differential Capacitive MEMS Accelerometer Analog Front-End Design." Journal of Physics: Conference Series 2477, no. 1 (2023): 012033. http://dx.doi.org/10.1088/1742-6596/2477/1/012033.

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Abstract Based on the current design and application of the chip and the research status at home and abroad, we proposed a silicon micro-accelerometer analog front-end integrated circuit with high resolution and wide capacitance application range by using SMIC 0.18μm CMOS technology. The circuit is composed of a capacitive readout circuit, a demodulator, and a low-pass filter. To detect the weak capacitive signal, the capacitor readout circuit of this paper adopts the continuous-time voltage mode charge amplifier structure and combines with the signal modulation technology and the optimization

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19

Meng-Hung Shen, Po-Hsiang Lan, and Po-Chiun Huang. "A 1-V CMOS Pseudo-Differential Amplifier With Multiple Common-Mode Stabilization and Frequency Compensation Loops." IEEE Transactions on Circuits and Systems II: Express Briefs 55, no. 5 (2008): 409–13. http://dx.doi.org/10.1109/tcsii.2007.914445.

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20

Suadet, Apirak, and Varakorn Kasemsuwan. "A CMOS inverter-based class-AB pseudo-differential amplifier with current-mode common-mode feedback (CMFB)." Analog Integrated Circuits and Signal Processing 74, no. 2 (2012): 387–98. http://dx.doi.org/10.1007/s10470-012-9970-0.

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21

Im, Saemin, and Sang-Gyu Park. "Analysis and Design of a Microphone Preamplifier for Mobile Applications." Electronics 10, no. 14 (2021): 1624. http://dx.doi.org/10.3390/electronics10141624.

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A design of an on-chip ac-coupling preamplifier for mobile applications is presented. A microphone preamplifier should have a large input impedance to mitigate the effective-gain reduction caused by the microphone’s non-zero output impedance. From a review of previously reported microphone preamplifier structures in terms of input impedance, feasibility of on-chip ac-coupling, and noise performance, we chose an inverting amplifier structure with capacitive feedback. In addition, to provide dc bias path, we used off-state MOSFET switches as pseudo-resistors of very large resistance in the giga-

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22

Girardi, Alessandro, Lucas Compassi-Severo, and Paulo César Comassetto de Aguirre. "Design Techniques for Ultra-Low Voltage Analog Circuits Using CMOS Characteristic Curves: a practical tutorial." Journal of Integrated Circuits and Systems 17, no. 1 (2022): 1–11. http://dx.doi.org/10.29292/jics.v17i1.573.

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The use of ultra-low-voltage (ULV) analog circuits for IoT applications, in which reduced power consumption is a mandatory specification, is becoming more and morean important design approach. Also, in many IoT applications, power is supplied with energy harvested from environmental sources. It is more efficient for the circuit to operate at a voltage level close to the provided by the energy harvester (between 0.3 and 0.6 V). To deal with this when using low-cost technology process nodes - 180-nm, for example, with |VT| ≈0.5V - it is necessary to apply specific design techniques that take adv

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KRISHNAMURTHY, KARTHIKEYAN, JIAN XU, XIAOQIANG SHOU, et al. "40 Gb/s TDM SYSTEM TRANSCEIVER PROTOTYPE IN InP HBT TECHNOLOGY." International Journal of High Speed Electronics and Systems 15, no. 03 (2005): 643–65. http://dx.doi.org/10.1142/s0129156405003375.

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A time-division-multiplexing (TDM) system transceiver with 4–channel 10 Gb/s interfaces to achieve 40 Gb/s non-return to zero (NRZ) transmission is presented. The front-end components are implemented in an indium phosphide double hetero-junction bipolar transistor (InP DHBT) technology. They include a 4:1 multiplexer with a voltage controlled oscillator and clock multiplication unit, modulator drivers for electro-absorption and differential lithium-niobate modulators, trans-impedance amplifier, limiting amplifier and 1:4 demultiplexer with clock and data recovery circuit. The transceiver was u

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Eghtesadi, Minoo, Mohammad Reza Mosavi, and Egidio Ragonese. "A Pseudo-Differential LNA with Noise Improvement Techniques for Concurrent Multi-Band GNSS Applications." Electronics 13, no. 14 (2024): 2805. http://dx.doi.org/10.3390/electronics13142805.

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A low-noise amplifier (LNA) design with the operation of concurrent dual-band for Global Navigation Satellite System (GNSS) receivers with single channel is presented in this work. This LNA structure has an inductively degenerated cascode architecture and is pseudo-differential, operating at two frequencies simultaneously (1.2 GHz and 1.57 GHz). Two noise reduction/cancellation techniques, using load capacitor and feedforward path, respectively, are proposed resulting in an excellent improvement in the noise figure (NF). The input matching circuit uses both series and parallel resonant compone

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Yin, Yue, Xinbing Zhang, Ziting Feng, et al. "An Ultra-Low-Voltage Transconductance Stable and Enhanced OTA for ECG Signal Processing." Micromachines 15, no. 9 (2024): 1108. http://dx.doi.org/10.3390/mi15091108.

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In this paper, a rail-to-rail transconductance stable and enhanced ultra-low-voltage operational transconductance amplifier (OTA) is proposed for electrocardiogram (ECG) signal processing. The variation regularity of the bulk transconductance of pMOS and nMOS transistors and the cancellation mechanism of two types of transconductance variations are revealed. On this basis, a transconductance stabilization and enhancement technique is proposed. By using the “current-reused and transconductance-boosted complementary bulk-driven pseudo-differential pairs” structure, the bulk-driven pseudo-differe

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Eghtesadi, Minoo, Gianluca Giustolisi, Andrea Ballo, Salvatore Pennisi, and Egidio Ragonese. "A 5 mW 28 nm CMOS Low-Noise Amplifier with Transformer-Based Electrostatic Discharge Protection for 60 GHz Applications." Electronics 13, no. 21 (2024): 4285. http://dx.doi.org/10.3390/electronics13214285.

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This paper presents a low-power 60 GHz low-noise amplifier (LNA) designed for Gbit/s applications using 28 nm CMOS technology. The LNA exploits a single-stage pseudo-differential architecture with integrated input transformer for both electrostatic discharge (ESD) protection and simultaneous noise/impedance matching. An effective power-constrained design strategy is adopted to pursue the lowest current consumption at the minimum noise figure (NF), with the best tradeoff between gain and frequency bandwidth. The LNA, which has been designed to drive an on–off keying (OOK) demodulator, is operat

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Eghtesadi, Minoo, Andrea Ballo, Gianluca Giustolisi, Salvatore Pennisi, and Egidio Ragonese. "A 28-nm CMOS Low-Power/Low-Voltage 60-GHz LNA for High-Speed Communication." Electronics 14, no. 14 (2025): 2819. https://doi.org/10.3390/electronics14142819.

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This paper presents a wideband low-power/low-voltage 60-GHz low-noise amplifier (LNA) in a 28-nm bulk CMOS technology. The LNA has been designed for high-speed millimeter-wave (mm-wave) communications. It consists of two pseudo-differential amplifying stages and a buffer stage included for 50-Ohm on-wafer measurements. Two integrated input/output baluns guarantee both simultaneous 50-ohm input–noise/output matching at input/output radio frequency (RF) pads. A power-efficient design strategy is adopted to make the LNA suitable for low-power applications, while minimizing the noise figure (NF).

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Li, Zhiyu, Xueqian Shang, Haigang Feng, and Xinpeng Xing. "A Power-Efficient 50 MHz-BW 76.8 dB Signal-to-Noise-and-Distortion Ratio Continuous-Time 2-2 MASH Delta-Sigma Analog-to-Digital Converter with Digital Calibration." Journal of Low Power Electronics and Applications 15, no. 2 (2025): 20. https://doi.org/10.3390/jlpea15020020.

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Continuous-time Sigma-Delta (CTSD) Analog-to-Digital Converter (ADC) is widely used in wireless receivers due to its built-in anti-aliasing and resistive input. In order to achieve a wide bandwidth while ensuring low power consumption, this paper proposes a CT 2-2 Multi-stAge Noise-sHaping (MASH) ADC for wireless communication. In order to reduce power consumption, the loop filter adopts a feedforward structure, and the operational amplifier uses complementary differential input pairs and feedforward compensation. The pseudo-random sequence injection and Least Mean Squares (LMS) algorithm are

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Llimos Muntal, Pere, and Ivan Harald Holger Jorgensen. "34.3 fJ/conv.-step 8-MHz Bandwidth Fourth-Order Pseudo-Differential Ring-Amplifier-Based Continuous-Time Delta–Sigma ADC in 65 nm." IEEE Solid-State Circuits Letters 1, no. 10 (2018): 198–201. http://dx.doi.org/10.1109/lssc.2019.2910468.

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Corbacho, Israel, Juan M. Carrillo, José L. Ausín, Miguel Á. Domínguez, Raquel Pérez-Aloe, and Juan Francisco Duque-Carrillo. "Compact CMOS Wideband Instrumentation Amplifiers for Multi-Frequency Bioimpedance Measurement: A Design Procedure." Electronics 11, no. 11 (2022): 1668. http://dx.doi.org/10.3390/electronics11111668.

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The design of an instrumentation amplifier (IA), based on indirect current feedback and suited to electrical bioimpedance spectroscopy, is presented. The IA consists of two transconductors and a summing stage, featuring a single-stage configuration process that allows the maximum achievable bandwidth to be extended. The transconductors are linearized by means of resistive source degeneration, whereas the use of super source followers allows a reduction in the values of the source degeneration resistors. This fact leads to a decrease in the overall noise and the silicon area, thus resulting in

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31

Choi, Bo-Hun. "A Time-Differential BOCDA Sensor Measurement System Applied to a 1 km Long SMF Using a Semiconductor Optical Amplifier as a Pump Chopper." Sensors 24, no. 8 (2024): 2417. http://dx.doi.org/10.3390/s24082417.

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A time-differential (TD) Brillouin optical correlation domain analysis (BOCDA) sensor system was applied to measure the Brillouin gain spectrum of a 1 km long sensing optical fiber. The optical delay line used in all BOCDA measurement systems was eliminated in the TD-BOCDA system by using a bit-delayed modulation relationship between the probe and pump lightwaves. These lightwaves were phase modulated using 216-1 pseudo-random binary sequence codes at 5 Gbps. A 2 cm dispersion-shifted fiber placed at the end of the 1 km optical fiber was distinctly identified by the Brillouin frequency extract

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Rekha, S., and T. Laxminidhi. "Common Mode Feedback Circuits for Low Voltage Fully-Differential Amplifiers." Journal of Circuits, Systems and Computers 25, no. 10 (2016): 1650124. http://dx.doi.org/10.1142/s0218126616501243.

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Continuous time common mode feedback (CMFB) circuits for low voltage, low power applications are proposed. Four circuits are proposed for gate/bulk-driven pseudo-differential transconductors operating on sub-1-V power supply. The circuits are validated for a bulk-driven pseudo-differential transconductor operating on 0.5[Formula: see text]V in 0.18[Formula: see text][Formula: see text]m standard CMOS technology. Simulation results reveal that the proposed CMFB circuits offer power efficient solution for setting the output common mode of the transconductors. They also load the transconductor ca

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Liao, Xiaofei, Dixian Zhao, and Xiaohu You. "An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression." Journal of Semiconductors 43, no. 9 (2022): 092401. http://dx.doi.org/10.1088/1674-4926/43/9/092401.

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Abstract This paper presents an E-band frequency quadrupler in 40-nm CMOS technology. The circuit employs two push–push frequency doublers and two single-stage neutralized amplifiers. The pseudo-differential class-B biased cascode topology is adopted for the frequency doubler, which improves the reverse isolation and the conversion gain. Neutralization technique is applied to increase the stability and the power gain of the amplifiers simultaneously. The stacked transformers are used for single-ended-to-differential transformation as well as output bandpass filtering. The output bandpass filte

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Centurelli, Francesco, Riccardo Della Sala, and Giuseppe Scotti. "A Standard-Cell-Based CMFB for Fully Synthesizable OTAs." Journal of Low Power Electronics and Applications 12, no. 2 (2022): 27. http://dx.doi.org/10.3390/jlpea12020027.

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In this paper, we propose a fully standard-cell-based common-mode feedback (CMFB) loop with an explicit voltage reference to improve the CMRR of pseudo-differential standard-cell-based amplifiers and to stabilize the dc output voltage. This latter feature allows robust biasing of operational transconductance amplifiers (OTAs) based on a cascade of such stages. A detailed analysis of the CMFB is reported to both provide insight into circuit behavior and to derive useful design guidelines. The proposed CMFB is then exploited to build a fully standard-cell OTA suitable for automatic place and rou

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Cao, Zhiheng, Tongyu Song, and Shouli Yan. "A 14 mW 2.5 MS/s 14 bit $\Sigma\Delta$ Modulator Using Split-Path Pseudo-Differential Amplifiers." IEEE Journal of Solid-State Circuits 42, no. 10 (2007): 2169–79. http://dx.doi.org/10.1109/jssc.2007.905241.

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Tang, Hui, Jian Gao, Xin Chen, Lan Yu Zhang, and Zhao He Zeng. "Design and Analysis of a Planar Piezo-Actuated Nanopositioner with Millimeter Scale Stroke." Key Engineering Materials 679 (February 2016): 143–48. http://dx.doi.org/10.4028/www.scientific.net/kem.679.143.

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In recent years, Fast Tool Servo (FTS) mechanism in precision manufacturing equipment emerges as a promising application for the piezo-actuated flexible nanopositioner. A flexible nanopositioner with large stroke, high bandwidth, high precision and multi-Degrees-of-Freedom (multi-DOFs) is really desired for this application. In order to meet this requirement, a novel 2-DOF flexible nanopositioner consists of two pairs of differential lever displacement amplifiers (DLDA) is proposed in this paper first, also, kinetostatics modeling is conducted by using the Pseudo-Rigid Body (PRB) method. After

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STEPANENKO, Dmitry A., and Ksenija A. BUNCHUK. "MATHEMATICAL MODELLING OF VIBRATIONS OF NON-UNIFORM RING-SHAPED ULTRASONIC WAVEGUIDES." Mechanics of Machines, Mechanisms and Materials 3, no. 56 (2021): 90–96. http://dx.doi.org/10.46864/1995-0470-2021-3-56-90-96.

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The article describes technique for modelling of ultrasonic vibrations amplifiers, which are implemented in the form of non-uniform ring-shaped waveguides, based on application of harmonic balance method. Bending vibrations of the waveguide are described by means of non-uniform integral and differential equations equivalent to Euler–Bernoulli equations in order to simplify calculation of amplitude-frequency characteristics of vibrations, particularly, to exclude the need of working with singular matrices. Using harmonic balance method, equations of vibrations are reduced to overdetermined non-

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Frech, Michael, and John Hubbert. "Monitoring the differential reflectivity and receiver calibration of the German polarimetric weather radar network." Atmospheric Measurement Techniques 13, no. 3 (2020): 1051–69. http://dx.doi.org/10.5194/amt-13-1051-2020.

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Abstract. It is a challenge to calibrate differential reflectivity ZDR to within 0.1–0.2 dB uncertainty for dual-polarization weather radars that operate 24∕7 throughout the year. During operations, a temperature sensitivity of ZDR larger than 0.2 dB over a temperature range of 10 ∘C has been noted. In order to understand the source of the observed ZDR temperature sensitivity, over 2000 dedicated solar box scans, two-dimensional scans of 5∘ azimuth by 8∘ elevation that encompass the solar disk, were made in 2018 from which horizontal (H) and vertical (V) pseudo antenna patterns are calculated.

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Rickett, Laura, and Pratim Datta. "Beauty-Contests in the Age of Financialization: Information Activism and Retail Investor Behavior." Journal of Information Technology 33, no. 1 (2018): 31–49. http://dx.doi.org/10.1057/s41265-016-0026-2.

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Keynes (The General Theory of Employment, Interest and Money, Harcourt Brace and Co., New York, 1936) had rightfully argued that picking stocks is akin to a beauty contest. The chances of winning are amplified if one's choice matches the likelihood of the panel's choice. In this era of financialization, where profit-making has shifted to speculative sways rather than fundamental trade and commodity production measures (Krippner, Socio-Econ Rev 3(2): 173-208, 2005), similar beauty contests have become even more acute. Online, real-time media channels along with pervasive investments application

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Gil-Torralvo, Ana, Marta Benavent, Maria A. Dominguez-Cejudo, et al. "Abstract P2-07-08: Identification of UGT2B15 as a potential biomarker in response to neoadjuvant therapy in HER2+ breast cancer." Cancer Research 82, no. 4_Supplement (2022): P2–07–08—P2–07–08. http://dx.doi.org/10.1158/1538-7445.sabcs21-p2-07-08.

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Abstract INTRODUCTION. In response to neoadjuvant therapy, pathological complete response (pCR; lack of residual disease in breast and lymph nodes), has been proposed as a prognostic marker for long-term clinical outcomes, such as disease-free (DFS) and overall survival (OS), in human epidermal growth factor receptor 2 (HER2)-positive and triple-negative breast cancer. In clinical practice, recognizing those patients likely to achieve such responses proves challenging to the oncologist, making the identification of new useful biomarkers vital. Here, we searched for potential biomarkers that an

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Babaeinik, Majid, Massoud Dousti, and Mohammad Bagher Tavakoli. "Analysis and Design of High Gain-Bandwidth CMOS Distributed Amplifier Utilizing a Cascaded Pseudo Differential Distributed Amplifier." Journal of Circuits, Systems and Computers, July 21, 2020, 2150005. http://dx.doi.org/10.1142/s0218126621500055.

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Distributed amplifiers (DAs) are one of the most important and common wideband amplifiers that can use various arrangements in their gain cell structure. One of the gain cells that can be effective in increasing the bandwidth of a distributed amplifier is the pseudo-differential amplifier (PDA). Although pseudo-differential distributed amplifiers (PDDAs) have a wide bandwidth and amplify DC, they have a small voltage gain. In this paper, various circuits with the same power and chip area are proposed to improve the performance of PDDAs. For evaluating and comparing the performance of the propo

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Zhou, Zhijun, Keping Wang, Longbin Zhu, et al. "A Differential Difference Amplifier Employing Pseudo-Differential CMFB for Neural Signal Recording Applications." IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 1. http://dx.doi.org/10.1109/tcsii.2022.3223874.

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Manfredini, Giuseppe, Alessandro Catania, Lorenzo Benvenuti, Mattia Cicalini, Massimo Piotto, and Paolo Bruschi. "Ultra-Low-Voltage Inverter-Based Amplifier with Novel Common-Mode Stabilization Loop." June 19, 2020. https://doi.org/10.3390/electronics9061019.

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This work presents a single-stage, inverter-based, pseudo-differential amplifier that can work with ultra-low supply voltages. A novel common-mode stabilization loop allows proper differential operations, without impacting over the output differential performance. Electrical simulations show the effectiveness of this amplifier for supply voltages in the range of 0.3–0.5 V. In particular, a dc voltage gain of 25.16 dB, a gain-bandwidth product of 131.9 kHz with a capacitive load of 10 pF, and a static current consumption of only 557 nA are estimated at VDD = 0.5 V. Moreover, the circuit behavio

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Lee, Calvin Yoji, Praveen Kumar Venkatachala, Ahmed ElShater, and Un-Ku Moon. "A Pseudo-Pseudo-Differential ADC Achieving 105dB SNDR in 10kHz Bandwidth Using Ring Amplifier Based Integrators." IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 1. http://dx.doi.org/10.1109/tcsii.2021.3060011.

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Manouras, Vasileios, and Ioannis Papananos. "A Wideband High-Gain Power Amplifier Operating in the D Band." November 8, 2022. https://doi.org/10.1109/VLSI-SoC54400.2022.9939613.

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In this paper the design, analysis and implementation of a 3-stage, broadband power amplifier (BPA), is presented. The device is suitable for medium-distance wireless and wireline gigabit communication in the D-band (110 – 170 GHz). A pseudo-differential cascode topology is adopted for each stage leading to optimized broadband performance. The PA is integrated in a 0.13 μm SiGe BiCMOS technology with f T /f max = 250/370 GHz, achieving a saturation output power P sat > 9 dBm and a maximum large-signal power gain G P > 29.5 dB, over the entire D-band. The chip size is 1.150 &time

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Kuai, Yang, Liwei Yan, Mingjie Liu, and Fei Yang. "A 31–36 GHz low noise‐variable gain amplifier with less than 0.37° RMS phase error and 0.4 dB gain step in 65‐nm CMOS." Microwave and Optical Technology Letters 66, no. 7 (2024). http://dx.doi.org/10.1002/mop.34229.

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AbstractThis article realizes a low noise‐variable gain amplifier (LN‐VGA) operating at the frequency range of 31–36 GHz. The LN‐VGA consists of two amplifier stages and a gain control stage. To achieve low noise and high gain, the two amplifier stages were implemented using a single‐ended inductive source‐degeneration cascaded with pseudo‐differential neutralization capacitors. Moreover, a symmetrical splitting cascode unit topology is proposed in the gain control stage to improve the precision of phase variation and gain step within the 3‐dB bandwidth. The LN‐VGA was fabricated using a 65‐nm

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Rusanen, Jere, Alok Sethi, Nuutti Tervo, et al. "Ka-band stacked and pseudo-differential orthogonal load-modulated balanced power amplifier in 22 nm CMOS FDSOI." International Journal of Microwave and Wireless Technologies, October 11, 2023, 1–8. http://dx.doi.org/10.1017/s1759078723001137.

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Abstract This paper presents an integrated power amplifier (PA) following the orthogonal load-modulated balanced amplifier (OLMBA) topology. The fixed-phase prototype in this paper is implemented with 22 nm complementary metal oxide semiconductor (CMOS) fully depleted silicon-on-insulator (FDSOI) process. The proposed PA operates at 26 GHz frequency range, where it achieves 19.5 dBm output power, 16.6 dB gain, 15.7% power added efficiency, and 18.3 dBm output 1-dB compression point ( $P_{\rm 1\,dB}$ ). The PA is also tested with high dynamic range modulated signals, and it achieves, respective

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Shabanzadeh, Negar, Rehman Akbar, Aarno Pärssinen, and Timo Rahkonen. "Origins and minimization of intermodulation distortion in a pseudo-differential CMOS beamforming receiver." Analog Integrated Circuits and Signal Processing, July 25, 2021. http://dx.doi.org/10.1007/s10470-021-01916-w.

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AbstractThis paper studies how nonlinear distortion is generated in the combination of an inverter-based low-noise amplifier and a passive mixer. The dominant nonlinearity appears to be the quadratic $$V_{gs}V_{ds}$$ V gs V ds mixing term in the passive mixer that first causes low-frequency IM2 and then upconverts it to IM3. Adding a common-mode feedback (CMFB) cancels the IM2 in a pseudo-differential structure, and hence also reduces the IM3 caused by the cascaded second order nonlinearities significantly. The effect of CMFB gain, bandwidth and linearity were analyzed, and it is concluded tha

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