Academic literature on the topic 'Pthread (Posix Thread)'

The aim of this paper is to evaluate efficiency of different approaches to parallelization ofstiffness matrix assembly operations, that can be found in any finite element software. OpenMP [1, 2]and POSIX Threads (Pthreads) programming models are two considered in this paper. The OpenMPmodel consist of an Application Program Interface (API) for multi-platform shared-memory parallelprogramming in C/C++. POSIX is an acronym for Portable Operating System Interface and Pthreadsstandards [3] defined as a set of C/C++ language [4] programming types and procedure calls forshared-memory parallel programming. The paper shows that parallelization can efficiently exploit thepower of modern available hardware, significantly reducing the needed computation time. Differentapproaches of each programming model are used for parallelization of stiffness matrix assemblycompared and their efficiency is evaluated in this paper.The different parallelization strategies were implemented in OOFEM [5] which is a free finiteelement code with object oriented architecture for solving mechanical, transport and fluid mechanicsproblems that operates on various platforms. The finite element method leads to set of algebraic equa-tions which components are assembled from contributions of individual elements. In this paper wefocus on assembly of sparse matrix contributions, such as stiffness as mass matrices. Domain decom-position paradigm, where the whole domain is decomposed into sub domain, which contributions areevaluated and assembled by individual threads is hard.The paper discuss the differences between approaches based on OpenMP and Pthreads, datascoping specification for correct parallel programming and memory allocation synchronization andscheduling.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior<br>Safety critical systems are systems where its failures can cause irreparable damage for this reason the development of safety critical systems involves safety issues and require rigorous validation in the certification process. Certification processes are expensive and lengthy to follow laws and rigorous rules. With the continuous evolution provided by general purpose programming languages, ease of learning, and the use of these languages in industry and academy, researches have been performed aiming to adapt general purpose programming languages for use in safety-critical applications. The purpose of these adaptations is to reduce the scope of commands found in general purpose languages in order to develop safety critical systems, for example, to avoid or reduce the use of recursions. Some examples of these adaptations include the Real Time Specification for Java (RTSJ), developed in 1998 and Safety Critical Java. SCJ uses objects and concepts defined by the RTSJ focusing on the development of safetycritical applications. In SCJ, the concept of missions is deployed where each mission consists of schedulable objects defined by the RTSJ. The portability of a Java application is one of the main factors for choosing this language. However, there is great difficulty in finding virtual machines for embedded safety-critical systems, therefore it is difficult to benefit from the portability provided by the Java virtual machine in this context. Nevertheless, an application developed in the C++ programming language can be executed directly on the device without using a virtual machine. This work presents a translation of the Safety Critical Java to the C++ programming language, maintaining the behaviour of objects that implement the concept of missions for SCJ in C++. This enables the execution of safety-critical applications in embedded devices without the use of a virtual machine.<br>Sistemas críticos são sistemas em que suas falhas podem causar danos irreparáveis como colocar a vida de pessoas em risco e por este motivo envolve questões de segurança e exige uma validação rigorosa no processo de certificação. Processos de certificação são caros e demorados que seguem leis e regras rigorosas. Com a evolução contínua proporcionada por linguagens de programação de propósito geral, a facilidade de aprendizado, assim como a utilização destas linguagens na indústria e acadêmia, pesquisas vem sendo realizadas com o intuito de adaptar linguagens de programação de propósito gerais para serem utilizadas em aplicações críticas de tempo real. O objetivo destas adaptações é de tornar o escopo de comandos das linguagens para desenvolvimento de sistemas críticos mais restritos, como por exemplo, ao evitar ou reduzir a utilização de recursões. Alguns exemplos dessas adaptações são a Especificação de Tempo Real Java (Real Time Specification for Java - RTSJ) desenvolvida no ano de 1998, e a Safety Critical Java (SCJ) que utiliza objetos e conceitos definidos pela RTSJ com enfoque no desenvolvimento de aplicações para sistemas críticos. Na SCJ foi implementado o conceito de missões onde cada missão é composto por objetos escalonáveis definidos pela RTSJ. A portabilidade de uma aplicação desenvolvida em Java é um dos principais fatores dos quais desenvolvedores desejam utilizá-la. Todavia, existe uma grande dificuldade de encontrar máquinas virtuais para sistemas críticos embarcados, dificultando a portabilidade da qual a linguagem Java fornece. Por outro lado, uma aplicação desenvolvida na linguagem de programação C++ pode ser executada diretamente no dispositivo sem a necessidade de utilizar uma máquina virtual. Por este motivo, nesta dissertação é apresentada uma tradução da especificação Safety Critical Java na linguagem de programação C++, com o objetivo de manter o comportamentos de uma aplicação desenvolvida em SCJ e assim possibilitando a execução de uma aplicação com requisitos temporais em diversos dispositivos embarcados.

Field-Programmable Gate Arrays (FPGAs) systems now comprise many processing elements that are processors running software and hardware engines used to accelerate specific functions. To make the programming of such a system simpler, it is easiest to think of a shared-memory environment, much like in current multi-core processor systems. This thesis introduces a novel, shared-memory, cache-coherent infrastructure for heterogeneous systems implemented on FPGAs that can then form the basis of a shared-memory programming model for heterogeneous systems. With simulation results, it is shown that the cache-coherent infrastructure outperforms the infrastructure of Woods [1] with a speedup of 1.10. The thesis explores the various configurations of the cache interconnection network and the benefit of the cache-to-cache cache line data transfer with its impact on main memory access. Finally, the thesis shows the cache-coherent infrastructure has very little overhead when using its cache coherence implementation.