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Journal articles on the topic 'Read only memory(rom)'

Author: Grafiati

Published: 4 June 2021

Last updated: 27 July 2025

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1

KURIHARA, Takashi. "Multilayered Polymer Waveguide Holographic Read Only Memory." Kobunshi 53, no. 6 (2004): 427. http://dx.doi.org/10.1295/kobunshi.53.427.

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Salah, Alkurwy, H. Ali Sawal, Shabiul Islam Md., and Idros Faizul. "An area efficient memory-less ROM design architecture for direct digital frequency synthesizer." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 1 (2021): 257–64. https://doi.org/10.11591/ijece.v11i1.pp257-264.

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This paper introduces a new technique of designing a read-only memory (ROM) circuit, namely; memory-less ROM as a novel approach to designing the ROM lookup table (LUT) circuit for use in a direct digital frequency synthesizer (DDFS). The proposed DDFS design uses the pipelined phase accumulator (PA) based on the kogge-stone (KS) adder. Verilog HDL programming is encoded on the architecture circuit of pipelined PA and contrasted with other PA based on various adders. The obtained results define the KS adder as having good capabilities for improving the throughput. In addition to the quarter sy

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3

Sowmya, K. B., and P. Gagana. "A system verilog approach for verification of memory controller." International Journal of Reconfigurable and Embedded Systems 9, no. 2 (2020): 153–57. https://doi.org/10.11591/ijres.v9.i2.pp153-157.

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Memory performance has become the major bottleneck to improve the overall performance of the computer system. By using memory controller, there is effective control of data between processor and memory. In this paper, a memory controller for interfacing Synchronous Static Random Access Memory (SSRAM), Synchronous Dynamic Random Access Memory (SDRAM), Read Only Memory (ROM) and FLASH which is Electrically Erasable Programmable Read-Only Memory is designed and a coverage driven Constraint random verification environment is built for the designed memory controller. Verification plays an important

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4

Schneider, Edward. "The Magic of Optical Memories." CALICO Journal 4, no. 4 (2013): 83–89. http://dx.doi.org/10.1558/cj.v4i4.83-89.

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Optical memory in the form of compact discs is ever increasing inpopularity throughout the world. Two variations are Compact Disc Read-Only Memory (CD ROM) and Compact Disc-Interactive (CD-I). CD ROM is well-suited to information storage in the form of text. CD-I is not in the production yet but will be capable of text, graphics, video still frames, and audio at three different quality levels. Education is not the target market for CD ROM or CD-I. Nevertheless, both CD ROM and CD-I can be a great boon to language education and will find their place in the education market.

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Travaglione, B. C., M. A. Nielsen, H. M. Wiseman, and A. Ambainis. "ROM-based computation: quantum versus classical." Quantum Information and Computation 2, no. 4 (2002): 324–32. http://dx.doi.org/10.26421/qic2.4-5.

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We introduce a model of computation based on \emph{read only memory} (ROM), which allows us to compare the space-efficiency of reversible, error-free classical computation with reversible, error-free quantum computation. We show that a ROM-based quantum computer with one writable qubit is universal, whilst two writable bits are required for a universal classical ROM-based computer. We also comment on the time-efficiency advantages of quantum computation within this model.

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K B, Sowmya, and Gagana P. "A system verilog approach for verification of memory controller." International Journal of Reconfigurable and Embedded Systems (IJRES) 9, no. 2 (2020): 153. http://dx.doi.org/10.11591/ijres.v9.i2.pp153-157.

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<span>Memory performance has become the major bottleneck to improve the overall performance of the computer system. By using memory controller, there is effective control of data between processor and memory. In this paper, a memory controller for interfacing Synchronous Static Random Access Memory (SSRAM), Synchronous Dynamic Random Access Memory (SDRAM), Read Only Memory (ROM) and FLASH which is Electrically Erasable Programmable Read-Only Memory is designed and a coverage driven Constraint random verification environment is built for the designed memory controller. Verification plays

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7

Hatakeyama, Masaru, Akihiko Nomura, Kenji Oishi, Koji Tsujita, Yoshiaki Suzuki, and Ichiro Ueno. "Practical Properties of Thermochromically Induced Super-Resolution Read-Only Memory Disk (TSR-ROM)." Japanese Journal of Applied Physics 41, Part 1, No. 3B (2002): 1905–6. http://dx.doi.org/10.1143/jjap.41.1905.

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8

Alkurwy, Salah, Sawal H. Ali, Md Shabiul Islam, and Faizul Idros. "An area efficient memory-less ROM design architecture for direct digital frequency synthesizer." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 1 (2021): 257. http://dx.doi.org/10.11591/ijece.v11i1.pp257-264.

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This paper introduces a new technique of designing a read-only memory (ROM) circuit, namely; memory-less ROM as a novel approach to designing the ROM lookup table (LUT) circuit for use in a direct digital frequency synthesizer (DDFS). The proposed DDFS design uses the pipelined phase accumulator (PA) based on the kogge-stone (KS) adder. Verilog HDL programming is encoded on the architecture circuit of pipelined PA and contrasted with other PA based on various adders. The obtained results define the KS adder as having good capabilities for improving the throughput. In addition to the quarter sy

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9

Shablya, Yuriy V., and Alina V. Tokareva. "Methods for storing AND/OR tree structures and their variants in RAM and ROM." Proceedings of Tomsk State University of Control Systems and Radioelectronics 27, no. 2 (2024): 44–50. http://dx.doi.org/10.21293/1818-0442-2024-27-2-44-50.

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Tree structures are widely used to represent information objects containing hierarchical relations between their parts. An example of such tree structures are AND/OR trees, that have found their application in the development of combinatorial generation algorithms and related tasks. This paper explores possible ways to store tree structures in the random access memory (RAM) and read only memory (ROM) of devices that process these structures. The adaptation of these methods to the problem of storing AND/OR tree structures and their variants is also considered. In addition, to organize operation

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10

O'Connor, Richard J. "Integrating Optical Videodisc and CD/ROM Technology to Teach Art History." Journal of Educational Technology Systems 17, no. 1 (1988): 27–32. http://dx.doi.org/10.2190/xjke-27fd-2wmp-3nrt.

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This study determines the feasibility of combining Level III microcomputer-controlled videodisc instruction with large text-based data searching provided by Compact Disc/Read Only Memory (CD/ROM) technology in an individualized instructional program in Art History. In addition, the project is intended to determine the practicality of repurposing generic videodisc and CD/ROM programs through development of programming macros that can be used by teachers to individualize program content. The National Gallery of Art videodisc and the CD/ROM version of the Grolier Academic American Encyclopedia ar

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11

Tehranchi, Babak, and Dennis G. Howe. "Error characteristics of read-only-memory versus write-once–read-many compact discs: CD-ROM versus CD-WORM." Applied Optics 35, no. 29 (1996): 5831. http://dx.doi.org/10.1364/ao.35.005831.

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12

Pasha, Parcelliana Binar, and Yusrida Muﬂihah. "Recommendation System Using the K-Nearest Neighbor Approach: A Case Study of Dual Camera Quality as a Smartphone Selection Criterion." Journal of Information Technology and Cyber Security 1, no. 1 (2022): 9–15. http://dx.doi.org/10.30996/jitcs.7559.

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Many smartphones today need to be more precise about choosing one that suits the user's needs. In fact, smartphone sellers sometimes need help recommending smartphones that suit buyers' needs. Generally, buyers search for smartphone specifications with keywords they desire, but the results appear different from what they expected. Users need the main specifications, such as Random Access Memory (RAM) and Read Only Memory (ROM) capacity, battery, and high camera quality. This research aims to implement the K-Nearest Neighbor (KNN) algorithm for recommendation smartphone selection based on the c

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N’da, Karamoko, Jiaoju Ge, Steven Ji-Fan Ren, and Jia Wang. "What matters for international consumers’ choice preferences for smartphones: Evidence from a cross-border ecommerce platform." PLOS ONE 18, no. 5 (2023): e0285551. http://dx.doi.org/10.1371/journal.pone.0285551.

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Despite the growing impact of smartphone use on countries’ economies, the literature has rarely investigated the link between economic context and smartphone purchase trends. Based on 20,556 smartphones sold from a Cross-Border E-Commerce (CBEC) platform, the study reveals that relationships between GDP per capita and Smartphone Choice Preferences (SCP) as well as Purchase Quantities (PUR) are direct and partially mediated by Price (PRI), Read-Only Memory (ROM), and Random-Access Memory (RAM). That means that the economic context highlighted by the GDP plays a substantial role in smartphone ch

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Bliss, Stephen D., M. Joy Gorence, and Donald Haight. "CD-ROM Applications in Education." Journal of Educational Technology Systems 18, no. 1 (1989): 37–41. http://dx.doi.org/10.2190/5uwu-chhv-aupd-nj88.

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The advent of computers in the classroom has changed the shape of education. Students now have the opportunity to utilize Compact Disc-Read Only Memory (CD-ROM) for research and compilation of information. Through the introduction of CD-ROM, students have been encouraged to research topics across the curriculum. The ease and availability of information through the CD-ROM has positively reinforced students to research topics for use in Global Studies, Science, Language Arts, and Computer courses. In addition, students have also been encouraged to utilize word processing software to correlate th

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15

Aoki, Ikuo. "A New Partial-Read Only Memory (ROM) System for a High-Density Digital Video Disc Recorder." Japanese Journal of Applied Physics 42, Part 1, No. 2B (2003): 961–64. http://dx.doi.org/10.1143/jjap.42.961.

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16

Sulzer, John H. "CASSIS/CD-ROM: Classification and search support information system on compact disk/read-only memory. 1790 —." Government Publications Review 18, no. 1 (1991): 83–87. http://dx.doi.org/10.1016/0277-9390(91)90119-i.

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17

Powlesland, Dominic. "Publishing in the round: a role for CD-ROM in the publication of archaeological field-work results." Antiquity 71, no. 274 (1997): 1062–66. http://dx.doi.org/10.1017/s0003598x00086038.

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Some five months have elapsed since I was invited to write this paper and, as seems always to be the case, the continued rapid change in applied computing and available technology has transformed my view of the potentials offered by CD-ROM (Compact Disk-Read Only Memory) as a publishing medium. The paper I now offer is substantially different in content; the conclusions, however, are the same.

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18

Tabassum, Tamanna. "DECOHERENCE-RESILIENT READONLY MEMORY ARCHITECTURE USING QUANTUM TECHNOLOGY." International Journal of Advanced Research 13, no. 01 (2025): 357–63. https://doi.org/10.21474/ijar01/20202.

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Quantum computation draws from theoretical physics, functional analysis, and algorithmic computer science, acting as an interdisciplinary field. The main aim of research in quantum computing is to demonstrate that certain tasks can be completed faster using quantum computers than traditional ones. For this, quantum memory is crucial to developing synchronization tools that coordinate various processes in quantum computers and quantum gates that preserve the identity of quantum states, such as superpositions, and methods to convert preset photons into on-demand photons. Quantum memories are ess

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19

Holomany, Mark, and Ron Jenkins. "Use of the Crystal Data File on CD-ROM." Advances in X-ray Analysis 32 (1988): 539–44. http://dx.doi.org/10.1154/s0376030800020875.

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AbstractWe have recently described the use of the Compact Disk Read Only Memory disk for the storage of data in the Powder Diffraction File (PDF). This work has now been extended to include the NBS (1987) Crystal Data File (CDF). The CDF contains 115,753 entries of which 59,613 are Inorganic materials and 56,140 organic. The data base can be accessed either by means of bit maps built on chemistry and subfile restrictions, or by means of a Boolean search system allowing combinations of search parameters including: chemistry; space group; cell volume; density and unit cell data.

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20

Davis, G. L., Edward F. Gilman, and Howard W. Beck. "An Electronically Based Horticultural Information Retrieval System." HortTechnology 6, no. 4 (1996): 332–36. http://dx.doi.org/10.21273/horttech.6.4.322.

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A large horticultural database and an electronic retrieval system for extension education programs were developed using compact disk-read only memory (CD-ROM) and World Wide Web (WWW) as the medium for information delivery. Object-oriented database techniques were used to organize the information. Conventional retrieval techniques including hypertext, full text searching, and expert systems were integrated into a complete package for accessing information stored in the database. A multimedia user interface was developed to provide a variety of capabilities including computer graphics and high

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Gilman, E. F., and H. Beck. "The CD-ROM–World Wide Web Hybrid." HortScience 32, no. 3 (1997): 553D—553. http://dx.doi.org/10.21273/hortsci.32.3.553d.

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A large horticultural database and an electronic retrieval system for extension education programs were developed using compact disk-read only memory (CD-ROM) and World Wide Web (WWW) as the medium for information delivery. Object-oriented database techniques were used to organize the information. Conventional retrieval techniques including hypertext, full text searching, and expert systems were integrated into a complete package for accessing information stored in the database. A multimedia user interface was developed to provide a variety of capabilities, including computer graphics and high

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22

Deepak, Prajapat, and Mittal Saurabh. "Computer Architecture: Memory Organization and System Design." Recent Trends in Information Technology and its Application 6, no. 2 (2023): 40–47. https://doi.org/10.5281/zenodo.7889179.

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<em>In figuring, a variety of distinct storage components are used to create the memory system of general-purpose computers. This article's goal is to outline how these components are organized and the technologies that are utilized to put them into practice. There are numerous speeds at which semiconductor RAMs can be accessed. Their execution times range from 100 ns to less than 10 ns. Any device group that makes use of PC handling technology uses semiconductor memory. Semiconductor memory is now more widely used, and these memory cards have grown in size as larger and larger amounts of

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23

Prasanthi, D. "Design and Implementation of an Improved BIST Architecture for ROM." Asian Journal of Electrical Sciences 6, no. 1 (2017): 7–14. http://dx.doi.org/10.51983/ajes-2017.6.1.1995.

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Input vector monitoring online testing schemes perform testing during the normal operation of the circuit. These schemes are evaluated based on hardware overhead and concurrent test latency (CTL), also well suited for modules requiring exhaustive testing, such as Read Only Memories (ROMs). In this work we present an input vector monitoring concurrent BIST scheme specially designed for the testing of ROM modules along with an error detecting unit which can detect error of corresponding bit position. By using circuitry already existing for the memory module, the hardware overhead, power and the

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24

Williamson, D. J. "An introductory course." Psychiatric Bulletin 16, no. 10 (1992): 640–41. http://dx.doi.org/10.1192/pb.16.10.640.

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As we have previously mentioned, the computer itself is simply a collection of chips and circuit boards which are useless without software. Application software is what you do work with, i.e. your word processor or database etc, but the application software itself needs an operating system to run within. The operating system, however, needs something called a basic input/output system (BIOS) to operate. This is software but stored in ROM (Read Only Memory) on chips, and tells the computer what to do when it is first switched on.

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Круліковський, Олег, Сергій Галюк, Ігор Сафронов, and Іван Горбенко. "Ukrainian National Encryption Standards for FPGA Based Embedded Systems." Security of Infocommunication Systems and Internet of Things, no. 1 (June 30, 2023): 01005. http://dx.doi.org/10.31861/sisiot2023.1.01005.

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The paper presents the hardware implementation based on FPGA of the main cryptographic transformations of the symmetric transformation algorithm of DSTU 7624:2014 and the stream cipher of DSTU 8845:2019, which are the national encryption standards of Ukraine. In the case of DSTU 7624: 2014 developed and implemented a hardware implementation for multiplication of two polynomials modulo x8+x4+x3+x2+1 in the form of a combinational circuit that allows to execute the MixColumn transformation by one cycle. SubBytes transformation is implemented based on asynchronous read-only memory. For stream cip

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Nagar, Ayushi, and Rahul Shrivastava. "Review of Clocked Storage Elements in Digital Circuit Design." International Journal on Recent and Innovation Trends in Computing and Communication 7, no. 5 (2019): 30–34. http://dx.doi.org/10.17762/ijritcc.v7i5.5308.

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Storage of digital circuit is "state" or memory. These are called sequential circuits. The most fundamental sequential circuit type that we will ponder is known as the Flip-Flop. It is ponder four distinct assortments of these gadgets and their utilization in registers and register documents, which can be considered as one type of on– CPU memory. The traditional memory, called RAM, is ordinarily not on the CPU chip. Regular Slam and its assortments, including RAM, ROM, SRAM, Measure, and SDRAM. True single-phase clock (TSPC) method of reasoning has found wide use in advanced plan. At first as

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Afrooz, Sonia, and Nima Jafari Navimipour. "Memory Designing Using Quantum-Dot Cellular Automata: Systematic Literature Review, Classification and Current Trends." Journal of Circuits, Systems and Computers 26, no. 12 (2017): 1730004. http://dx.doi.org/10.1142/s0218126617300045.

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Quantum-dot cellular automata (QCA) has come out as one of the potential computational structures for the emerging nanocomputing systems. It has a large capacity in the development of circuits with high space density and dissipation of low heat and allows faster computers to develop with lower power consumption. The QCA is a new appliance to realize nanolevel digital devices and study and analyze their various parameters. It is also a potential technology for low force and high-density memory plans. Large memory designs in QCA show unique features because of their architectural structure. In Q

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Neelamadhab Khaya. "Energy Efficient Predictive Maintenance in Resource Constraint Industrial IoT devices using Smoothed Mish Activation Function." Journal of Electrical Systems 20, no. 3 (2024): 3281–87. http://dx.doi.org/10.52783/jes.4931.

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Traditionally, Industrial IoT devices collect sensor data to a cloud platform where ML/DL processing is to be done. Edge computing has the advantage of reducing latency, improved battery performance, safe transmission and reducing vulnerability. These benefits are particularly significant considering the limited resources on IoT devices, such as only a few kilobytes of RAM, and the critical importance of energy savings in industrial applications. Arduino Uno uses 2kB of RAM and 32 kB of read only flash memory. Optimal performance is required for ML inference on EDGE devices to get good accurac

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29

Najafi, Ali, Behrouz Farhang-Boroujeny, and Ganesh S. Samudra. "A VLSI Design for Implementation of Transform Domain Adaptive Filters." VLSI Design 9, no. 2 (1999): 119–33. http://dx.doi.org/10.1155/1999/87231.

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A VLSI implementation of a dedicated digital signal processor is presented. The processor is tailored for efficient implementation of transform domain adaptive filters. It incorporates a butterfly processor which performs butterfly operation to implement the required transformation. It is also able to perform complex addition, subtraction and multiplication. The butterfly processor makes use of a redundant binary tree multiplier with a recently proposed coding of signed-digit numbers which reduces the number of levels in the tree by one. An on-chip read only memory holds the transformation coe

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Forbes, Malcolm, David Shultz, Robert Schmidt, and Hyoyoung Lee. "(Invited) Nitronyl Nitroxide Radicals as Organic Memory Elements with Both n- and p-Type Properties: An Electrochemical Approach to Spintronics." ECS Meeting Abstracts MA2025-01, no. 56 (2025): 2738. https://doi.org/10.1149/ma2025-01562738mtgabs.

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Organic molecules are being actively explored for use in logical devices, either as individual memory elements or as components embedded in small organic and polymeric materials. Conventional inorganic semiconductor devices are limited in terms of performance improvement owing to increased costs for device fabrication as well as physical limitations on minimum feature dimensions. Organic memory, however, is a possible substitute for both volatile and non-volatile memory devices. It has the advantages of facile tailoring through organic synthesis, simple device fabrication (even upon flexible s

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31

Neudeck, Philip G., David J. Spry, Michael J. Krasowski, et al. "Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2021, HiTEC (2021): 000064–68. http://dx.doi.org/10.4071/2380-4491.2021.hitec.000064.

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Abstract At HiTEC 2018, NASA Glenn Research Center reported the first demonstration of yearlong 500 °C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021 submission updates on-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11 and near 3000 transistors/chip for Gen

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32

Jenkins, R., and M. Holomany. "“PC-PDF”: A Search/Display System Utilizing the CD-ROM and the Complete Powder Diffraction File." Powder Diffraction 2, no. 4 (1987): 215–19. http://dx.doi.org/10.1017/s0885715600012811.

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AbstractThe Powder Diffraction File (PDF) is a collection of single phase X-ray powder patterns, maintained and distributed by the JCPDS-International Centre for Diffraction Data. Over the past 10 years there has been increasing use of the PDF in computer readable form, but the limited amount of disk space available on most commercial powder diffractometer systems has limited use to a small subset of the total PDF. The recent availability of low-cost Compact Disk Read Only Memory (CD-ROM) systems offers an attractive alternative to conventional disk media. This paper describes a low-cost Perso

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33

Juninda, Tri, Elvia Andri, Ulya Kahirunnisa, Novi Kurniawati, and Mustakim Mustakim. "PENERAPAN METODE PROMETHEE UNTUK PENDUKUNG KEPUTUSAN PEMILIHAN SMARTPHONE TERBAIK." Jurnal Ilmiah Rekayasa dan Manajemen Sistem Informasi 5, no. 2 (2019): 224. http://dx.doi.org/10.24014/rmsi.v5i2.7677.

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Perkembangan dan penjualan smartphone yang semakin meningkat membuat banyak vendor smartphone bersaing untuk menawarkan berbagai macam fitur pada smartphone yang mereka pasarkan, sehingga masyarakat sering dihadapkan pada permasalahan-permasalahan yaitu kesulitan dalam menentukan smartphone yang akan dibeli. Hal ini disebabkan karena banyaknya smartphone yang menawarkan fitu-fitur canggih dengan harga yang murah. Pemilihan smartphone ini dapat ditentukan berdasarkan kriteria yang telah dipilih diantaranya harga, ukuran layar, Random Acces Momory (RAM), Read Only Memory (ROM), processor, kamera

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Butov, A. A. "Hardware implementation of Boolean functions based on the automaton model." Informatics 20, no. 1 (2023): 91–101. http://dx.doi.org/10.37661/1816-0301-2023-20-1-91-101.

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Objectives. Currently, electronic control devices are increasingly being introduced into various household and production products. Microcontrollers of a wide variety of configurations are widely used as such devices. Another approach can be proposed where a control device with a standard structure is synthesized from typical integrated circuits and implements a Boolean function describing the required control actions.The purpose of the work is to investigate the possibility of implementing Boolean functions using devices with a standard structure, the design of which is based on the use of a

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35

Zhou, Kunpeng, Qiaoyu Xu, and Tianle Zhang. "Optimized Design of Direct Digital Frequency Synthesizer Based on Hermite Interpolation." Sensors 24, no. 19 (2024): 6285. http://dx.doi.org/10.3390/s24196285.

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To address the issue of suboptimal spectral purity in Direct Digital Frequency Synthesis (DDFS) within resource-constrained environments, this paper proposes an optimized DDFS technique based on cubic Hermite interpolation. Initially, a DDFS hardware architecture is implemented on a Field-Programmable Gate Array (FPGA); subsequently, essential interpolation parameters are extracted by combining the derivative relations of sine and cosine functions with a dual-port Read-Only Memory (ROM) structure using the cubic Hermite interpolation method to reconstruct high-fidelity target waveforms. This a

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Flores, Cristina. "‘Spain! Most Pleasant were my wanderings’: Robert Southey's Pedestrian and Mountaineering Writing in the Iberian Peninsula." Romanticism 27, no. 1 (2021): 63–74. http://dx.doi.org/10.3366/rom.2021.0492.

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This article explores Robert Southey's literary responses to his walking experiences in Spain as he recounted them in Letters Written During a Short Residence in Spain and Portugal (1797). Published after a four-month visit to the Iberian Peninsula, Letters departs from previous travelogues in offering, apart from factual details, subjective impressions of the places visited both in prose and verse. Nonetheless, I argue, Southey adopts a more intimate and self-reflective mood when he relates his pedestrian excursions in verse, not only showing a deeper aesthetic engagement with the natural sur

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Druva, Kumar S., and M. Roopa. "Design and analysis of multiple read port techniques using bank division with XOR method for multi-ported-memory on FPGA platform." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 6 (2021): 4785–93. https://doi.org/10.11591/ijece.v11i6.pp4785-4793.

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The multiple read and write operations are performed simultaneously by multi-ported memories and are used in advanced digital design applications on reprogrammable field-programmable gate arrays (FPGAs) to achieve higher bandwidth. The Memory modules are configured by block RAM (BRAMs), which utilizes more area and power on FPGA. In this manuscript, the techniques to increase the read ports for multi-ported memory modules are designed using the bank division with XOR (BDX) approach. The read port techniques like two read-one write (2R1W) memory, hybrid mode approach either 2R1W or 4R memory, a

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Fadhilah, Rifdah, Lisa Harsyiah, and Nuzla Af’idatur Robbaniyyah. "The Decision on Selecting the Best Laptop Using Analytical Hierarchy Process and Simple Additive Weighting Method at the Faculty of MIPA University of Mataram." EIGEN MATHEMATICS JOURNAL 7, no. 2 (2024): 113–20. https://doi.org/10.29303/emj.v7i2.231.

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Laptops have the potential to increase educational productivity in Indonesia. For example, students at the Faculty of Mathematics and Natural Sciences (MIPA) at the University of Mataram now feel involved. However, the decision to choose the right laptop according to the needs of students is difficult. The research population used was active students from the class of 2020-2023, Faculty of Mathematics and Natural Sciences (MIPA), University of Mataram. This research aims to determine the best laptop selection based on alternative laptop brands, namely Asus Vivobook, Acer 3, HP 14S, Dell Vostro

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Xing, Xing, William Melek, and Wilson Wang. "A Recursive Trigonometric Technique for Direct Digital Frequency Synthesizer Implementation." Electronics 13, no. 23 (2024): 4762. https://doi.org/10.3390/electronics13234762.

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This paper presents a novel recursive trigonometry (RT) technique for direct digital frequency synthesizer (DDFS) implementations. Traditional DDFS systems on field programmable gate arrays (FPGAs) either require a substantial amount of read-only memory (ROM) space to store reference values or depend on intricate angle rotation functions to approximate trigonometric values. The proposed RT technique offers a DDFS architecture without using the lookup table (LUT) method, and it can enhance signal accuracy and minimize power consumption. The effectiveness of the proposed RT technique has been im

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Ifeyinwa, Obiora-Dimson Hyacinth Inyiama John Adejumo. "Emulation Technique in Digital Systems Design." NIPES Journal of Science and Technology Research 5, no. 1 (2023): 283–87. https://doi.org/10.5281/zenodo.7760471.

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<em>The need for emulation as a technique in digital systems design was established in this paper. Three scenarios where emulation can be applied were stated. To successfully emulate, an emulator and emulation software is of the essence. The emulators identified for use include a microcontroller and Read Only Memory (ROM) while the emulation software is crafted from the State Transition Table (STT) /the fully expanded STT or the logic table of the control system or device being emulated. For a device or control system to be emulated its characteristics must be converted to its resultant STT, l

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Chen, Shuai, and Lei Wang. "Transformable Electronics Implantation in ROM for Anti-Reverse Engineering." International Journal of High Speed Electronics and Systems 28, no. 03n04 (2019): 1940021. http://dx.doi.org/10.1142/s0129156419400214.

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The protection of intellectual property (IP) is increasingly critical for IP vendors in the semiconductor industry. Read Only Memories (ROMs) serve as important non-volatile memory in various hardware systems to store predefined data and programs, which is critical to IP protection. Its pre-determined layout pattern makes unauthorized data extraction through chip-level reverse engineering easy to carry out. Advanced reverse engineering techniques can physically disassemble the chip and derive the IPs precisely at a much lower cost than the value of IP design that chips carry. This invasive har

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Yu, Liang, Zhengkuan Zhang, Yangbing Lai, Yang Zhao, and Fu Mo. "Edge computing-based intelligent monitoring system for manhole cover." Mathematical Biosciences and Engineering 20, no. 10 (2023): 18792–819. http://dx.doi.org/10.3934/mbe.2023833.

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<abstract> <p>Unusual states of manhole covers (MCs), such as being tilted, lost or flooded, can present substantial safety hazards and risks to pedestrians and vehicles on the roadway. Most MCs are still being managed through manual regular inspections and have limited information technology integration. This leads to time-consuming and labor-intensive identification with a lower level of accuracy. In this paper, we propose an edge computing-based intelligent monitoring system for manhole covers (EC-MCIMS). Sensors detect the MC and send status and positioning information via LoRa

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Haider, Syed, and Marten van Dijk. "Flat ORAM: A Simplified Write-Only Oblivious RAM Construction for Secure Processors." Cryptography 3, no. 1 (2019): 10. http://dx.doi.org/10.3390/cryptography3010010.

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Oblivious RAM (ORAM) is a cryptographic primitive which obfuscates the access patterns to a storage, thereby preventing privacy leakage. So far in the current literature, only ‘fully functional’ ORAMs are widely studied which can protect, at a cost of considerable performance penalty, against the strong adversaries who can monitor all read and write operations. However, recent research has shown that information can still be leaked even if only the write access pattern (not reads) is visible to the adversary. For such weaker adversaries, a fully functional ORAM turns out to be an overkill, cau

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Kumar S., Druva, and Roopa M. "Design and analysis of multiple read port techniques using bank division with XOR method for multi-ported-memory on FPGA platform." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 6 (2021): 4785. http://dx.doi.org/10.11591/ijece.v11i6.pp4785-4793.

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<span lang="EN-US">The multiple read and write operations are performed simultaneously by multi-ported memories and are used in advanced digital design applications on reprogrammable field-programmable gate arrays (FPGAs) to achieve higher bandwidth. The Memory modules are configured by block RAM (BRAMs), which utilizes more area and power on FPGA. In this manuscript, the techniques to increase the read ports for multi-ported memory modules are designed using the bank division with XOR (BDX) approach. The read port techniques like two read-one write (2R1W) memory, hybrid mode approach ei

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Mohamed, Saber, and M. Eid Marwa. "Low power pseudo-random number generator based on lemniscate chaotic map." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 1 (2021): 863–71. https://doi.org/10.11591/ijece.v11i1.pp863-871.

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Lemniscate chaotic map (LCM) provides a wide range of control parameters, canceling the need for several rounds of substitutions, and excellent performance in the confusion process. Unfortunately, the hardware model of LCM is complex and consumes high power. This paper presents a proposed low power hardware model of LCM called practical lemniscate chaotic map (P-LCM) depending on trigonometric identities to reduce the complexity of the conventional model. The hardware model designed and implement into the field programmable gate array (FPGA) board, Spartan-6 SLX45FGG4843. The proposed model ac

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Gilreath, J. P. "Description of a Basic Program for Data Collection using a Portable Microcomputer." HortScience 20, no. 2 (1985): 301. http://dx.doi.org/10.21273/hortsci.20.2.301.

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Abstract Data collection and analysis are time-consuming processes. Each time data are transcribed, the probability of error increases. Electronic data collection devices are commercially available; however, they are relatively expensive (more than $2000). In addition, they may require programming by the user, or purchase of program instructions in the form of read-only memory (ROM) chips. Many individuals cannot afford to invest in one of these devices. Several lightweight portable computers are now available for under $1000. Among these is one sold by Radio Shack under the trade name TRS 80

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Okfalisa, Okfalisa, Dwi Utari Iswavigra, Hidayati Rusnedy, and Toto Saktioto. "Pemilihan Smartphone Berdasarkan Rekomendasi Profile User: Integrasi Fuzzy Analytical Hierarchy Process dan Rule Based." JURNAL SISTEM INFORMASI BISNIS 10, no. 2 (2020): 211–19. http://dx.doi.org/10.21456/vol10iss2pp211-219.

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The usability and usefulness of smartphones have been found to lack optimality. Moreover, the action of the customer appears to behave as a consumptive user instead of buying following the basic needs. In selecting the right smartphone, this study provides an alternative option for buyers. The Fuzzy Analytical Hierarchy Process (F-AHP) approach is applied by distinguishing between two distinct decision-making namely, Profile User as a user recommendation-based, and Smartphone-based selection. The suggested requirements are hobbies, areas of jobs, and the use of social network applications in d

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CHENG, WEI-CHUNG, and MASSOUD PEDRAM. "POWER-AWARE BUS ENCODING TECHNIQUES FOR I/O AND DATA BUSES IN AN EMBEDDED SYSTEM." Journal of Circuits, Systems and Computers 11, no. 04 (2002): 351–63. http://dx.doi.org/10.1142/s0218126602000501.

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Microprocessors with built-in Liquid Crystal Device (LCD) controllers and equipped with Flash ROM are common in mobile computing applications. In the first part of the paper, a software-only encoding technique is proposed to reduce the power consumption of the processor-memory bus when displaying an image on the LCD. Based on the translation mechanism of the LCD controller, the approach of this paper is to start with the palette as a coding table for the pixel buffer and then reassign the codes according to the image characteristics. Experimental results prove the efficacy of this approach; po

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Gambino, Richard J. "Optical Storage Disk Technology." MRS Bulletin 15, no. 4 (1990): 20–24. http://dx.doi.org/10.1557/s0883769400059911.

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Optical storage of digital information has reached the consumer market in the form of the compact audio disk. In this technology, information is stored in the form of shallow pits embossed in a polymer surface. The surface is coated with a reflective thin metallic film, and the digital information, represented by the position and length of the pits, is read out optically with a focused, low-power (5 mW) laser beam. When used for information storage for a computer this device is called a CD-ROM, a Compact Digital-Read Only Memory. The user can only extract information (digital data) from the di

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Mathew, Ajay. "THE ENHANCEMENTS IN STORAGE CAPACITY AND LONG-TERM DATA RETENTION OF MULTIDIMENSIONAL FLASH MEMORY IN MODERN MICROCIRCUIT APPLICATIONS." ICTACT Journal on Microelectronics 8, no. 1 (2022): 1295–300. http://dx.doi.org/10.21917/ijme.2022.0223.

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Generally, flash memory is a type of permanent memory for computers in which the contents can be reprocessed or erased electronically. Compared to programmable read-only memory that can erase electricity, operations on it can be performed on modules located in different locations. Flash memory is much less expensive than EEPROM, which is why it has become a dominant technology. Especially, in situations, this stable and long-term data retention is required. Its use is allowed in various cases like digital audio players, photo and video cameras, mobile phones and smartphones, and specialized An

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