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Relevant bibliographies by topics / Readout interface circuit (ROIC)

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Academic literature on the topic 'Readout interface circuit (ROIC)'

Author: Grafiati

Published: 3 June 2025

Last updated: 22 June 2025

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Journal articles on the topic "Readout interface circuit (ROIC)"

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ZHAO, HONGLIANG, YIQIANG ZHAO, YIWEI SONG, JUN LIAO, and JUNFENG GENG. "A LOW POWER CRYOGENIC CMOS ROIC DESIGN FOR 512 × 512 IRFPA." Journal of Circuits, Systems and Computers 22, no. 10 (2013): 1340033. http://dx.doi.org/10.1142/s0218126613400331.

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A low power readout integrated circuit (ROIC) for 512 × 512 cooled infrared focal plane array (IRFPA) is presented. A capacitive trans-impedance amplifier (CTIA) with high gain cascode amplifier and inherent correlated double sampling (CDS) configuration is employed to achieve a high performance readout interface for the IRFPA with a pixel size of 30 × 30 μm2. By optimizing column readout timing and using two operating modes in column amplifiers, the power consumption is significantly reduced. The readout chip is implemented in a standard 0.35 μm 2P4M CMOS technology. The measurement results show the proposed ROIC achieves a readout rate of 10 MHz with 70 mW power consumption under 3.3 V supply voltage from 77 K to 150 K operating temperature. And it occupies a chip area of 18.4 × 17.5 mm2.

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Zhou, Tong, Tao Dong, Yan Su, and Yong He. "A High Uniformity Readout Integrated Circuit for Infrared Focal Plane Array Applications." Applied Mechanics and Materials 602-605 (August 2014): 2632–36. http://dx.doi.org/10.4028/www.scientific.net/amm.602-605.2632.

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Infrared focal plane arrays (IRFPA) suffer from inherent low frequency and fixed patter noise (FPN). To achieve high quality infrared image by mitigating the FPN of IRFPAs, a novel low-noise and high uniformity readout integrated circuit (ROIC) has been proposed. A correlated double sampling (CDS) with single capacitor method has been adopted in the ROIC design which can effectively reduce the FPN, KTC and 1/f noise. A 4×4 experimental readout chip has been designed and fabricated using the SMIC 0.18 μm CMOS process. Both the function and performance of the proposed readout circuit have been verified by experimental results. The test results show that the proposed ROIC has a good performance in practical applications.

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Dan, Liu, Gao Feng, and Jin Chuan. "Test of 32-Channel X-Ray Readout Integrated Circuit." Advanced Materials Research 718-720 (July 2013): 1100–1103. http://dx.doi.org/10.4028/www.scientific.net/amr.718-720.1100.

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The test method of 32 channel X-ray readout integrated circuit (ROIC) has been proposed in this paper. Large resistors and a voltage source with high accuracy are used to generate 32 channels of weak currents, which are injected into the ROIC. Some key parameters of ROIC such as linearity, uniformity, cross talk, dynamic range have been tested. This method helps to test ROICs performance and does not need any photodiode and any laser light, which is convenient and easy to be realized.

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Guo, Zhongjie, Bin Wang, Suiyang Liu, Ruiming Xu, and Ningmei Yu. "High-Linearity and High-Speed ROIC of Ultra-Large Array Infrared Detectors Based on Adaptive Compensation and Enhancement." Sensors 23, no. 12 (2023): 5667. http://dx.doi.org/10.3390/s23125667.

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In order to solve the problem of limited linearity and frame rate in the large array infrared (IR) readout integrated circuit (ROIC), a high-linearity and high-speed readout method based on adaptive offset compensation and alternating current (AC) enhancement is proposed in this paper. The efficient correlated double sampling (CDS) method in pixels is used to optimize the noise characteristics of the ROIC and output CDS voltage to the column bus. An AC enhancement method is proposed to quickly establish the column bus signal, and an adaptive offset compensation method is used at the column bus terminal to eliminate the nonlinearity caused by the pixel source follower (SF). Based on the 55 nm process, the proposed method is comprehensively verified in an 8192 × 8192 IR ROIC. The results show that, compared with the traditional readout circuit, the output swing is increased from 2 V to 3.3 V, and the full well capacity is increased from 4.3 Me- to 6 Me-. The row time of the ROIC is reduced from 20 µs to 2 µs, and the linearity is improved from 96.9% to 99.98%. The overall power consumption of the chip is 1.6 W, and the single-column power consumption of the readout optimization circuit is 33 μW in the accelerated readout mode and 16.5 μW in the nonlinear correction mode.

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Mu, Yusong, Zilong Zhao, Chong Chen, et al. "The Design of a Low-Noise, High-Speed Readout-Integrated Circuit for Infrared Focal Plane Arrays." Sensors 23, no. 21 (2023): 8715. http://dx.doi.org/10.3390/s23218715.

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This paper describes the design of a low-noise, high-speed readout-integrated circuit for use in InGaAs infrared focal plane arrays, and analyzes the working principle and noise index of the pixel circuit in detail. The design fully considers the dynamic range, noise, and power consumption of the pixel circuit in which a capacitance transimpedance amplifier structure is adopted as the input stage circuit, and chip fabrication via an XFAB 0.18 µm CMOS process is successfully realized. The ROIC adopts monolithic integration and implements various functions, such as windowing, subsampling, and different integration and readout modes. The ROIC reached an array scale of 32 × 32, a frame rate of 100 Hz, and a readout rate of 20 Mbps with an analog power consumption of less than 52 mW. The measurement results show that the input reference noise can be reduced to 143 e- via the CDS, and the fully customized scheme has certain advantages in the research of high-performance ROICs.

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Lu, Fei Bao, Guo Lin Lu, You Shu Huang, and Xiang Hui Yuan. "Readout Circuit for Uncooled Pyroelectric IRFPA." Applied Mechanics and Materials 84-85 (August 2011): 284–88. http://dx.doi.org/10.4028/www.scientific.net/amm.84-85.284.

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A 320×240 readout circuit (ROIC) for the uncooled pyroelectric infrared detector was fabricated in the double-poly-double-metal (DPDM) N-well CMOS technology. Composed of X- and Y-shift register, column amplifier and correlated double sampling (CDS) circuit, the readout circuit integrated signal from the detector for frame time. It has the pitch of 50um and power dissipation of less than 50 mW. The circuit configuration, operation and testing result are described. Testing result indicates that the designed circuit meets with the requirement. Thermal images were obtained by the hybrid-integrated sensing array.

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Lee, Seungjun, Joohwan Jin, Jihyun Baek, Juyong Lee, and Hyungil Chae. "Readout Integrated Circuit for Small-Sized and Low-Power Gas Sensor Based on HEMT Device." Sensors 21, no. 16 (2021): 5637. http://dx.doi.org/10.3390/s21165637.

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This paper presents a small-sized, low-power gas sensor system combining a high-electron-mobility transistor (HEMT) device and readout integrated circuit (ROIC). Using a semiconductor-based HEMT as a gas-sensing device, it is possible to secure high sensitivity, reduced complexity, low power, and small size of the ROIC sensor system. Unlike existing gas sensors comprising only HEMT elements, the proposed sensor system has both an ROIC and a digital controller and can control sensor operation through a simple calibration process with digital signal processing while maintaining constant performance despite variations. The ROIC mainly consists of a transimpedance amplifier (TIA), a negative-voltage generator, and an analog-to-digital converter (ADC) and is designed to match a minimum target detection unit of 1 ppm for hydrogen. The prototype ROIC for the HEMT presented herein was implemented in a 0.18 µm complementary metal–oxide–semiconductor (CMOS) process. The total measured power consumption and detection unit of the proposed ROIC for hydrogen gas were 3.1 mW and 2.6 ppm, respectively.

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Kwon, Soon-Kyu, and Hyeon-June Kim. "A Dynamic Range Preservation Readout Integrated Circuit for Multi-Gas Sensor Array Applications." Chemosensors 12, no. 4 (2024): 60. http://dx.doi.org/10.3390/chemosensors12040060.

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This study introduces a readout integrated circuit (ROIC) tailored for multi-gas sensor arrays featuring a proposed baseline calibration scheme aimed at mitigating the issue of sensor baseline variation. Unlike previous approaches, the proposed scheme stores each sensor’s baseline value and dynamically updates the signal extraction range accordingly during ROIC operation. This adjustment allows for the optimal use of the ROIC’s dynamic range, enhancing sensor uniformity and accuracy without the need for complex additional circuitry or advanced post-processing algorithms. We fabricated a prototype ROIC using a 180 nm CMOS process, achieving a low power consumption of 0.43 mW and a conversion rate of 50 kSPS. The prototype boasts an integrated noise level of 9.9 μVRMS across a frequency range of 0.1 Hz to 5 kHz and a dynamic range of 142.6 dB, coupled with superior linearity, indicated by a maximum integral non-linearity (INL) of −75.71 dB. This design significantly reduces sensor offset scattering to within 1 LSB of the A/D reference scale. In this study, the efficacy of the proposed scheme was validated using Figaro TGS-2600. The ROIC targets a sensitivity range from 0.54 to 0.23 for gas concentrations ranging from 5 ppm to 20 ppm and a resolution of 39 Ω for sensor resistance range from 10 kΩ to 90 kΩ. The enhancements in performance make the proposed ROIC a promising solution for precise gas concentration detection in sensor applications.

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Jankowski, Mariusz, Michał Szermer, Piotr Zając, et al. "An Experimental Investigation of Noise Sources’ Contribution in the Multi-Chip Module Open-Loop Comb-Drive Capacitive MEMS Accelerometer." Electronics 13, no. 13 (2024): 2599. http://dx.doi.org/10.3390/electronics13132599.

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The paper presents the noise analysis of a MEMS and ASIC readout integrated circuit (ROIC) constituting the accelerometer developed in the frame of the InnoReh project, aiming at the development of methods for monitoring patients with imbalance disorders. Several experiments were performed at different temperatures and in different configurations: ROIC alone, ROIC with emulated parasitic capacitances, MEMS and ROIC in separate packages, and MEMS and ROIC in a single package. Many noise/interference sources were considered. The results obtained experimentally were compared to the results of theoretical investigations and were within the same order of magnitude, although in practice, the observed noise was always greater than the theoretical estimation. The paper also includes an in-depth analysis to explain these differences. Moreover, it is argued that, in terms of noise, the MEMS sensing element, and not the ROIC, is the quality-limiting factor.

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Yao, Shaopeng, Qiang Shan, Jinjin Xiao, Zihui Wei, and Shuilong Huang. "Enhanced Linearity in Intracranial Pressure Monitoring System Through Sample Isolation Bridge ROIC." Applied Sciences 15, no. 6 (2025): 3008. https://doi.org/10.3390/app15063008.

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This study presents a sample isolation bridge readout integrated circuit (ROIC) specifically designed for intracranial pressure (ICP) monitoring systems. The ROIC consists of an instrumentation amplifier (IA) and a successive approximation register (SAR) analog-to-digital converter (ADC). Additionally, the output of the IA is isolated to protect against output spikes that could compromise the linearity and stability of the ROIC. Both traditional and proposed ROIC circuits are fabricated using 0.18 µm complementary metal-oxide-semiconductor (CMOS) technology. The peak signal-to-noise ratio (SNR) for the traditional ROIC is 40.9 dB, while the peak signal-to-noise and distortion ratio (SNDR) is measured at 40.1 dB. In contrast, the proposed ROIC, which incorporates the SAR ADC, achieves a peak SNR of 54.6 dB and a peak SNDR of 51.8 dB, demonstrating a significant improvement in linearity. The new ROIC consumes 39.5 µA of current from a 1.8 V power supply and occupies a chip core area of only 0.27 mm2.

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Dissertations / Theses on the topic "Readout interface circuit (ROIC)"

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Yakopcic, Chris. "Memristor Device Modeling and Circuit Design for Read Out Integrated Circuits, Memory Architectures, and Neuromorphic Systems." University of Dayton / OhioLINK, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1398725462.

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Temiz, Yuksel. "Advanced Readout And Control Electronics For Mems Gyroscopes." Master's thesis, METU, 2007. http://etd.lib.metu.edu.tr/upload/2/12608664/index.pdf.

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This thesis reports the development of advanced readout and control electronics for MEMS gyroscopes developed at METU. These gyroscope electronics are separated into three main groups: high sensitive interface circuits, drive mode amplitude controlled self oscillation loops, and sense mode phase sensitive amplitude demodulators. The proposed circuits are first implemented with discrete components, and then integrated on CMOS chips. A self oscillation loop enabling constant amplitude drive mode vibrations independent of sensor parameters and ambient conditions is developed. A fully functional angular rate system, which is constructed by employing this advanced control electronics together with the transresistance amplifier type interfaces and sense mode electronics, is implemented on a dedicated PCB having 5.4x2.4 cm2 area. This system demonstrates an impressive performance far better than the best performance achieved by any angular rate system developed at METU. Bias instability and angle random walk values are measured as 14.3 &ordm<br>/hr and 0.126 &ordm<br>/&amp<br>#8730<br>hr, respectively. The scale factor of the system is found as 22.2 mV/(&ordm<br>/sec) with a nonlinearity of 0.01%, and a zero rate output of 0.1 &ordm<br>/sec, in &plusmn<br>50 &ordm<br>/sec measurement range. CMOS unity gain buffer (UGB) and transimpedance amplifier (TIA) type resistive and capacitive interfaces are characterized through AC, transient, and noise tests. It is observed that on chip biasing mechanisms properly DC-bias the high impedance nodes to 0 V potential. UGB type capacitive interfaces demonstrate superior performance than TIA counterparts due to stability problems associated with TIA interfaces. CMOS differential drive mode control and sense mode demodulation electronics give promising results for the future performance tests.

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Kepenek, Reha. "Capacitive Cmos Readout Circuits For High Performance Mems Accelerometers." Master's thesis, METU, 2008. http://etd.lib.metu.edu.tr/upload/12609310/index.pdf.

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This thesis presents the development of high resolution, wide dynamic range sigma-delta type readout circuits for capacitive MEMS accelerometers. Designed readout circuit employs fully differential closed loop structure with digital output, achieving high oversampling ratio and high resolution. The simulations of the readout circuit together with the accelerometer sensor are performed using the models constructed in Cadence and Matlab Simulink environments. The simulations verified the stability and proper operation of the accelerometer system. The sigma-delta readout circuit is implemented using XFab 0.6 &micro<br>m CMOS process. Readout circuit is combined with Silicon-On-Glass (SOG) and Dissolved Wafer Process (DWP) accelerometers. Both open loop and closed loop tests of the accelerometer system are performed. Open loop test results showed high sensitivity up to 8.1 V/g and low noise level of 4.8 &micro<br>g/&amp<br>#61654<br>Hz. Closed loop circuit is implemented on a PCB together with the external filtering and decimation electronics, providing 16-bit digital output at 800 Hz sampling rate. High acceleration tests showed &plusmn<br>18.5 g of linear acceleration range with high linearity, using DWP accelerometers. The noise tests in closed loop mode are performed using Allan variance technique, by acquiring the digital data. Allan variance tests provided 86 &micro<br>g/&amp<br>#61654<br>Hz of noise level and 74 &micro<br>g of bias drift. Temperature sensitivity tests of the readout circuit in closed loop mode is also performed, which resulted in 44 mg/&ordm<br>C of temperature dependency. Two different types of new adaptive sigma-delta readout circuits are designed in order to improve the resolution of the systems by higher frequency operation. The two circuits both change the acceleration range of operation of the system, according to the level of acceleration. One of the adaptive circuits uses variation of feedback time, while the other circuit uses multi-bit feedback method. The simulation results showed micro-g level noise in closed loop mode without the addition of the mechanical noise of the sensor.

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Sahin, Emre. "High Performance Readout And Control Electronics For Mems Gyroscopes." Master's thesis, METU, 2009. http://etd.lib.metu.edu.tr/upload/2/12610386/index.pdf.

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This thesis reports the development of various high performance readout and control electronics for implementing angular rate sensing systems using MEMS gyroscopes developed at METU. First, three systems with open loop sensing mechanisms are implemented, where each system has a different drive-mode automatic gain controlled (AGC) self-oscillation loop approach, including (i) square wave driving signal with DC off-set named as OLS_SquD, (ii) sinusoidal driving signal with DC off-set named as OLS_SineD, and iii) off-resonance driving signal named as OLS_OffD. A forth system is also constructed with a closed loop sensing mechanism where the drive mode automatic gain controlled (AGC) self-oscillation loop approach with square wave driving signal with DC off-set named as CLS_SquD. Sense and drive mode electronics employ transimpedance and transresistance amplifiers as readout electronics, respectively. Each of the systems is implemented with commercial discrete components on a dedicated PCB. Then, the angular rate sensing systems are tested with SOG (Silicon-on-Glass) gyroscopes that are adjusted to have two different mechanical bandwidths, more specially 100 Hz and 30 Hz. Test results of all of these cases verify the high performance of the systems. For the 100 Hz bandwidth, the OLS_SquD system shows a bias instability of 4.67 &amp<br>#730<br>/hr, an angle random walk (ARW) 0.080 &amp<br>#730<br>/&amp<br>#8730<br>hr, and a scale factor of 22.6 mV/(&amp<br>#730<br>/sec). For the 30 Hz bandwidth, the OLS_SquD system shows a bias instability of 5.12 &amp<br>#730<br>/hr, an ARW better than 0.017 &amp<br>#730<br>/&amp<br>#8730<br>hr, and a scale factor of 49.8 mV/(&amp<br>#730<br>/sec). For the 100 Hz bandwidth, the OLS_SineD system shows a bias instability of 6.92 &amp<br>#730<br>/hr, an ARW of 0.049 &amp<br>#730<br>/&amp<br>#8730<br>hr, and a scale factor of 17.97 mV/(&amp<br>#730<br>/sec). For the 30 Hz bandwidth, the OLS_SineD system shows a bias instability of 4.51 &amp<br>#730<br>/hr, an ARW of 0.030 &amp<br>#730<br>/&amp<br>#8730<br>hr, and a scale factor of 43.24 mV/(&amp<br>#730<br>/sec). For the 100 Hz bandwidth, the OLS_OffD system shows a bias instability of 8.43 &amp<br>#730<br>/hr, an ARW of 0.086 &amp<br>#730<br>/&amp<br>#8730<br>hr, and a scale factor of 20.97 mV/(&amp<br>#730<br>/sec). For the 30 Hz bandwidth, the OLS_OffD system shows a bias instability of 5.72 &amp<br>#730<br>/hr, an ARW of 0.046 &amp<br>#730<br>/&amp<br>#8730<br>hr, and a scale factor of 47.26 mV/(&amp<br>#730<br>/sec). For the 100 Hz bandwidth, the CLS_SquD system shows a bias instability of 6.32 &amp<br>#730<br>/hr, an ARW of 0.055 &amp<br>#730<br>/&amp<br>#8730<br>hr, and a scale factor of 1.79 mV/(&amp<br>#730<br>/sec). For the 30 Hz bandwidth, the CLS_SquD system shows a bias instability of 5.42 &amp<br>#730<br>/hr, an ARW of 0.057 &amp<br>#730<br>/&amp<br>#8730<br>hr, and a scale factor of 1.98 mV/(&amp<br>#730<br>/sec). For the 100 Hz bandwidth, the R2 nonlinearities of the measured scale factors of all systems are between 0.0001% and 0.0003% in the &plusmn<br>100 &amp<br>#730<br>/sec measurement range, while for the 30 Hz bandwidth the R2 nonlinearities are between 0.0002% and 0.0062% in the &plusmn<br>80&amp<br>#730<br>/sec measurement range. These performance results are the best results obtained at METU, satisfying the tactical-grade performances, and the measured bias instabilities and ARWs are comparable to the best results in the literature for a silicon micromachined vibratory gyroscope.

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Liu, Chi-Yun, and 劉其昀. "Piezoelectric Energy Harvesting Interface Circuit and Molecular Readout Circuit for Biomedical Micro Systems." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/93812999600874476940.

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碩士<br>國立臺灣大學<br>電子工程學研究所<br>102<br>This thesis consists of two parts. The first part implements a low input voltage piezoelectric (PZT) energy harvesting interface circuit. To lower the input voltage range, the negative voltage converter (NVC) with Schottky diode is implemented. The startup boost converter is also implemented to supply the power of the digital controller. The adaptive pulse width detector (PWD) is proposed to find the optimal turn-on time of the switches when input ac current of PZT harvester is approaching to zero. In addition, the adaptive zero-crossing detector is proposed for a DC-DC converter to reduce the power loss while the inductor is switching. The whole circuit can convert an input voltage from 0.6V~2V to realize a stable output voltage 1V. The circuit is implemented in TSMC 0.18um CMOS process. The second part is talking an interface circuit with digital output for acute myocardial infraction diagnosis. The low frequency transimpedance amplifier is implemented to convert the current signal from sensor to voltage signal under different bio-molecular concentration. Then, the voltage signal is converted to digital code which is proportional to different concentration. The sensor with its interface circuit can distinguish different bio-molecular concentration successfully; the expensive equipments are not needed in hospitals. When cTnI is used for bio-molecular target, the interface circuit can cover its concentration from 320fM~3.2nM. NT-proBNP is used for bio-molecular target, the interface circuit can cover its concentration from 320fM~32nM. The circuit is implemented in TSMC 0.18um CMOS process.

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"A Low Cost, High Dynamic Range, Versatile Digital Readout Integrated Circuit Unit Cell Prototype for Infrared Imaging Applications." Master's thesis, 2019. http://hdl.handle.net/2286/R.I.55602.

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abstract: Readout Integrated Circuits(ROICs) are important components of infrared(IR) imag ing systems. Performance of ROICs aﬀect the quality of images obtained from IR imaging systems. Contemporary infrared imaging applications demand ROICs that can support large dynamic range, high frame rate, high output data rate, at low cost, size and power. Some of these applications are military surveillance, remote sensing in space and earth science missions and medical diagnosis. This work focuses on developing a ROIC unit cell prototype for National Aeronautics and Space Ad ministration(NASA), Jet Propulsion Laboratory’s(JPL’s) space applications. These space applications also demand high sensitivity, longer integration times(large well capacity), wide operating temperature range, wide input current range and immunity to radiation events such as Single Event Latchup(SEL). This work proposes a digital ROIC(DROIC) unit cell prototype of 30ux30u size, to be used mainly with NASA JPL’s High Operating Temperature Barrier Infrared Detectors(HOT BIRDs). Current state of the art DROICs achieve a dynamic range of 16 bits using advanced 65-90nm CMOS processes which adds a lot of cost overhead. The DROIC pixel proposed in this work uses a low cost 180nm CMOS process and supports a dynamic range of 20 bits operating at a low frame rate of 100 frames per second(fps), and a dynamic range of 12 bits operating at a high frame rate of 5kfps. The total electron well capacity of this DROIC pixel is 1.27 billion electrons, enabling integration times as long as 10ms, to achieve better dynamic range. The DROIC unit cell uses an in-pixel 12-bit coarse ADC and an external 8-bit DAC based ﬁne ADC. The proposed DROIC uses layout techniques that make it immune to radiation up to 300krad(Si) of total ionizing dose(TID) and single event latch-up(SEL). It also has a wide input current range from 10pA to 1uA and supports detectors operating from Short-wave infrared (SWIR) to longwave infrared (LWIR) regions.<br>Dissertation/Thesis<br>Masters Thesis Electrical Engineering 2019

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Sun, Shu-Jen, and 孫樹仁. "Study on Image Interface Circuit Design and Realization for FPA Readout Chip." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/9he8kp.

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碩士<br>國立暨南國際大學<br>光電科技碩士學位學程在職專班<br>102<br>In this thesis, it mainly researches the image interface design of readout circuit of array sensors. The research is between video capture interface board and clock signals by image interface design of 320x256 arrays to build design procedure and measure important related parameters. The results of experimental image interface have got a more accurate the clock signal and resolution. A 640x512 array of image interface produces and designs by using measured data form 320x256 array of interface board. The validation of data is analysis and calculation. Then, test to make cross comparison of data to verify the video signal capture and the relationship between clock signals. According to tested result of the 320x256 arrays and array 640x512, the universal image interface board will be design. It reduces the cost of manufacture, and let the universal image interface board have many applications to be used in a variety of different sensors. This design is feasibility and achieve image interface board with diligent.

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Conference papers on the topic "Readout interface circuit (ROIC)"

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Ralota, Maria Sophia C., Arcel G. Leynes, and Maria Theresa G. De Leon. "A 9-bit 2MS/s Set-and-Down Monotonic SAR ADC in 22nm-FDSOI for MEMS-based Thermoelectric Sensor Readout Interface Circuit." In 2023 IEEE Asia Pacific Conference On Postgraduate Research In Microelectronics And Electronics (PRIMEAsia). IEEE, 2023. http://dx.doi.org/10.1109/primeasia60757.2023.00011.

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Xu, Gaowei, Qiuping Huang, Yuan Yuan, Xiao Chen, and Le Luo. "Development of flip-chip interconnections of photodetector readout circuit (ROIC)." In High Density Packaging (ICEPT-HDP). IEEE, 2010. http://dx.doi.org/10.1109/icept.2010.5582375.

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Xu, Jiawei Friedrich, Glauco Rogerio Cugler Fiorante, Payman Zarkesh-Ha, and Sanjay Krishna. "A Readout Integrated Circuit (ROIC) with hybrid source/sensor array." In 2011 IEEE Photonics Conference (IPC). IEEE, 2011. http://dx.doi.org/10.1109/pho.2011.6110443.

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Singh, Nidhi, and Vandana Niranjan. "Improving the Noise Performance of ROIC Interface Circuit." In 2020 International Conference on Emerging Trends in Communication, Control and Computing (ICONC3). IEEE, 2020. http://dx.doi.org/10.1109/iconc345789.2020.9117471.

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Hao, Li-chao, Rui-jun Ding, Ai-bo Huang, Hong-lei Chen, Chun Zhou, and Pan Wang. "A high performance readout circuit (ROIC) with BDI structure for SWIR FPAs." In International Symposium on Photoelectronic Detection and Imaging 2011. SPIE, 2011. http://dx.doi.org/10.1117/12.899599.

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Liu, Dan. "Low power design of column readout stage for large format IR ROIC." In 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT). IEEE, 2008. http://dx.doi.org/10.1109/icsict.2008.4734912.

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Lee, MyungLae, SungSik Lee, SungHae Jung, ChangHan Je, Gunn Hwang, and ChangAuck Choi. "Design, Fabrication, and Characterization of a Readout Integrated Circuit (ROIC) for Capacitive MEMS Sensors." In 2007 IEEE Sensors. IEEE, 2007. http://dx.doi.org/10.1109/icsens.2007.4388386.

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Hao, Li-chao, Rui-jun Ding, Jun-ling Zhang, Ai-bo Huang, and Hong-lei Chen. "A high-performance readout circuit (ROIC) for VLWIR FPAs with novel current mode background suppression." In 2012 International Conference on Measurement, Information and Control (MIC). IEEE, 2012. http://dx.doi.org/10.1109/mic.2012.6273425.

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Sun, Weifeng, Yanqiu Lv, Qi Liu, Yongbian Kuang, and Jinchun Wang. "Design of flexible small pixel readout integrated circuit (ROIC) with high input charge handling ability." In Optical Sensing and Imaging Technology and Application, edited by Dong Liu, Haimei Gong, Mircea Guina, and Jin Lu. SPIE, 2018. http://dx.doi.org/10.1117/12.2502045.

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Lee, Sungsik, Myunglae Lee, Sunghae Jung, et al. "A Bidirectional Readout Integrated Circuit (ROIC) with Capacitance-to-Time Conversion Operation for High Performance Capacitive MEMS Accelerometers." In 2007 IEEE Sensors. IEEE, 2007. http://dx.doi.org/10.1109/icsens.2007.4388393.

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