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1
ZHAO, HONGLIANG, YIQIANG ZHAO, YIWEI SONG, JUN LIAO, and JUNFENG GENG. "A LOW POWER CRYOGENIC CMOS ROIC DESIGN FOR 512 × 512 IRFPA." Journal of Circuits, Systems and Computers 22, no. 10 (2013): 1340033. http://dx.doi.org/10.1142/s0218126613400331.
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A low power readout integrated circuit (ROIC) for 512 × 512 cooled infrared focal plane array (IRFPA) is presented. A capacitive trans-impedance amplifier (CTIA) with high gain cascode amplifier and inherent correlated double sampling (CDS) configuration is employed to achieve a high performance readout interface for the IRFPA with a pixel size of 30 × 30 μm2. By optimizing column readout timing and using two operating modes in column amplifiers, the power consumption is significantly reduced. The readout chip is implemented in a standard 0.35 μm 2P4M CMOS technology. The measurement results show the proposed ROIC achieves a readout rate of 10 MHz with 70 mW power consumption under 3.3 V supply voltage from 77 K to 150 K operating temperature. And it occupies a chip area of 18.4 × 17.5 mm2.
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Zhou, Tong, Tao Dong, Yan Su, and Yong He. "A High Uniformity Readout Integrated Circuit for Infrared Focal Plane Array Applications." Applied Mechanics and Materials 602-605 (August 2014): 2632–36. http://dx.doi.org/10.4028/www.scientific.net/amm.602-605.2632.
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Infrared focal plane arrays (IRFPA) suffer from inherent low frequency and fixed patter noise (FPN). To achieve high quality infrared image by mitigating the FPN of IRFPAs, a novel low-noise and high uniformity readout integrated circuit (ROIC) has been proposed. A correlated double sampling (CDS) with single capacitor method has been adopted in the ROIC design which can effectively reduce the FPN, KTC and 1/f noise. A 4×4 experimental readout chip has been designed and fabricated using the SMIC 0.18 μm CMOS process. Both the function and performance of the proposed readout circuit have been verified by experimental results. The test results show that the proposed ROIC has a good performance in practical applications.
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Dan, Liu, Gao Feng, and Jin Chuan. "Test of 32-Channel X-Ray Readout Integrated Circuit." Advanced Materials Research 718-720 (July 2013): 1100–1103. http://dx.doi.org/10.4028/www.scientific.net/amr.718-720.1100.
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The test method of 32 channel X-ray readout integrated circuit (ROIC) has been proposed in this paper. Large resistors and a voltage source with high accuracy are used to generate 32 channels of weak currents, which are injected into the ROIC. Some key parameters of ROIC such as linearity, uniformity, cross talk, dynamic range have been tested. This method helps to test ROICs performance and does not need any photodiode and any laser light, which is convenient and easy to be realized.
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Guo, Zhongjie, Bin Wang, Suiyang Liu, Ruiming Xu, and Ningmei Yu. "High-Linearity and High-Speed ROIC of Ultra-Large Array Infrared Detectors Based on Adaptive Compensation and Enhancement." Sensors 23, no. 12 (2023): 5667. http://dx.doi.org/10.3390/s23125667.
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In order to solve the problem of limited linearity and frame rate in the large array infrared (IR) readout integrated circuit (ROIC), a high-linearity and high-speed readout method based on adaptive offset compensation and alternating current (AC) enhancement is proposed in this paper. The efficient correlated double sampling (CDS) method in pixels is used to optimize the noise characteristics of the ROIC and output CDS voltage to the column bus. An AC enhancement method is proposed to quickly establish the column bus signal, and an adaptive offset compensation method is used at the column bus terminal to eliminate the nonlinearity caused by the pixel source follower (SF). Based on the 55 nm process, the proposed method is comprehensively verified in an 8192 × 8192 IR ROIC. The results show that, compared with the traditional readout circuit, the output swing is increased from 2 V to 3.3 V, and the full well capacity is increased from 4.3 Me- to 6 Me-. The row time of the ROIC is reduced from 20 µs to 2 µs, and the linearity is improved from 96.9% to 99.98%. The overall power consumption of the chip is 1.6 W, and the single-column power consumption of the readout optimization circuit is 33 μW in the accelerated readout mode and 16.5 μW in the nonlinear correction mode.
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Mu, Yusong, Zilong Zhao, Chong Chen, et al. "The Design of a Low-Noise, High-Speed Readout-Integrated Circuit for Infrared Focal Plane Arrays." Sensors 23, no. 21 (2023): 8715. http://dx.doi.org/10.3390/s23218715.
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This paper describes the design of a low-noise, high-speed readout-integrated circuit for use in InGaAs infrared focal plane arrays, and analyzes the working principle and noise index of the pixel circuit in detail. The design fully considers the dynamic range, noise, and power consumption of the pixel circuit in which a capacitance transimpedance amplifier structure is adopted as the input stage circuit, and chip fabrication via an XFAB 0.18 µm CMOS process is successfully realized. The ROIC adopts monolithic integration and implements various functions, such as windowing, subsampling, and different integration and readout modes. The ROIC reached an array scale of 32 × 32, a frame rate of 100 Hz, and a readout rate of 20 Mbps with an analog power consumption of less than 52 mW. The measurement results show that the input reference noise can be reduced to 143 e- via the CDS, and the fully customized scheme has certain advantages in the research of high-performance ROICs.
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Lu, Fei Bao, Guo Lin Lu, You Shu Huang, and Xiang Hui Yuan. "Readout Circuit for Uncooled Pyroelectric IRFPA." Applied Mechanics and Materials 84-85 (August 2011): 284–88. http://dx.doi.org/10.4028/www.scientific.net/amm.84-85.284.
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A 320×240 readout circuit (ROIC) for the uncooled pyroelectric infrared detector was fabricated in the double-poly-double-metal (DPDM) N-well CMOS technology. Composed of X- and Y-shift register, column amplifier and correlated double sampling (CDS) circuit, the readout circuit integrated signal from the detector for frame time. It has the pitch of 50um and power dissipation of less than 50 mW. The circuit configuration, operation and testing result are described. Testing result indicates that the designed circuit meets with the requirement. Thermal images were obtained by the hybrid-integrated sensing array.
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Lee, Seungjun, Joohwan Jin, Jihyun Baek, Juyong Lee, and Hyungil Chae. "Readout Integrated Circuit for Small-Sized and Low-Power Gas Sensor Based on HEMT Device." Sensors 21, no. 16 (2021): 5637. http://dx.doi.org/10.3390/s21165637.
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This paper presents a small-sized, low-power gas sensor system combining a high-electron-mobility transistor (HEMT) device and readout integrated circuit (ROIC). Using a semiconductor-based HEMT as a gas-sensing device, it is possible to secure high sensitivity, reduced complexity, low power, and small size of the ROIC sensor system. Unlike existing gas sensors comprising only HEMT elements, the proposed sensor system has both an ROIC and a digital controller and can control sensor operation through a simple calibration process with digital signal processing while maintaining constant performance despite variations. The ROIC mainly consists of a transimpedance amplifier (TIA), a negative-voltage generator, and an analog-to-digital converter (ADC) and is designed to match a minimum target detection unit of 1 ppm for hydrogen. The prototype ROIC for the HEMT presented herein was implemented in a 0.18 µm complementary metal–oxide–semiconductor (CMOS) process. The total measured power consumption and detection unit of the proposed ROIC for hydrogen gas were 3.1 mW and 2.6 ppm, respectively.
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Kwon, Soon-Kyu, and Hyeon-June Kim. "A Dynamic Range Preservation Readout Integrated Circuit for Multi-Gas Sensor Array Applications." Chemosensors 12, no. 4 (2024): 60. http://dx.doi.org/10.3390/chemosensors12040060.
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This study introduces a readout integrated circuit (ROIC) tailored for multi-gas sensor arrays featuring a proposed baseline calibration scheme aimed at mitigating the issue of sensor baseline variation. Unlike previous approaches, the proposed scheme stores each sensor’s baseline value and dynamically updates the signal extraction range accordingly during ROIC operation. This adjustment allows for the optimal use of the ROIC’s dynamic range, enhancing sensor uniformity and accuracy without the need for complex additional circuitry or advanced post-processing algorithms. We fabricated a prototype ROIC using a 180 nm CMOS process, achieving a low power consumption of 0.43 mW and a conversion rate of 50 kSPS. The prototype boasts an integrated noise level of 9.9 μVRMS across a frequency range of 0.1 Hz to 5 kHz and a dynamic range of 142.6 dB, coupled with superior linearity, indicated by a maximum integral non-linearity (INL) of −75.71 dB. This design significantly reduces sensor offset scattering to within 1 LSB of the A/D reference scale. In this study, the efficacy of the proposed scheme was validated using Figaro TGS-2600. The ROIC targets a sensitivity range from 0.54 to 0.23 for gas concentrations ranging from 5 ppm to 20 ppm and a resolution of 39 Ω for sensor resistance range from 10 kΩ to 90 kΩ. The enhancements in performance make the proposed ROIC a promising solution for precise gas concentration detection in sensor applications.
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Jankowski, Mariusz, Michał Szermer, Piotr Zając, et al. "An Experimental Investigation of Noise Sources’ Contribution in the Multi-Chip Module Open-Loop Comb-Drive Capacitive MEMS Accelerometer." Electronics 13, no. 13 (2024): 2599. http://dx.doi.org/10.3390/electronics13132599.
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The paper presents the noise analysis of a MEMS and ASIC readout integrated circuit (ROIC) constituting the accelerometer developed in the frame of the InnoReh project, aiming at the development of methods for monitoring patients with imbalance disorders. Several experiments were performed at different temperatures and in different configurations: ROIC alone, ROIC with emulated parasitic capacitances, MEMS and ROIC in separate packages, and MEMS and ROIC in a single package. Many noise/interference sources were considered. The results obtained experimentally were compared to the results of theoretical investigations and were within the same order of magnitude, although in practice, the observed noise was always greater than the theoretical estimation. The paper also includes an in-depth analysis to explain these differences. Moreover, it is argued that, in terms of noise, the MEMS sensing element, and not the ROIC, is the quality-limiting factor.
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Yao, Shaopeng, Qiang Shan, Jinjin Xiao, Zihui Wei, and Shuilong Huang. "Enhanced Linearity in Intracranial Pressure Monitoring System Through Sample Isolation Bridge ROIC." Applied Sciences 15, no. 6 (2025): 3008. https://doi.org/10.3390/app15063008.
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This study presents a sample isolation bridge readout integrated circuit (ROIC) specifically designed for intracranial pressure (ICP) monitoring systems. The ROIC consists of an instrumentation amplifier (IA) and a successive approximation register (SAR) analog-to-digital converter (ADC). Additionally, the output of the IA is isolated to protect against output spikes that could compromise the linearity and stability of the ROIC. Both traditional and proposed ROIC circuits are fabricated using 0.18 µm complementary metal-oxide-semiconductor (CMOS) technology. The peak signal-to-noise ratio (SNR) for the traditional ROIC is 40.9 dB, while the peak signal-to-noise and distortion ratio (SNDR) is measured at 40.1 dB. In contrast, the proposed ROIC, which incorporates the SAR ADC, achieves a peak SNR of 54.6 dB and a peak SNDR of 51.8 dB, demonstrating a significant improvement in linearity. The new ROIC consumes 39.5 µA of current from a 1.8 V power supply and occupies a chip core area of only 0.27 mm2.
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Wang, Xiao, Zelin Shi, and Baoshu Xu. "A Modularized Noise Analysis Method with Its Application in Readout Circuit Design." VLSI Design 2015 (September 9, 2015): 1–10. http://dx.doi.org/10.1155/2015/593019.
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A readout integrated circuit (ROIC) is a crucial part that determines the quality of imaging. In order to analyze the noise of a ROIC with distinct illustration of each noise source transferring, a modularized noise analysis method is proposed whose application is applied for a ROIC cell, where all the MOSFETs are optimized in subthreshold region, leading to the power dissipation 2.8 μW. The modularized noise analysis begins with the noise model built using transfer functions and afterwards presents the transfer process of noise in the form of matrix, through which we can describe the contribution of each noise source to the whole output noise clearly, besides optimizing the values of key components. The optimal noise performance is obtained under the limitation of layout area less than 30 μm × 30 μm, resulting in that the integration capacitor should be selected as 0.74 pF to achieve an optimal noise performance, the whole output noise reaching the minimum value at 74.1 μV. In the end transient simulations utilizing Verilog-A are carried out for comparisons. The results showing good agreement verify the feasibility of the method presented through matrix.
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Zhang, S. H., M. J. Wang, and Fang Min Guo. "Weak-Light Readout Collection on the Quantum Effect Photoelectric Sensor." Advanced Materials Research 465 (February 2012): 296–99. http://dx.doi.org/10.4028/www.scientific.net/amr.465.296.
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The weak-light characteristics of the GaAs/InGaAs quantum effect photoelectric sensor are presented. In order to explore its higher sensitive application because of higher quantum efficiency, a readout integrated circuit (ROIC) of the capacitor feedback transimpendance amplifier (CTIA) was designed to deal with voltage response of novel sensor. The readout circuit integration was designed to match 2×8 the photoelectric sensor array. A 633nm laser beam shot to the window of sensor with radiation intensity 2nW the readout response voltage was 225mV and 4.5E +07V /W responsivity at 120K and 44.8μs integration time when biased voltage up to -3V. Even under 0.5nw shooting,we still can see the high sensitivity.
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Zhang, Xiaoling, Qingduan Meng, and Liwen Zhang. "Dependence of the Deformation of 128×128 InSb Focal-plane Arrays on the Silicon Readout Integrated Circuit Thickness." Open Electrical & Electronic Engineering Journal 9, no. 1 (2015): 170–74. http://dx.doi.org/10.2174/1874129001509010170.
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The square checkerboard buckling deformation appearing in indium antimonide infrared focal-plane arrays (InSb IRFPAs) subjected to the thermal shock tests, results in the fracturing of the InSb chip, which restricts its final yield. In light of the proposed three-dimensional modeling, we proposed the method of thinning a silicon readout integrated circuit (ROIC) to level the uneven top surface of InSb IRFPAs. Simulation results show that when the silicon ROIC is thinned from 300 μm to 20 μm, the maximal displacement in the InSb IRFPAs linearly decreases from 7.115 μm to 0.670 μm in the upward direction, and also decreases linearly from 14.013 μm to 1.612 μm in the downward direction. Once the thickness of the silicon ROIC is less than 50 μm, the square checkerboard buckling deformation distribution presenting in the thicker InSb IRFPAs disappears, and the top surface of the InSb IRFPAs becomes flat. All these findings imply that the thickness of the silicon ROIC determines the degree of deformation in the InSb IRFPAs under a thermal shock test, that the method of thinning a silicon ROIC is suitable for decreasing the fracture probability of the InSb chip, and that this approach improves the reliability of InSb IRFPAs.
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Zhang, Jia Yin, Tao Dong, Kai Ying Wang, Yan Su, and Yong He. "Infrared Biosensor Test System under Pulsed Bias Voltage." Applied Mechanics and Materials 411-414 (September 2013): 1539–45. http://dx.doi.org/10.4028/www.scientific.net/amm.411-414.1539.
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Infrared biosensor has been a hot area of research for several years in infrared field. This paper proposes a method to test infrared biosensor array which is not bonding with ROIC. The presented ROIC-less infrared biosensor is encapsulated in a vacuum chip scale packaging, and we design the off-chip “ROIC” in order to read out signal of infrared biosensor. It is necessary to apply bias voltage on pixels when infrared biosensor works, we gave a simulation of infrared biosensor in pulsed bias votage mode according to the infrared biosensor heat balance equation. Based on the simulation result, we have implemented the test system for ROIC-less and small-scale infrared biosensor array. We use FPGA as main controller to readout the infrared signal and transfer the data to PC via USB interface.
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Artola, Laurent, Ahmad Youssef, Samuel Ducret, et al. "Update of Single Event Effects Radiation Hardness Assurance of Readout Integrated Circuit of Infrared Image Sensors at Cryogenic Temperature." Sensors 18, no. 7 (2018): 2338. http://dx.doi.org/10.3390/s18072338.
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This paper review presents Single Event Effects (SEE) irradiation tests under heavy ions of the test-chip of D-Flip-Flop (DFF) cells and complete readout integrated circuits (ROIC) as a function of temperature, down to 50 K. The analyses of the experimental data are completed using the SEE prediction tool MUSCA SEP3. The conclusions derived from the experimental measurements and related analyses allow to update the current SEE radiation hardness assurance (RHA) for readout integrated circuits of infrared image sensors used at cryogenic temperatures. The current RHA update is performed on SEE irradiation tests at room temperature, as opposed to the operational cryogenic temperature. These tests include SET (Single Event Transient), SEU (Single Event Upset) and SEFI (Single Event Functional Interrupt) irradiation tests. This update allows for reducing the cost of ROIC qualifications and the test setup complexity for each space mission.
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Ye, Mao, Gongyuan Zhao, Yao Li, and Yiqiang Zhao. "An Analog-Front ROIC with On-Chip Non-Uniformity Compensation for Diode-Based Infrared Image Sensors." Sensors 19, no. 2 (2019): 298. http://dx.doi.org/10.3390/s19020298.
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This paper proposes a CMOS front-end readout-integrated circuit (ROIC) with on-chip non-uniformity compensation technique for a diode-based uncooled infrared image sensor. Two techniques are adopted to achieve on-chip non-uniformity compensation: a reference dummy metal line is introduced to alleviate the dominant non-uniformity with IR-drop presented in large pixel array, and a current splitting architecture-based variable current source for diode bias is proposed to compensate other residual non-uniformity. A differential integrator is chosen as the main amplifier of readout circuit for its superior noise performance. For low power design, a pulse-powered row buffer is designed in this work. The proposed ROIC for 384 × 288 diode-based detector array is fabricated with a 0.35- μ m CMOS process. It occupies an area of 4.4 mm × 15 mm, and the power consumption is 180 mW. The measured result shows that with the proposed on-chip non-uniformity compensation, the output voltage variation is greatly reduced from 2.5 V to 60 mV.
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ZHANG, YAJING, WENGAO LU, GUANNAN WANG, ZHONGJIAN CHEN, and YACONG ZHANG. "A LOW POWER HIGH RESOLUTION ROIC DESIGN WITH 14-BIT COLUMN-LEVEL ADC FOR 384 × 288 IRFPA." Journal of Circuits, Systems and Computers 22, no. 09 (2013): 1340015. http://dx.doi.org/10.1142/s021812661340015x.
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A readout integrated circuit (ROIC) of infrared focal plane array (IRFPA) with low power and low noise is presented in this paper. It consists of a 384 × 288 pixel array and column-level A/D conversion circuits. The proposed system has high resolution because of the odd–even Analog to Digital Conversion (ADC) structure, containing correlated switches design, multi-Vth amplifier design and high speed high resolution comparator design including latch-stage. Designed and simulated in 0.35-μm CMOS process, this high performance ROIC achieves 81.24 dB SNR at 8.64 KS/s consuming 98 mW under 5 V voltage supply, resulting in an ENOB of 13.2-bit.
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Zhou, Ye, Wengao Lu, Shanzhe Yu, Dunshan Yu, Yacong Zhang, and Zhongjian Chen. "A Low Power ROIC with Extended Counting ADC Based on Circuit Noise Analysis for Sensor Arrays in IoT System." Journal of Sensors 2022 (October 3, 2022): 1–12. http://dx.doi.org/10.1155/2022/5304613.
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As the Internet of Things (IoT) is rapidly integrated into our daily life, the demand for high performance readout integrated circuit (ROIC) design for sensor arrays is boosting. This paper presents a low power, low noise ROIC with 14-bit column-parallel extended counting (EC) ADCs for sensor arrays targeting the IoT applications. The proposed EC-ADC adopts a pseudodifferential architecture to cancel even-order nonlinearity. The analog front-end is a G m stage, which employs a current-reuse topology to boost the transconductance and reduce noise without increasing current consumption. The upper 9-bit conversion is implemented during integration, and the residual voltage is converted by a 5-bit single-slope (SS) ADC, where the comparator is reused. A ping-pong integrator is proposed to reduce the reset time and improve linearity, eliminating the power-hungry CTIA structure. The ROIC is designed in 0.18 μm 1P5M CMOS process for a 640 × 480 sensor array. Power consumption of the ROIC is 33 mW, and each column ADC consumes 40.1 μW. Simulation results show an input-referred noise of 0.89 LSB (1.74 μVrms), an integral nonlinearity of +0.92/-0.70 LSB, an ENOB of 12.87 bits, and a FoM of 131.1 fJ/step.
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Ren, Shengle, Mingyuan Ren, and Honghai Xu. "A Readout Circuit for MEMS Gas Sensor." Micromachines 14, no. 1 (2023): 150. http://dx.doi.org/10.3390/mi14010150.
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In recent years, the application of gas sensors is becoming more and more extensive. Driven by potential applications such as the Internet of Things, its technology development direction begins with miniaturization, integration, modularization, and intelligence. However, there is a bottleneck in the research of interface circuits, which restricts the development of gas sensors in volume, power consumption, and intelligence. To solve this problem, a MEMS gas sensor interface circuit based on ADC technology is proposed in this paper. Under the condition of the Huahong 110 nm process, the working voltage is 3.3 V, the resistance change of 100 Ω~1 MΩ can be detected, the conversion error is in the range of 0.5~1%, and the maximum power consumption is 986 μW. The overall layout area is 0.49 × 0.77 mm2. Finally, the correctness of the circuit function is verified by post-layout simulation.
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Arbet, Daniel, Viera Stopjaková, Martin Kovác, Lukás Nagy, and Gabriel Nagy. "Design of CMOS readout frontend circuit for MEMS capacitive microphones." Facta universitatis - series: Electronics and Energetics 28, no. 2 (2015): 263–74. http://dx.doi.org/10.2298/fuee1502263a.
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This paper deals with a frontend part of the readout circuit developed as an integrated circuit that after bonding together with a MEMS capacitive microphone (MCM) chip will be used in a noise dosimeter applicable in very noisy and harsh environment, e.g. mine. Therefore, the main attention has been paid to the high dynamic range, low offset and low noise of the developed readout interface as well as its low-power consumption feature. For conversion of the MCM?s capacitance variation into voltage, an approach based on the buffered input conversion stage biased by a voltage divider was used. The advantage of this approach is that the voltage divider formed by MOS transistors can be connected to the high-impedance node (i.e. the output of the MCM, in this case). The whole frontend part of the readout interface was designed in a standard 0.35mm CMOS technology. Finally, the achieved results are discussed and compared to other works.
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Arbet, Daniel, Viera Stopjaková, Martin Kováč, Lukáš Nagy, and Gabriel Nagy. "Design of CMOS readout frontend circuit for MEMS capacitive microphones." Facta universitatis - series: Electronics and Energetics 28, no. 2 (2015): 263–74. https://doi.org/10.2298/FUEE1502263A.
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This paper deals with a frontend part of the readout circuit developed as an integrated circuit that after bonding together with a MEMS capacitive microphone (MCM) chip will be used in a noise dosimeter applicable in very noisy and harsh environment, e.g. mine. Therefore, the main attention has been paid to the high dynamic range, low offset and low noise of the developed readout interface as well as its low- power consumption feature. For conversion of the MCM’s capacitance variation into voltage, an approach based on the buffered input conversion stage biased by a voltage divider was used. The advantage of this approach is that the voltage divider formed by MOS transistors can be connected to the high-impedance node (i.e. the output of the MCM, in this case). The whole frontend part of the readout interface was designed in a standard 0.35mm CMOS technology. Finally, the achieved results are discussed and compared to other works.
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Würfel, D., and H. Vogt. "An improved electrical and thermal model of a microbolometer for electronic circuit simulation." Advances in Radio Science 10 (September 18, 2012): 183–86. http://dx.doi.org/10.5194/ars-10-183-2012.
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Abstract. The need for uncooled infrared focal plane arrays (IRFPA) for imaging systems has increased since the beginning of the nineties. Examples for the application of IRFPAs are thermography, pedestrian detection for automotives, fire fighting, and infrared spectroscopy. It is very important to have a correct electro-optical model for the simulation of the microbolometer during the development of the readout integrated circuit (ROIC) used for IRFPAs. The microbolometer as the sensing element absorbs infrared radiation which leads to a change of its temperature due to a very good thermal insulation. In conjunction with a high temperature coefficient of resistance (TCR) of the sensing material (typical vanadium oxide or amorphous silicon) this temperature change results in a change of the electrical resistance. During readout, electrical power is dissipated in the microbolometer, which increases the temperature continuously. The standard model for the electro-optical simulation of a microbolometer includes the radiation emitted by an observed blackbody, radiation emitted by the substrate, radiation emitted by the microbolometer itself to the surrounding, a heat loss through the legs which connect the microbolometer electrically and mechanically to the substrate, and the electrical power dissipation during readout of the microbolometer (Wood, 1997). The improved model presented in this paper takes a closer look on additional radiation effects in a real IR camera system, for example the radiation emitted by the casing and the lens. The proposed model will consider that some parts of the radiation that is reflected from the casing and the substrate is also absorbed by the microbolometer. Finally, the proposed model will include that some fraction of the radiation is transmitted through the microbolometer at first and then absorbed after the reflection at the surface of the substrate. Compared to the standard model temperature and resistance of the microbolometer can be modelled more realistically when these higher order effects are taken into account. A Verilog-A model for electronic circuit simulations is developed based on the improved thermal model of the microbolometer. Finally, a simulation result of a simple circuit is presented.
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Kim, Jong Pal. "Sound Activity Monitor Circuit for Low Power Consumption of Always-On Microphone Applications." Applied Sciences 12, no. 23 (2022): 11947. http://dx.doi.org/10.3390/app122311947.
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A novel sound activity monitor (SAM) circuit for low power consumption of always-on microphone applications is presented. To reduce average power consumption, the ultra-low-power SAM is essential and operates a readout integrated circuit (ROIC) in low power mode with silent input or in normal power mode with voice input. A novel SAM with an architecture that does not include an envelope detector is proposed to achieve low power consumption. A new architecture is also proposed to improve MEMS sensitivity by connecting the SAM input to the source follower (SF) output instead of connecting the SAM input to the MEMS port already connected to the SF. In addition, in order to prevent inefficient frequent operation mode conversion, a feature of delaying the transition to the low-power mode after the sound is silenced is implemented. The proposed architecture is designed and verified based on the standard 0.18 µm CMOS process. The SAM, which consists of two-stage amplifiers (OA, AMP2), comparators, and a logic circuit, consumes a 1 µA current. The analog path consisting of SF, OA, and AMP2 in low power mode has a maximum amplification gain of 63 dB and a noise of 72 nVrms/√Hz at 1 kHz.
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Zhou, Tong, Jian Zhao, Yong He, Bo Jiang, and Yan Su. "A Readout Integrated Circuit (ROIC) employing self-adaptive background current compensation technique for Infrared Focal Plane Array (IRFPA)." Infrared Physics & Technology 90 (May 2018): 122–32. http://dx.doi.org/10.1016/j.infrared.2018.03.001.
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Moisello, Elisabetta, Michele Vaiana, Maria Eloisa Castagna, Giuseppe Bruno, Piero Malcovati, and Edoardo Bonizzoni. "An Integrated Thermopile-Based Sensor with a Chopper-Stabilized Interface Circuit for Presence Detection." Sensors 19, no. 18 (2019): 3999. http://dx.doi.org/10.3390/s19183999.
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This paper presents a sensor-readout circuit system suitable for presence detection. The sensor consists of a miniaturized polysilicon thermopile, realized employing MEMS micromachining by STMicroelectronics, featuring a responsivity value equal to 180 V/W, with 13 ms response time. The readout circuit is implemented in a standard 130-nm CMOS process. As the sensor output signal behaves substantially as a DC, the interface circuit employs the chopper technique in order to minimize offset and noise contributions at low frequency, achieving a measured input referred offset standard deviation equal to 1.36 μ V. Measurements show that the presented system allows successfully detecting the presence of a person in a room standing at 5.5 m from the sensor. Furthermore, the correct operation of the system with moving targets, considering people either walking or running, was also demonstrated.
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Elsobky, Mourad, Yigit Mahsereci, Jürgen Keck, Harald Richter, and Joachim N. Burghartz. "Design of a CMOS readout circuit on ultra-thin flexible silicon chip for printed strain gauges." Advances in Radio Science 15 (September 21, 2017): 123–30. http://dx.doi.org/10.5194/ars-15-123-2017.
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Abstract. Flexible electronics represents an emerging technology with features enabling several new applications such as wearable electronics and bendable displays. Precise and high-performance sensors readout chips are crucial for high quality flexible electronic products. In this work, the design of a CMOS readout circuit for an array of printed strain gauges is presented. The ultra-thin readout chip and the printed sensors are combined on a thin Benzocyclobutene/Polyimide (BCB/PI) substrate to form a Hybrid System-in-Foil (HySiF), which is used as an electronic skin for robotic applications. Each strain gauge utilizes a Wheatstone bridge circuit, where four Aerosol Jet® printed meander-shaped resistors form a full-bridge topology. The readout chip amplifies the output voltage difference (about 5 mV full-scale swing) of the strain gauge. One challenge during the sensor interface circuit design is to compensate for the relatively large dc offset (about 30 mV at 1 mA) in the bridge output voltage so that the amplified signal span matches the input range of an analog-to-digital converter (ADC). The circuit design uses the 0. 5 µm mixed-signal GATEFORESTTM technology. In order to achieve the mechanical flexibility, the chip fabrication is based on either back thinned wafers or the ChipFilmTM technology, which enables the manufacturing of silicon chips with a thickness of about 20 µm. The implemented readout chip uses a supply of 5 V and includes a 5-bit digital-to-analog converter (DAC), a differential difference amplifier (DDA), and a 10-bit successive approximation register (SAR) ADC. The circuit is simulated across process, supply and temperature corners and the simulation results indicate excellent performance in terms of circuit stability and linearity.
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Gaddour, Ahmed, Hafedh Ben Hassen, Wael Dghais, Hamdi Belgacem, and Mounir Ben Ali. "A Novel Conditioning Circuit for Floating-Gate ISFET Bio-Sensor." International Journal of Circuits, Systems and Signal Processing 15 (August 27, 2021): 1174–83. http://dx.doi.org/10.46300/9106.2021.15.128.
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Floating-Gate-Ions-Sensitive-Field-Effect-Transistors (FG-ISFETs) are becoming the sensor’s platform for various fields such as biomedical and chemical sensors. Despite many advantages like quick response, small size as well as wide measurement range, the efficiency of the output measurement is widely affected by temperature, This requires more safety in the measured results and the analysis’s tools. This study describes a novel integrated circuit that improves the thermal stability of the output signal of the ion-sensitive field effect transistors (ISFETs). After that, we investigate the temperature dependency of the FG-ISFET using the mentioned macro model and we shows that the temperature coefficient is about of 6 mV/°C. Afterward, a new integrated interface circuit that can perform great temperature compensation was developed. This operation aims to enhance stability of readout circuit for FG-ISFET. The achieved result of the FG-ISFET under different simulations shows that the readout circuit has a good temperature compensation i.e. :2.4 〖10〗^(-9) mV/°C.
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Liu, Yuan, Bin Wang, Ziyuan Tang, et al. "The Study of the Transient Dose Rate Effect on ROIC Pixels in Ultra-Large-Scale Infrared Detectors." Micromachines 16, no. 6 (2025): 700. https://doi.org/10.3390/mi16060700.
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Infrared image sensors are crucial across various industries. However, with technological advancements, the growing scale of infrared image sensors has made the impact of transient dose rate effects increasingly significant. It is necessary to conduct relevant radiation effect studies to provide the theoretical and data basis for future radiation-hardened design. This study explores the response of large-area N-wells in the readout circuit of infrared detectors to transient dose rate effects. The TCAD simulation results indicate that the expansive N-well area in the merged-design pixel units generates significant current pulses when exposed to gamma-ray irradiation. Specifically, at dose rates of 3 × 1011 rad/s, 5 × 1011 rad/s, 7 × 1011 rad/s, and 9 × 1011 rad/s, the pulse currents measured are 39 nA, 64 nA, 89 nA, and 119 nA, respectively. Due to the spatial constraints of the 55 nm merged design, the close proximity of the GND to the N-well creates a high potential barrier near the N-well, obstructing the path between the GND and the substrate, which results in the pulse current exhibiting a stepped-like characteristic.
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Demori, Marco, Marco Baù, Marco Ferrari, and Vittorio Ferrari. "Interrogation Techniques and Interface Circuits for Coil-Coupled Passive Sensors." Micromachines 9, no. 9 (2018): 449. http://dx.doi.org/10.3390/mi9090449.
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Coil-coupled passive sensors can be interrogated without contact, exploiting the magnetic coupling between two coils forming a telemetric proximity link. A primary coil connected to the interface circuit forms the readout unit, while a passive sensor connected to a secondary coil forms the sensor unit. This work is focused on the interrogation of sensor units based on resonance, denoted as resonant sensor units, in which the readout signals are the resonant frequency and, possibly, the quality factor. Specifically, capacitive and electromechanical piezoelectric resonator sensor units are considered. Two interrogation techniques, namely a frequency-domain technique and a time-domain technique, have been analyzed, that are theoretically independent of the coupling between the coils which, in turn, ensure that the sensor readings are not affected by the interrogation distance. However, it is shown that the unavoidable parasitic capacitance in parallel to the readout coil introduces, for both techniques, an undesired dependence of the readings on the interrogation distance. This effect is especially marked for capacitance sensor units. A compensation circuit is innovatively proposed to counteract the effects of the parasitic input capacitance, and advantageously obtain distance-independent readings in real operating conditions. Experimental tests on a coil-coupled capacitance sensor with resonance at 5.45 MHz have shown a deviation within 1.5 kHz, i.e., 300 ppm, for interrogation distances of up to 18 mm. For the same distance range, with a coil-coupled quartz crystal resonator with a mechanical resonant frequency of 4.432 MHz, variations of less than 1.8 Hz, i.e., 0.5 ppm, have been obtained.
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You, Donggeun, Hyungseup Kim, Jaesung Kim, et al. "Low-Noise Multimodal Reconfigurable Sensor Readout Circuit for Voltage/Current/Resistive/Capacitive Microsensors." Applied Sciences 10, no. 1 (2020): 348. http://dx.doi.org/10.3390/app10010348.
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This paper presents a low-noise reconfigurable sensor readout circuit with a multimodal sensing chain for voltage/current/resistive/capacitive microsensors such that it can interface with a voltage, current, resistive, or capacitive microsensor, and can be reconfigured for a specific sensor application. The multimodal sensor readout circuit consists of a reconfigurable amplifier, programmable gain amplifier (PGA), low-pass filter (LPF), and analog-to-digital converter (ADC). A chopper stabilization technique was implemented in a multi-path operational amplifier to mitigate 1/f noise and offsets. The 1/f noise and offsets were up-converted by a chopper circuit and caused an output ripple. An AC-coupled ripple rejection loop (RRL) was implemented to reduce the output ripple caused by the chopper. When the amplifier was operated in the discrete-time mode, for example, the capacitive-sensing mode, a correlated double sampling (CDS) scheme reduced the low-frequency noise. The readout circuit was designed to use the 0.18-µm complementary metal-oxide-semiconductor (CMOS) process with an active area of 9.61 mm2. The total power consumption was 2.552 mW with a 1.8-V supply voltage. The measured input referred noise in the voltage-sensing mode was 5.25 µVrms from 1 Hz to 200 Hz.
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Alraho, Senan, Qummar Zaman, and Andreas König. "Reconfigurable Wide Input Range, Fully-Differential Indirect Current-Feedback Instrumentation Amplifier with Digital Offset Calibration for Self-X Measurement Systems." tm - Technisches Messen 87, s1 (2020): s85—s90. http://dx.doi.org/10.1515/teme-2020-0021.
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AbstractThis manuscript presents an implementation of the configurable indirect current-feedback instrumentation amplifier (CFIA) for sensor interface readout circuit. Configuration is achieved by designing digital weighted scalable arrays for some selected elements to serve as tuning knobs controlled by the evolutionary optimization algorithm. This scheme resulting in a programmable circuit for different aspects to support self-x functionality. The robustness and flexibility of the proposed circuit fit to the demands of measurement and sensory systems in industry 4.0 and other intelligent systems applications. The circuit is designed by Cadence tools using ams 0.35 μm CMOS technology.
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Baloglu, Eyup Can, Tuba Okutucu Ozyurt, and Zafer Dursunkaya. "Investigation of Warpage Behavior of Silicon Semiconductor on a Silicon - Adhesive - Ceramic Integrated Structure at Cryogenic Temperatures--STUDENT BEST PAPER $1500." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2016, DPC (2016): 001751–72. http://dx.doi.org/10.4071/2016dpc-wp45.
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Silicon wafer is widely used as a base material for readout integrated circuit (ROIC) of infrared sensors. There is a heterogeneous component assembly with the silicon wafer material. Warpage behavior of silicon readout integrated circuit is dependent on the material properties and geometrical properties of the integrated materials. Warpage behavior of the silicon material directly affects the warpage of the sensor which must be operated at cryogenic temperatures (around 80 K). There exist a great difference between the operation and storage temperatures (~ 300 K) of these devices. When different materials with different thermal expansion coefficients are used such devices, thermal stresses develop on the components and surface deformations named as “warpage” are observed on the materials. The measurement of excessive thermal stress or warpage formation on the sensor is vital for reliability issues. In this study, warpage behavior of silicon material is examined in the temperature range from room temperature down to cryogenic temperatures (80 K) and under vacuum conditions less than 1 mTorr. The silicon ROIC is integrated on an alumina ceramic by applying an adhesive between these two layers. After the application of the adhesive material, the integration of the silicon to ceramic is accomplished using a pick and place equipment. The warpage of silicon wafer is measured by a Fizeau Laser Interferometer which uses a 633 nanometer wavelength He – Ne laser. The warpage of the diced silicon is measured before and after the integration to the ceramic so that the effect of curing process of the adhesive is determined after which, the warpage of the silicon material is measured at atmospheric pressure and also under vacuum conditions at room temperature. The warpage of silicon material on the integrated structure is measured with increments of 10 K for both cooling from room temperature to 80 K and heating from 80 K to room temperature. In order to reach cryogenic temperatures, a liquid nitrogen cooled vacuum envelope is utilized. The envelope has an optical flat (made of BK7 material and 2.35 mm thick) for interferometric measurements. There are a total of five integrated structures for the warpage measurements. At each of these structures, the silicon material thickness is different. Comparison of the warpage behavior of the silicon material for different thicknesses are performed. Thermal cycling between room temperature and 80 K is also performed up to 5 cycles for each of the integrated structures. Thermal cycling effect on silicon warpage is discussed for silicon - alumina - adhesive trimaterial assembly structure.
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Siu Fan, Vinny Lam, and Yusmeeraz Binti Yusof. "Design of Fully Integrated Impedimetric CMOS Biosensor for DNA Detection." Advanced Materials Research 925 (April 2014): 524–28. http://dx.doi.org/10.4028/www.scientific.net/amr.925.524.
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This paper described a label-free and fully integrated impedimetric biosensor using standard Complementary Metal Oxide Semiconductor (CMOS) technology to measure both capacitance and resistance of the electrode-electrolyte interface. Conventional impedance biosensors usually use bulky and expensive instruments to monitor the impedance change. This paper demonstrates a low power, high gain and low cost impedance readout circuit design for detecting the biomolecular interactions of deoxyribonucleic acid (DNA) strands at the electrode surface. The proposed biosensor circuit is composed of a transimpedance amplifier (TIA) with two quadrature phase mixers and finally integrated with 5μm x 5μm microelectrode based on 0.18μm Silterra CMOS technology process with 1.8V supply. The output value of the readout circuit is used to estimate the amplitude and phase of the measured admittance. The developed TIA can achieve a gain of 88.6dB up to a frequency of 50MHz. It also has very good linearity up to 2.7mA and the overall dynamic range is approximately 90dB.
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Dalola, Simone, Vittorio Ferrari, and Daniele Marioli. "Micromachined piezoresistive inclinometer with oscillator-based integrated interface circuit and temperature readout." Measurement Science and Technology 23, no. 3 (2012): 035107. http://dx.doi.org/10.1088/0957-0233/23/3/035107.
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Sharma, Dharmendra Kumar, Rama Sai Vinay Dwara, B. A. Botre, and S. A. Akbar. "Temperature control and readout circuit interface for Mox based NH3 gas sensor." Microsystem Technologies 23, no. 5 (2016): 1575–83. http://dx.doi.org/10.1007/s00542-016-3126-6.
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Zografos, A., G. Blanchot, I. M. Dominguez, A. E. Hollos, M. I. Kovacs, and N. Rasevic. "Power, readout and service hybrids for the CMS phase-2 upgrade." Journal of Instrumentation 17, no. 03 (2022): C03034. http://dx.doi.org/10.1088/1748-0221/17/03/c03034.
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Abstract The CMS tracker phase-2 upgrade silicon modules integrate DC-DC powering stages and an optical transceiver to power and control the front-end hybrids. The strip-strip (2S) module contains a Service Hybrid (2S-SEH) with two-stage DC-DC power conversion, an lpGBT with optical interface (VTRx+), high voltage biasing and temperature sensor ports. The pixel-strip (PS) module utilizes a separate two stage DC-DC converter circuit (PS-POH) and a Readout Hybrid (PS-ROH) containing the communication interface. The design and performance of these three hybrids and their integration in their respective modules are presented.
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Zhang, Kai, Jihao Gao, YunFei Wang, and MingLiang Liang. "Hardware Realization of Kinematic Mechanism and Control System of Multifunctional Industrial Robot." Security and Communication Networks 2022 (September 10, 2022): 1–5. http://dx.doi.org/10.1155/2022/1940708.
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In order to improve the position control accuracy of industrial robots and solve the problems of poor real-time and reconfigurability of traditional motion controllers, a hardware implementation method for the motion mechanism and control system of multi-functional industrial robots is proposed. The video acquisition system is suitable for infrared detectors containing 4 channels or readout circuits in 4 channels. The video display system is compatible with the old AV/S-Video interface, and is also suitable for computer system video graphics array (VGA) analog video interface and high-definition video interface. Multimedia Interface (HDMI) digital high-definition video interface display terminal equipment. The hardware circuit of video acquisition and corresponding video interface image output is designed, including signal amplification circuit, analog-to-digital conversion circuit, video information buffer circuit, video display digital-to-analog conversion circuit, and interface hardware circuit, to realize the digitization of image information acquisition and image information. Display simulation, construct VGA, AV/S-Video, and HDMI timing sequence with hardware description language through Field programmable gate array (FPGA) to complete the display of corresponding terminal equipment. The experimental results show that the experimental data was substituted into the formula and the variance σ = 0.09 mm was found, indicating that the detection error of the system is less than 0.27 mm, which meets the detection requirements. Through the 3D contour reconstruction experiment of the workpiece, the expected function realization of each module is proved, and the feasibility of the system software and hardware system is verified. This design has good scalability and stability, reducing labor costs.
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Shang, Xin Juan, and Quan Jing Wang. "The Design of New-Type Digital Readout Device by Inductosyn." Advanced Materials Research 909 (March 2014): 439–43. http://dx.doi.org/10.4028/www.scientific.net/amr.909.439.
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The paper introduces the operation principle and system structure of intelligence digital readout system by inductosyn. The system adopts integrated subdivision circuit on the basis of AD2S90 and QA740210 and is controlled by MCU. It adopts phase demodulation mode, with functions of multipoint preset, power-fail protect, absolute origin setting, software error compensation, LCD display and so on, except simple PLC function and standard RS485 communication interface.
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Hou, Bo, Bin Zhou, Xiang Li, Zhenyi Gao, Qi Wei, and Rong Zhang. "An Analog Interface Circuit for Capacitive Angle Encoder Based on a Capacitance Elimination Array and Synchronous Switch Demodulation Method." Sensors 19, no. 14 (2019): 3116. http://dx.doi.org/10.3390/s19143116.
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This paper presents an analog interface application-specific integrated circuit (ASIC) for a capacitive angle encoder, which is widely used in control machine systems. The encoder consists of two parts: a sensitive structure and analog readout circuit. To realize miniaturization, low power consumption, and easy integration, an analog interface circuit including a DC capacitance elimination array and switch synchronous demodulation module was designed. The DC capacitance elimination array allows the measurement circuit to achieve a very high capacitance to voltage conversion ratio at a low supply voltage. Further, the switch synchronous demodulation module effectively removes the carrier signal and greatly reduces the sampling rate requirement of the analog-to-digital converter (ADC). The ASIC was designed and fabricated with standard 0.18 µm CMOS processing technology and integrated with the sensitive structure. An experiment was conducted to test and characterize the performance of the proposed analog interface circuit. The encoder measurement results showed a resolution of 0.01°, power consumption of 20 mW, and accuracy over the full absolute range of 0.1°, which indicates the great potential of the encoder for application in control machine systems.
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Sun, Li Gong, Chao Meng, and Qing Duan Meng. "Dependence of Structural Stress on Indium Bump Sizes in 8×8 InSb Focal Plane Array." Advanced Materials Research 189-193 (February 2011): 2289–93. http://dx.doi.org/10.4028/www.scientific.net/amr.189-193.2289.
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Based on viscoplastic Anand’s model, the structural stress of 8×8 InSb array detector with underfill dependent on indium bump sizes is systemically researched by finite element method. Simulation results show that as the diameters of indium bump decrease from 36μm to 20μm in step of 2μm, the maximum stress existing in InSb chip first reduces sharply, then increases flatly, and reaches minimum with indium bump diameter 32μm. The maximum stress in Si readout integrated circuit (ROIC) fluctuates at 320MPa with amplitude less than 50MPa, almost half stress in InSb chip. Yet the maximum stress in the indium bump array is almost unchangeable and keeps at 16.3MPa. When the height of indium bump increases from 9μm to 21μm in step of 6μm, the maximal stress in InSb chip first reduces sharply from 800MPa to 500MPa, then almost retains constant. With indium bump diameter 32μm and height 21μm, the maximum stresses in whole 8×8 InSb array detector reaches minimum 458MPa, besides, the stress distribution at the contacts areas is uniform and concentrated, the stress value is smallest and this structure is promising to avoid device invalidation.
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Zhang, Xiaoling, Yawei Liu, Liwen Zhang, and Qingduan Meng. "Deformation Analysis of 128×128 Infrared Detector with Reticulated InSb Pixel Array." Open Electrical & Electronic Engineering Journal 9, no. 1 (2015): 273–77. http://dx.doi.org/10.2174/1874129001509010273.
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The reticulated InSb pixel array was successfully employed in the design of large format InSb infrared focal plane arrays (IRFPAs) detector, to remove the thermal strain accumulated in InSb IRFPAs with the thermal shock test. In order to explore the deformation rules in the InSb IRFPAs with reticulated InSb pixel array, in light of the proposed equivalent modeling, a three-dimensional modeling of InSb IRFPAs is created, and the Z-component of strain is selected to compare the displacements in the various layers of InSb IRFPAs. Analyzing results that show the top surface deformation of InSb IRFPAs originates from the thermal mismatch between the silicon readout integrated circuit (ROIC) and the indium bump array directly above. After passing through the intermediate layer and the silicon substrate, the deformation amplitude along Z-direction is reduced firstly from 0.113 μm to 0.0395 μm, finally to 0.0042 μm. Here the intermediate layer is made up of the indium bump array and the reticulated InSb pixel array. These deformation data suggest that the InSb IRFPAs with reticulated InSb pixel array is superior to that designed with the underfill filled structure in the fabricating large format InSb IRFPAs.
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Ma, Hong Bo, Bo Li, and Yong Rui Zhao. "Electromechanical Coupled Analysis for a Single-Axis Comb Capacitive Accelerometer." Applied Mechanics and Materials 303-306 (February 2013): 149–54. http://dx.doi.org/10.4028/www.scientific.net/amm.303-306.149.
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This paper presents an electromechanical coupled analysis for a single proof-mass one-axis capacitive accelerometer to supply a reference of design specification for subsequent readout circuit. Considering electrostatic force effect, the displacement of proof mass based on dynamic principle is calculated. Then the output of differential capacitive interface is simulated. It indicates that this accelerometer has a sensitivity of 2.09mV/G and capacitance change of 0.31fF.
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Hidalgo-López, Botín-Córdoba, Sánchez-Durán, and Oballe-Peinado. "Fast Calibration Methods for Resistive Sensor Readout Based on Direct Interface Circuits." Sensors 19, no. 18 (2019): 3871. http://dx.doi.org/10.3390/s19183871.
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A simple method to measure the resistance of a sensor and convert it into digital information in a programmable digital device is by using a direct interface circuit. This type of circuit deduces the value of the resistor based on the discharge time through it for a capacitor of a known value. Moreover, the discharge times of this capacitor should be measured through one or two resistors with known values in order to ensure that the estimate is not dependent on certain parameters that change with time, temperature, or aging. This can slow down the conversion speed, especially for high resistance values. To overcome this problem, we propose a modified process in which part of the discharge, which was previously performed through the resistive sensor only, is only conducted with the smallest calibration resistor. Two variants of this operation method, which differ in the reduction of the total time necessary for evaluation and in the uncertainty of the measurements, are presented. Experiments carried out with a field programmable gate array (FPGA); using these methodologies achieved reductions in the resistance conversion time of up to 55%. These reductions may imply an increase in the uncertainty of the measurements; however, the tests carried out show that with a suitable choice of parameters, the increases in uncertainty, and therefore errors, may be negligible compared to the direct interface circuits described in the literature.
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FANG, RAN, WENGAO LU, GUANNAN WANG, et al. "A LOW-NOISE HIGH-VOLTAGE INTERFACE CIRCUIT FOR CAPACITIVE MEMS GYROSCOPE." Journal of Circuits, Systems and Computers 22, no. 09 (2013): 1340019. http://dx.doi.org/10.1142/s0218126613400197.
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This paper presents a high-voltage control and readout interface circuit implemented for capacitive Micro-Electro-Mechanic System (MEMS) gyroscope. A charge sensitive amplifier (CSA) with chopper technique is used to accomplish low-noise capacitive sensing. The stabilization of the closed drive loop is maintained by an auto gain controller (AGC) and an adjustable phase shifter. The outputs of the ASIC directly drive the gyroscope after buffered by an on-chip high-voltage level shifter. The chip is fabricated in a 0.35 um 5 V/12 V Bipolar, CMOS and DMOS (BCD) process. The test of the chip is performed with a MEMS vibratory gyroscope. The result shows that the Application Specific Integrated Circuit (ASIC) can ensure a stable oscillation in the drive axis, and the noise floor is 0.0015°/s/√Hz within 100 Hz.
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Barile, Gianluca, Leila Safari, Giuseppe Ferri, and Vincenzo Stornelli. "A VCII-Based Stray Insensitive Analog Interface for Differential Capacitance Sensors." Sensors 19, no. 16 (2019): 3545. http://dx.doi.org/10.3390/s19163545.
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In this paper, a novel approach to implement a stray insensitive CMOS interface for differential capacitive sensors is presented. The proposed circuit employs, for the first time, second-generation voltage conveyors (VCIIs) and produces an output voltage proportional to differential capacitor changes. Using VCIIs as active devices inherently allows the circuit to process the signal in the current domain, and hence, to benefit from its intrinsic advantages, such as high speed and simple implementation, while still being able to natively interface with voltage mode signal processing stages at necessity. The insensitiveness to the effects of parasitic capacitances is achieved through a simple feedback loop. In addition, the proposed circuit shows a very simple and switch-free structure (which can be used for both linear and hyperbolic sensors), improving its accuracy. The readout circuit was designed in a standard 0.35 μm CMOS technology under a supply voltage of ±1.65 V. Before the integrated circuit fabrication, to produce tangible proof of the effectiveness of the proposed architecture, a discrete version of the circuit was also prototyped using AD844 and LF411 to implement a discrete VCII. The achieved measurement results are in good agreement with theory and simulations, showing a constant sensitivity up to 412 mV/pF, a maximum linearity error of 1.9%FS, and acknowledging a good behavior with low baseline capacitive sensors (10 pF in the proposed measurements). A final table is also given to summarize the key specs of the proposed work comparing them to the available literature.
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Wang, Bin, He Ming Zhang, Hui Yong Hu, et al. "Model of Closed-Loop Detection System for Capacitive MEMS Accelerometer and its IC Realization." Advanced Materials Research 468-471 (February 2012): 2170–75. http://dx.doi.org/10.4028/www.scientific.net/amr.468-471.2170.
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A type of closed-loop system model for capacitive MEMS accelerometer, with simple working clock , is presented in this paper. After establishing the force-feedback model and disgussing the magnitude of the feedback voltage, the readout interface IC for closed-loop detection is designed and the layout area of the ciruit is only 1435×2543 um2. Post simulation results indicated that the circuit has large detection range, high accuracy and linearity, giving evidence for the validity of our model.
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Sharma, Dharmendra Kumar, Rama Sai Vinay Dwara, B. A. Botre, S. A. Akbar, and Kaushal Kishore. "Erratum to: Temperature control and readout circuit interface for Mox based NH3 gas sensor." Microsystem Technologies 23, no. 7 (2017): 3017. http://dx.doi.org/10.1007/s00542-017-3426-5.
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Li, Xiangyu, Liang Yin, Weiping Chen, Zhiqiang Gao, and Xiaowei Liu. "A high-resolution tunneling magneto-resistance sensor interface circuit." Modern Physics Letters B 31, no. 04 (2017): 1750030. http://dx.doi.org/10.1142/s0217984917500300.
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In this paper, a chopper instrumentation amplifier and a high-precision and low-noise CMOS band gap reference in a standard 0.5 [Formula: see text] CMOS technology for a tunneling magneto-resistance (TMR) sensor is presented. The noise characteristic of TMR sensor is an important factor in determining the performance of the sensor. In order to obtain a larger signal to noise ratio (SNR), the analog front-end chip ASIC weak signal readout circuit of the sensor includes the chopper instrumentation amplifier; the high-precision and low-noise CMOS band gap reference. In order to achieve the low noise, the chopping technique is applied in the first stage amplifier. The low-frequency flicker noise is modulated to high-frequency by chopping switch, so that the modulator has a better noise suppression performance at the low frequency. The test results of interface circuit are shown as below: At a single 5 V supply, the power dissipation is 40 mW; the equivalent offset voltage is less than 10 uV; the equivalent input noise spectral density 30 nV/Hz[Formula: see text](@10 Hz), the equivalent input noise density of magnetic is 0.03 nTHz[Formula: see text](@10 Hz); the scale factor temperature coefficient is less than 10 ppm/[Formula: see text]C, the equivalent input offset temperature coefficient is less than 70 nV/[Formula: see text]C; the gain error is less than 0.05%, the common mode rejection ratio is greater than 120 dB, the power supply rejection ratio is greater than 115 dB; the nonlinear is 0.1% FS.
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Petrović, Predrag B., Maria Vesna Nikolić, and Mihajlo Tatović. "New Electronic Interface Circuits for Humidity Measurement Based on the Current Processing Technique." Measurement Science Review 21, no. 1 (2021): 1–10. http://dx.doi.org/10.2478/msr-2021-0001.
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Abstract The paper describes a new electronic conditioning circuit based on the current-processing technique for accurate and reliable humidity measurement, without post-processing requirements. Pseudobrookite nanocrystalline (Fe2TiO5) thick film was used as capacitive humidity transducer in the proposed design. The interface integrated circuit was realized in TSMC 0.18 μm CMOS technology, but commercial devices were used for practical realization. The sensing principle of the sensor was obtained by converting the information on environment humidity into a frequency variable square-wave electric current signal. The proposed solution features high linearity, insensitivity to temperature, as well as low power consumption. The sensor has a linear function with relative humidity in the range of Relative Humidity (RH) 30-90 %, error below 1.5 %, and sensitivity 8.3 x 1014 Hz/F evaluated over the full range of changes. A fast recovery without the need of any refreshing methods was observed with a change in RH. The total power dissipation of readout circuitry was 1 mW.
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Lakshminarayana, Shanthala, Younghun Park, Hyusim Park, and Sungyong Jung. "High Density Resistive Array Readout System for Wearable Electronics." Sensors 22, no. 5 (2022): 1878. http://dx.doi.org/10.3390/s22051878.
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This work presents a wearable sensing system for high-density resistive array readout. The system comprising readout electronics for a high-density resistive sensor array and a rechargeable battery, was realized in a wristband. The analyzed data with the proposed system can be visualized using a custom graphical user interface (GUI) developed in a personal computer (PC) through a universal serial bus (USB) and using an Android app in smartphones via Bluetooth Low Energy (BLE), respectively. The readout electronics were implemented on a printed circuit board (PCB) and had a compact dimension of 3 cm × 3 cm. It was designed to measure the resistive sensor with a dynamic range of 1 KΩ–1 MΩ and detect a 0.1% change of the base resistance. The system operated at a 5 V supply voltage, and the overall system power consumption was 95 mW. The readout circuit employed a resistance-to-voltage (R-V) conversion topology using a 16-bit analog-to-digital converter (ADC), integrated in the Cypress Programmable System-on-Chip (PSoC®) 5LP microcontroller. The device behaves as a universal-type sensing system that can be interfaced with a wide variety of resistive sensors, including chemiresistors, piezoresistors, and thermoelectric sensors, whose resistance variations fall in the target measurement range of 1 KΩ–1 MΩ. The system performance was tested with a 60-resistor array and showed a satisfactory accuracy, with a worst-case error rate up to 2.5%. The developed sensing system shows promising results for applications in the field of the Internet of things (IoT), point-of-care testing (PoCT), and low-cost wearable devices.