Dissertations / Theses: 'Receivers (Electronics)'

1

MacSween, Peter J. A. F. "Resource allocation for radar signal interception in ESM receivers." Thesis, University of Ottawa (Canada), 2004. http://hdl.handle.net/10393/26706.

Full text

Abstract:

Electronic Support Measures (ESM) receivers exist that are capable of detecting the transmissions from radar emitters in a robust and reliable manner. Typically, the receiver operator wishes to detect the transmitted signals from a known set of emitters as quickly as possible. To achieve this, a schedule is created that dictates the order in which the receiver will search for the various emitters. Techniques exist for predicting the maximum time to intercept between a receiver and an emitter, but they only work from known scheduling parameters. The quantity of emitters and the density of their signals typically prevents a naive approach to generating the schedule. The purpose of this thesis was to generate scanning receiver schedules that minimize the maximum time to intercept for a set of scanning emitters. Genetic algorithms and the use of pulse train theory were combined to generate the schedules in an automated fashion. The genetic algorithm consistently produced ESM receiver schedules that used duration values for each frequency band that were near the largest scan rate of all the emitters in each band. This was an unexpected result and demonstrated that the minimization of the maximum intercept time for a set of emitters can be accomplished using the maximum scan values. A new scheduling algorithm was created that utilized the maximum scan values. It generated ESM receiver schedules that were equivalent to the best schedules produced by the genetic algorithm scheduler, and produced them with much less computational effort.

APA, Harvard, Vancouver, ISO, and other styles

2

Rodríguez, de Llera González Delia. "Automatic Design-Space Exploration of Integrated Multi-Standard Wireless Radio Receivers." Licentiate thesis, KTH, Microelectronics and Information Technology, IMIT, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4192.

Full text

Abstract:

One of the main challenges posed by 4G wireless communication systems is achieving flexible, programmable multi-standard radio transceivers with maximum hardware share amongst different standards at a minimum power consumption. Evaluating the feasibility and performance of different multi-standard/multi-band radio solutions at an early stage, i.e. system level, is key for succeeding in surmounting this challenge. This entails formulation of the transceiver budget for several RF architectures and frequency plans with different degrees of hardware sharing. This task is complicated by the fact that transceiver blocks can have different implementations that lead to different performances. The tools that are available for use at present have only analysis capabilities or address only one standard and/or receiver architecture at a time.

In the belief that a new approach to this problem is necessary, the work that has led to this thesis proposes a novel methodology that automates the design-space exploration of integrated multi-standard wireless radio receivers. This methodology has been implemented in a multi-standard RF Transceiver Architecture Comparison Tool, TACT. TACT helps surmounting many of the challenges faced by RF system designers targeting multi-standard/multi-band radio receivers.

The goal of the algorithms TACT is built upon is to find a multi-standard receiver frequency plan and budget that meets or exceeds the specifications of the addressed wireless standards while keeping the requirements of each of the receiver blocks as relaxed as possible. TACT offers RF engineers a deep insight into the receiver behavior at a very early stage of the design flow. It models the impact of critical circuit non-idealities using a high level of abstraction. This reduces the number of design iterations and, thus, the time-to-market of the solution. The reuse of already available intellectual property (IP) blocks is also considered in TACT, what can result in a significant cost reduction of the receiver implementation.

A case study of a WCDMA/WLAN multi-standard receiver designed using TACT is presented in order to illustrate the capabilities of the proposed techniques.

APA, Harvard, Vancouver, ISO, and other styles

3

Zicha, Nicholas. "High-speed optical receivers in nanometer complementary metal-oxide-semiconductor (CMOS)." Thesis, McGill University, 2009. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=40665.

Full text

Abstract:

Optical interconnects have attracted great interest as data rates continue to increase. When compared with their electrical counterparts, optical interconnects have significant advantages in terms of crosstalk, bandwidth, distance, and latency. Many applications stand to benefit from low-cost, high-speed integrated optical transceivers with single-channel gigabit data rates. As in the case of RF wireless designs, using CMOS technology is of special interest due to the potential of lower cost and higher integration. The analog frontend is a key component in optical receivers due to its importance in bridging the optical and electrical signal domains. In this work, we present a 10 Gb/s optical receiver frontend designed and fabricated in ST’s 90 nm CMOS technology. The receiver contains a transimpedance (pre)amplifier (TIA), and limiting amplifier (LA), and an output buffer (OB). The TIA demonstrates a transimpedance gain of 61.9 dB Ohm and a bandwidth of 7.4 GHz, trading off noise and ISI considerations. The single-ended design utilizes 1.5 mW of power from a 1.0 V supply. The LA demonstrates a voltage gain of 21 dB and a bandwidth extended to 10 GHz using inductive peaking. The differential design utilizes 3.9 mW of power from a 1.0 V supply. Finally, the output buffer is capable of driving large output voltage swings to 50 Ohm on-chip terminations. In order to test the receiver, a PCB and testing strategy is co-designed with the chip. Details concerning the various design decisions, tradeoffs, are discussed in this thesis. Experimental results of a fabricated device are presented under ideal and practical system levels, with data rates up to 8.5 Gb/s.
Les interconnexions optiques ont attiré grand intérêt pendant que les flux d’information continuent à augmenter. En comparaison avec leurs contre-parties électriques, les interconnexions optiques ont des avantages significatifs en termes d’interférence, largeur de bande, distance, et latence. En raison de ces avantages, beaucoup d’applications se tiennent pour des bénéfices des récepteurs optiques intégrés peu coûteux et à grande vitesse.Le devant analogue dans les récepteurs optiques est une composante clé, son importance en jetant un pont sur les domaines de signal optique et électrique. Dans ce travail, nous présentons un récepteur optique 10 Gb/s conçu et fabriqué en technologie CMOS à 90 nanomètre. Le récepteur contient un (pré)amplificateur de transimpedance (TIA), un l’amplificateur limiter (LA), et un amortisseur de rendement (OB). Le TIA démontre un gain de transimpedance de 61.9 dB Ohm et d’une largeur de bande de 7.4 gigahertz, en balançant les considérations de bruit et de l’inteférance des symboles. La conception utilise 1.5 mW de puissance à un tension de 1.0 V. La LA démontre un gain de 21 dB et une largeur de bande prolongée à 10 gigahertz utilisant une pointe inductif. La conception différentielle utilise 3.9 mW de puissance à un tension de 1.0 V. En conclusion, l’amortisseur de rendement est capable de conduire de grandes oscillations de tension de rendement aux arrêts de 50 Ohm. Afin d’examiner le récepteur, une affiche PCB et une stratégie d’essai conçue avec le circuit est présenté. Des détails au sujet des diverses décisions de conception et défi sont discutés dans cette thèse. Des résultats expérimentaux d’un circuit fabriqué sont présentés sous les niveaux système idéaux et pratiques, avec des vitesses jusqu’à 8.5 Gb/s.

APA, Harvard, Vancouver, ISO, and other styles

4

Tam, Yiu-Ming. "A tri-mode sigma-delta modulator for wireless receivers /." View abstract or full-text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20TAM.

Full text

APA, Harvard, Vancouver, ISO, and other styles

5

Malaeb, Maadad Assaad 1963. "Noise and jitter analysis for wavelength division multiplexing optical heterodyne PSK receivers." Thesis, The University of Arizona, 1992. http://hdl.handle.net/10150/278132.

Full text

Abstract:

Performance analysis of optical heterodyne receivers in Wavelength Division Multiplexing (WDM) has been an important research area in the last few years. WDM can potentially provide hundreds of Gb/s channels in the same fiber. However, because of channel interference in WDM, performance analysis is important to design the system properly. In this thesis, a detailed noise and jitter analysis has been performed for an optical heterodyne PSK receiver used in WDM. In WDM, noise sources include shot noise, channel interference noise, and phase noise. These noise sources will not only add to the signal, but also cause timing jitter at the bit timing recovery. Expressions for the noise and jitter variances at the detector input are derived for both RZ and NRZ signals. Bit error probabilities as a function of WDM channel separation are computed. It is found that the overall bit error rate performance of RZ is better than NRZ.

APA, Harvard, Vancouver, ISO, and other styles

6

Eneh, Titus Ikechukwu. "Adaptive MMSE multiuser receivers in MIMO OFDM wireless communication systems." Thesis, University of Greenwich, 2011. http://gala.gre.ac.uk/8041/.

Full text

Abstract:

In a bid to cope with challenges of increasing demand for higher data rate, better quality of service, and higher network capacity, there is a migration from Single Input Single Output (SISO) antenna technology to a more promising Multiple Input Multiple Output (MIMO) antenna technology. On the other hand, Orthogonal Frequency Division Multiplexing (OFDM) technique has emerged as a very popular multi-carrier modulation technique, thus it is considered as a promising solution to enhance the data rate of future broadband wireless communication systems. The first contribution of this thesis is the development of a low complexity adaptive algorithm that is robust against slow and fast fading channel scenarios, in comparison to the conventional individual parameter estimation by E. Teletar in his famous paper of 1999. Implementing the Adaptive MMSE Receivers in MIMO OFDM systems which I refer to (AMUD MIMO OFDM), combines the adaptive minimum mean square error multiuser receiver's scheme with prior information of the channel and interference cancelation in the spatial domain, achieves enhanced joint channel estimation and signal detection which makes the new technique effectively mobile. A mathematical analysis and simulation results to estimate the Information Capacity of Mobile Communication system with MMSE DFE and OFDM receivers were investigated. The capacity of a stationary channel with ISI is achievable by both the single carrier MMSE DFE and multicarrier modulation over narrow sub channels with OFDM receivers. The achieved capacity result shows that in both techniques single carrier and multicarrier, apart from different implementations are essentially identical when it comes to achievable criteria for information channel capacity. Lastly, AMUD MIMO OFDM were compared with both adaptive vector pre-coding and iterative system and their performance were fantastic, results shows that it will assure transmission over a high channel capacity.

APA, Harvard, Vancouver, ISO, and other styles

7

Tapia, Ugarte Pablo Andrés. "Reduced bias control electronics for sis mixers in large-format heterodyne arrays receivers." Tesis, Universidad de Chile, 2015. http://repositorio.uchile.cl/handle/2250/136226.

Full text

Abstract:

Magíster en Ciencias de la Ingeniería, Mención Eléctrica
La próxima construcción del radiotelescopio "Cerro Chajnantor Atacama Telescope" (CCAT) traerá enormes desafíos para la instrumentación astronómica. Dentro de estos desafíos se encuentra el "CCAT Heterodyne Array Receiver", un arreglo modular de receptores heterodinos de doble banda con alta resolución espectral. Este se espera sea el primer arreglo de receptores heterodinos con 64 (base) y 128 pixeles (meta), substancialmente mas grande que cualquier arreglo de este tipo actualmente en operación. Sin embargo, estos receptores heterodinos de gran escala solo pueden ser construidos si es posible reducir considerablemente la complejidad de cada pixel. Esta tesis presenta el trabajo realizado en el desarrollo compacto de la electrónica de control de polarización para mezcladores de juntura "Superconductor-Insulator-Superconductor" (SIS) en arreglos heterodinos de gran escala. El objetivo principal de esta tesis corresponde a la programación del microprocesador, en un prototipo de canal singular, de la tarjeta de control de polarización para interactuar con el mezclador, y luego probar su funcionamiento en un setup de laboratorio. El software fue exitósamente programado y fue primero probado en un sistema de prueba para asegurar una interacción sin riesgos con el mezclador. Luego se probó experimentalmente que fue posible suministrar el voltaje de ajuste de alta precisión del mezclador y la corriente del las bobinas de campo magnético para suprimir los efectos de Josephson en el mezclador. Otras funciones específicas como el barrido de voltaje en el mezclador o la habilitación de la conexión con el mezclador también fueron testeadas. El PC de control es capaz de controlar todos estos parámetros y funciones junto con el monitoreo de la corriente y voltaje reales en el mezclador. El rol fundamental de la constante de tiempo electrónica de la tarjeta es presentado en conjunto con un análisis en términos de la distorsión de la curva de voltaje-corriente del mezclador y su influencia en el ruido electrónico. Los resultados muestran, de todas formas, que tanto la distorsión como el ruido se encuentran dentro de un rango adecuado debido al sector donde se espera ajustar el voltaje del mezclador. En conclusión, el software programado en el microprocesador crea una base de instrucciones que permiten al usuario hacer uso de la tarjeta de control de polarización para interactuar con el mezclador de manera segura. Esta interacción le permite realizar una calibración manual (aunque controlada remotamente) del mezclador, obteniendo los mismos resultados que el proceso actual. Esto representa un gran paso adelante en la reducción de la complejidad de hardware del sistema de control de polarización, siendo esto clave para el desarrollo de arreglo de receptores heterodinos de gran escala.

APA, Harvard, Vancouver, ISO, and other styles

8

Tennant, Mark P. "Low power adaptive equaliser architectures for wireless LMMSE receivers." Thesis, University of Edinburgh, 2007. http://hdl.handle.net/1842/2565.

Full text

Abstract:

Power consumption requires critical consideration during system design for portable wireless communication devices as it has a direct influence on the battery weight and volume required for operation. Wideband Code Division Multiple Access (W-CDMA) techniques are favoured for use in future generation mobile communication systems. This thesis investigates novel low power techniques for use in system blocks within a W-CDMA adaptive linear minimum mean squared error (LMMSE) receiver architecture. Two low power techniques are presented for reducing power dissipation in the LMS adaptive filter, this being the main power consuming block within this receiver. These low power techniques are namely the decorrelating transform, this is a differential coefficient technique, and the variable length update algorithm which is a dynamic tap-length optimisation technique. The decorrelating transform is based on the principle of reducing the wordlength of filter coefficients by using the computed difference between adjacent coefficients in calculation of the filter output. The effect of reducing the wordlength of filter coefficients being presented to multipliers in the filter is a reduction in switching activity within the multiplier thus reducing power consumed. In the case of the LMS adaptive filter, with coefficients being continuously updated, the decorrelating transform is applied to these calculated coefficients with minimal hardware or computational overhead. The correlation between filter coefficients is exploited to achieve a wordlength reduction from 16 bits down to 10 bits in the FIR filter block. The variable length update algorithm is based on the principle of optimising the number of operational filter taps in the LMS adaptive filter according to operating conditions. The number of taps in operation can be increased or decreased dynamically according to the mean squared error at the output of the filter. This algorithm is used to exploit the fact that when the SNR in the channel is low the minimum mean squared error of the short equaliser is almost the same as that of the longer equaliser. Therefore, minimising the length of the equaliser will not result in poorer MSE performance and there is no disadvantage in having fewer taps in operation. If fewer taps are in operation then switching will not only be reduced in the arithmetic blocks but also in the memory blocks required by the LMS algorithm and FIR filter process. This reduces the power consumed by both these computation intensive functional blocks. Power results are obtained for equaliser lengths from 73 to 16 taps and for operation with varying input SNR. This thesis then proposes that the variable length LMS adaptive filter is applied in the adaptive LMMSE receiver to create a low power implementation. Power consumption in the receiver is reduced by the dynamic optimisation of the LMS receiver coefficient calculation. A considerable power saving is seen to be achieved when moving from a fixed length LMS implementation to the variable length design. All design architectures are coded in Verilog hardware description language at register transfer level (RTL). Once functional specification of the design is verified, synthesis is carried out using either Synopsys DesignCompiler or Cadence BuildGates to create a gate level netlist. Power consumption results are determined at the gate level and estimated using the Synopsys DesignPower tool.

APA, Harvard, Vancouver, ISO, and other styles

9

Shaheen, Mohamed. "Design of DC-stable log-domain filters and their application in multistandard receivers." Thesis, McGill University, 2006. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=99118.

Full text

Abstract:

A study of the concepts involved in the bias-stability of log-domain filters is presented. Through a thorough analysis of the factors contributing to the existence of multiple and unstable operating points in log-domain filters, a biquad architecture that overcomes these drawbacks is proposed. This is accompanied with a theoretical verification of both stability and the input-output linear behavior. The study provides a foundation for the design and implementation of other bias-stable log-domain circuits.
This thesis also presents the design of a multistandard channel-select filter for GSM, IS-95, and WCDMA. The filter's tunability extends from 100 kHz to 20.05 MHz. The implemented 6th-order quasi-Butterworth log-domain filter was fabricated in a Silicon Germanium (SiGeHP5) technology, operates from a supply voltage as low as 1.2 V, and consumes a maximum power of 12.9 mW at 20.05 MHz cutoff frequency. Dynamic biasing techniques are employed in order to extend the SFDR of the filter, e.g. from SFDR = 39 dBm to SFDR = 48 dBm at 20.05 MHz cutoff frequency.

APA, Harvard, Vancouver, ISO, and other styles

10

Lu, Ye 1969. "Design and analysis of low noise transimpedance amplifiers for 10 Gbs optical receivers." Thesis, McGill University, 2002. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=79273.

Full text

Abstract:

High-speed optical systems are becoming increasingly important due to the progress of multimedia communications, which requires ever increasing data-transmission capacity. SONET based systems at 10 Gb/s are under commercial development, and it is likely that systems based on higher SONET hierarchies will soon be required for further broadband communications networks.
This thesis describes a low-noise and low-power Si-bipolar transimpedance preamplifier for the front-end of an optical-fibre receiver using a 0.5 mum 25 GHz self-aligned double poly silicon bipolar process. Design specifications are met through trade-offs between input noise current, speed, transimpedance gain, power dissipation, impedance matching, and supply voltage. This was achieved by (1) using inductors to enhance the bandwidth, (2) using a tuned noise-matching network at the input to improve the signal-to-noise ratio (SNR), (3) and using frequency compensation techniques to improve stability and to further enhance the bandwidth of the preamplifier.
In this thesis, the design of the amplifier is preceded by an analysis of four different circuit topologies, with focus on three main design parameters: bandwidth, input-referred noise, and power dissipation. This is followed by a discussion of the specific bipolar transimpedance amplifier (TIA) designed and fabricated, and the integration of an optoelectronic device model with the preamplifier for the purpose of testing. Design, simulation, layout and test data of the preamplifier are presented in detail. The performance of the TIA is finally discussed based on measurements.

APA, Harvard, Vancouver, ISO, and other styles

11

Wang, Shuyi. "Optimization of transmitted-reference receivers in the ultra-wide bandwidth system." Thesis, University of Warwick, 2011. http://wrap.warwick.ac.uk/45884/.

Full text

Abstract:

This thesis contributes the research and development of novel receiver optimization approaches conducted in ultra-wide bandwidth (UWB) systems. The ultimate goal of the improved receiver technology is to simplify the receiver structures at the cost of a tolerable performance degradation or improve the receiver performances at the cost of a tolerable complexity. Recently, UWB technology has become more and more attractive due to its increased performance. An advanced scheme that can provide a further improvement is strongly recommended and highly demanded. This research project focuses on the design of outstanding receivers suitable for the UWB system with transmitted-reference signaling. Two types of improved receivers are investigated. The first one is based on the optimization of inter-pulse time delay Td in the traditional transmitted-reference receivers where one data pulse is transmitted Td seconds delay after one reference pulse in a bit duration. The second one is based on the joint optimization of the number of reference symbols and the integration interval length in the generalized transmitted-reference receivers where Nd data symbols are transmitted after Nr reference symbols in a data packet. For both improved receivers, simulation and theoretical approaches are used to provide the optimization results. The numerical results show that the improved receivers by using different optimization approaches outperform the non-improved receivers significantly for most practical cases. An up to 4.2dB performance improvement can be achieved consequently. The principal conclusion from this thesis is that all the optimization schemes presented herein can be successfully applied to the design of receivers in the UWB transmitted-reference systems that the data decision can be obtained by thresholding the correlator output of the reference information with the data information.

APA, Harvard, Vancouver, ISO, and other styles

12

D'Amours, Claude. "Differential and coherent RAKE receivers for DS-CDMA in frequency-selective Rayleigh fading channels." Thesis, University of Ottawa (Canada), 1992. http://hdl.handle.net/10393/10753.

Full text

Abstract:

The performance of digital communications over frequency-selective Rayleigh fading channels can be quite poor, thus diminishing, the capacity of a DS-CDMA system. This thesis compares differential detection, multiple symbol differential detection and pilot symbol-aided coherent detection of a direct-sequence spread spectrum signal for this channel. Diversity reception is obtained through RAKE reception, and both equal gain and maximal gain diversity combining are considered. The improvement provided by some error correcting convolutional codes arid interleaving are also studied.

APA, Harvard, Vancouver, ISO, and other styles

13

Chuah, Alan E. L. "Design and implementation of high-speed transmitters and receivers for optical interconnects in CMOS technology." Thesis, McGill University, 2001. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=33964.

Full text

Abstract:

Optoelectronic very-large scale integrated (OE-VLSI) technology provides for the integration of photonic devices, such as the laser-diode and the photodiode, with silicon VLSI electronics. This technology is capable of providing high bandwidth and high-density optical input/output (I/O) to silicon VLSI chips, with an aggregate data bit rate of over a Terabit per second. The development of the vertical-cavity surface-emitting laser (VCSEL) and the high-speed p-i-n photodiode has made this technology possible. Optical transmitter and receiver circuits are responsible for the interfacing between the photonic devices and the silicon VLSI electronics. This thesis presents designs of optical transmitter and receiver circuits implemented in a 0.18 mum CMOS technology. These circuits are designed to achieve minimum power consumption and circuit area, and maximum high-speed performance. Different circuit topologies are studied and implemented. Three different topologies of laser drivers for transmitter and two different preamplifiers for receivers are studied and presented in this thesis.

APA, Harvard, Vancouver, ISO, and other styles

14

Rajashekharaiah, Mallesh. "Gain control and linearity improvement for low noise amplifiers in 5GHZ direct conversion receivers." Online access for everyone, 2005. http://www.dissertations.wsu.edu/Thesis/Spring2005/m%5Frajashekharaiah%5F050405.pdf.

Full text

APA, Harvard, Vancouver, ISO, and other styles

15

Haroun, Mostafa. "Low-power high-speed high-resolution delta-sigma modulators for digital TV receivers in nanometer CMOS." Thesis, McGill University, 2014. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=123106.

Full text

Abstract:

The use of high-speed high-resolution analog-to-digital converters (ADCs) allows part of the signal processing to be done in the digital domain allowing for higher system integration and cheaper fabrication. Becoming more in use, hand-held devices have low-power requirements to allow for longer battery life. Also, designing ADCs in nanometer digital CMOS technologies make them more integrable with digital processing blocks and cheaper. This thesis aims at designing a high-speed (16MS/s conversion rate) high-resolution (12bits) Delta-Sigma modulator with low-power consumption in nanometer CMOS. Delta-Sigma modulators can achieve high resolution in low and medium speed applications. For higher speed applications, the oversampling ratio (OSR) will have to be kept low to avoid inefficient design. However, lowering the OSR requires special care in the design starting from the architecture until the full circuit implementation. In nanometer CMOS technologies, analog properties, such as intrinsic gain, degrade which might result in a higher power consumption. Moreover, the low nominal supply voltages associated with such technologies adds more challenges to the design of a low distortion power-efficient Delta-Sigma modulator. Targeting a specic resolution, lowering the voltage supply usually results in a higher power consumption. This thesis suggests possible solutions to achieve low power consumption while targeting high-speed applications in nanometer low-voltage-supply environment.This thesis presents a low-power Discrete-Time (DT) Delta-Sigma modulator making use of a single-loop multibit DT digital input-feedforward Delta-Sigma architecture. The main feature of this architecture is the reduced signal swings at the output of the integrators which allows the use of a low voltage supply. The low-power Switched-Capacitor (SC) implementation is ensured by using a novel opamp switching technique, optimizing simultaneous opamp's settling in cascaded nondelaying SC integrators, and using non-overlapping clock phases with unequal duty-cycles. The novel opamp switching technique is based on a current-mirror opamp with switchable transconductances. The current-mirror opamp works with full current during the charge-transfer phase while the output current is partially switched off during the sampling phase. Power saving can be achieved while ensuring that the opamp output is available during both phases. The simultaneous settling of series opamps in a two cascaded nondelaying SC integrators scheme is looked at as a two-pole system where power optimization is necessary to ensure minimum power consumption while meeting the settling requirements. The use of clock phases with unequal duty-cycles gives the designer an extra degree of freedom to further power optimize the design. The experimental Delta-Sigma ADC is a 4th-order 5.5bits single-loop Delta-Sigma modulator with an OSR of 8. The design starts with the structural-level aspects in which system-level decisions are made and simulations are carried-out with behavioral models to find the suitable circuit parameters. Circuit-level design in then considered to design each block and simulate the full-system. Fabricated in 1V 65nm CMOS, the Delta-Sigma modulator prototype occupies an active area of 1.2mm2. Although the targeted resolution is about 12bits, the experimental results shows a dynamic range (DR) of 66dB (11bits) over an 8MHz bandwidth while consuming 26mW and a peak SNR/SNDR of 64/58.5dB. The proposed opamp switching technique brings the total power consumption from 29mW to 26mW without affecting the performance (SNDR stays at 58.5dB). The deviation in experimental performance, from simulations, in thought to be due to higher parasitic capacitance requiring higher bias currents which results in drop of opamp dc gain. Compared to state of the art high-speed high-resolution Delta-Sigma modulators operated from 1V supply and fabricated in CMOS, it achieves a reasonable Figure-of-Merit.
L'utilisation des convertisseurs analogique-numérique (CAN) à haute vitesse et à haute résolution permet à une partie du traitement du signal d'être accompli dans le domaine numérique permettant une meilleure intégration du système et un cout de fabrication moins élevé. De plus en plus utilisés, les appareils portatifs ont des exigences de faible consommation pour permettre une plus longue durée de vie de la batterie. En plus, la conception CAN en technologies CMOS numériques les rendent plus intégrable avec les blocs de traitement numérique et les rendent moins cher.Cette thèse vise à concevoir un modulateur Delta-Sigma à haute vitesse (de 16MS/s) et à haute résolution (12bits) et aussi à faible consommation tout en étant fabriquée en technologie CMOS nanométrique. Les modulateurs Delta-Sigma peuvent atteindre une résolution élevée dans les applications de basse et de moyenne vitesse. Dans les technologies CMOS nanométriques, les propriétés analogiques, telles que le gain intrinséque, se dégradent ce qui pourrait se traduire à une consommation de puissance plus élevée. En outre, les tensions d'alimentation nominales basses associées à ces technologies ajoutent de nouveaux défis à la conception d'un modulateur Delta-Sigma à distorsion faible et consommation faible. Cette thèse suggère des solutions possibles pour atteindre une faible consommation tout en ciblant les applications à haute vitesse en milieu nanométrique avec une alimentation à basse tension.Cette thèse présente un modulateur Delta-Sigma à faible consommation utilisant une architecture multi-bits à entrée "feedforward" numérique. La principale caractéristique de cette architecture est la réduction de la dynamique de signal à la sortie des intégrateurs, ce qui permet l'utilisation d'une alimentation à basse tension. La mise en œuvre du circuit à condensateurs commutées (SC) à faible consommation de puissance est assurée par l'utilisation d'une nouvelle technique de commutation pour l'amplificateur opérationnel (opamp), l'optimisation de la stabilisation simultanée des intégrateurs SC sans délais en cascade, et l'utilisation des phases d'horloge à rapports cycliques inégaux. La technique de commutation de l'opamp est basée sur un opamp à miroir de courant avec transconductances commutables. L'opamp fonctionne en plein courant pendant la phase de transfert de charge tandis que le courant est partiellement commutée pendant la phase d'échantillonnage ce qui réduit la consommation de puissance. La stabilisation simultanée des opamps en série dans le cas de deux intégrateurs SC sans délais en cascade est traitée comme un système à deuxième ordre oû l'optimisation de puissance est nécessaire. L'utilisation de phases d'horloge avec rapports cycliques inégaux donne au concepteur un degrée de libertée supplémentaire.Le modulateur expérimental de cette thèse est un modulateur Delta-Sigma de 4eme ordre avec 5.5bits et un taux de suréchantillonnage égal à 8. La conception commence avec les aspects structurels dans lequel des décisions au niveau du système sont prises et des simulations sont rapportées sur des modèles comportementaux pour trouver les paramètres de circuit appropriés. La conception au niveau circuit est examinée pour concevoir chaque bloc et simuler l'ensemble du système. Fabriquée en 65nm CMOS à 1V, ce prototype occupe une surface active de 1,2 mm2. Bien que la résolution ciblée est de 12bits, les résultats expérimentaux montrent une gamme dynamique (DR) de 66dB (11bits) sur une bande de 8MHz tandis que la consommation est de 26mW et le SNR/SNDR maximal est 64/58.5dB. L'écart de performance semble être d^u à l'augmentation des condensateurs parasites nécessitant des courants plus élevés, ce qui entra^ne la chute de gain de l'opamp. Par rapport aux modulateurs Delta-Sigma à haute vitesse et à haute résolution des travaux de pointe opérés à partir d'1V et fabriqués en technologies CMOS, le prototype réealise une figure-de-mérite raisonnable.

APA, Harvard, Vancouver, ISO, and other styles

16

MacKerron, Graham Henry. "The detection of unknown waveforms in ESM receivers : FFT-based real-time solutions." Thesis, University of Glasgow, 2011. http://theses.gla.ac.uk/3007/.

Full text

Abstract:

Radars and airborne electronic support measures (ESMs) systems are locked in a tactical battle to detect each other whilst remaining undetected. Traditionally, the ESM system has a range advantage. Low probability of intercept (LPI) waveform designers are, however, more heavily exploiting the matched filter radar advantage and hence degrading the range advantage. There have been literature and internal, SELEX Galileo proposals to regain some ESM processing gain of low probability of intercept (LPI) waveforms. This study, however, has sought digital signal processing (DSP) solutions which are: (1) computationally simple; (2) backward-compatible with existing SELEX Galileo digital receivers (DRxs) and (3) have low resource requirements. The two contributions are complementary and result in a detector which is suitable for detection of most radar waveforms. The first contribution is the application of spatially variant apodization (SVA) in a detection role. Compared to conventional window functions, SVA was found to be beneficial for the detection of sinusoidal radar waveforms as it surpassed the fixed window function detectors in all scenarios tested. The second contribution shows by simulation that simple spectral smoothing techniques improved DRx LPI detection capability to a level similar to more complicated non-parametric spectral estimators and far in excess of the conventional (modified) periodogram. The DSP algorithms were implemented using model-based design (MBD). The implication is that a detector with improved conventional and LPI waveform detection capability can be created from the intellectual property (IP). Estimates of the improvement in SELEX Galileo DRx system detection range are provided in the conclusion.

APA, Harvard, Vancouver, ISO, and other styles

17

Kotiranta, Mikko [Verfasser], Viktor [Akademischer Betreuer] Krozer, and Claudio [Akademischer Betreuer] Paoloni. "Development of terahertz vacuum electronics for array receivers / Mikko Kotiranta. Gutachter: Viktor Krozer ; Claudio Paoloni." Frankfurt am Main : Univ.-Bibliothek Frankfurt am Main, 2013. http://d-nb.info/1044413441/34.

Full text

APA, Harvard, Vancouver, ISO, and other styles

18

Pimpalkhare, Mangesh S. "Linearly repeatered communication systems using optical amplifiers." Thesis, This resource online, 1992. http://scholar.lib.vt.edu/theses/available/etd-05042010-020243/.

Full text

APA, Harvard, Vancouver, ISO, and other styles

19

Andersson, Stefan. "Multiband LNA Design and RF-Sampling Front-Ends for Flexible Wireless Receivers." Doctoral thesis, Linköping : Electronic Devices, Department of Electrical Engineering, Linköping University, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7582.

Full text

APA, Harvard, Vancouver, ISO, and other styles

20

Pan, Bo. "Development of micromachined millimeter-wave modules for next-generation wireless transceiver front-ends." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/24654.

Full text

Abstract:

Thesis (Ph.D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2008.
Committee Chair: John Papapolymerou; Committee Chair: Manos Tentzeris; Committee Member: Gordon Stuber; Committee Member: John Cressler; Committee Member: John Z. Zhang; Committee Member: Joy Laskar

APA, Harvard, Vancouver, ISO, and other styles

21

Finn, Steven Ernest. "Interface circuit designs for extreme environments using SiGe BiCMOS technology." Thesis, Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/22679.

Full text

Abstract:

SiGe BiCMOS technology has many advantageous properties that, when leveraged, enable circuit design for extreme environments. This work will focus on designs targeted for space system avioinics platforms under the NASA ETDP program. The program specifications include operation under temperatures ranging from -180 C to +125 C and with radiation tolerance up to total ionizing dose of 100 krad with built-in single-event latch-up tolerance. To the author's knowledge, this work presents the first design and measurement of a wide temperature range enabled, radiation tolerant as built, RS-485 wireline transceiver in SiGe BiCMOS technology. This work also includes design and testing of a charge amplification channel front-end intended to act as the interface between a piezoelectric sensor and an ADC. An additional feature is the design and testing of a 50 Ohm output buffer utilized for testing of components in a lab setting.

APA, Harvard, Vancouver, ISO, and other styles

22

Delfini, Duccio. "Développement de récepteurs hétérodynes multi-pixels pour les futures missions spatiales." Thesis, Paris Sciences et Lettres (ComUE), 2018. http://www.theses.fr/2018PSLEO019/document.

Full text

Abstract:

L'observation du milieu interstellaire est très importante aux fréquences mm / (sub) mm / Thz pour comprendre comment se forment les étoiles et les planètes. De telles observations dépendent des récepteurs hétérodynes. Ces instruments atteignent une résolution spectrale très élevée en convertissant un signal haute fréquence à une fréquence plus basse. Dans un récepteur hétérodyne, le signal collecté est superposé sur un signal artificiel, bien connu, monochromatique, généré par l'oscillateur local (OL), donc ce signal artificiel est plus-ou-moins la fréquence du signal du ciel. Le mélangeur produit le signal de la fréquence du battement. Cette fréquence est équivalente à la différence entre le OL et la fréquence du signal du ciel. Ainsi, le signal du ciel est traduit à une fréquence plus basse, pour qu'il soit facile à amplifier et détecter. Habituellement, les récepteurs hétérodynes ont seulement un pixel spatial avec de nombreux canaux en fréquences. Notre objectif est de développer des réseaux de centaines de pixels. Pour faire cela, certains composants de l'hétérodyne doivent être repensés radicalement, tels que l'antenne de réception et le diviseur de faisceau OL. En effet, l'antenne réceptrice est généralement constituée d'une antenne à double fentes sur une lentille, ou d'une antenne cornet. Par contre, ces antennes ne sont pas les meilleurs choix pour des réseaux de nombreux pixels car elles doivent être usinées et montées individuellement. Au lieu de cela, il est commode de développer des structures planaires qui peuvent être facilement produites toutes ensembles. En particulier, nous avons conçu et simulé des réseaux d'antennes patch, de réseaux de transmission, et de plaques de zone. Le réseau d'antennes patch consiste d'un réseau de patchs métalliques reliés par une ligne microruban et séparés du plan de masse par un substrat diélectrique. Cette configuration profite du facteur du réseau pour réduire la largeur de faisceau du signal collecté. Cependant, nos simulations nous montrent que la bande RF des réseaux d'antennes patch est étroite. Pour cette raison, nous avons analysé la possibilité d'utiliser une autre solution : le réseau de transmission. C'est un réseau de plusieurs cellules qui déphase une onde afin de transformer son front de phase de forme planaire en forme sphérique. Le but de la matrice de transmission est de focaliser le faisceau collecté vers une antenne et mélangeur à double fentes. La thés démontre qu'un effet de focalisation satisfaisant est atteint sur une ligne. Nous avons fabriqué un tel réseau de transmission et l'avons testé en laboratoire. En raison des petites dimensions de quelques millimètres, ces tests sont difficiles à réaliser. Au sein de l'erreur de mesure, la conception et les simulations sont cohérentes. Une troisième option (d'une lentille planaire) a été étudiée dans la thèse : la plaque de zone. C'est un type particulier de réseau de transmission qui ne présente que deux déphasages de 0 ° et 180 °. Le plaque de zone focalise bien, mais est peu efficace. La dernière partie de la thèse introduit un type de diviseur de faisceau particulier qui permet une division du faisceau du signal OL vers un réseau de quatre mélangeurs très serrés. Diviser le faisceau avec des angles suffisamment petits est très difficile avec les réseaux de Fourier et Dammann classiques. Pour cette raison la méthode que nous avons proposée pour concevoir un tel diviseur est très novatrice. En effet, il permet la formation de motifs de faisceaux de forme arbitraire, qui ne sont pas limités par les ordres de diffraction. Les simulations montrent des efficacités allant jusqu'à 80% qui sont très bonnes en comparaison avec les réseaux classiques. En résumé, dans cette thèse, j'ai essayé plusieurs moyens radicalement différents pour simplifier les récepteurs hétérodynes et ouvrir la voie aux grandes matrices hétérodynes avec des centaines de pixels
The observation of the interstellar medium is very important at mm/(sub)mm/THz frequencies to understand how stars and planets form. Generally such observations rely on heterodyne receivers. These are instruments that achieve very high spectral resolution by down converting a high frequency signal towards a lower frequency one. In a heterodyne receiver the incoming signal is superimposed onto an artificial, well-known, monochromatic signal generated by the local oscillator (LO), chosen to be close to the frequency of the sky signal. The mixer produces the beat frequency signal. It has a frequency equivalent to the difference between the LO and sky signal frequency. Thus the sky signal is translated to a lower frequency, and it is easier to amplify and detect. Usually heterodyne receivers have only one spatial pixel with many frequency channels. Some prototypes have been realized recently with few pixels. Our objective is to develop arrays of hundreds of pixels. In order to do that, some components which compose the heterodyne receiver must be radically rethought, such as the receiving antenna and the LO beam divider.Indeed the receiving antenna generally consists of a double slot antenna on a lens, or a horn antenna. Such antennas are not the best choice for arrays of many pixels since they have to be machined and mounted individually. Instead it is convenient to develop planar structures which can be easily produced in bulk in a single process. In particular we designed and simulated arrays of patch antennas, transmit-arrays and zone plates. The array of patch antennas consists of an array of metallic patches connected via a microstrip line and separated from the ground plane by a dielectric substrate. This configuration takes advantage of the array factor to reduce the beamwidth of the incoming signal in place of the lens. However our simulations showed the array of patch antennas to be quite narrowband for a general purpose application, and quite difficult to realize. For this reason we also analyzed the possibility to use another solution such as the transmit-array. It is an array of several cells which provide a certain phase shift to an incoming wave in order to transform its phase front from planar to spherical. The purpose of the transmit-array is to focus the incoming beam towards a double slot antenna and a mixer placed below it. The simulations showed that a good focusing effect can be reached on a line. We fabricated such a transmit-array and tested it in the laboratory. Because of the small dimensions of a few millimeters these tests are difficult to carry out. Within the measurement error design and simulations are consistent. A third option of a planar lens was studied in the thesis: the zone plate. This is a particular kind of transmit-array which presents only two phase shift of 0° and 180°. The zone plates focus well, but are unfortunately not very efficient.The final part of the thesis introduces a particular kind of beam divider which allows beam splitting of the LO signal towards an array of four very closely packed mixers. To split the beam with such small relative angles is very difficult with the classical Fourier and Dammann grating, for this reason the method we proposed to design such a beam divider is very innovative. Indeed it allows the forming of arbitrary shaped beam patterns, which are not limited by the diffraction orders. Simulations show efficiencies up to 80% which are very good in comparison with classical gratings.In summary in this thesis I have tried several radically different approaches to simplify heterodyne receivers and made a first step towards for large heterodyne arrays with hundreds of pixels

APA, Harvard, Vancouver, ISO, and other styles

23

Mancuso, Vincent Chistopher. "I/Q imbalance compensation for wideband electronic intelligent receivers." Miami University / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=miami1386189393.

Full text

APA, Harvard, Vancouver, ISO, and other styles

24

Fandén, Petter. "Evaluation of Xilinx System Generator." Thesis, Linköping University, Department of Science and Technology, 2001. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1033.

Full text

Abstract:

This Master’s Thesis is an evaluation of the software Xilinx System Generator (XSG) and blockset for Matlab. XSG is a module to simulink developed by Xilinx in order to generate VHDL code directly from functions implemented in Matlab. The evaluation was made at Saab Avionics AB in Järfälla, north of Stockholm.

In order to investigate the performance of this new module XSG to simulink, a model of a frequency estimator often used in digital radar receivers were implemented in Matlab using XSG. Engineers working at SAAB Avionics implemented the same application directly in VHDL, without using Matlab and the XSG. After generating code the results were synthesised, analysed and compared.

The frequency estimator basically contains an FFT, a windowing function and a sorting algorithm used to enable analyse of two real signals simultaneously. There were however problems during generation of the VHDL code and the model had to be broken into smaller parts containing only a 16-point FFT. The results of comparison in this report are based on models containing only this 16-point FFT and they show a small advantage for the System Generator according to the resource usage report generated during synthesis.

Designing models for generation using Xilinx Blockset can create a lot of wiring between components. The reason for this is that the System Generator and Xilinx Blockset today is a new tool, not completely developed. There are many components found in simulink, Matlab that could not be found in Xilinx Blockset, this is however being improved. Another problem is long time for simulation and errors during generation.

My opinion is that when used for smaller systems and with further development the System Generator can be a useful facility in designing digital electronics.

APA, Harvard, Vancouver, ISO, and other styles

25

Dubbert, Dale F. "The RMS phase error of a phase-locked loop FM demodulator for standard NTSC video." Thesis, Kansas State University, 1986. http://hdl.handle.net/2097/9911.

Full text

APA, Harvard, Vancouver, ISO, and other styles

26

Xing, Chengwen, and 邢成文. "Linear minimum mean-square-error transceiver design for amplify-and-forward multiple antenna relaying systems." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2010. http://hub.hku.hk/bib/B44769738.

Full text

APA, Harvard, Vancouver, ISO, and other styles

27

Chitnis, Danial. "Single photon avalanche diodes for optical communications." Thesis, University of Oxford, 2013. http://ora.ox.ac.uk/objects/uuid:5fd582dd-8167-4fe4-88f8-871ba905ade1.

Full text

Abstract:

In order to improve the sensitivity of an optical receiver, the gain and the collection area of the photo-detectors within the receiver should be increased. Detectors with internal gain such as avalanche photodiodes (APD) are usually used to increase the sensitivity of the receiver. One problem with APDs is the sensitivity of their gain to their bias voltage, which makes them challenging to be fabricated in a standard CMOS process due to variations in their gain. However, when an APD is biased over its breakdown voltage, it is sensitive to a single photon, hence, referred to as a single photon avalanche diodes (SPAD). The SPADs are photon-counting detectors, which are less sensitive to their bias voltage, and can be integrated with rest of the electronic circuitry that form an optical receiver. An avalanche diode requires dedicated circuits to be operated in the SPAD mode. These circuits make the diode insensitive to an incident photon for a duration that is known as deadtime. Unfortunately, The collection area of the PD, APD, and SPADs are limited to their capacitance. Hence, a large photo-detector leads to a larger capacitance, which reduces the bandwidth of the receiver. In this thesis, a photon counting optical receiver based on an array of SPADs is proposed which increases the collection area with a low output capacitance. The avalanche diode and peripheral circuits which operate and readout-out the SPAD array are fabricated in the commercially available UMC 0.18 μm CMOS process. Initially, the avalanche diode is tested and characterised. A high performance circuit is then designed and tested which is able to achieve short deadtimes up to 4 ns. Once the photon counting operation of the SPAD is verified, a numerical model is developed to investigate the influence of several factors, including the deadtime, on the performance of the photon-counting detector in a communication link. Based on the simulation results, which show the advantages of an array over a single detector, a prototype detector array of 64 asynchronous SPADs is designed and tested. This array uses a high-speed readout mechanism which is inspired by the current steering digital-to-analogue converters. Bit error ratio tests (BERT) verify the photon counting capability of the proposed detector, and a bit error rate of 1E-3 has been achieved at data rate of 100 Mbps. In addition, the array of SPAD is compatible with a front-end of conventional optical receiver which uses a photodiode as a photo detector.

APA, Harvard, Vancouver, ISO, and other styles

28

Balaban, Halim Sinan. "Optimum Search Strategies For Electronic Support Measures Receivers." Master's thesis, METU, 2012. http://etd.lib.metu.edu.tr/upload/12614779/index.pdf.

Full text

Abstract:

Electronic Support Measures is a discipline of electronic warfare. In electronic support measures, receivers must maintain surveillance over the very wide portion of the electromagnetic spectrum in which threat emitters operate. In current receiver technology, it is not possible to have a receiver which is at once both able to discriminate multiple simultaneous emissions and highly sensitive. A common approach is to use a receiver with a relatively narrow bandwidth that sweeps its centre frequency over the threat bandwidth to search for emitters. The sequence and timing of changes in the centre frequency constitute a search strategy or sensor scheduling problem. A good electronic support receiver should observe the threat emitters, usually radars, very soon after it first begins transmitting, so in designing search strategy we would like to ensure that the intercept time is low or the probability of intercept after a specified time is high. In this thesis, we study the search strategies used in electronic support measures receivers. Moreover, a search strategy based on probability of intercept of the threats is proposed. The performances of the search strategies are compared at the end of the thesis.

APA, Harvard, Vancouver, ISO, and other styles

29

Yuan, Shuai, and Marc Antony Haddad. "Receiver Performance Simulation : System Verification for GSM Receiver." Thesis, University of Gävle, Department of Technology and Built Environment, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:hig:diva-706.

Full text

Abstract:

The purpose of this thesis is to build and then optimize a simulation environment for the GSM / EDGE / WCDMA receiver in the RF Asics.

The system generally consists of two blocks: an Agilent Advanced Design System (ADS) controlled system core and Simulation Environment System for Verification and Design (SEVED). The signal is generated by SEVED and directed into the system core, where the receiver under test is located. Signal output of the receiver is then directed back into SEVED for bit error rate calculations. Therefore the performance of the receiver can be evaluated.

APA, Harvard, Vancouver, ISO, and other styles

30

Metz, William. "Electronic Warfare Receiver Resource Management and Optimization." ScholarWorks, 2016. https://scholarworks.waldenu.edu/dissertations/2266.

Full text

Abstract:

Optimization of electronic warfare (EW) receiver scan strategies is critical to improving the probability of surviving military missions in hostile environments. The problem is that the limited understanding of how dynamic variations in radar and EW receiver characteristics has influenced the response time to detect enemy threats. The dependent variable was the EW receiver response time and the 4 independent variables were EW receiver revisit interval, EW receiver dwell time, radar scan time, and radar illumination time. Previous researchers have not explained how dynamic variations of independent variables affected response time. The purpose of this experimental study was to develop a model to understand how dynamic variations of the independent variables influenced response time. Queuing theory provided the theoretical foundation for the study using Little's formula to determine the ideal EW receiver revisit interval as it states the mathematical relationship among the variables. Findings from a simulation that produced 17,000 data points indicated that Little's formula was valid for use in EW receivers. Findings also demonstrated that variation of the independent variables had a small but statistically significant effect on the average response time. The most significant finding was the sensitivity in the variance of response time given minor differences of the test conditions, which can lead to unexpectedly long response times. Military users and designers of EW systems benefit most from this study by optimizing system response time, thus improving survivability. Additionally, this research demonstrated a method that may improve EW product development times and reduce the cost to taxpayers through more efficient test and evaluation techniques.

APA, Harvard, Vancouver, ISO, and other styles

31

Mercer, P. R. "Airborne ESM receivers : techniques and technologies." Thesis, Loughborough University, 1989. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.232818.

Full text

APA, Harvard, Vancouver, ISO, and other styles

32

Jonasson, Anders, and Nedim Ramiz. "Construction of a digital-TV receiver for second-generation satellite broadcasting : DVB-S2." Thesis, Linköping University, Department of Electrical Engineering, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-9881.

Full text

Abstract:

Digital television is one of the biggest broadcasting media available. All over the world television companies are rearranging their broadcasting from analogue to digital transmission. Former standard disagreements in the analogue era have lead to an agreement of one common European standard for digital television. Countries like USA and Japan have their own similar standards.

The report consists of two objectives; a survey of the most commonly used standards for digital television today and the construction of a prototype receiver for the second generation satellite DVB-standard.

A thorough literature study and careful design resulted in a fully functioning system. Measurements performed on the DVB-S sections gave exemplary results. Comparing these results with corresponding measurements performed on the DVB-S2 section showed much better performance for DVB-S2 with the same code rates. This shows some of the advantages of the new standard and proving the coding theory right. New coding algorithms make it possible to transmit more information on noisier channels of inferior quality. In laymen’s words; DVB-S2 gives a better picture and more television channels on the same satellite compared to DVB-S.

APA, Harvard, Vancouver, ISO, and other styles

33

Nortier, Benjamin J. "A spaceborne GPS receiver." Thesis, Stellenbosch : University of Stellenbosch, 2003. http://hdl.handle.net/10019.1/16407.

Full text

Abstract:

Thesis (MScIng)--University of Stellenbosch, 2003.
ENGLISH ABSTRACT: The purpose of this study was to develop a Global Positioning System (GPS) receiver for use on a Low-Earth Orbit (LEO) satellite. The study includes an examination of some of the fundamental GPS theory and how the LEO environment affects the operation of a GPS receiver. The hardware and software that was selected for the implementation are discussed. The reasons for porting the software to a new hardware platform and methods employed in the port are given. Thereafter the process of adapting the receiver software for use in space is given. To verify the operation in space, the receiver was subjected to LEO simulations using a GPS signal simulator. These results are shown and discussed. The tests indicated that the adaptations were successful and that the receiver will function on a LEO satellite.
AFRIKAANSE OPSOMMING: Die doel van die tesis was om ’n Globale Posisionerings Stelsel (GPS) ontvanger to ontwikkel vir gebruik op ’n lae-wentelbaan satelliet. Die studie begin met fundamentele GPS teorie en hoe die funksionering van die ontvanger be¨ınvloed word deur die wentelbaan van ’n satelliet. Die hardeware en sagteware vir die implementasie word bespreek. Die rede en metodes om die sagteware aan te pas om te werk op nuwe hardeware word gegee. Daarna word die proses om die sagteware aan te pas vir ruimtegebruik gegee. Om the verifieer dat die ontvanger wel sal kan werk op ’n satelliet was dit getoets in ’n gesimuleerde ruimte-omgewing met ’n GPS seinsimulator. Hierdie resultate word gegee en bespreek. Die toetse het gewys dat die aanpassings suksesvol was en dat die ontvanger in die ruimte sal funksioneer.

APA, Harvard, Vancouver, ISO, and other styles

34

Rankl, Tobias. "Performance and bounds of optical receivers with electronic detection and decoding." Aachen Shaker, 2010. http://d-nb.info/1001789091/04.

Full text

APA, Harvard, Vancouver, ISO, and other styles

35

SILVA, CLAUMIR SARZEDA DA. "PHEMT BALANCED PARAMETRIC FREQUENCY DIVIDER BY TWO FOR ELECTRONIC DEFENSE RECEIVERS." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 2009. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=15236@1.

Full text

Abstract:

PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO
Este trabalho aborda o desenvolvimento de divisores de freqüência por dois paramétricos balanceados a PHEMT, tendo, como motivação, seu emprego como conversores de freqüência em receptores digitais de Defesa Eletrônica. Estes dispositivos têm como características importantes a simplicidade de projeto, um número reduzido de componentes, a possibilidade de integração em circuitos monolíticos de microondas (MMIC), coerência de fase, banda de operação larga, resposta a sinal pulsado muito boa, supressão de harmônicos boa, insensibilidade a variações térmicas e ruído de fase baixo. Uma metodologia de projeto passo a passo é proposta, norteada pela obtenção de dispositivos com ganho máximo (ou perdas mínimas) e banda de operação maximizada. Duas configurações de circuito são consideradas: com ressoadores em paralelo (linhas acopladas) e em série. A caracterização dos divisores é realizada por meio de simulação e experimentalmente. Por fim, uma análise comparativa com a literatura disponível é apresentada, mostrando que alguns dos circuitos desenvolvidos e realizados alcançaram melhor desempenho.
This work assesses the development of PHEMT balanced parametric frequency dividers by two, intended for application as frequency converters on Electronic Defense digital receivers. The main characteristics of these devices are design simplicity, reduced number of components, possibility of integration in MMIC, phase coherence, wide bandwidth, very good pulse response, good harmonic suppression, insensitivity to thermal variations and low phase noise. A step-by-step design methodology is proposed, guide by maximum gain (or minimum loss) and maximized band device requirements. Two circuit topologies are considered: with either parallel (coupled lines) or series resonators. The characterization of the dividers is performed both through simulation and experimentally. Finally, a comparative analysis against literature results is presented, evidencing that some of the developed circuits achieve better performance.

APA, Harvard, Vancouver, ISO, and other styles

36

Rabén, Hans. "Receiver Front-End Design for WiMAX/LTE in 90 nm CMOS : Receiver Front-End Design for WiMAX/LTE in 90 nm CMOS." Thesis, University of Gävle, Ämnesavdelningen för elektronik, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:hig:diva-5425.

Full text

APA, Harvard, Vancouver, ISO, and other styles

37

Keith, James P. "Multipath errors induced by electronic components in receiver hardware." Ohio : Ohio University, 2002. http://www.ohiolink.edu/etd/view.cgi?ohiou1174679311.

Full text

APA, Harvard, Vancouver, ISO, and other styles

38

Mathur, Avinash. "Iterative LDPC CDMA receiver with EM estimation." Thesis, Wichita State University, 2007. http://hdl.handle.net/10057/1547.

Full text

Abstract:

This thesis proposed a scheme of obtaining an estimate of channel coefficient and noise power spectral density (PSD), using iterative expectation-maximization (EM) channel estimation, based on a low-density parity-check (LDPC) code-division multiple-access receiver. At the receiver, an initial estimate was obtained with the aid of pilot symbols. Pilot bits were distributed among subframes followed by spreading and binary phase-shift keying. Subsequent values of channel coefficient and noise PSD both were updated iteratively by the soft feedback from the LDPC decoder. The updated channel coefficient and noise PSD were iteratively passed to the LDPC decoder, which resulted in improved decoding accuracy. The algorithm was tested on both a single user for constant noise PSD and a more realistic multiuser environment for a time-varying interference-plus-noise PSD estimation.
Thesis (M.S.)--Wichita State University, College of Engineering, Dept. of Electrical and Computer Engineering
"July 2007."

APA, Harvard, Vancouver, ISO, and other styles

39

Mathur, Avinash Kwon Hyuck M. "Iterative LDPC CDMA receiver with EM estimation /." Thesis, A link to full text of this thesis in SOAR, 2007. http://hdl.handle.net/10057/1547.

Full text

APA, Harvard, Vancouver, ISO, and other styles

40

Hagos, Mussie Ghebreegziabiher. "S-band monopulse radar receiver design and implementation." Thesis, Stellenbosch : University of Stellenbosch, 2006. http://hdl.handle.net/10019.1/2876.

Full text

Abstract:

Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2006.
This thesis documents the design and implementation of an S-band receiver for phasecomparison monopulse radar. The design and evaluation of the various sub-systems involved in realizing the receiver are discussed in detail. The designed sub-systems are connected via low loss coaxial cables to form the complete phase-comparison monopulse radar receiver. The performance of the receiver is evaluated and compared with the theoretical results, in terms of frequency response, gain and noise figure. The designed receiver is finally connected to an existing antenna system, and a preliminary test of the complete radar is performed. The initial results show that the design is successful, but the boresight-axis of the radar has shifted in angle and requires pre-comparator phase shifting in order to obtain accurate tracking. ii

APA, Harvard, Vancouver, ISO, and other styles

41

Stenberg, Niklas. "Spoofing Mitigation Using Multiple GNSS-Receivers." Thesis, Linköpings universitet, Reglerteknik, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-158461.

Full text

Abstract:

Global Navigation Satellite Systems (GNSS) are used in a multitude of civilian as well as security related applications. GNSS-receivers are vulnerable to different types of spoofing attacks where the receiver is ``tricked'' to provide false position and time estimates. These attacks could have serious implications; hence, it is important to develop GNSS-receivers that are robust against spoofing attacks. This thesis investigates the use of multiple GNSS-receivers that exchange information such as pseudorange or carrier phase measurements in order to perform spoofing mitigation. It has previously been shown that carrier phase measurements from multiple receivers can be used to identify spoofing signals. The focus in this thesis is on investigating the possibility of using pseudorange measurements from two receivers to perform spoofing mitigation. The use of pseudoranges to perform spoofing mitigation is compared to the use of carrier phases. The spoofing attack is assumed to be performed using a single transmission antenna. This is exploited in order to identify the spoofing signals. The spoofing mitigation algorithms compute, for a pair of receivers, either pseudorange or carrier phase double differences. A double difference is the difference of two single differences for a satellite pair, where the single difference is the difference of pseudoranges or carrier phases measured from one satellite by a pair of receivers. The spoofing mitigation involves the identification of spoofing signals based on these calculated pseudorange or carrier phase double differences. The measurements obtained from identified spoofing signals are not used by the receivers in subsequent computations of position, velocity and time, thereby mitigating the effects of the spoofing attack. The spoofing mitigation algorithms were evaluated with the help of the software-defined GNSS-receiver GNSS-SDR, which was modified to acquire and track both authentic signals and spoofed signals. The spoofing mitigation algorithms were implemented and evaluated in MATLAB. Simulated meaconing attacks were created using a Spirent GNSS simulator. The evaluations indicate that spoofing mitigation is possible using pseudorange measurements from two receivers. However, the performance of the spoofing mitigation algorithms deteriorates for short distances between the receivers when pseudorange measurements are used. The use of carrier phase measurements for spoofing mitigation appears to be more appropriate for short distances between the receivers. The use of pseudoranges enabled quite fast identification of the spoofing signals for larger distances between the receivers. Most spoofing signals are identified within 30 seconds using pseudoranges and for distances larger than 20 meter between the receivers.

APA, Harvard, Vancouver, ISO, and other styles

42

Albu-Rghaif, Ali. "Multi-GNSS signals acquisition techniques for software defined receivers." Thesis, University of Buckingham, 2015. http://bear.buckingham.ac.uk/105/.

Full text

Abstract:

Any commercially viable wireless solution onboard Smartphones should resolve the technical issues as well as preserving the limited resources available such as processing and battery. Therefore, integrating/combining the process of more than one function will free up much needed resources that can be then reused to enhance these functions further. This thesis details my innovative solutions that integrate multi-GNSS signals of specific civilian transmission from GPS, Galileo and GLONASS systems, and process them in a single RF front-end channel (detection and acquisition), ideal for GNSS software receiver onboard Smartphones. During the course of my PhD study, the focus of my work was on improving the reception and processing of localisation techniques based on signals from multi-satellite systems. I have published seven papers on new acquisition solutions for single and multi-GNSS signals based on the bandpass sampling and the compressive sensing techniques. These solutions, when applied onboard Smartphones, shall not only enhance the performance of the GNSS localisation solution but also reduce the implementation complexity (size and processing requirements) and thus save valuable processing time and battery energy. Firstly, my research has exploited the bandpass sampling technique, if being a good candidate for processing multi-signals at the same time. This portion of the work has produced three methods. The first method is designed to detect the GPS, Galileo and GLONASS-CDMA signals’ presence at an early stage before the acquisition process. This is to avoid wasting processing resources that are normally spent on chasing signals not present/non-existent. The second focuses on overcoming the ambiguity when acquiring Galileo-OS signal at a code phase resolution equal to 0.5 Chip or higher and this achieved by multiplying the received signal with the generated sub-carrier frequency. This new conversion saves doing a complete correlation chain processing when compared to conventionally used methods. The third method simplifies the joining implementation of the Galileo-OS data-pilot signal acquisition by constructing an orthogonal signal so as to acquire them in a single correlation chain, yet offering the same performance as using two correlation chains. Secondly, the compressive sensing technique is used to acquire multi-GNSS signals to achieve computation complexity reduction over correlator based methods, like Matched Filter, while still maintaining acquisition integrity. As a result of this research work, four implementation methods were produced to handle single or multi-GNSS signals. The first of these methods is designed to change dynamically the number and the size of the required channels/correlators according to the received GPS signal-power during the acquisition process. This adaptive solution offers better fix capability when the GPS receiver is located in a harsh signal environment, or it will save valuable processing/decoding time when the receiver is outdoors. The second method enhances the sensing process of the compressive sensing framework by using a deterministic orthogonal waveform such as the Hadamard matrix, which enabled us to sample the signal at the information band and reconstruct it without information loss. This experience in compressive sensing led the research to manage more reduction in terms of computational complexity and memory requirements in the third method that decomposes the dictionary matrix (representing a bank of correlators), saving more than 80% in signal acquisition process without loss of the integration between the code and frequency, irrespective of the signal strength. The decomposition is realised by removing the generated Doppler shifts from the dictionary matrix, while keeping the carrier frequency fixed for all these generated shifted satellites codes. This novelty of the decomposed dictionary implementation enabled other GNSS signals to be combined with the GPS signal without large overhead if the two, or more, signals are folded or down-converted to the same intermediate frequency. The fourth method is, therefore, implemented for the first time, a novel compressive sensing software receiver that acquires both GPS and Galileo signals simultaneously. The performance of this method is as good as that of a Matched Filter implementation performance. However, this implementation achieves a saving of 50% in processing time and produces a fine frequency for the Doppler shift at resolution within 10Hz. Our experimental results, based on actual RF captured signals and other simulation environments, have proven that all above seven implementation methods produced by this thesis retain much valuable battery energy and processing resources onboard Smartphones.

APA, Harvard, Vancouver, ISO, and other styles

43

Kenington, P. B. "Tracking receiver design for the electronic 'beam squint' tracking system." Thesis, University of Bristol, 1989. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.235772.

Full text

APA, Harvard, Vancouver, ISO, and other styles

44

Kellerman, Valpre Cecilia. "Modular approach to the development of a two-way radio receiver system." Thesis, Stellenbosch : University of Stellenbosch, 2004. http://hdl.handle.net/10019.1/16362.

Full text

Abstract:

Thesis (MScIng)--University of Stellenbosch, 2004.
ENGLISH ABSTRACT: The preliminary development of a FM radio receiver module is discussed. An existing narrowband system operating between 48MHz and 50MHz will be replaced. Digital components were investigated, compared and used with analogue techniques to build a more flexible two-way radio receiver system. A direct digital synthesizer was considered as a replacement for the current synthesized phased lock loop local oscillator and much attention was given to the local oscillator and mixer design, characteristics and measurement procedures. A detailed study of receiver systems was undertaken to determine the specifications needed for every receiver component to achieve satisfactory receiver performance in the end. Receiver characteristics as well as receiver measurement procedures are defined. A software tool was developed to aid the design process, establishing computationally whether the receiver specifications are met prior to the final design. The complete design process, from fundamental specifications through to the developed final receiver module is discussed. A modular design approach was used to guarantee easy manufacturing, substitution and testing. This approach comprises the break-down of the receiver into well defined components that are each matched to 50O. The separate components of the system were designed, measured and characterized to make it possible to replace only a single component instead of the entire system when a part becomes redundant.
AFRIKAANSE OPSOMMING: Die grondslag vir die ontwikkeling van ‘n FM radio ontvanger module word in hierdie dokument gelê. ‘n Bestaande noubandstelsel wat tussen 48MHz and 50MHz ontvang word vervang deur hierdie nuwe stelsel wat aangewend sal kan word in die bestaande tweerigtingradio se omhulsel. Digitale komponente is ondersoek, vergelyk en gebruik saam met analoogtegnieke om ‘n meer buigsame radiostelsel te bewerkstellig. ‘n Direkte digitale sintitiseerder is oorweeg as ‘n vervanging vir die huidige fasesluitlus ossillator met heelwat klem op die oscillator-en mengerontwerp, komponent spesifikasies en metingsprosedures. ‘n Diepgaande studie van ontvangerstelsels is gedoen om te bepaal wat die tipiese spesifikasies vir elke ontvangerstadium is, sodat die finale ontvanger se spesifikasies behaal kan word. Ontvanger eienskappe en meetprosedures word volledig gedefinieer. ‘n Sagtewareprogram is ontwikkel om die ontvanger-ontwerpsproses te vergemaklik deur vooraf te kan vasstel watter ontvangerspesifikasies bereik sal kan word al dan nie. Die volledige ontwerpsproses, vanaf fundamentele spesifikasies tot by die finale ontvanger word omskryf. ‘n Modulere-ontwerp prosedure is gebruik ter versekering van die maklike vervaardiging, vervanging en toetsing van elke komponent. Die radio is tydens ontwerp opgebreek in boublokkies wat elkeen aangepas word na 50O. Elke aparte boublokkie van die ontvangerstelsel is afsonderlik ontwerp, gemeet en volledig gespesifiseer om dit moontlik te maak om slegs een komponent te vervang in plaas van die hele stelsel wanneer ‘n enkele komponent nie meer beskikbaar is nie.

APA, Harvard, Vancouver, ISO, and other styles

45

Lott, Gus K. Jr. "High Frequency (HF) radio signal amplitude characteristics, HF receiver site performance criteria, and expanding the dynamic range of HF digital new energy receivers by strong signal elimination [electronic resource]." Thesis, Monterey, California: Naval Postgraduate School, 1990. http://hdl.handle.net/10945/34806.

Full text

Abstract:

Approved for public release; distribution unlimited.
The dissertation discusses High Frequency (HF) radio sources. It consolidates data from all available, published HF spectrum surveys. The author conducted a new HF survey using detection of new energy events. The first cumulative probability distribution function for the amplitude of detected non-broadcast HF signals is developed, and the distribution is log-normal. HF receiver site performance quantification is possible using the HF signal distributions. Site performance degradation results from noise, interference, and signal path attenuation. Noise examples are presented in a 3-D format of time, frequency, and amplitude. Graphs are presented that allow estimation of the percentage of HF non-broadcast signals lost as a function of noise and interference levels. Limitations of HF search receivers using analog-to-digital converters as the receiver front-end are discussed. Derived bounds on AD converter performance show that today's digital technology does not provide enough dynamic range, sensitivity, or sampling rate. Alternative dynamic range extension methods are examined. A new method of dynamic range extension by removing the strongest signals present is presented. Greater receiver sensitivity results from changing the HF signal environment seen by the AD converter. The new method uses a phase-tracking network and signal reconstruction techniques.

APA, Harvard, Vancouver, ISO, and other styles

46

Venditti, Michael B. "Receiver, transmitter, and ASIC design for optoelectronic-VLSI applications." Thesis, McGill University, 2003. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=84444.

Full text

Abstract:

In modern digital systems, off-chip and intra-chip electrical interconnections suffer from a multitude of limitations as integrated circuits (ICs) continue to grow in size and processing capacity. Optical interconnects are capable of meeting the increasing I/O bandwidth needs in these systems. Optoelectronic-VLSI (OE-VLSI) technology incorporates optical I/O with ICs through the integration of arrays of optoelectronic devices with on-chip receiver and transmitter circuits. These optical I/Os are intended to replace or complement electrical interconnects for off-chip connections, and for connections between processing modules on the same chip or in a multi-chip module.
The design of receivers, transmitters, and OE-VLSI application-specific integrated circuits (ASICs) are described from a system implementation perspective. Numerous techniques to overcome technological problems and allow the successful operation of large receiver and transmitter arrays are considered. The use of a fully differential optical and electrical architecture is strongly advocated. The testing of receiver and transmitter circuits and skew in highly parallel and synchronous digital systems employing optical receivers is also considered.
The major portion of this thesis details the design, construction, and optical and electrical testing of two OE-VLSI ASICs. The experiences obtained during the design and test of these ASICs, in conjunction with further analytical and simulation-based analyses, resulted in the conclusion that a fully differential optical and electrical architecture is optimal for OE-VLSI applications. The remainder of the thesis considers receiver and transmitter testing and the integration of testing methodologies at the ASIC level, and the management of skew in large receiver arrays.

APA, Harvard, Vancouver, ISO, and other styles

47

Abboud, Nagi N. "Receiver structures and performance analysis for fading multipath channels." Thesis, McGill University, 1994. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=69781.

Full text

Abstract:

In this research, we introduce a model for a fading multipath channel. The channel impulse response consists of an infinite series of $ delta$-functions whose amplitude has a Ricean probability density function and whose phases are randomly distributed. The arrival times of the various pulses follow a non-homogeneous Poisson process. This model is well structured and quite flexible for characterization of mobile and indoor radio environment. A Bayesian decision approach is employed for the derivation of the optimal receiver for this channel model with additive white Gaussian noise (AWGN). Simplified forms of the receiver are presented under assumption of high and low SNR. The performance of the system is investigated for the high SNR case when the intensity of the Poisson process is constant. In this case, the performance of this system is compared to what has been found for differential phase shift keying (DPSK) when using diversity reception. A performance analysis is also done for a more realistic situation when the rate of the Poisson process is a decaying oscillatory function. This non-homogeneous Poisson process generates the observed phenomenon of ray clustering.

APA, Harvard, Vancouver, ISO, and other styles

48

Mysore, Naveen. "Turbo-coded MIMO systems : receiver design and performance analysis." Thesis, McGill University, 2006. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=100662.

Full text

Abstract:

Future wireless communication systems will have to support large uplink/downlink data rates within the allocated frequency spectrum in order to support emerging multi-media applications. Recently explored multiple antenna or multi-input multi-output (MIMO) systems have the potential of achieving large increases in wireless channel capacities and spectral efficiencies. However, powerful channel codes and sophisticated signal processing techniques are required to achieve these increases for low signal-to-noise ratios and in the presence of multipath fading. Motivated by the third generation wire-less standard and efforts towards fourth generation systems, this dissertation explores turbo-coded uplink transmission over Rayleigh faded MIMO channels, when channel state information is available only at the receiver (base-station). In this context, unlike previously proposed MIMO signal detection techniques of exponential or polynomial complexity, we first derive a novel soft-decision MIMO signal detector, which is of linear complexity in the number of transmit antennas, receive antennas and users.
The proposed detector is integrated into a new iterative receiver for turbo-coded MIMO systems and simulation results are presented for various antenna configurations on slow, frequency non-selective Rayleigh fading channels. The explored MIMO systems achieve target bit error rate (BER) performance of 10-5 within 1.5 to 2.9 dB of the ergodic capacity limit in single and multi-user scenarios. Furthermore, system performance is shown to be robust to the effects of spatial correlation, channel estimation errors and imperfect power control. In addition, turbo-coded digital recording systems with multiple heads and tracks were considered as a further application of the proposed detector and iterative receiver. Good BER performance is achieved in these systems despite strong intertrack and intersymbol interference.
Finally, we extend the union bound based method from turbo codes on the Gaussian noise channel to the proposed turbo-coded systems on wireless MIMO channels. Calculated bounds on BER performance are within 0.5 to 0.8 dB of the simulated results in the error floor region. In addition, a new performance analysis technique is proposed, which provides BER performance bounds within 0.1 to 0.5 dB of the simulated performance in the waterfall region. Furthermore, the latter technique can also provide accurate bounds for selected coded digital recording systems.

APA, Harvard, Vancouver, ISO, and other styles

49

Sheng, Xiaoqin. "RF Mixer Design for Zero IF Wi-Fi Receiver in CMOS." Thesis, Linköping University, Department of Electrical Engineering, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2771.

Full text

Abstract:

In this thesis work, a design of RF down-conversion mixer for WLAN standard, such as Wi-Fi or Bluetooth is presented. The target technology is 0.35um CMOS process. Several mixer topologies are analyzed and simulated at the schematic level using the Cadence Spectre-RF software. The active double balanced mixer is chosen for the ultimate implementation. For this mixer simulation results from schematic level to layout level are presented and discussed in detail.

To build an RF front-end, the complete mixer is integrated with an available LNA block. The performance of the front-end is evaluated as well. The obtained simulation results satisfy the specification for Wi-Fi standard.

Since the RF front-end is designed for testability, the fault simulation is incorporated as well. So the performance of the front end is also evaluated for so called “spot defects”, typical of CMOS technology. They are modeled using resistive shorts or opens in the circuit.

APA, Harvard, Vancouver, ISO, and other styles

50

Rankl, Tobias [Verfasser]. "Performance and Bounds of Optical Receivers with Electronic Detection and Decoding / Tobias Rankl." Aachen : Shaker, 2010. http://d-nb.info/112254619X/34.

Full text

APA, Harvard, Vancouver, ISO, and other styles

Dissertations / Theses on the topic 'Receivers (Electronics)'

Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles