Academic literature on the topic 'Reconfigurable caches'
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Journal articles on the topic "Reconfigurable caches"
Begum, B. Shameedha, and N. Ramasubramanian. "Design of an Intelligent Data Cache with Replacement Policy." International Journal of Embedded and Real-Time Communication Systems 10, no. 2 (April 2019): 87–107. http://dx.doi.org/10.4018/ijertcs.2019040106.
Full textZhu, Wei, and Xiaoyang Zeng. "Decision Tree-Based Adaptive Reconfigurable Cache Scheme." Algorithms 14, no. 6 (June 1, 2021): 176. http://dx.doi.org/10.3390/a14060176.
Full textHo, Nam, Paul Kaufmann, and Marco Platzner. "Evolution of application-specific cache mappings." International Journal of Hybrid Intelligent Systems 16, no. 3 (September 28, 2020): 149–61. http://dx.doi.org/10.3233/his-200281.
Full textYang, Xue-Jun, Jun-Jie Wu, Kun Zeng, and Yu-Hua Tang. "Managing Data-Objects in Dynamically Reconfigurable Caches." Journal of Computer Science and Technology 25, no. 2 (March 2010): 232–45. http://dx.doi.org/10.1007/s11390-010-9320-6.
Full textRanganathan, Parthasarathy, Sarita Adve, and Norman P. Jouppi. "Reconfigurable caches and their application to media processing." ACM SIGARCH Computer Architecture News 28, no. 2 (May 2000): 214–24. http://dx.doi.org/10.1145/342001.339685.
Full textHuang, Yuanwen, and Prabhat Mishra. "Vulnerability-Aware Energy Optimization for Reconfigurable Caches in Multitasking Systems." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 38, no. 5 (May 2019): 809–21. http://dx.doi.org/10.1109/tcad.2018.2834410.
Full textBengueddach, A., B. Senouci, S. Niar, and B. Beldjilali. "Two-level caches tuning technique for energy consumption in reconfigurable embedded MPSoC." Journal of Systems Architecture 59, no. 8 (September 2013): 656–66. http://dx.doi.org/10.1016/j.sysarc.2013.05.018.
Full textCoole, James, and Greg Stitt. "Traversal Caches: A Framework for FPGA Acceleration of Pointer Data Structures." International Journal of Reconfigurable Computing 2010 (2010): 1–16. http://dx.doi.org/10.1155/2010/652620.
Full textAzad, Zahra, Hamed Farbeh, Amir Mahdi Hosseini Monazzah, and Seyed Ghassem Miremadi. "AWARE: Adaptive Way Allocation for Reconfigurable ECCs to Protect Write Errors in STT-RAM Caches." IEEE Transactions on Emerging Topics in Computing 7, no. 3 (July 1, 2019): 481–92. http://dx.doi.org/10.1109/tetc.2017.2701880.
Full textKIM, YOONJIN. "POWER-EFFICIENT CONFIGURATION CACHE STRUCTURE FOR COARSE-GRAINED RECONFIGURABLE ARCHITECTURE." Journal of Circuits, Systems and Computers 22, no. 03 (March 2013): 1350001. http://dx.doi.org/10.1142/s0218126613500011.
Full textDissertations / Theses on the topic "Reconfigurable caches"
Ramaswamy, Subramanian. "Active management of Cache resources." Diss., Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/24663.
Full textBrewer, Jeffery R. "Reconfigurable cache memory /." Available to subscribers only, 2009. http://proquest.umi.com/pqdweb?did=1885437651&sid=8&Fmt=2&clientId=1509&RQT=309&VName=PQD.
Full textBrewer, Jeffery Ramon. "Reconfigurable Cache Memory." OpenSIUC, 2009. https://opensiuc.lib.siu.edu/theses/48.
Full textJUPALLY, RAGHAVENDRA PRASADA RAO. "IMPLEMENTATION OF RECONFIGURABLE COMPUTING CACHE ARCHITECTURE." OpenSIUC, 2010. https://opensiuc.lib.siu.edu/theses/336.
Full textBond, Paul Joseph. "Design and analysis of reconfigurable and adaptive cache structures." Diss., Georgia Institute of Technology, 1995. http://hdl.handle.net/1853/14983.
Full textHo, Nam [Verfasser]. "FPGA-based reconfigurable cache mapping schemes: design and optimization / Nam Ho." Paderborn : Universitätsbibliothek, 2018. http://d-nb.info/1167856481/34.
Full textBani, Ruchi Rastogi Mohanty Saraju. "A new N-way reconfigurable data cache architecture for embedded systems." [Denton, Tex.] : University of North Texas, 2009. http://digital.library.unt.edu/ark:/67531/metadc12079.
Full textBani, Ruchi Rastogi. "A New N-way Reconfigurable Data Cache Architecture for Embedded Systems." Thesis, University of North Texas, 2009. https://digital.library.unt.edu/ark:/67531/metadc12079/.
Full textJunior, Roberto Borges Kerr. "Proposta e desenvolvimento de um algoritmo de associatividade reconfigurável em memórias cache." Universidade de São Paulo, 2008. http://www.teses.usp.br/teses/disponiveis/3/3141/tde-01102008-135441/.
Full textWith the constant evolution of processors architecture, its getting even bigger the overhead generated with memory access. Trying to avoid this problem, some processors developers are using several techniques to improve the performance, as the use of cache memories. By the otherside, cache memories cannot supply all their needs, thats why its important some new technique that could use better the cache memory. Working on this problem, some authors are using reconfigurable computing to improve the cache memorys performance. This work analyses the reconfiguration of the cache memory associativity algorithm, and propose some improvements on this algorithm to better use its resources, showing some practical results from simulations with several cache organizations.
Avakian, Annie. "Reducing Cache Access Time in Multicore Architectures Using Hardware and Software Techniques." University of Cincinnati / OhioLINK, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1335461322.
Full textBook chapters on the topic "Reconfigurable caches"
Ofori-Attah, Emmanuel, Xiaohang Wang, and Michael Opoku Agyeman. "A Survey of Low Power Design Techniques for Last Level Caches." In Applied Reconfigurable Computing. Architectures, Tools, and Applications, 217–28. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-78890-6_18.
Full textBenitez, D., J. C. Moure, D. I. Rexachs, and E. Luque. "A Reconfigurable Data Cache for Adaptive Processors." In Reconfigurable Computing: Architectures and Applications, 230–42. Berlin, Heidelberg: Springer Berlin Heidelberg, 2006. http://dx.doi.org/10.1007/11802839_31.
Full textNavarro, Osvaldo, and Michael Huebner. "Runtime Adaptive Cache for the LEON3 Processor." In Applied Reconfigurable Computing. Architectures, Tools, and Applications, 343–54. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-78890-6_28.
Full textHan, Xing, Jiang Jiang, Yuzhuo Fu, and Chang Wang. "Reconfigurable Many-Core Processor with Cache Coherence." In Communications in Computer and Information Science, 198–207. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-41635-4_21.
Full textHu, Sensen, Anthony Brandon, Qi Guo, and Yizhuo Wang. "Improving the Performance of Adaptive Cache in Reconfigurable VLIW Processor." In Lecture Notes in Computer Science, 3–15. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-56258-2_1.
Full textVergos, Haridimos T., Dimitris Nikolos, Petros Mitsiadis, and Chrisovalantis Kavousianos. "Reconfigurable CPU Cache Memory Design: Fault Tolerance and Performance Evaluation." In VLSI: Integrated Systems on Silicon, 103–14. Boston, MA: Springer US, 1997. http://dx.doi.org/10.1007/978-0-387-35311-1_9.
Full text"Defect Rate Analysis & Reduction of MPSOC Through Run Time Reconfigurable Computing with Multiple Caches." In International Conference on Computer Technology and Development, 3rd (ICCTD 2011), 413–18. ASME Press, 2011. http://dx.doi.org/10.1115/1.859919.paper71.
Full textVéstias, Mário Pereira. "Field-Programmable Gate Array." In Encyclopedia of Information Science and Technology, Fifth Edition, 257–70. IGI Global, 2021. http://dx.doi.org/10.4018/978-1-7998-3479-3.ch020.
Full textConference papers on the topic "Reconfigurable caches"
Naz, Afrin, Krishna Kavi, JungHwan Oh, and Pierfrancesco Foglia. "Reconfigurable split data caches." In the 2007 ACM symposium. New York, New York, USA: ACM Press, 2007. http://dx.doi.org/10.1145/1244002.1244160.
Full textDahlgren, Fredrik, and Per Stenström. "On reconfigurable on-chip data caches." In the 24th annual international symposium. New York, New York, USA: ACM Press, 1991. http://dx.doi.org/10.1145/123465.123504.
Full textRanganathan, Parthasarathy, Sarita Adve, and Norman P. Jouppi. "Reconfigurable caches and their application to media processing." In the 27th annual international symposium. New York, New York, USA: ACM Press, 2000. http://dx.doi.org/10.1145/339647.339685.
Full textDonvanavard, Brvan, Amir Mahdi Hosseini Monazzah, Nikil Dutt, and Tiago Muck. "Exploring Hybrid Memory Caches in Chip Multiprocessors." In 2018 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). IEEE, 2018. http://dx.doi.org/10.1109/recosoc.2018.8449386.
Full textTada, Jubee, Masayuki Sato, and Ryusuke Egawa. "An Adaptive Demotion Policy for High-Associativity Caches." In HEART2017: The 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. New York, NY, USA: ACM, 2017. http://dx.doi.org/10.1145/3120895.3120906.
Full textHo, Nam, Paul Kaufmann, and Marco Platzner. "Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor." In 2017 International Conference on Field Programmable Technology (ICFPT). IEEE, 2017. http://dx.doi.org/10.1109/fpt.2017.8280144.
Full textHuang, Yuanwen, and Prabhat Mishra. "Vulnerability-Aware Energy Optimization Using Reconfigurable Caches in Multicore Systems." In 2017 IEEE 35th International Conference on Computer Design (ICCD). IEEE, 2017. http://dx.doi.org/10.1109/iccd.2017.44.
Full textHo, Nam, Paul Kaufmann, and Marco Platzner. "Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure." In 2014 IEEE International Conference on Evolvable Systems (ICES). IEEE, 2014. http://dx.doi.org/10.1109/ices.2014.7008719.
Full textBengueddach, A., B. Senouci, S. Niar, and B. Beldjilali. "Energy consumption in reconfigurable mpsoc architecture: Two-level caches optimization oriented approach." In 2013 Design and Test Symposium (IDT). IEEE, 2013. http://dx.doi.org/10.1109/idt.2013.6727118.
Full textNavarro, Osvaldo, Tim Leiding, and Michael Hubner. "Configurable cache tuning with a victim cache." In 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). IEEE, 2015. http://dx.doi.org/10.1109/recosoc.2015.7238080.
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