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Journal articles on the topic 'Reconfigurable computing systems'

Author: Grafiati

Published: 5 June 2025

Last updated: 2 August 2025

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1

Bondalapati, K., and V. K. Prasanna. "Reconfigurable computing systems." Proceedings of the IEEE 90, no. 7 (2002): 1201–17. http://dx.doi.org/10.1109/jproc.2002.801446.

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2

Rana, Navreet Kaur. "Intelligent Reconfigurable Computing Systems." IOSR Journal of Engineering 02, no. 09 (2012): 32–37. http://dx.doi.org/10.9790/3021-02923237.

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3

Schevelev, S. S. "Reconfigurable Modular Computing System." Proceedings of the Southwest State University 23, no. 2 (2019): 137–52. http://dx.doi.org/10.21869/2223-1560-2019-23-2-137-152.

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Purpose of research. A reconfigurable computer system consists of a computing system and special-purpose computers that are used to solve the tasks of vector and matrix algebra, pattern recognition. There are distinctions between matrix and associative systems, neural networks. Matrix computing systems comprise a set of processor units connected through a switching device with multi-module memory. They are designed to solve vector, matrix and data array problems. Associative systems contain a large number of operating devices that can simultaneously process multiple data streams. Neural networ

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4

Eckert, Marcel, Dominik Meyer, Jan Haase, and Bernd Klauer. "Operating System Concepts for Reconfigurable Computing: Review and Survey." International Journal of Reconfigurable Computing 2016 (2016): 1–11. http://dx.doi.org/10.1155/2016/2478907.

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One of the key future challenges for reconfigurable computing is to enable higher design productivity and a more easy way to use reconfigurable computing systems for users that are unfamiliar with the underlying concepts. One way of doing this is to provide standardization and abstraction, usually supported and enforced by an operating system. This article gives historical review and a summary on ideas and key concepts to include reconfigurable computing aspects in operating systems. The article also presents an overview on published and available operating systems targeting the area of reconf

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5

Shevelev, S. S. "RECONFIGURABLE COMPUTING MODULAR SYSTEM." Radio Electronics, Computer Science, Control 1, no. 1 (2021): 194–207. http://dx.doi.org/10.15588/1607-3274-2021-1-19.

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Context. Modern general purpose computers are capable of implementing any algorithm, but when solving certain problems in terms of processing speed they cannot compete with specialized computing modules. Specialized devices have high performance, effectively solve the problems of processing arrays, artificial intelligence tasks, and are used as control devices. The use of specialized microprocessor modules that implement the processing of character strings, logical and numerical values, represented as integers and real numbers, makes it possible to increase the speed of performing arithmetic o

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Martyshkin, A. I., I. A. Kiryutkin, and E. A. Merenyasheva. "Autotesting an Embedded Reconfigurable Computing System." Proceedings of the Southwest State University 27, no. 1 (2023): 140–52. http://dx.doi.org/10.21869/2223-1560-2023-27-1-140-152.

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Purpose of research. The main idea is to build a mathematical testing model that integrates different aspects of an embedded reconfigurable computing system and its interactions. This model provides an efficient representation of test scenarios and allows to analyse the dynamics of the reconfigurable computing system during testing. The paper also discusses methods for generating test sequences based on the properties of a finite state machine.Methods. The authors propose to represent the autotest as a finite state Mile machine, where states serve to store information about the current state o

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7

Andrews, David. "Operating Systems Research for Reconfigurable Computing." IEEE Micro 34, no. 1 (2014): 54–58. http://dx.doi.org/10.1109/mm.2014.1.

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Moghaddaszadeh, Mohammadreza, Mohamed Mousa, Amjad Aref, and Mostafa Nouh. "Reconfigurable metamaterial neuromorphic computing." Journal of the Acoustical Society of America 152, no. 4 (2022): A37. http://dx.doi.org/10.1121/10.0015459.

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Neuromorphic computing was originally introduced in electronic circuits to mimic neuro-biological architectures. In these systems, a physical agent (e.g., an electromagnetic or acoustic wave) propagates through multiple layers of metasurfaces which are trained to perform a computational task (e.g., classification). Despite their potential, current neuromorphic metasurfaces rely on passive designs which limits their computational power to a single task. Furthermore, attempts to realize these systems in the context of mechanical wave propagation have been very scarce. This work presents a neurom

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9

Levin, I. I., and M. D. Chekina. "THE PARALLEL-PIPELINED IMPLEMENTATION OF THE FRACTAL IMAGE COMPRESSION FOR RECONFIGURABLE COMPUTING SYSTEMS." Vestnik komp'iuternykh i informatsionnykh tekhnologii, no. 202 (April 2021): 37–44. http://dx.doi.org/10.14489/vkit.2021.04.pp.037-044.

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The developed fractal image compression method, implemented for reconfigurable computing systems is described. The main idea parallel fractal image compression based on parallel execution pairwise comparison of domain and rank blocks. Achievement high performance occurs at the expense of simultaneously comparing maximum number of pairs. Implementation fractal image compression for reconfigurable computing systems has two critical resources, as number of input channels and FPGA Look-up Table (LUT). The main critical resource for fractal image compression is data channels, and implementation thi

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Bazargan, K., R. Kastner, and M. Sarrafzadeh. "Fast template placement for reconfigurable computing systems." IEEE Design & Test of Computers 17, no. 1 (2000): 68–83. http://dx.doi.org/10.1109/54.825678.

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11

Bagchi, Susmit. "Self-adaptive and reconfigurable distributed computing systems." Applied Soft Computing 12, no. 9 (2012): 3023–33. http://dx.doi.org/10.1016/j.asoc.2012.04.031.

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12

Kozov, Aleksei V. "MODELS AND DESIGNING METHODS FOR THE DYNAMICALLY RECONFIGURABLE GROUP CONTROL SYSTEM FOR MOBILE ROBOTS." АВТОМАТИЗАЦИЯ ПРОЦЕССОВ УПРАВЛЕНИЯ 63, no. 1 (2021): 130–39. http://dx.doi.org/10.35752/1991-2927-2021-1-63-130-139.

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High adaptability is an important requirement for the control system over a group of mobile robots operating in a nondeterministic changing environment. The group control system must ensure that the group task is completed when the structure of the group or the environment changes. Such adaptability can be achieved through dynamic reconfiguration of the control system. The article discusses the mathematical models of a dynamically reconfigurable system from the standpoint of computer-aided design. A review of mathematical models of variable structure system, reconfigurable control systems and

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Dichenko, Aleksey, Dmitry Sorokin, and Ilya Levin. "PRINCIPLES OF PLACING COMPUTING STRUCTURES ON FPGAS OF RECONFIGURABLE COMPUTING SYSTEMS." Deutsche internationale Zeitschrift für zeitgenössische Wissenschaft 79 (May 7, 2024): 54–63. https://doi.org/10.5281/zenodo.11127391.

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In the article we consider the problem of achieving high clock frequencies on reconfigurable computing systems with a high degree of utilization of FPGA resources.There are a number of architectural and geometric features of FPGAs, as well as features of the implemented computational structures, which modern CAD systems do not take into account when automatically placing primitives on the FPGA field. This leads to a non-optimal arrangement of functionally dependent primitives on the FPGA field and, as a consequence, an unacceptable length of connections between them. Therefore, the clock frequ

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14

Kumari, Pilli Lalitha, S. M. K. Sukumar Reddy, and Sasikala Devireddy. "Flexible Real-Time Operating System Co-Design Flow for Embedded Computing Systems." International Journal of Scientific Methods in Engineering and Management 01, no. 06 (2023): 26–33. http://dx.doi.org/10.58599/ijsmem.2023.1604.

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The adaptability of software portability and the strength of hardware efficiency can both benefit a system with the ability to alter its configuration. This signifies a significant shift in the way embedded programmes are conceived about and developed. There has not been a comprehensive design methodology provided for run-time reconfigurable systems that enable real-time operating systems, despite the fact that many different reconfigurable technologies and tools based on those technologies have been developed. The RTOS, or real-time operating system, is an integral part of system and co-desig

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15

Pajuelo-Holguera, Francisco, Juan A. Gómez-Pulido, and Fernando Ortega. "Performance of Two Approaches of Embedded Recommender Systems." Electronics 9, no. 4 (2020): 546. http://dx.doi.org/10.3390/electronics9040546.

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Nowadays, highly portable and low-energy computing environments require programming applications able to satisfy computing time and energy constraints. Furthermore, collaborative filtering based recommender systems are intelligent systems that use large databases and perform extensive matrix arithmetic calculations. In this research, we present an optimized algorithm and a parallel hardware implementation as good approach for running embedded collaborative filtering applications. To this end, we have considered high-level synthesis programming for reconfigurable hardware technology. The design

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16

Yasudo, Ryota, José G. F. Coutinho, Ana-Lucia Varbanescu, et al. "Analytical Performance Estimation for Large-Scale Reconfigurable Dataflow Platforms." ACM Transactions on Reconfigurable Technology and Systems 14, no. 3 (2021): 1–21. http://dx.doi.org/10.1145/3452742.

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Next-generation high-performance computing platforms will handle extreme data- and compute-intensive problems that are intractable with today’s technology. A promising path in achieving the next leap in high-performance computing is to embrace heterogeneity and specialised computing in the form of reconfigurable accelerators such as FPGAs, which have been shown to speed up compute-intensive tasks with reduced power consumption. However, assessing the feasibility of large-scale heterogeneous systems requires fast and accurate performance prediction. This article proposes Performance Estimation

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17

Rutten, Eric. "Supervisory control of adaptive and reconfigurable computing systems." IFAC Proceedings Volumes 42, no. 4 (2009): 1649–54. http://dx.doi.org/10.3182/20090603-3-ru-2001.0221.

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18

Vuletic, M., L. Pozzi, and P. Ienne. "Seamless Hardware-Software Integration in Reconfigurable Computing Systems." IEEE Design and Test of Computers 22, no. 2 (2005): 102–13. http://dx.doi.org/10.1109/mdt.2005.44.

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19

Mahram, Atabak, and Martin C. Herbordt. "NCBI BLASTP on High-Performance Reconfigurable Computing Systems." ACM Transactions on Reconfigurable Technology and Systems 7, no. 4 (2015): 1–20. http://dx.doi.org/10.1145/2629691.

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20

Edwards, Martyn, and Peter Green. "Run-time support for dynamically reconfigurable computing systems." Journal of Systems Architecture 49, no. 4-6 (2003): 267–81. http://dx.doi.org/10.1016/s1383-7621(03)00068-7.

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21

Aqeel Iqbal, M., Farooque Azam, Uzma Saeed Awan, and Saifullah Hammad. "Performance Enhancement Techniques for Modern Reconfigurable Computing Systems." International Journal of Computer Applications 27, no. 9 (2011): 33–38. http://dx.doi.org/10.5120/3327-4577.

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22

JÓZWIAK, LECH, and NADIA NEDJAH. "MODERN ARCHITECTURES FOR EMBEDDED RECONFIGURABLE SYSTEMS — A SURVEY." Journal of Circuits, Systems and Computers 18, no. 02 (2009): 209–54. http://dx.doi.org/10.1142/s0218126609005034.

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Reconfigurable systems, exploiting a mixture of the traditional CPU-centric instruction-stream-based processing with the decentralized parallel application-specific data-dominated processing, provide a drastically higher performance and lower power consumption than the traditional CPU-centric systems. They do it at much lower costs and shorter times to market than the not reconfigurable hardware solutions. They also provide the flexibility that is often required for engineering of modern robust and adaptive systems. Due to their heterogeneity, flexibility and potential for highly optimized app

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23

Green, Leigh Ann. "Brain-like computing systems show neural functions in a single chip." Scilight 2023, no. 6 (2023): 061101. http://dx.doi.org/10.1063/10.0017230.

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24

Plaks, ToomasP, MarcoD Santambrogio, and Donatella Sciuto. "Reconfigurable Computing and Hardware/Software Codesign." EURASIP Journal on Embedded Systems 2008, no. 1 (2008): 731830. http://dx.doi.org/10.1155/2008/731830.

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25

C, Venkatesan, Yu-Dong Zhang, Chow Chee Onn, and Yong Shi. "Introduction to the Special Issue on Next Generation Pervasive Reconfigurable Computing for High Performance Real Time Applications." Scalable Computing: Practice and Experience 25, no. 5 (2024): 4407–10. http://dx.doi.org/10.12694/scpe.v25i5.4333.

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The evolution of scientific computing is reshaping the hardware and software requirements, emphasizing the need for high-performance platforms adaptable to real-time applications. Traditional methods with general-purpose processors often lack the agility needed for swift modifications and fast computations during real-time tasks. Reconfigurable computing offers a compelling solution by integrating hardware speed and software flexibility on a unified platform. This technique promises significant acceleration across diverse applications like image processing, encryption, decryption, runtime oper

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26

Hochberger, Christian, and Brent Nelson. "Special Issue on Applied Reconfigurable Computing." Journal of Signal Processing Systems 93, no. 5 (2021): 461–62. http://dx.doi.org/10.1007/s11265-021-01653-3.

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27

Hannig, Frank, and Steven Derrien. "Special Issue on Applied Reconfigurable Computing." Journal of Signal Processing Systems 94, no. 9 (2022): 847–48. http://dx.doi.org/10.1007/s11265-022-01806-y.

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28

Chiu, Matt, and Martin C. Herbordt. "Molecular Dynamics Simulations on High-Performance Reconfigurable Computing Systems." ACM Transactions on Reconfigurable Technology and Systems 3, no. 4 (2010): 1–37. http://dx.doi.org/10.1145/1862648.1862653.

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29

Chen, Zhi, Meikang Qiu, Zhong Ming, Laurence T. Yang, and Yongxin Zhu. "Clustering scheduling for hardware tasks in reconfigurable computing systems." Journal of Systems Architecture 59, no. 10 (2013): 1424–32. http://dx.doi.org/10.1016/j.sysarc.2013.05.015.

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30

Tissot, Y., G. A. Russell, K. J. Symington, and J. F. Snowdon. "Optimization of reconfigurable optically interconnected systems for parallel computing." Journal of Parallel and Distributed Computing 66, no. 2 (2006): 238–47. http://dx.doi.org/10.1016/j.jpdc.2005.07.005.

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31

Ferrandi, Fabrizio, Patrick Lysaght, and Ryan Kastner. "Guest Editorial Special Section on Embedded Reconfigurable Computing Systems." IEEE Embedded Systems Letters 3, no. 3 (2011): 75–76. http://dx.doi.org/10.1109/les.2011.2168890.

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32

Ivashchenko, V., G. Shvachych, O. Ivashchenko, and L. Sushko. "High- performance multiprocessor systems." System technologies 2, no. 139 (2022): 88–99. http://dx.doi.org/10.34185/1562-9945-2-139-2022-09.

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The paper is devoted to the modeling of high-performance multiprocessor architecture for data processing systems used to solve problems with an expandable calculations' area. The proposed system is characterized by high reliability and high energy efficiency. The system contains a separate reconfigurable network for the exchange of data between computing nodes, managed switches. The system also provides network booting nodes and redundancy mechanism of key components.

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33

Dr., AJITESH S. BAGHEL. "DISTRIBUTED HETEROGENEOUS COMPUTING SYSTEMS FOR TASK SCHEDULING ALGORITHMS." Journal of the Maharaja Sayajirao University of Baroda Volume-54,, No.2 (XI) 2020 (2024): 79–89. https://doi.org/10.5281/zenodo.10805402.

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<strong>ABSTRACT</strong>Fast computing meets truly expanding constant computational requests through the  utilizing of adaptability and parallelism. The adaptability is accomplished when computing platform planned  with  heterogeneous  assets  to  help  diverse  tasks  of  an  application  where  as  task scheduling brings equal handling. The productive task scheduling is  basic to get enhanced performance in heterogeneous computing Systems (HCS). In this paper, we brought an audit of  dif

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34

Shi, Kaisheng, Mingwei Wang, Xin Tan, Qianghua Li, and Tao Lei. "Efficient Dynamic Reconfigurable CNN Accelerator for Edge Intelligence Computing on FPGA." Information 14, no. 3 (2023): 194. http://dx.doi.org/10.3390/info14030194.

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This paper proposes an efficient dynamic reconfigurable CNN accelerator (EDRCA) for FPGAs to tackle the issues of limited hardware resources and low energy efficiency in the deployment of convolutional neural networks on embedded edge computing devices. First, a configuration layer sequence optimization method is proposed to minimize the configuration time overhead and improve performance. Second, accelerator templates for dynamic regions are designed to create a unified high-speed interface and enhance operational performance. The dynamic reconfigurable technology is applied on the Xilinx KV2

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35

Al-Wattar, Ahmed, Shawki Areibi, and Gary Grewal. "An Efficient Framework for Floor-plan Prediction of Dynamic Runtime Reconfigurable Systems." International Journal of Reconfigurable and Embedded Systems (IJRES) 4, no. 2 (2015): 99. http://dx.doi.org/10.11591/ijres.v4.i2.pp99-121.

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<p>Several embedded application domains for reconfigurable systems tend to combine <br />frequent changes with high performance demands of their workloads such as image processing, wearable computing and<br />network processors. Time multiplexing of reconfigurable hardware resources raises a number of new issues, ranging <br />from run-time systems to complex programming models that usually form a Reconfigurable<br />hardware Operating System (ROS). The Operating System performs online task scheduling and handles resource management.<br />There are many chal

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36

Fang, Jiawei, Pengcheng Zhang, Rui Yang, and Zenghui Wang. "A cantilever-based resonator for reconfigurable nanomechanical computing." Journal of Micromechanics and Microengineering 31, no. 12 (2021): 124003. http://dx.doi.org/10.1088/1361-6439/ac3466.

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Abstract As silicon transistors face challenges in scaling, nanoelectromechanical systems (NEMS) have emerged as a promising candidate for computing due to the ultralow power consumption and high-temperature compatibility. Yet there is still limited research about highly reconfigurable NEMS-based computing devices that integrate multiple functionalities into a single device. In this work, we present the design, simulation, and verification of a cantilever-based NEMS resonator for highly reconfigurable logic functions. Using a single resonator with multiple inputs, the device can be reconfigure

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37

Hu, Wei Wei. "Reconfigurable Technology in the Application of Virtual Instrument." Advanced Materials Research 1049-1050 (October 2014): 1137–40. http://dx.doi.org/10.4028/www.scientific.net/amr.1049-1050.1137.

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In this paper,the main study is virtual instrument experimental systems based on reconfigurable computing technology. The system is divided into a computer, the master FPGA,reconfigurable FPGA,and instrumentation port drivers,adopting dynamic and static combination mode,the master FPGA chooses a different download programs to achieve the reconfiguration of slave FPGA;through designing two functional modules of counter and function generator,reconfigurable performance of the virtual system is verified.Modular standard hardware is the hard fundament for virtual instrument. The traditional hardwa

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38

Monien, Burkhard, Ralf Diekmann, and Reinhard Lüling. "The Construction of Large Scale Reconfigurable Parallel Computing Systems (The Architecture of the SC320)." International Journal of Foundations of Computer Science 08, no. 03 (1997): 347–61. http://dx.doi.org/10.1142/s0129054197000227.

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Reconfigurable communication networks for massively parallel multiprocessor systems offer the possibility to realize a number of application demands like special communication patterns or real-time requirements. This paper presents the design principle of a reconfigurable network which is able to realize any graph of maximal degree four. The architecture is based on a special multistage Clos network, constructed out of a number of static routing switches of equal size. Upper bounds on the cut size of 4-regular graphs, if split into a number of clusters, allow minimizing the number of switches

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39

Al-Wattar, A., S. Areibi, and G. Grewal. "An Efficient Evolutionary Task Scheduling/Binding Framework for Reconfigurable Systems." International Journal of Reconfigurable Computing 2016 (2016): 1–24. http://dx.doi.org/10.1155/2016/9012909.

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Several embedded application domains for reconfigurable systems tend to combine frequent changes with high performance demands of their workloads such as image processing, wearable computing, and network processors. Time multiplexing of reconfigurable hardware resources raises a number of new issues, ranging from run-time systems to complex programming models that usually form a reconfigurable operating system (ROS). In this paper, an efficient ROS framework that aids the designer from the early design stages all the way to the actual hardware implementation is proposed and implemented. An eff

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40

Tarchi, Daniele, Valeria Petrini, and Giovanni Emanuele Corazza. "A Fully Reconfigurable Approach to Emergency Management." International Journal of Adaptive, Resilient and Autonomic Systems 4, no. 1 (2013): 80–100. http://dx.doi.org/10.4018/jaras.2013010104.

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Emergency management is one of the most important areas where technology innovation has direct impact on social well-being and sustainability. In the past few years, Information and Communication Technology (ICT) has proved to be instrumental to improve emergency management with particular focus on resilience, rapidity of response, adaptability to situations. To these ends, joint optimization of communication and computing is a promising cross-layer approach. Indeed, this paper is focused on the consideration of both cognitive and autonomic networking approaches when deploying an emergency man

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41

Bapty, Ted, Sandeep Neema, Jason Scott, Janos Sztipanovits, and Sameh Asaad. "Model-integrated Tools for the Design of Dynamically Reconfigurable Systems." VLSI Design 10, no. 3 (2000): 281–306. http://dx.doi.org/10.1155/2000/74708.

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Several classes of modern applications demand very high performance from systems with minimal resources. These applications must also be flexible to operate in a rapidly changing environment. Achieving high performance from limited resources demands application-specific architectures, while flexibility requires architectural adaptation capabilities. Reconfigurable computing devices promise to meet both needs. While these devices are currently available, the issue of how to design these systems is unresolved. This paper describes an environment for design capture, analysis and synthesis of dyna

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42

Zidan, Mohammed A., YeonJoo Jeong, Jong Hoon Shin, Chao Du, Zhengya Zhang, and Wei D. Lu. "Field-Programmable Crossbar Array (FPCA) for Reconfigurable Computing." IEEE Transactions on Multi-Scale Computing Systems 4, no. 4 (2018): 698–710. http://dx.doi.org/10.1109/tmscs.2017.2721160.

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43

Shreejith, Shanker, Suhaib A. Fahmy, and Martin Lukasiewycz. "Reconfigurable Computing in Next-Generation Automotive Networks." IEEE Embedded Systems Letters 5, no. 1 (2013): 12–15. http://dx.doi.org/10.1109/les.2013.2243698.

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44

Lopes, João D., Mário P. Véstias, Rui Policarpo Duarte , Horácio C. Neto, and José T. de Sousa. "Coarse-Grained Reconfigurable Computing with the Versat Architecture." Electronics 10, no. 6 (2021): 669. http://dx.doi.org/10.3390/electronics10060669.

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Reconfigurable computing architectures allow the adaptation of the underlying datapath to the algorithm. The granularity of the datapath elements and data width determines the granularity of the architecture and its programming flexibility. Coarse-grained architectures have shown the right balance between programmability and performance. This paper provides an overview of coarse-grained reconfigurable architectures and describes Versat, a Coarse-Grained Reconfigurable Array (CGRA) with self-generated partial reconfiguration, presented as a case study for better understanding these architecture

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45

Reardon, Casey, Eric Grobelny, Alan D. George, and Gongyu Wang. "A Simulation Framework for Rapid Analysis of Reconfigurable Computing Systems." ACM Transactions on Reconfigurable Technology and Systems 3, no. 4 (2010): 1–29. http://dx.doi.org/10.1145/1862648.1862655.

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46

Kodi, Avinash, and Ahmed Louri. "Reconfigurable and adaptive photonic networks for high-performance computing systems." Applied Optics 48, no. 22 (2009): E13. http://dx.doi.org/10.1364/ao.48.000e13.

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47

Ling Zhuo and V. K. Prasanna. "Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems." IEEE Transactions on Computers 57, no. 12 (2008): 1661–75. http://dx.doi.org/10.1109/tc.2008.84.

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48

Saha, Proshanta, Esam El-Araby, Miaoqing Huang, et al. "Portable library development for reconfigurable computing systems: A case study." Parallel Computing 34, no. 4-5 (2008): 245–60. http://dx.doi.org/10.1016/j.parco.2008.03.005.

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49

Jimeno, A., and S. Cuenca. "Reconfigurable Computing for Tool-Path Computation." International Journal of Advanced Manufacturing Technology 21, no. 12 (2003): 945–51. http://dx.doi.org/10.1007/s00170-002-1415-y.

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50

MAJZOUB, S., and H. DIAB. "INSTRUCTION-SET EXTENSION FOR CRYPTOGRAPHIC APPLICATIONS ON RECONFIGURABLE PLATFORM." Journal of Circuits, Systems and Computers 16, no. 06 (2007): 911–27. http://dx.doi.org/10.1142/s0218126607004076.

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Reconfigurable Systems represent a middle trade-off between speed and flexibility in the processor design world. It provides performance close to the custom-hardware and yet preserves some of the general-purpose processor flexibility. Recently, the area of reconfigurable computing has received considerable interest in both its forms: the FPGA and coarse-grain hardware. Since the field is still in its developing stage, it is important to perform hardware analysis and evaluation of certain key applications on target reconfigurable architectures to identify potential limitations and improvements.

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