Relevant bibliographies by topics / Resistive Random Access Memory

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  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Resistive Random Access Memory'

Author: Grafiati
Published: 4 June 2021
Last updated: 20 June 2025

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Journal articles on the topic "Resistive Random Access Memory"

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Yu, Shimeng. "Resistive Random Access Memory (RRAM)." Synthesis Lectures on Emerging Engineering Technologies 2, no. 5 (2016): 1–79. http://dx.doi.org/10.2200/s00681ed1v01y201510eet006.

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Huang, Yong, Zihan Shen, Ye Wu, et al. "Amorphous ZnO based resistive random access memory." RSC Advances 6, no. 22 (2016): 17867–72. http://dx.doi.org/10.1039/c5ra22728c.

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Nam, Ki-Hyun, and Chung-Hyeok Kim. "Improving the Reliability by Straight Channel of As2Se3-based Resistive Random Access Memory." Journal of the Korean Institute of Electrical and Electronic Material Engineers 29, no. 6 (2016): 327–31. http://dx.doi.org/10.4313/jkem.2016.29.6.327.

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Chen, Frederick T., Yu-Sheng Chen, Heng-Yuan Lee, et al. "Access Strategies for Resistive Random Access Memory (RRAM)." ECS Transactions 44, no. 1 (2019): 73–78. http://dx.doi.org/10.1149/1.3694298.

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Wang, GuoMing, ShiBing Long, MeiYun Zhang, et al. "Operation methods of resistive random access memory." Science China Technological Sciences 57, no. 12 (2014): 2295–304. http://dx.doi.org/10.1007/s11431-014-5718-7.

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LIU, Qi, ShiBing LONG, Ming LIU, and HangBing LV. "Research progresses of resistive random access memory." SCIENTIA SINICA Physica, Mechanica & Astronomica 46, no. 10 (2016): 107311. http://dx.doi.org/10.1360/sspma2016-00293.

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Awais, Muhammad, Feng Zhao, and Kuan Yew Cheong. "Bio-Organic Based Resistive Switching Random-Access Memory." Solid State Phenomena 352 (October 30, 2023): 85–93. http://dx.doi.org/10.4028/p-tbxv2r.

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A non-volatile memory is a solid-state device that can retain data even power supply is terminated. It is an essential data storage device that serves as a backbone for the advancement of Internet-of-Things. There are various emerging non-volatile memory technologies in different technology-readiness levels, to replace the existing technologies with limited memory density, operating speed, power consumption, manufacturability, and data security. Of the emerging technologies, resistive switching technology is one of the most promising next generation non-volatile random-access memories. The fundamental working principle of the resistive-switching random-access memory (ReRAM) is based on memristor characterises with metal-insulator-metal stacking structure. Same as other solid-state devices, ReRAM is also facing issue of electronic waste when the memory device is discarded. To overcome this issue, bio-organic materials as green and sustainable engineering materials have been used to fabricate ReRAM. In this review, development of bio-organic based ReRAM, in particular the resistive switching mechanisms and device performance, have been discussed and challenging and future applications of this memory have been provided.
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Fetahovic, Irfan, Edin Dolicanin, Djordje Lazarevic, and Boris Loncar. "Overview of radiation effects on emerging non-volatile memory technologies." Nuclear Technology and Radiation Protection 32, no. 4 (2017): 381–92. http://dx.doi.org/10.2298/ntrp1704381f.

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In this paper we give an overview of radiation effects in emergent, non-volatile memory technologies. Investigations into radiation hardness of resistive random access memory, ferroelectric random access memory, magneto-resistive random access memory, and phase change memory are presented in cases where these memory devices were subjected to different types of radiation. The obtained results proved high radiation tolerance of studied devices making them good candidates for application in radiation-intensive environments.
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Nam, Ki-Hyun, Jang-Han Kim, Won-Ju Cho, Chung-Hyeok Kim, and Hong-Bay Chung. "Resistive Switching in Amorphous GeSe-Based Resistive Random Access Memory." Journal of Nanoscience and Nanotechnology 16, no. 10 (2016): 10393–96. http://dx.doi.org/10.1166/jnn.2016.13167.

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Fatheema, Jameela, Tauseef Shahid, Mohammad Ali Mohammad, et al. "A comprehensive investigation of MoO3 based resistive random access memory." RSC Advances 10, no. 33 (2020): 19337–45. http://dx.doi.org/10.1039/d0ra03415k.

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The bipolar resistive switching of molybdenum oxide is deliberated while molybdenum and nickel are used as bottom and top electrodes, respectively, to present a device with resistive random access memory (RRAM) characteristics.
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Dissertations / Theses on the topic "Resistive Random Access Memory"

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Tan, Scott H. (Scott Howard). "Neuromorphic computing systems : crystalline resistive random access memory." Thesis, Massachusetts Institute of Technology, 2020. https://hdl.handle.net/1721.1/127915.

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Thesis: Ph. D., Massachusetts Institute of Technology, Department of Mechanical Engineering, May, 2020<br>Cataloged from the official PDF of thesis.<br>Includes bibliographical references (pages 129-142).<br>Neuromorphic computing is a promising approach for efficient electronics by shaping computer hardware like the human brain. At the core of neuromorphic architectures are artificial synapses, which store conductance states to weight collections of electrical spikes according to Kirchoff's laws and Ohm's law. This thesis presents Silicon (Si)-based crystalline resistive random-access memory (crystalline RRAM) artificial synapses for neuromorphic computing. The main scaling bottleneck is poor temporal and spatial uniformity of artificial synapses. To the best of the author's knowledge, crystalline RRAM reported in this thesis have the lowest switching variations compared to other RRAM types. Controlling metal movement in resistive switching materials is extremely challenging. This thesis demonstrates two strategies to improve nanoscale control in crystalline RRAM: 1) intrinsic semiconductor regulation and 2) active metal alloying.<br>The first strategy relies on using defects to regulate resistive switching. Epitaxially-grown Silicon-Germanium (SiGe) on Si permits resistive switching via dislocations. Defect-selective chemical etching can increase ON/OFF ratio while maintaining low variations. The second approach to improve crystalline RRAM is active metal alloying. Pure silver (Ag) exhibits high mobility in Si due to thermodynamic repulsion between Ag and Si. Thermodynamic instability of Ag in Si induces poor weight stability, especially in low conductance states. This thesis demonstrates that adding a small amount of copper (Cu) to pure Ag can enhance weight stability because Cu can act as a bridge between Ag and Si to alleviate thermodynamic repulsion. Convolutional filtering and weight storage with 32 x 32 crystalline RRAM crossbar arrays are experimentally demonstrated using this approach. While these results are extremely promising, 2D crossbar scaling is limited by sneak currents.<br>Stacking artificial synapses in 3D could maximize scaling potential. However, 3D crystalline RRAM cannot be fabricated with single-crystalline materials that require high growth temperatures. Poly-crystalline Si could form 3D crystalline RRAM, however, resistive switching performance is inferior to single-crystalline RRAM, possibly due to free bonds. This thesis demonstrates hydrogen passivation can fix this problem. Hydrogenated doped poly-crystalline/micro-crystalline Si are presented as suitable materials for 3D neuromorphic computing cores. To conclude this thesis, monolithic character classifiers with micro-crystalline imaging and computing units are designed.<br>by Scott H. Tan.<br>Ph. D.<br>Ph.D. Massachusetts Institute of Technology, Department of Mechanical Engineering
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Chowdhury, Madhumita. "NiOx Based Resistive Random Access Memories." University of Toledo / OhioLINK, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1325535812.

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Parks, Jared D. "Hardware Authentication Enhancement of Resistive Random Access Memory Physical Unclonable Functions." Thesis, Northern Arizona University, 2017. http://pqdtopen.proquest.com/#viewpdf?dispub=10253956.

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<p> Advancements in microprocessors and sensor technologies have led to many innovations in the Internet of Things (IoT). These developments have both improved the quality of life for individuals and led to a need for securing users' information. This is especially true in devices such as pacemakers, cars, and credit cards, which can provide information that can harm users. To protect users from hackers who want this information, Physical Unclonable Functions (PUFs) can be used. Memory-based PUF are especially useful, as they can be readily implemented on most systems without much effort or additional hardware. This device is also unique in that it is very difficult to clone and hackers will have a hard time reading the contents of the device. Resistive Random Access Memory (ReRAM) PUFs in particular provide a similar manufacturing process to current Flash technologies, making them easily integrated into current technologies. On top of being similar to manufacture, ReRAM devices are also lower power than flash, allowing them to be used in low power devices such as Radio Frequency Identification Tags. While this is an advantage, ReRAM devices are currently limited in use since they vary greatly in different operating conditions. In this paper, a statistical model is proposed to account for shifts that occur at different temperatures. To generate the model, a mean square error linear regression analysis was performed, and found that these devices can be loosely represented as mean shifted Gaussian distributions at different temperatures. This model allows for a better understanding of how the system will perform during the challenge response pair authentication process. It was also found that the error rate can be reduced to near zero using this method, but may need improvement due to the limitations of this data-set. These limitations can be seen with the bit error rate, however these were improved using multi-state soft decoding. This process compared a ternary and eight state grouping, which allows for a better understanding of how each cell affects the array. Along with the statistical model the system will have minimal burden on the servers during the challenge response process, as it is computationally simple. Future works will include an implementation of this system to further allow ReRAM to become a more powerful technology, and help innovate the IoT.</p>
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Long, Branden Michael. "Fabrication and Characterization of HfO2 Based Resistive Random Access Memory Devices." University of Toledo / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1365166054.

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Valverde, Lucas. "Conception de cellules bipolaires commutables pour la technologie « Resistive Random Access Memory »." Mémoire, Université de Sherbrooke, 2014. http://hdl.handle.net/11143/6041.

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Avec le développement des technologies portables, les mémoires de type flash sont de plus en plus utilisées. Les compétences requises pour répondre au marché florissant augmentent chaque année. Cependant, les technologies actuelles sont basées sur l’intégration de transistors. Leurs performances impliquent un long temps d’écriture et des tensions d’opérations importantes. La technologie Resistive Random Access Memory (RRAM) permet de répondre aux problématiques liées aux mémoires de type flash. La simplicité de fabrication de ces mémoires permet une forte densité d’intégration à faible coût. Également, les performances attendues par cette technologie dépassent les performances actuelles de Dynamic Random Access Memory (DRAM). Les études réalisées actuellement au sein de la communauté scientifique permettent de déterminer les meilleures performances selon le choix des matériaux. Les premières études se concentraient sur l’oxyde de titane TiO2 en tant qu’isolant, puis avec l’augmentation de l’intérêt envers cette technologie le nombre d’oxydes étudiés s’est élargi. Les dispositifs conventionnels utilisent une couche d’oxyde comprise entre deux électrodes métalliques. En augmentant la densité de dispositifs dans des circuits en matrices croisées, l’isolation entre les points mémoires n’est pas garantie et les courants de fuites deviennent un facteur limitant. Pour éviter ces problèmes, le contrôle de chaque cellule est réalisé par un transistor, on parle d’architecture 1T1R avec n transistors nécessaires pour n points mémoires. En 2008 Dubuc[1] propose un nouveau procédé de fabrication: le procédé nanodamascène. En adaptant ce procédé, et en disposant deux cellules dos à dos, nous créons un composant qui ne nécessite plus de transistor de contrôle [2]. Cela permet, en outre, de réduire les courants de fuite et simplifie l’adressage de chaque cellule. Les dispositifs sont incorporés dans une couche offrant une surface planaire. Il n’y a pas de limite technique à la superposition des couches, ce qui permet une haute densité d’intégration dans le Back-end-of-line du CMOS (Complementary Metal Oxyde Semiconductor), offrant de nouveaux horizons à la technologie RRAM. Suivant les éléments précédents, mon projet de maîtrise a pour objectif de démontrer la possibilité de fabriquer des cellules RRAM en utilisant le procédé nanodamascène. Ce développement implique la fabrication, pour la première fois, de dispositifs micrométriques de type croisés et planaires en utilisant des architectures dont la fabrication est maîtrisée au sein du laboratoire. Cela permettra de mettre au point les différentes procédés de fabrication pour les deux types de dispositifs, de se familiariser avec les techniques de caractérisation électrique, d’acquérir des connaissances sur les matériaux actifs, et proposer des premiers dispositifs RRAM.
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Zhuo, Yiqian Victor. "Resistive switching in tantalum oxide for emerging non-volatile memory applications." Thesis, University of Cambridge, 2014. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.648887.

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Cheng, You-Wei, and 鄭又瑋. "Oxide-Based Resistive Random Access Memory." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/52860599754950649604.

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碩士<br>國立交通大學<br>顯示科技研究所<br>98<br>In this thesis, we demonstrate inorganic resistive random access memory (RRAM) using sputtered SiO2 thin films, and investigate the influences of electrical characteristics of the devices with various post-annealing conditions. The results show that devices with RTA treatment can exhibit better electrical characteristics, especially in the significant improvement of endurance. We also analyze carrier transport behaviors in the high conductance state of devices and propose carrier transport mechanisms under different RTA treatments. In addition, we fabricate two different structures of organic RRAM: AlOx/Alq3 bi-layer and Alq3/MoO3/Alq3 tri-layer structures. It is found that interface defects at the AlOx/Alq3 interface dominate the resistive switching of organic RRAM using the bi-layer structure, and the high ON/OFF current ratio near 106 is obtained; the switching behavior of organic RRAM using the tri-layer structure originate from carrier confinement barriers produced by the difference of energy bands between the nano-structure MoO3 and Alq3 layers, and this devices exhibit a high ON/OFF current ratio about 104 and provide many write-read-erase-read cycles.
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Chiu, I.-Chen, and 邱依宸. "Research of Transparent Resistive Random Access Memory." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/q5tdy2.

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Hsu, Meng-Yin, and 許孟尹. "Shallow Trench Isolation Sidewall edge Resistive Random Access Memory Integrated Nonvolatile Static Random Access Memory." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/k76znp.

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Chen, Yi-jiun, and 陳怡均. "Characterization of Amorphous Carbon Resistive Random Access Memory." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/5xr43a.

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博士<br>國立中山大學<br>機械與機電工程學系研究所<br>102<br>The increasing demand for flash memory densities by scaling dimension is a formidable challenge due to physical limitations. Recently, carbon-based resistive random access memory (RRAM) exhibits to be a promising candidate for high density and low power consumption. In this study, the resistive switching property of amorphous carbon material was investigated for RRAM application. In this study, the amorphous carbon films were prepared by RF megetron sputtering and PECVD methods. The RRAM devices were constructed by an amorphous carbon layer between Pt top and TiN bottom electrodes. A bias was applied to the bottom electrode (TiN), and the top electrode (Pt) was grounded during the electrical measurement. Based on material characterization and electrical analysis, it is found that the switching of high and low resistive state (HRS and LRS) of sputtered carbon RRAM is attributed to hydrogenation and dehydrogenation reactions of C-C double bonds and hydrogen ions. After an electroformation, a sp2 carbon dominated filament was formed in the carbon layer. Appling a negative bias, hydrogen ions are attracted by electrical field and reacted with C-C conjugated double bonds, leading the transformation of conductive sp2 structure in to insulated sp3 structure. In contrast, hydrogen atoms in the sp3 structure are repelled into Pt electrode by a positive bias, which results the transformation of sp2 carbon. In addition, the experiment result of DLC RRAM also shows the same electron transport mechanism to the sputtered RRAM. Therefore, the resistance switching (RS) mechanism of amorphous carbon is concluded to hydrogen reacting with C-C double bonds.   Furthermore, the influences of Pt electrode and TiN electrode on the RS mechanism of amorphous carbon RRAM were investigated by two devices with HfO2 and DLC stacking, DLC-T RRAM (Pt/DLC/HfO2/TiN) and DLC-B RRAM (Pt/HfO2/DLC/TiN). By contrast, RS mechanism of DLC-T RRAM is similar to DLC RRAM. It demonstrates that the RS occurs in DLC layer near Pt electrode, which is consistent with the hydrogen induced RS model. Further, DLC-B RRAM is consistent to the RS model of graphine-oxide RRAM, that after a forming process, oxygen atoms in HfO2 are attracted by the positive electrical filed and then move to TiN electrode, in which oxygen ions absorb and eliminate with sp2 carbon (C-C conjugated double bonds), resulting to the RS in DLC-B RRAM.
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Books on the topic "Resistive Random Access Memory"

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Yu, Shimeng. Resistive Random Access Memory (RRAM). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-031-02030-8.

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Denning, Peter J. Is random access memory random? Research Institute for Advanced Computer Science, NASA Ames Research Center, 1986.

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Semiconductor, National. Random access memory databook. National Semiconductor, 1987.

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Huber, David Miles. Random access audio. SAMS Pub., 1992.

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United States. National Aeronautics and Space Administration. Scientific and Technical Information Division., ed. Parallel optical random access memory (PORAM). National Aeronautics and Space Administration, Office of Management, Scientific and Technical Information Division, 1989.

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Dieny, Bernard, Ronald B. Goldfarb, and Kyung&xJin Lee, eds. Introduction to Magnetic Random&;#x02010;Access Memory. John Wiley &;#38; Sons, Inc., 2017. http://dx.doi.org/10.1002/9781119079415.

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Sangyōshō, Japan Keizai. DRAM no juyō to kyōkyū no kankei oyobi sorera ga kokunai kakaku ni ataeta eikyō tō ni tsuite no teiryōteki bunseki to genʼin tankyū: Hōkokusho. Nomura Sōgō Kenkyūjo, 2005.

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(Firm), Motorola, ed. 256K x 36 bit dynamic random access memory module. Motorola, 1993.

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(Firm), Motorola, ed. 2M x 32 bit dynamic random access memory module. Motorola, 1993.

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Inc, Toshiba America, and Toshiba America. Toshiba MOS memory products data book. Toshiba America, 1987.

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Book chapters on the topic "Resistive Random Access Memory"

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Yu, Shimeng. "RRAM Characterization and Modeling." In Resistive Random Access Memory (RRAM). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-031-02030-8_3.

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Yu, Shimeng. "Introduction to RRAM Technology." In Resistive Random Access Memory (RRAM). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-031-02030-8_1.

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Yu, Shimeng. "RRAM Array Architecture." In Resistive Random Access Memory (RRAM). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-031-02030-8_4.

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Yu, Shimeng. "RRAM Device Fabrication and Performances." In Resistive Random Access Memory (RRAM). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-031-02030-8_2.

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Banerjee, Writam, and Qi Liu. "Nanocrystals in Resistive Random-Access Memory." In Nanocrystals in Nonvolatile Memory, 2nd ed. Jenny Stanford Publishing, 2024. http://dx.doi.org/10.1201/9781003514862-8.

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Puglisi, F. M. "Noise in Resistive Random Access Memory Devices." In Noise in Nanoscale Semiconductor Devices. Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-37500-3_3.

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Zhuo, Victor Yiqian, Zhixian Chen, and King Jien Chui. "Resistive Random Access Memory Device Physics and Array Architectures." In Emerging Non-volatile Memory Technologies. Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-15-6912-8_10.

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Gilmer, David C., and Gennadi Bersuker. "Fundamentals of Metal-Oxide Resistive Random Access Memory (RRAM)." In Nanostructure Science and Technology. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-91896-9_3.

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Jain, Neeraj, Renu Kumawat, and Shashi Kant Sharma. "Resistive Random Access Memory: Materials, Filament Mechanism, Performance Parameters and Application." In Lecture Notes in Electrical Engineering. Springer Nature Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-0588-9_3.

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Nagata, Takahiro. "Bias-Induced Interfacial Redox Reaction in Oxide-Based Resistive Random-Access Memory Structure." In NIMS Monographs. Springer Japan, 2020. http://dx.doi.org/10.1007/978-4-431-54850-8_4.

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Conference papers on the topic "Resistive Random Access Memory"

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Katti, Romney. "Magneto-resistive random access memory (MRAM) for space applications." In Spintronics XVII, edited by Henri Jaffrès, Jean-Eric Wegrowe, Manijeh Razeghi, and Joseph S. Friedman. SPIE, 2024. http://dx.doi.org/10.1117/12.3029927.

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Nayak, Abhijith Jayarajendra, Bhoomika V, Chaithra P, Divyashree S, and Jamuna S. "Design and Simulation Approaches of Resistive-Random Access Memory." In 2025 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE). IEEE, 2025. https://doi.org/10.1109/iitcee64140.2025.10915285.

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Qian, Yanyan, Shang Li, Zhengwen Liao, Shihao Ma, and Ting Wan. "Multiphysics Modeling and Characterization of Resistive Random Access Memory Device." In 2024 International Applied Computational Electromagnetics Society Symposium (ACES-China). IEEE, 2024. http://dx.doi.org/10.1109/aces-china62474.2024.10699697.

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Chen, Yanting, Mengru Shao, Songhe Lu, and Lin Zhou. "Cascade Coding Scheme Based on the Reliability Problem of Resistive Random-Access Memory." In 2024 4th International Conference on Communication Technology and Information Technology (ICCTIT). IEEE, 2024. https://doi.org/10.1109/icctit64404.2024.10928658.

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Shao, Mengru, Yanting Chen, Songhe Lu, and Lin Zhou. "Encoding Research Based on the Multiple Sneak Path Issues in Resistive Random Access Memory." In 2024 4th International Conference on Communication Technology and Information Technology (ICCTIT). IEEE, 2024. https://doi.org/10.1109/icctit64404.2024.10928671.

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Song, Guanghui, Kui Cai, Xingwei Zhong, Jiang Yu, and Jun Cheng. "Coding for Resistive Random-Access Memory Channels." In GLOBECOM 2020 - 2020 IEEE Global Communications Conference. IEEE, 2020. http://dx.doi.org/10.1109/globecom42002.2020.9322291.

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Yu-Tao Li, Hai-Ming Zhao, He Tian, et al. "Novel graphene-based resistive random access memory." In 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2016. http://dx.doi.org/10.1109/icsict.2016.7998952.

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Wu, Wenjuan, Xin Tong, Rong Zhao, Luping Shi, Hongxin Yang, and Yee-Chia Yeo. "Novel bipolar TaOx-based Resistive Random Access Memory." In 2011 11th Annual Non-Volatile Memory Technology Symposium (NVMTS). IEEE, 2011. http://dx.doi.org/10.1109/nvmts.2011.6137095.

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Zhuo, V. Y. Q., Y. Jiang, J. Y. Sze, et al. "Investigation of resistive switching in bipolar TaOx-based resistive random access memory." In 2012 12th Annual Non-Volatile Memory Technology Symposium (NVMTS). IEEE, 2012. http://dx.doi.org/10.1109/nvmts.2013.6632864.

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Lastras-Montaño, Miguel Angel, Amirali Ghofrani, and Kwang-Ting Cheng. "HReRAM: A Hybrid Reconfigurable Resistive Random-Access Memory." In Design, Automation and Test in Europe. IEEE Conference Publications, 2015. http://dx.doi.org/10.7873/date.2015.0540.

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Reports on the topic "Resistive Random Access Memory"

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Chin, Matthew L., Matin Amani, Terrence P. O'Regan, A. G. Birdwell, and Madan Dubey. Effect of Atomic Layer Depositions (ALD)-Deposited Titanium Oxide (TiO2) Thickness on the Performance of Zr40Cu35Al15Ni10 (ZCAN)/TiO2/Indium (In)-Based Resistive Random Access Memory (RRAM) Structures. Defense Technical Information Center, 2015. http://dx.doi.org/10.21236/ada623815.

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Psaltis, Demetri. Holographic Random Access Memory. Defense Technical Information Center, 1997. http://dx.doi.org/10.21236/ada329446.

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Cerjan, C., and B. P. Law. Magnetic Random Access Memory (MRAM) Device Development. Office of Scientific and Technical Information (OSTI), 2000. http://dx.doi.org/10.2172/15006522.

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Donohoe, Gregory W. Magnetic Random Access Memory for Embedded Computing. Defense Technical Information Center, 2007. http://dx.doi.org/10.21236/ada474855.

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SIERRA MONOLITHICS INC REDONDO BEACH CA. Non-Volatile, Rad-Hard Random Access Memory (RAM) on GaAs. Defense Technical Information Center, 1993. http://dx.doi.org/10.21236/ada285170.

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Cerjan, C. J., and T. W. Sigmon. Integration of Radiation-Hard Magnetic Random Access Memory with CMOS ICs. Office of Scientific and Technical Information (OSTI), 2000. http://dx.doi.org/10.2172/792430.

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Van Duzer, T., Stephen R. Whiteley, Lizhen Zheng, et al. Hybrid Josephson-CMOS Random Access Memory with Interfacing to Josephson Digital Circuits. Defense Technical Information Center, 2013. http://dx.doi.org/10.21236/ada596658.

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NAVAL SEA SYSTEMS COMMAND WASHINGTON DC. Military Specification, Modules, Standard Electronic Memory Array, 128K Dynamic Random Access Module, Key Code JEJ. Defense Technical Information Center, 1991. http://dx.doi.org/10.21236/ada347026.

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Tavik, Gregory C. Testing the One-Port Random Access Memory (1PRAM) Module of TRW's CPUAX Signal Processing Superchip. Defense Technical Information Center, 1991. http://dx.doi.org/10.21236/ada234127.

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