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1

Imana, Eyosias Yoseph. "Cognitive RF Front-end Control." Diss., Virginia Tech, 2014. http://hdl.handle.net/10919/51121.

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This research addresses the performance degradation in receivers due to poor selectivity. Poor selectivity is expected to be a primary limitation on the performance of Dynamic-Spectrum-Access (DSA) and millimeter wave (mmWave) technologies. Both DSA and mmWave are highly desired technologies because they can address the spectrum-deficit problem that is currently challenging the wireless industry. Accordingly, addressing poor receiver selectivity is necessary to expedite the adoption of these technologies into the main street of wireless. This research develops two receiver design concepts to e
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2

Li, Lin. "RF transceiver front-end design for testability." Thesis, Linköping University, Department of Electrical Engineering, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2256.

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<p>In this thesis, we analyze the performance of a loop-back built-in-self-test for a RF transceiver front-end. The tests aim at spot defects in a transceiver front-end and they make use of RF specifications such as NF (Noise Figure), G (power gain) and IIP3 (third order Intercept point). To enhance fault detectability, RF signal path sensitization is introduced. We use a functional RF transceiver model that is implemented in MatLab™ to verify this analysis.</p>
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3

Gopalan, Anand. "Built-in-self-test of RF front-end circuitry /." Link to online version, 2005. https://ritdml.rit.edu/dspace/handle/1850/942.

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4

Eliassen, Thomas. "Design of a high IIP2 2.4GHz RF Front-end." Thesis, Norwegian University of Science and Technology, Department of Electronics and Telecommunications, 2006. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-9482.

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<p>This master thesis presents the design of a high IIP2 direct-conversion receiver front-end, consisting of a LNA and I- and Q-channel mixers. The front-end is implemented in a 0.18 μm technology with 1.8V supply voltage. Problems that are especially severe for direct-conversion receivers are presented; 1/f-noise, DC offset, and second-order nonlinearity, with particular attention to the latter. Methods to improve the IIP2 are presented and explored in the design of the front-end. The complete front-end has -19.7 dBm IIP3, 4 dB noise figure, and consume 7.4mA of current from a 1.8V supply. Th
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5

Piazza, Francesco. "Low power RF-receiver front-end ICs for mobile communications /." Zürich, 2000. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=13669.

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6

Kantasuwan, Thana. "RF front-end CMOS design for build-in-self-test." Thesis, Linköping University, Department of Electrical Engineering, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2642.

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<p>In this master degree work, a digital attenuator and a low noise amplifier (LNA) have been designed and integrated with the RF front-end receiver for IEEE 802.11b Wireless LAN standard. Firstly, the 4-bit digitally controlled attenuator has been designed with theattenuation range of 50 to 80 dB and reflection coefficient less than -25 dB. Next, the single stage wide band low noise amplifier with voltage gain larger than 14 dB and noise figure below 4 dB has been designed to operate at frequency 2.4 GHz. Finally, the integration with a down-conversion mixer has been done and evaluated its pe
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7

Duo, Xinzhong. "System-on-package solutions for multi-band RF front end." Doctoral thesis, Stockholm, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-482.

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8

Kirschenbaum, Abigail 1979. "Superconducting RF front-end filters for cell phone base stations." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/7979.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2003.<br>Includes bibliographical references (leaf 37).<br>Cellular bands A and B are in the 100s of :MHz frequency range. They are . discontinuous bands requiring sharp skirts - the specialty of superconducting filters. Superconducting filters are therefore ideal in the function of front-end filters on cell phone base stations, serving to reject any unnecessary signals, eliminating intermodulation distortion (IMD). Broader geographical coverage and higher calling capacity per tower are other e
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9

Rauhanummi, M. (Mikko). "Integration of agile RF front end to FPGA development board." Master's thesis, University of Oulu, 2013. http://urn.fi/URN:NBN:fi:oulu-201310291820.

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Developing wireless communication standards and applications grows need for a flexible wireless testbed. Software defined radio platforms have programmable hardware and software, so they are easy to use for the rapid development of wireless communication algorithms. The software defined radios could be considered as the state-of-the-art wireless transceivers that can be used to run next-generation wireless applications. The scope of this thesis is to study the use of the Xilinx ML605 development platform and the Nutaq Radio420S radio card integration as the software defined radio platform. Thi
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10

Brisebois, Terrence. "Wideband RF Front End Daughterboard Based on the Motorola RFIC." Thesis, Virginia Tech, 2009. http://hdl.handle.net/10919/33943.

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The goal of software-defined radio (SDR) is to move the processing of radio signals from the analog domain to the digital domain â to use digital microchips instead of analog circuit components. Until faster, higher-precision analog-to-digital (ADCs) and digital-to-analog converters (DACs) become affordable, however, some analog signal processing will be necessary. We still need to convert high-radio frequency (RF) signals that we receive to low intermediate-frequency (IF) or baseband (centered on zero Hz) signals in order for ADCs to sample them and feed them into microchips for processin
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11

Kim, Hyun-Woong. "CMOS RF transmitter front-end module for high-power mobile applications." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/47592.

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With the explosive growth of the wireless market, the demand for low-cost and highly-integrated radio frequency (RF) transceiver has been increased. Keeping up with this trend, complimentary metal-oxide-semiconductor (CMOS) has been spotlighted by virtue of its superior characteristics. However, there are challenges in achieving this goal, especially designing the transmitter portion. The objective of this research is to demonstrate the feasibility of fully integrated CMOS transmitter module which includes power amplifier (PA) and transmit/receive (T/R) switch by compensating for the intrinsic
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12

Walker, Benjamin Philip Eugene Zaks. "A Raw processor interface to an 802.11b/g RF front end." Thesis, Massachusetts Institute of Technology, 2004. http://hdl.handle.net/1721.1/33371.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004.<br>Includes bibliographical references (p. 95-96).<br>The Raw microprocessor is a tiled architecture processor designed by the Computer Architecture Group at MIT. Raw was designed in part to be extremely good at performing streaming-type algorithms such as those found in wireless communications processing. This thesis describes the design and implementation of an interface between the Raw microprocessor and a modified 802.11a/b/g wireless access point. Combined with the Raw proc
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13

Shun-I, Tsai, and 蔡順意. "RF Front-end Receiver Design." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/20883727267917607967.

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碩士<br>國立交通大學<br>電子工程系所<br>96<br>This thesis presents a 4GHz to 20GHz low noise amplifier, and a novel architecture of mixer. Low noise amplifier utilizes four MOS transistors which are designed as common-mode source architecture, and apply gate inductor and parallel-feedback capacitor to achieve wide-band input impedance matching. Power gain can be up to 22dB and input reflection coefficient can be lower than -10dB on intended frequency range, and is fabricated in TSMC 0.18μm CMOS technology. The passive mixer is a novel architecture, and is never published on worldwide international papers. T
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14

Martins, Tiago Domingos. "RF Front-End for RADAR." Master's thesis, 2021. https://hdl.handle.net/10216/135326.

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RADAR de abertura sintética (SAR) é uma tecnologia usada para obter imagens a partir de radiação RF que são relativamente insensíveis a efeitos como nuvens, poeiras, luz solar... A partir da junção entre teoria de RADAR e técnicas de processamento de sinal, é possível obter-se imagens deste tipo com resoluções apreciáveis. Ao longo dos anos, avanços nestas áreas têm permitido obter imagens com cada vez maior qualidade. Um destes avanços foi a introdução do Software Defined Radio (SDR) como uma forma de substituir muito do hardware de rádio convencional por software eficiente e flexível. Mas, a
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Martins, Tiago Domingos. "RF Front-End for RADAR." Dissertação, 2021. https://hdl.handle.net/10216/135326.

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RADAR de abertura sintética (SAR) é uma tecnologia usada para obter imagens a partir de radiação RF que são relativamente insensíveis a efeitos como nuvens, poeiras, luz solar... A partir da junção entre teoria de RADAR e técnicas de processamento de sinal, é possível obter-se imagens deste tipo com resoluções apreciáveis. Ao longo dos anos, avanços nestas áreas têm permitido obter imagens com cada vez maior qualidade. Um destes avanços foi a introdução do Software Defined Radio (SDR) como uma forma de substituir muito do hardware de rádio convencional por software eficiente e flexível. Mas, a
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16

Tuo, Yo-Lin, and 涂曜麟. "GPS Receiver RF Front-end Module." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/83618607105727196851.

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碩士<br>國立中央大學<br>通訊工程研究所<br>93<br>In the thesis, a RF front end for GPS receiver is designed using coplanar-waveguide structure. Three parts of the receiver are mainly considered:antenna, band pass filter, and low noise amplifier. Based on the principle of the multi-band resonance, the bandwidth of the antenna is increased for 1.5% to 3%, compared to single patch antenna. Moreover, it is done without sacrificing antenna gain. The filter is designed using slow-wave structure, and therefore the size is reduced significantly. The noise filter is designed using the -type CPW discontinuities, 16.5d
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Lai, Yi-Hsien, and 賴宜賢. "Low Power RF Front-End Study." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/77576413895954040574.

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碩士<br>國立清華大學<br>電機工程學系<br>93<br>The market of mobile wireless devices has rapidly expanded and that are being used increasingly around the life everywhere. To achieve wireless connectivity for inexpensive or disposable devices, low cost wireless arcitectures and transceiver. In this thesis we will study the fundamentals and possible architectures of RF Front-End. Hopefully they can be applied for integrated low power, low cost wireless applications. This thesis contains two parts. In first part, the RF performance of CMOS circuit under low current dissipation (below 1 mA) is study. A common g
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18

Kao, Tzu-Chiang, and 高子強. "A 2.4GHz CMOS RF Front-End Receiver." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/74022805679814456079.

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碩士<br>長庚大學<br>電子工程研究所<br>92<br>With the scaling down of CMOS technology, it has become a new trend to design a CMOS IC with low cost, low power and high integration. Therefore, in this thesis, we describe the design of front-end chipset for a 2.4GHz RF receiver, which was fabricated by a TSMC 0.18 μm 1p6m CMOS process. The inplemented chipset includes a single-pole, double-throw transmit/receive switch (T/R switch), variable gain low-noise amplifier (LNA) with active differential-phase splitters and mixer. The front-end receiver uses a low-IF architecture for high level of integration and low
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Lin, Tzu-Yang, and 林子揚. "Development of Frequency Agile RF Front End." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/71886597963422764791.

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碩士<br>元智大學<br>通訊工程學系<br>105<br>This thesis aims for development of a microstrip-based frequency agile RF front end. The proposed front end comprised a wideband antenna, a wideband low noise amplifier (LNA), and a reconfigurable bandpass filter (BPF). Specifically, the wideband antenna was realized with the adoption of the broadband disc monopole, and the developed antenna could operate from 0.55 to 5.1 GHz with a greater than 10 dB return loss. The LNA was developed with the Avago ATF-54143 RF amplifier chip, and the operating band is between 0.63 and 1.1 GHz with a gain of 12 dB, a noise figu
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20

Huang, Jun Jie, and 黃俊傑. "The RF Front End for WLAN Receiver." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/17434339035203613241.

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碩士<br>中興大學<br>電機工程學系所<br>95<br>This thesis major study in IEEE 802.11 b/g for WLNA Receiver . The contents include RF Fundamental, Low Noise Amplifier(LNA),and Mixer. We use the TSMC 0.18um 1P6M CMOS process to implement our circuit. The low noise amplifier uses the technology called current reuse. Since PMOS devices in scaled technology, the idea is to realize the input stage shunting an inductively degeneration NMOS stage with a PMOS one. In this way, due to the inherent current reuse, the performances can be improved using the same power consumption. Besides the current reuse, we utilize c
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21

Lin, Wei-Ming, and 林韋名. "Analog Front End for CMOS RF Transmitter." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/26706916816453845552.

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碩士<br>輔仁大學<br>電子工程學系<br>91<br>This thesis described a RF transmitter used in wireless communication system. The transmitter has three main parts, included phase-locked loop, pulsewidth control loop and transmitter front-end circuits. It’s operating frequency range is 315~916MHz. The modulation are ASK and Audio (AM) mode. The signal output power is 100mW.  The architecture of phase-locked loop is integer and divided by 32 type. It was used to provide the center frequency of the transmitter. Due to use source follower as the internal power supply of the voltage-controlled oscillator
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22

Chiu, Pao-Cheng, and 邱寶成. "A 2V 900MHz CMOS RF Front-End." Thesis, 1997. http://ndltd.ncl.edu.tw/handle/59407003878633775028.

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碩士<br>國立交通大學<br>電子工程學系<br>85<br>This thesis described the design of a 2 V 900 MHz CMOS RFFront- End circuit, which is used in a superheterodyne receiverfor 902 to 928 MHz ISM band system.The RF front-end consists of a low- noise amplifier (LNA), a down-conversionmixer and a up- conversion mixer. In addition, a LO input buffer andassociated bias circuits are also included.The LNA is a single-ended, two- stage amplifier with source followeras the output buffer. It has a inputimpedance match
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23

Kaddi, P. "Analog Front End for RF Energy Harvesting." Thesis, 2014. http://raiith.iith.ac.in/118/1/EE11M10.pdf.

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This thesis proposes a design for ultra low power sensitive single and dual band RF energy harvesting system for UHF microwave frequencies at 2.4-GHz and 865-MHz to 960- MHz(ISM band). The system is designed to power a load and generate a constant 1-V output voltage for a battery-less passive energy harvesting circuit. Input power is fed from 50 RF source to emulate antenna at UHF microwave band. The design includes single band and dual band off-chip RF matching circuit, RF limiter, Differential Rectifier, Power On Reset (POR), Band Gap Reference (BGR) and Low Drop Out Regulator (LDO). T
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Sin-Yu, Chen. "A 5.8-GHz CMOS RF Receiver Front-End." 2002. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0009-0112200611293849.

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陳聯興. "RF Transmitter Front-End Design for IEEE 802.11A." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/23514820062865710670.

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碩士<br>國立交通大學<br>電機資訊學院碩士在職專班<br>92<br>In this thesis, a direct-conversion transmitter front-end for IEEE 802.11a has been designed and fabricated in UMC 0.18-μm 1P6M CMOS technology and packaged in SPIL QFN20. There are two features in this chip. First, it operates in the 5 to 6 GHz which covers the U-NII frequency band (5.15 to 5.825GHz). Secondly, it reduces the needs for external component. No external baluns and SAW filters are required. The transmitter front-end contains two baluns, an up-conversion mixer and a three-stage pre-amplifier. The simulation achieves an output 1-dB compression
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LU, YU-TING, and 呂昱廷. "Reconfigurable Techniques Applied in RF Front-end Circuits." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/aeajb2.

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碩士<br>國立中正大學<br>電機工程研究所<br>104<br>This thesis focuses on the reconfigurable mechanisms for RF front-end circuitry, including CMOS-MEMS actuation and liquid metal actuation. Liquid metal has the advantage of low driving voltage and high deformability. Chapter-Two therefore designed a 2.4-GHz RF switch driven by liquid metal. The microchannels are constructed on the PCB using PDMS, wherein the liquid metal is deformed to connect two ports when the DC biasd is applied, resulting in ON state. The measurement results show that the insertion loss and reflection loss are 3.7 dB and 10.8 dB in ON
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Huang, Yu-Wen, and 黃裕文. "A 3.5-GHz Inductorless CMOS RF Front-End." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/32848303306207291538.

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碩士<br>國立清華大學<br>電機工程學系<br>96<br>The design target of this thesis is to carry out a radio frequency (RF) frond-end circuit without inductor at 3.5 GHz for the WiMAX applications. For the matching issue, a common-gate low-noise amplifier (LNA) circuit was proposed with some skills for gain, noise and power issues. To enhance the gain of LNA, a high frequency active inductor load was analyzed. The quality factor of active inductor can be improved by the proposed topology with low power consumption. By simulation, the gain of LNA with active inductor load can be improved by 9 dB with extra 60
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Hsiao, Chao-Yang, and 蕭朝陽. "A 5.2GHz CMOS RF Front-End Integrated Circuit." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/13502441696574466335.

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碩士<br>南台科技大學<br>電子工程系<br>90<br>A wireless LAN application of 5.2GHz RF front-end fabricated in a 0.18μm CMOS technology of TSMC is proposed in this thesis. The RF front-end includes a low noise amplifier (LNA), a mixer and a voltage controlled oscillator (VCO). The advantages of the LNA are low noise, high gain and low power consumption and the advantages of the mixer are high linearity and high isolation. As for the VCO, it has a virtue of stable oscillation so as to boost the performance of the whole RF front-end. The LNA has a S11 less than —23dB, S22 less than —16dB, gain of 12d
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Chen, Sin-Yu, and 陳信宇. "A 5.8-GHz CMOS RF Receiver Front-End." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/52770662849712008321.

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碩士<br>元智大學<br>電機工程學系<br>90<br>The low-cost and high-integration radio frequency (RF) integrated circuit design based on CMOS technology had been very mature. However, the transmission of data and voice requires more bandwidth than that is currently required in the unlicensed bands at 900 MHz, 1.8 GHz and 2.4 GHz. Therefore, the FCC in the U.S. has proposed 300 MHz of bandwidth in the 5 GHz band. In this thesis, a 5.8-GHz receiver front-end has been designed and implemented with TSMC 0.25μm CMOS technology. The LNA is measured with 9.3-dB forward gain and 5.4-dB noise figure. The dow
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Wang, Min-Yi, and 汪旻毅. "CMOS Dual-band RF Front-end Circuit Modules." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/64163544771087088555.

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碩士<br>國立中正大學<br>電機工程研究所<br>90<br>In this work, a dual-band radio frequency (RF) front-end that can be operated at the wideband code division multiple access (WCDMA) and global position system (GPS) is developed. This RF front-end includes two differential low noise amplifiers, double-balanced mixers of I and Q channels and a multiphase voltage-controlled oscillator (VCO). The front-end architecture without external components is implemented by the low intermediate frequency (IF) technique which is very suitably for circuit integration. As compared to the other RF front-ends with operating at m
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31

Kung, Jing Yang, and 龔靖洋. "13.56MHz RF front-end for Body Sensor Network." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/86895125952550626409.

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碩士<br>國立中正大學<br>電機工程研究所<br>99<br>Our research addresses the problem of implementing a 13.56MHz RF front-end circuit for the Body Sensor Network. The front-end circuits include a full-wave bridge rectifier, a linear regulator, a BPSK demodulator and a clock/data separator. The main function of the proposed 13.56MHz RF front-end batteryless circuit is to provide the Body Sensor Network power and control signals correctly, while the power and control signals are received from an external device. An external device can send their control signals with a 4.5KHz clock signal and a Manchester encoding
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Li, Meng-Sung, and 李孟松. "RF Front-end Design for LTE Module Applications." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/u63vcn.

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碩士<br>國立臺灣科技大學<br>電子工程系<br>106<br>In this thesis, we present a module of RF front-end design with low cost, small form factor and easy integration into LTE module applications. Based on this research, LTE Band 1, Band 3 and Band 8 are supported. In LTE Band 1, the measured UE maximum output power at 1.95GHz with QPSK modulation scheme, 1 Resource Block allocation and 20MHz bandwidth is 23.10dBm. The measured reference sensitivity level at 2.14GHz with 5MHz bandwidth is -105.4dBm. In LTE Band 3, the measured UE maximum output power at 1747.5MHz with QPSK modulation scheme, 1 Resource Block allo
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Miao, Meng. "RF CMOS UWB transmitter and receiver front-end design." 2008. http://hdl.handle.net/1969.1/ETD-TAMU-2727.

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The low-cost low-power complementary metal-oxide semiconductor (CMOS) ultra wideband (UWB) transmitter and receiver front-ends based on impulse technology were developed. The CMOS UWB pulse generator with frequency-band tuning capability was developed, which can generate both impulse and monocycle pulse signals with variable pulse durations. The pulse generator integrates a tuning delay circuit, a square-wave generator, an impulse-forming circuit, and a pulse-shaping circuit in a single chip. When integrated with the binary phase shift keying (BPSK) modulator, the transmitter front-end can gen
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Bai, Yu. "Smart Antenna RF Front-end for WLAN and SDARS." Thesis, 2006. http://hdl.handle.net/10012/2607.

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This thesis presents RF front-end system design for both WLAN (Wireless Local Area Network) and SDARS (Satellite Digital Audio Radio System) applications using adaptive smart antenna technique. It is important to understand that smart antenna system with adaptive beam-forming provides the following advantages: 1. It can concentrate radio transmission on specific directions by modifying transmit/receive phase and amplitude characteristics, and therefore provides greater coverage and increased capacity. 2. It can greatly reduce multi-path fading effect and co-channel interference. This thesis fi
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Hung-Hsu, Wang. "Design of RF Front-End Circuitsfor DVB-H Receivers." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-0507200623193900.

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36

Tseng, Ching-cheng, and 曾清城. "Design of a 2.4 GHz RF Front End Receiver." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/f9uv42.

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碩士<br>國立臺灣科技大學<br>電子工程系<br>94<br>This thesis, presents a 2.4 GHz Front-End Receiver. This front-End Receiver includes a two stage LNA (low noise amplifiers) and a active filter. Since the LNA is the first stage in the circuit block in a receiver chain, its noise performance dominates the system sensitivity. The primary objective of this work is how to capture transistor’s S-parameter, achieve low noise figure and multistage matching method. This low noise amplifier (LNA) is for the frequency from 2.4 GHz to 2.5 GHz, using Hetero-Junction FET with fT of 12 GHz. The matching circuits were implem
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Chuang, Jheng-da, and 莊政達. "Design of an RF Front-End for DRM Receiver." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/uz7jjd.

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碩士<br>國立臺灣科技大學<br>電機工程系<br>95<br>The technologies of media are getting advanced nowadays. The gathering flow of radio has created a revolutionary change in the mode of media. Airwaves are changed into the digital way so that it is getting into the era for audience to listen to the broadcasts by multiple media through different channels. The used analogical channel is easily affected by the landform and weather so there are problems of the volume and quality of the sounds. The character of digital broadcasting radio is to provide the reception in a same location, the moving and the car. And the
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Tu, Bo-rong, and 涂柏榕. "Common Gate-Common Source Configuration RF Front-End Circuit." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/75ja3q.

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碩士<br>國立臺灣科技大學<br>電機工程系<br>99<br>This thesis presents the design of a low noise amplifier for wireless communication standard applications including GSM, GPS, WCDMA, IEEE 802.11b/g, UWB group-1, and WiFi in UMC 90nm 9-metal-single-poly CMOS process. In software defined radio systems, the communication protocol to be used by in mobile devices is selected by software’s. Therefore, there are two frequency bands in the low noise amplifier we designed, which range from 0.8 GHz to 2.4 GHz(low frequency band) and from 3 GHz to 6 GHz(high frequency band), respectively. The band selection controlled by
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39

Hung, Fu-Lian, and 洪福聯. "Receiver RF Front-end Circuits for Next-generationWireless Communication." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/627v9c.

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碩士<br>國立臺灣大學<br>電子工程學研究所<br>105<br>In this thesis, an RF front-end which is a sliding IF receiver including a low-noise amplifier, a first stage down-conversion mixer and an I/Q mixer as the second stage are proposed in a 1.1-V supply. The first stage of proposed RF front-end presents a variable gain control low noise amplifier to keep different input magnitude from saturation of circuit. This work is fabricated in TSMC 40-nm CMOS technology. The total power consumption is 15 mW, the highest gain is 10 dB and noise figure is 5.8 dB at 36 GHz. The variable gain control can adjust the gain more
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Wang, Hung-Hsu, and 王宏旭. "Design of RF Front-End Circuitsfor DVB-H Receivers." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/32165919662753639064.

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碩士<br>國立臺灣大學<br>電子工程學研究所<br>94<br>In the recent years, chipsets for DVB-T receivers have become hot products in the industry. According to the requirement on the market, products developed for DVB-H receivers in mobile handsets will be the next research topic. Since batteries are the main power sources of mobile handsets, the power consumption of the products is of primary concern. To achieve this goal, we develop a low-power RF front-end for DVB-H receivers in mobile handsets. The front-end consists of a variable-gain low-noise amplifier, a mixer, and a basedband variable-gain amplifier. Firs
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Chen, Yuan-Yang, and 陳暘元. "RF FRONT-END CIRCUIT DESIGN FOR ULTRA-WIDEBAND RECEIVER." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/93138366512604237963.

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碩士<br>大同大學<br>電機工程學系(所)<br>94<br>This thesis describes the design of a UWB (3.1GHz – 10.6GHz) RF front-end circuit. The process is TSMC 0.18um 1P6M CMOS process. This RF front-end circuit consists of a UWB LNA and an active down-conversion mixer. The designed UWB LNA has a gain greater than 10 dB and the noise figure less than 3.9 dB with the power consumption of 11.484 mW in the frequency range 3.1 GHz – 10.6 GHz. The Layout of the UWB LNA is about 0.55 mm2. The UWB LNA is a single-ended architecture, and therefore a single-ended-to-differential circuit (active balun) is needed to connect to
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42

Hsueh, Ting-Ming, and 薛丁明. "Miniaturization of RF Front-End Module for WiMAX Applications." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/38587115140299391887.

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碩士<br>元智大學<br>通訊工程學系<br>97<br>The main objective of this thesis is the development of miniaturized RF front-end module for WiMAX applications. Active components (mainly in MMIC form) will be selected based on the system specifications. Main focus and contribution will be in the design and implementation of passive components including the antenna and bandpass filters. The main criterion for the determination of implementation technologies is to achieve the maximum level of integration for the front-end module. Functional tests and field tests of the Tx/Rx chains exhibited a transmission distan
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Yang, Chih-Hsun, and 楊智勛. "A 3.5GHz CMOS RF Front-end for WiMAX Applications." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/13453985326610410716.

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碩士<br>國立清華大學<br>電機工程學系<br>96<br>In this thesis, two CMOS RF front-end circuits are proposed for WiMAX applications. These circuits are realized in TSMC 0.18 um 1P6M CMOS process technology can be applied to direct conversion receivers for high integration. For the first RF front-end circuit, the negative-resistance loading are used to increase the gain and the noise performance. Moreover, there is a DC-offset cancellation loop to solve the DC-offset problem. According to the measurement results, the RF front-end has a voltage conversion gain (CG) of 11 dB, a 1-dB gain compression point (P1dB)
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44

Tai-Shun, Fu, and 傅泰順. "Design of RF Front-end Circuits for UWB Applications." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/11071089027403745453.

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碩士<br>長庚大學<br>電子工程研究所<br>94<br>Abstract This thesis presents the development of IEEE 802.15.3a UWB RF front-end circuit with TSMC 0.18µm standard CMOS technology. The study is to integrate the transceiver circuit into a single chip to benefit the integration of the base-band circuit and to realize the manufacture of SoC (System on a Chip). Hence, the manufacturing cost can be reduced considerably. This thesis contains three parts, including power amplifier, low noise amplifier and down conversion mixer. Planning the arrangement of the system, the RF frequency range is 3.1 to 10.6 GHz. The supp
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Young, Shu-Chuan, and 楊淑娟. "Programmable Gm-C Equalizer For DVD RF Front-End." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/72060745884345960492.

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碩士<br>中華大學<br>電機工程學系碩士班<br>94<br>A full CMOS seventh-order Elliptic filter based on gm-C biquads with a -3dB tuning frequency of 10MHz to 28MHz is realized in TSMC 0.18um CMOS process .The linear operation transconductance amplifier is base on source degenerated in order to achieve high linearity and high-frequency operation . The common-mode feedback(CMFB) circuit used to stabilize the bias of the filter architecture and a very simple automatic tuning system corrects the filter gm deviations from process parameter tolerances and temperature variation . The supply voltages used are 3.3V. The
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46

Ho, Chih-Wei, and 何志偉. "A Study on RF Front-End CMOS VCO Circuit." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/33174077359396145503.

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碩士<br>國立臺灣科技大學<br>電子工程系<br>91<br>Design of CMOS Voltage-Controlled Oscillator (VCO) will be investigated in this thesis. The architecture is the complementary nMOS and pMOS cross-coupled pair to enhance the negative conductance with internal resonator. CMOS VCOs are implemented using TSMC 0.35um process with 3.3V supply voltage and TSMC 0.18um process with 1.8V supply voltage, we connect two LC-tank VCOs by transformer or connect one LC-tank VCO and divider to generate four 0,90,180,270 degrees signals. The simulation results with Cadence SpectreRF aid the design of these VCOs.
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47

Hsu, Shih-Yuan, and 許士元. "A Study on CMOS RF Front-End Mixer Circuit." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/04432491010624490019.

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碩士<br>國立臺灣科技大學<br>電子工程系<br>91<br>The low-cost and high-integration radio frequency (RF) integrated circuit design based on CMOS technology has been very mature. The use of CMOS technology is very attractive for the integrating the baseband, IF, and RF modules on a single chip to serve the function of the transceiver. This thesis presents the introduction of mixer and the design of 2.4GHz CMOS Single-Balanced Mixer with TSMC 0.35um CMOS Digital Process. The mixer is designed with conversion voltage gain 1.54dB, NF 10.94dB, IIP3 -5.6dBm, 1dB compression point -7.08dBm, isolation of RF
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48

Chun-chi, Chi, and 紀俊吉. "A Study on CMOS RF Front-End LNA Circuit." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/07685922915820837838.

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碩士<br>國立臺灣科技大學<br>電子工程系<br>91<br>Design of CMOS Low Noise Amplifiers (LNAs) which are suitable for Radio Frequency (RF) wireless applications will be investigated in this thesis. CMOS LNAs are implemented using TSMC 0.35um process with 3.3V supply voltage and TSMC 0.18um process with 1.5V supply voltage, these are applied for 2.4GHz Bluetooth and 5.75GHz Wireless LAN. Through adjusting the values of components in the LNA, we can optimize the property of LNA. The simulation results of single-ended cdacode CMOS LNAs in different processes are compared by key features of power gain, noise figure,
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49

Liu, Yen-Hung, and 劉彥宏. "Design of Dual-Band RF Front-End Integrated Circuits." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/31017082395882846023.

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碩士<br>長庚大學<br>半導體科技研究所<br>91<br>This thesis presents the development of IEEE 802.11a and IEEE 802.11b concurrent dual-band RF front-end circuits in TSMC(Taiwan Semiconductors Manufacture Company) standard 0.18μm CMOS technology. By integrating the two-band circuit, the cost of manufacturing, the power consumption and chip size are reduced. Recent development of CMOS RF IC design allows the realization of the concept of System on a Chip(SOC) consisting of three functional blocks: radio-frequency, intermediate-frequency and baseband-frequency circuits. Therefore, the cost is reduced considerably
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50

Chuang, Jia-Soy, and 莊家碩. "RF CMOS Front-End Circuit Design for Bluetooth Receiver." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/54340251414142017453.

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碩士<br>國立中央大學<br>電機工程研究所<br>88<br>Since the rapid development of the CMOS technology, a RF analog front-end receiver can be integrated on a single chip. This thesis introduces a highly integrated RF receiver front end for Bluetooth system. This front-end design composed of low noise amplifier, two downconversion mixers, passive polyphase with buffers, and active polyphase filter. It receives the 2.4GHz desired high frequency signal ,and then translates it to 700KHz. Besides downconversion, it also needs image rejection by active polyphase filter. At last, it generates I_Q path and feed I_Q
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