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1
Du, Le. "Control of Pseudo-Sinusoidal Switched Reluctance Motor with Zero Torque Ripple and Damped Input Current Ripple." Thesis, Virginia Tech, 2013. http://hdl.handle.net/10919/23215.
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Switched reluctance motor(SRM)drives are favored in many industrial applications because of their cost advantage and ruggedness. However, the torque ripple and bus current ripple of SRM restrict its application range compared with traditional AC and DC motors due to the doubly salient pole structure and the highly non-linear coupling between torque, rotor position and phase current. As a result of the torque ripple on the shaft, unwilling large acoustic noises are generated. The large current ripple at the DC bus input requires large electrolytic capacitors for attenuation. However, electrolytic capacitors are of low reliability, which will reduce the duration of the control system. Because of these disadvantages, the acceptance of SRM by the industry, especially in servo-type applications which require stationary torque at low speed, is quite slow. In order to obtain high quality control, there have been many efforts in developing techniques for torque ripple attenuation. Primarily, two approaches are used to give a smooth torque. One is to improve the magnetic design, the other is to use sophisticated control techniques. Some torque control techniques have been proved to obtain a relatively good performance by simulations and experimental results. This thesis gives an alternative torque ripple minimization technique. Simulations and Experiments are conducted to show the effectiveness of this new control scheme. Under this new control scheme, the current controller are much easier to be designed under high speed application, which could be an advantage of it.First, the SRM operating principle is presented. The torque of SRM is produced by the tendency of its moveable part shifting to a position where the inductance of the exited winding is maximized. The torque ripple origin is discussed in terms of both magnetization and control. The torque ripple is produced during phase commutation interval because the phase current cannot rise from zero to the nominal value instantaneously due to the existence of the phase inductance.
Second, a new torque control scheme is proposed. The new torque control of SRM is split into two cascade sub-tasks. At first, a current reference for ripple free torque is determined. Then a current controller is designed to regulate the current in the stator winding to reference value. Simulations are conducted to verify the effective of this torque control scheme in both ideal `sinusoidal\' SRM and a `Pseudo-Sinusoidal\' SRM.
Finally, a motor drive control system is built to implement the new control scheme. The motor is tested under different speeds to see the torque ripple produced in different speed ranges.
As a conclusion, the new control algorithm for constant torque and damped input bus current ripple is investigated. The advantages of this new torque control method are listed in the paper. Simulation and experimental results show the effectiveness of this new control method.
Master of Science
2
Wang, Jing. "Control of current ripple in a dc-dc converters." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape17/PQDD_0017/NQ27268.pdf.
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Lentz, Nathan H. "A Modified Boost Converter with Reduced Input Current Ripple." DigitalCommons@CalPoly, 2017. https://digitalcommons.calpoly.edu/theses/1740.
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Battery-powered trends in consumer electronics, transportation, and renewable energy sectors increase demands on DC/DC converter technology. Higher switching frequency and efficiency reduces solution size and cost, while increasing power capabilities. Still, switching noise remains the primary drawback associated with any DC/DC converter. Reducing a converter’s input ripple helps prevent switching noise from spreading to other systems on a shared DC power bus. This thesis covers the analysis, simulation, and implementation of a recently-proposed boost converter topology, alongside an equivalent standard boost converter, operating in steady-state, continuous conduction mode. A Matlab-based simulation predicts each converter’s input ripple performance using a state-space model. The converters’ hardware implementation minimizes component and layout differences to create an equivalent comparison. The simulation and hardware measurements demonstrate a 40% input current ripple reduction using the modified topology. Replacing standard boost converters with the modified topology minimizes the switching noise conducted through a system’s DC power network.
4
Håkansson, Sofi. "The [Post]industrial Intermezzo : - The Wave, Ripple and Current." Thesis, Umeå universitet, Arkitekthögskolan vid Umeå universitet, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:umu:diva-171038.
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Vadivelu, Sunilkumar. "Investigation of sinusoidal ripple current charging techniques for Li-ion cells." Thesis, KTH, Skolan för elektro- och systemteknik (EES), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-195169.
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In recent years, the demand for Li-ion-type batteries has been increasing significantly in various fields of applications including portable electronics, electric vehicles, and also in renewable energy support. These applications ask for a highly efficient charging strategy in order to maintain a long life cycle of the batteries. Recently, a new charging technique referred as sinusoidal ripple current-constant voltage charging (SRC-CV) technique has been proposed and is in certain publications claimed to realize an improved charging per-formance on Li-ion batteries than conventional constant-current constant-voltage charg-ing (CC-CV) techniques. In this thesis, the charging performance of the SRC-CV charging method applied to a prismatic Li-ion cell for an automotive traction application is inves-tigated. An existing experimental setup is upgraded to realize charging of the Li-ion cells using the SRC-CV charging method. Electrochemical impedance spectrums of three Li-ion cells have been obtained using electrochemical impedance spectroscopy (EIS). These spectrums were used to determine the charging ripple-current frequency where the mag-nitudes of the ac impedance of the cell are minimized. Key parameters like charging time, discharging time, and energy efficiency are calculated in order to compare the charg-ing performance of the CC-CV and SRC-CV charging techniques. The results reported from the experimental results obtained in this thesis indicate that there is no significant improvement with the SRC-CV charging method (implemented using a constant ripple-current frequency) compared to the CC-CV method in terms of charging time and energy efficiency.På senare tid har behovet av batterier av Li-jontyp ökat kraftigt inom ett flertal applikationsområden inkluderande portabel elektronik, elfordon och miljövänlig elenergiproduktion. I dessa applikationsområden behövs en högeffektiv laddstrategi för att möjliggöra ett stort antal cyklingar av batterierna. Nyligen har en new laddmetod, benämnd sinusoidal ripple current-constant voltage-laddning (SRC-CV-laddning) föreslagits och har i vissa publikationer demonsterat en förbättring av laddprestanda hos Li-jonbatterier jämfört med konventionell constant-current constant-voltage-laddning (CC-CV-laddning). I detta examensarbete undersöks laddprestandan hos SRC-CV och CC-CV-laddning när de appliceras på prismatiska Li-jonceller avsedda för traktionsdrift. En existerande experimentuppsättning har uppgraderats för att realisera laddcykling med SRC-CV-laddning. Med hjälp av elektrokemisk impedansspektroskopi på tre Li-jonceller har den frekvens vid vilken magnituden på cellernas impedans är minimerad identifierats. Nyckelparametrar såsom laddtid, urladdningstid och energieffektivitet har uppmätts för både SRC-CV- och CC-CV-laddning. De experimentella resultaten visar ingen signifikant förbättring mellan SRC-CV-laddning (implementerat med en konstant rippelströmfrekvens) och konventionell CC-CV-laddning.
6
SatÅ, Kenji. "A switching ripple based current sharing control system for celluar converters." Thesis, Massachusetts Institute of Technology, 1997. http://hdl.handle.net/1721.1/10464.
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Marita, Marius G. "Analysis and implementation of ripple current cancellation technique for electronic ballasts." Cleveland State University / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=csu1254485537.
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Montane, Paul. "Ripple Performance Instrumentation, Modeling, and Testing for Wet Tantalum Capacitors." ScholarWorks @ UVM, 2017. https://scholarworks.uvm.edu/graddis/813.
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Tantalum capacitors are electronic components that are widely used in many types of devices. They are particularly valued for their exceptionally high capacitance and volumetric efficiency. One of the most vital performance parameters for this type of capacitor is the ability to handle unwanted AC ripple, since high levels of ripple can lead to overheating and capacitor failure. Yet the actual ripple limit for a capacitor has been historically difficult to quantify, and has been previously provided to customers only in the form of heavily padded estimates. Throughout the capacitor industry there has been significant demand for more realistic ripple ratings. The discussion here describes a new test system that has been designed to meet this demand for ripple characterization of wet tantalum capacitors.
9
Loncarski, Jelena <1983>. "Peak-to-Peak Output Current Ripple Analysis in Multiphase and Multilevel Inverters." Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2014. http://amsdottorato.unibo.it/6247/.
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Analysis of the peak-to-peak output current ripple amplitude for multiphase and multilevel inverters is presented in this PhD thesis. The current ripple is calculated on the basis of the alternating voltage component, and peak-to-peak value is defined by the current slopes and application times of the voltage levels in a switching period. Detailed analytical expressions of peak-to-peak current ripple distribution over a fundamental period are given as function of the modulation index. For all the cases, reference is made to centered and symmetrical switching patterns, generated either by carrier-based or space vector PWM.
Starting from the definition and the analysis of the output current ripple in three-phase two-level inverters, the theoretical developments have been extended to the case of multiphase inverters, with emphasis on the five- and seven-phase inverters. The instantaneous current ripple is introduced for a generic balanced multiphase loads consisting of series RL impedance and ac back emf (RLE). Simplified and effective expressions to account for the maximum of the output current ripple have been defined. The peak-to-peak current ripple diagrams are presented and discussed. The analysis of the output current ripple has been extended also to multilevel inverters, specifically three-phase three-level inverters. Also in this case, the current ripple analysis is carried out for a balanced three-phase system consisting of series RL impedance and ac back emf (RLE), representing both motor loads and grid-connected applications. The peak-to-peak current ripple diagrams are presented and discussed. In addition, simulation and experimental results are carried out to prove the validity of the analytical developments in all the cases. The cases with different phase numbers and with different number of levels are compared among them, and some useful conclusions have been pointed out. Furthermore, some application examples are given.
10
Nissan, Omri. "A Multiphase Modified Boost Converter With Reduced Input Current Ripple: Combined Capacitors." DigitalCommons@CalPoly, 2018. https://digitalcommons.calpoly.edu/theses/1914.
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The delivery of high power and smaller footprints through a non-isolated topology demands for the use of multiphase topology in DC-DC converters. Multiphase reduces the ripple observed on both the input and output waveforms; however, it may not be enough to connect to sensitive power sources such as renewable energy sources. A single-phase modified boost converter demonstrates the ability to acquire very minimal input current ripple by addition of passive components. The expansion to multiphase topology is the next logical step for higher power application while furthering the low input current ripple benefit. In this thesis, the multiphase modified boost topology is compared with the multiphase standard boost topology to explore the benefits and trade-offs of the proposed topology. A 12V input to 19V output at 95W output power multiphase standard and modified boost converters were designed and constructed for the thesis. Results from theoretical calculations, computer simulations, and hardware implementations were then compared to evaluate their performances. Results show that compared to the standard boost, the modified boost yields significantly less input current ripple at 2% under full load condition while maintaining output voltage ripple of 5% and higher than 90% efficiency.
11
Leu, Ching-Shan. "Improved Forward Topologies for DC-DC applications with Built-in Input Filter." Diss., Virginia Tech, 2006. http://hdl.handle.net/10919/26073.
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Among PWM power conversion topologies, the single-switch forward topology is the one that has been most widely used for decades. Its popularity has been based on many factors, including its low cost, circuit simplicity and high efficiency.
However, several issues need to be addressed when using the forward converter such as the core reset, the voltage spikes caused by the transformer leakage inductance, and the pulsating input current waveform.
The transformer is driven in a unidirectional fashion in the forward converter; a tertiary forward converter (TFC) is an example of this. Therefore, the third winding and reset diode must be provided with an adequate period of reset time so that the flux can be fully reset by the end of each switching cycle to prevent core saturation.
Also, due to the utilization of a transformer, leakage inductances cannot be avoided. The energy stored in the leakage inductance during current ramp-up is not transferred to the load, and is not recovered during its discharge phase. As a result, the VDS waveform has a voltage spike and undesirable high-frequency oscillation. Therefore, a higher voltage-rating switch should be used to reduce the risk of high-voltage breakdown. Although a switch with amply high voltage ratings is available, it would tend to have a higher on-resistance, RDS(ON), resulting in increased conduction losses. Moreover, selection of a switch with higher voltage ratings than necessary may needlessly increase the cost of the design.
Usually an additional circuit such as a snubber circuit or a clamp circuit or the soft-switching technique is used to absorb these voltage spikes. Consequently, the leakage inductance is intentionally minimized in the PWM power conversion technique so that it will not degrade the circuit performance. In contrast, the leakage inductance of the transformer may enhance rather than detract from circuit performance with a resonant power conversion technique.
To date, however, no single-switch forward converter has been claimed to be able to enhance the converter performance with the PWM power conversion technique by utilizing the leakage inductance. Therefore, research on the utilization of the transformer leakage inductance in the PWM forward converter is needed. Two techniques, input current ripple reduction and an embedded filter, are proposed to enhance the performance of forward converter using the PWM technique.
By inserting a capacitor between two primary windings of the TFC, an input current ripple reduction technique is proposed and a forward converter with ripple reduction (FRR) is presented in this research work. Because the voltage of the capacitor is clamped to input voltage, the capacitor becomes a second voltage source to share part of the load current. As a result, the input current ripple is reduced. Moreover, the capacitor voltage is clamped both at the static and dynamic states; thus the excessive voltage stress on the main switch S1 of the FAC during low-line to high-line step transient is eliminated.
Furthermore, without an external LC filter, the EMI noise levels can be further reduced as a result of the embedded notch filter formed by the transformer leakage inductance and clamp capacitor if the notch frequency is designed to be the same as the switching frequency. With the help of the clamp capacitor, therefore, the leakage inductance can enhance rather than detract from the converter performance.
The input current ripple can be reduced further by employing the proposed techniques. Two sets of the clamp capacitors and the leakage inductances are utilized, and the current ripple can even be cancelled if the condition is met. Consequently, the input current becomes a non-pulsating waveform and a forward converter with ripple cancellation (FRC) is presented. Moreover, without an external LC filter, the EMI noise levels can be further attenuated as a result of the embedded low-pass filter formed by the transformer leakage inductances and clamp capacitors. Again, the leakage inductance can enhance the converter performance just as the resonant converter does.
In addition to providing the analysis and design procedure, this work verifies the performance of the presented converters, the FRR and the FRC, by the experimental results.
By employing the proposed techniques, eight new topologies have been extended for different power conversion applications. Each member of the FRR and the FRC families is able to enhance the converter performance, in ways such as the elimination of the voltage spikes on the main switch without a snubber circuit and the improvement of the EMI performance with small filter components. Consequently, the cost can be reduced and the space of the converter can be saved.Ph. D.
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Ksiazek, Peter F. "Reduction of current/torque ripple in low power grid-tie PMSG wind turbines." Thesis, University of British Columbia, 2014. http://hdl.handle.net/2429/50298.
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Small-scale Wind Energy Conversion Systems (WECS) are becoming an attractive option for distributed and renewable energy generation. In order to be affordable, WECS must have low capital and maintenance costs. This leads to the increasing penetration of Permanent Magnet Synchronous Generators (PMSG) operating at variable frequency with connections to the power grid through a rectifier, and grid-tie inverter. Because PMSGs lack brushes and can be directly coupled to wind turbines, the capital and maintenance costs are greatly reduced. A direct connection to the grid further reduces system costs by removing the requirement of large battery banks.
The loading produced by grid-tie inverters on the DC bus is different than more typical constant-current or constant-power loads. They are characterized by large input ripple currents at twice the inverter's grid frequency. These ripple currents are reflected through the DC bus into the PMSG causing increased heating in the stator, and ripple torques which lead to premature bearing failure and increased maintenance costs. To mitigate this problem, manufacturers typically add large amounts of capacitance on the DC bus to partially absorb these ripples at the expense of system size, cost, and reliability.
In this work, the effects of the grid-tie inverter load are explored using system behavioural models which provide insight into the low frequency behaviour of the PMSG, rectifier, DC bus, and inverter. The swinging bus concept is presented and analysed in the time and frequency domains. A control philosophy is developed which allows the DC bus to swing, thus removing the effects of the grid-tie inverter on the PMSG while keeping the DC bus capacitor small. A solution consisting of a Moving Average Filter (MAF) is presented as an integral part of the control strategy.
Full simulations of a complete system are developed and investigated to verify the ripple torque reduction technique. Finally, a prototype is developed and experimental results are presented for a 2.5kW PMSG turbine generator. The simulation and experimental results are compared to a traditional controller showing tangible improvements in ripple current and torque in the PMSG, while improving the dynamic response of the system.Applied Science, Faculty of
Electrical and Computer Engineering, Department of
Graduate
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Shum, Kin E. "A low ripple bi-directional battery charger/discharger using coupled inductor." Thesis, This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-04302009-040332/.
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Mitra, Rakesh. "Torque Ripple Minimization of Switched Reluctance Motors Using Speed Signal Based Phase Current Profiling." University of Akron / OhioLINK, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=akron1415968334.
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Swint, Ethan Baggett. "DC Reluctance Machine — A Doubly-Salient Reluctance Machine with Controlled Electrical and Mechanical Power Ripple." Diss., Virginia Tech, 2012. http://hdl.handle.net/10919/27717.
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Doubly-Salient Reluctance Machines (DSRMs) sidestep many of the issues with permanent
magnet and induction machines and embody the lowest cost and simplest manufacturing of the
motor technologies. Major drawbacks to RMs have been (1) the need for failure-prone
electrolytic capacitors, (2) large torque ripple, and (3) acoustic noise. Conventionally, these
drawbacks have been addressed independently either through (1) excitation control or (2)
machine design, but not as a holistic system or solution. This disseratation presents a design for
high-efficiency low-cost RM while producing smooth output torque and avoiding pulsating
inverter input current and the associated electrolytic capacitor. We propose a method for shaping
the machine reluctance profile to reduce machine torque ripple to a desired level (here, <5%)
without compromising on machine efficiency or power density, a Shaped Reluctance Machine
(ShRM). Furthermore, a comprehensive approach which combines both phase excitation control
and machine design to cooperatively address the excursions of input and output powers from
their average values which results in less than 5% ripple for both electrical and mechanical net
power â essentially a DC Reluctance Machine (DCRM). Compared to conventional practice in
DSRMs, electrical power ripple is reduced by 85 times and torque ripple is reduced by almost 20
times, while overall efficiency, torque density, and power density are maintained.Ph. D.
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Gundogmus, Omer. "SIMULTANEOUS TORQUE RIPPLE AND ACOUSTIC NOISE MITIGATION IN SWITCH RELUCTANCE MACHINES." University of Akron / OhioLINK, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=akron1579790717180753.
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Hay, Zoe M. "A Modified Multiphase Boost Converter with Reduced Input Current Ripple: Split Inductance and Capacitance Configuration." DigitalCommons@CalPoly, 2018. https://digitalcommons.calpoly.edu/theses/1913.
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This thesis presents the simulation, design, and hardware implementation of a modified multiphase boost converter. Converter design must consider noise imposed on input and output nodes which connect to and influence the operation of other devices. Excessive noise introduces EMI which can damage sensitive circuits or impede their operation. High ripple current degrades battery lifetime and reduces operating efficiency in connected systems such as PV arrays. Converters with high ripple current also experience greater peak conduction loss and require larger components. A two-phase implementation of a modified boost converter demonstrates the input current filtering benefits of the modified topology with increased power capacity. In a 12V to 19V 95W design, the modified multiphase design exhibits a reduced input current ripple of 1.103% compared to the 9.096% of the standard multiphase design while imposing minimal detriment to overall converter efficiency. The modified topology uses two inductors and one feedback capacitance per phase. Larger value inductors generally exhibit lower current ratings as well as larger size. The split inductance of the modified multiphase topology can be designed for occupation of less total volume than the single inductance of the standard multiphase topology.
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Mandrioli, Riccardo. "A modular interleaved converter for output current ripple minimization in dc fast chargers for electric vehicles." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2019. http://amslaurea.unibo.it/18995/.
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In this work, a DC off-board fast battery charger topology is presented, designed, and tested. It is expected to be able to fight the range anxiety by significantly diminish the EVs' charging times up to 15-20 minutes, meanwhile keeping low manufacturing, Operation and Maintenance (O&M) costs.
The charger is made out of two main power stages the AC/DC and DC/DC converters. In order to keep the costs lower as possible, both parts are designed using interleaved topologies organized by using the same two-level three-phase modules coupled through reactors. This architecture allows to use the already well-known industrial three-phase modules taking advantage of the benefits guaranteed by mass production and at the same time permitting an effortless expansion thanks to its modularity. Thanks to the interleaved connections, it is possible to reach a high efficiency by distributing current and power evenly among the legs. Furthermore, this topology can handle bidirectional power flows, and it might be used for operating in both Grid to Vehicle (G2V) and Vehicle to Grid (V2G) modalities. In order to reduce the dimensions, and the costs of the filters, a control strategy able to keep a zero current ripple at any operative condition is developed. The proposed charger architecture uses an AC input BUS followed by an active rectifier stage. A ripple-free strategy acts on the variable DC BUS voltage according to the chopper duty cycle keeping the current ripple null. Meanwhile, DC/DC provides the requested output current. This strategy involves the AC/DC with the tasks to regulate the DC BUS voltage level and correcting the input power factor.
A model-based control system ensures that every leg’s current follows an average current reference signal. Legs’ currents are actively rebalanced throughout a current rebalancing network.
Finally, the simulation results are carried out trough MATLAB Simulink and validated with laboratory measurements on an adequately scaled prototype.
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Thomason, Arthur Hugh. "Increasing the CO tolerance of PEM fuel cells via current pulsing and self-oxidation." Texas A&M University, 2004. http://hdl.handle.net/1969.1/260.
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An investigation was conducted to determine and compare the effect of cell current pulsing and "self-oxidation" in increasing the CO tolerance of a PEM fuel cell. The most effective pulsing parameter values were also determined. Current pulsing involves periodically demanding positive current pulses from the fuel cell to create an anode over-potential, while "self-oxidation" or sustained potential oscillations is achieved when the anode catalyst becomes so saturated with CO that the anode over-potential increases to a value at which CO is oxidized from the catalyst surface. The CO tolerance of a fuel cell system with a Pt-Ru anode was tested using 50 and 496 ppm CO in the anode fuel. The performance of the system declined with an increase in CO concentration. Current pulses of various amplitude, frequency, and duty cycle were applied to the cell while CO was present in the anode fuel. With 50 ppm CO in the anode fuel, the most effective pulse in increasing CO tolerance while maintaining normal cell operation was 1.0 A/cm2, 0.25 Hz, and a 5% duty cycle. A pulse (120 Hz, 50% duty cycle) similar to the ripple current often generated when converting DC to single-phase 60 Hz AC had a positive effect on the CO tolerance of the system, but at frequencies that high, the pulse duration was not long enough to completely oxidize the CO from the catalyst surface. With 496 ppm CO in the anode fuel, a pulse of 1.0 A/cm2, 0.5 Hz, and a 20% duty cycle proved most effective.
When the cell was exposed to 496 ppm CO, without employing pulsing, "self-oxidation" occurred and CO was periodically oxidized from the catalyst surface. However, pulsing allowed the cell to operate at the desired voltage and power a higher percentage of the time than "self-oxidation"; hence, pulsing was more effective.
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Choi, Woojin. "New approaches to improve the performance of the PEM based fuel cell power systems." Texas A&M University, 2004. http://hdl.handle.net/1969.1/2752.
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Fuel cells are expected to play an important role in future power generation. However, significant technical challenges remain and the commercial breakthrough of fuel cells is hindered by the high price of fuel cell components. As is well known, the fuel cells do not provide the robust source characteristics required to effectively follow the load during significant load steps and they have limited overload-handling capability. Further, the performance of the fuel cell is significantly degraded when the CO (Carbon Monoxide) is contained in the hydrogen fuel.
In this thesis several new approaches to improve the performance of PEM based fuel cell power systems are discussed. In the first section an impedance model of the Proton Exchange Membrane Fuel Cell Stack (PEMFCS) is first proposed. This equivalent circuit model of the fuel cell stack is derived by a frequency response analysis (FRA) technique to evaluate the effects of the ripple current generated by the power-conditioning unit. Experimental results are presented to show the effects of the ripple currents.
In the second section, a fuel cell powered UPS (Uninterruptible Power Supply) system is proposed. In this approach, two PEM Fuel Cell modules along with suitable DC/DC and DC/AC power electronic converter modules are employed. A Supercapacitor module is also employed to compensate for instantaneous power fluctuations including overload and to overcome the slow dynamics of the fuel processor such as reformers. A complete design example for a 1-kVA system is presented.
In the third section, an advanced power converter topology is proposed to significantly improve the CO tolerance on PEM based fuel cell power systems. An additional two-stage dc-dc converter with a supercapacitor module is connected to the fuel cell to draw a low frequency (0.5Hz) pulsating current of the specific amplitude (20-30[A]) from the fuel cell stack. CO on the catalyst surface can be electro-oxidized by using this technique, and thereby the CO tolerance of the system can be significantly improved. Simulation and experimental results show the validity and feasibility of the proposed scheme.
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Yu, Feng. "Modeling of V2 Control with Composite Capacitors and Average Current Mode Control." Thesis, Virginia Tech, 2011. http://hdl.handle.net/10919/33458.
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Various types of current mode control are being used in different applications. Model for current mode control is indispensable for proper system design. Since 1980s, modeling of current mode control has been a hot topic in power electronics field. In current mode control, sub-harmonic oscillation is a common issue, especially for constant frequency current mode control: like peak current mode control, valley current mode control, or average current mode control.
Recently V2 control is becoming more and more popular due to its simple implementation ad super fast transient response. V2 control can also run into sub-harmonic oscillation just as current mode control. Efforts have been devoted to modeling of V2 control.
A common property of different types of current mode control and V2 control is that they are all multi-loop structures and the inner loops are all highly nonlinear. Due to the nonlinearity of the inner loops, modeling of these structures is extremely difficult. Up to now, there are two main problems which havenâ t been solved: 1. modeling of average current mode control; 2. modeling of V2 control with composite capacitors.
This thesis tries to solve these two problems and starts with V2 control. For V2 control with single type of bulk capacitors, an accurate model has been proposed previously. In this thesis, an equivalent circuit model is proposed to get better physical understanding. This method makes use of previous current mode control modeling result and relates V2 control with current mode control.
To model V2 control with composite capacitors, capacitor currents and output voltage time domain waveforms are analyzed. Based on describing function method, transfer function from control to output is derived. The modeling result shows that with more parallel ceramic capacitors, system has smaller stability margin.
For average current mode control, the structure is compared with V2 control. Similarity between the structures of current compensator in average current mode and output capacitor network in V2 control is identified. V2 model is utilized for average current mode control. The modeling derivation process is simplified. For the current compensator in average current mode control, it is not desired to have a high frequency pole from stability point of view.
As a conclusion, a circuit model for V2 control with bulk capacitors is proposed and another two problems are examined: modeling of V2 control with composite capacitors and modeling of average current mode control. It has been demonstrated that there is similarity between these two structures. The modeling results are verified through simulation and experiments.Master of Science
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Peng, Wei. "Fast Modelling, Torque-Ripple-Reduction and Fault-Detection Control of Switched Reluctance Motors." Doctoral thesis, Universite Libre de Bruxelles, 2019. https://dipot.ulb.ac.be/dspace/bitstream/2013/285757/5/contratWP.pdf.
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As the world moves towards a cleaner and greener future, electrical machines for various industrial purposes and transport applications have gained a lot of attention. Permanent magnet synchronous machines (PMSMs) are usually the solution for electric vehicle (EV) applications thanks to their high efficiency, compactness and high-power density. On the downside, although the price of rare-earth materials has recovered close to historical levels, concerns still remain and the questions on the environmental sustainability of these materials have also been raised, which has encouraged the researchers to consider rare-earth-free machines.The switched reluctance machine (SRM) is one of the competitive alternatives, thanks to the simple and robust construction, high reliability and inherent fault tolerance capability. However, it has a bad reputation when it comes to torque ripple and acoustic noise. And the highly nonlinear characteristic brings much difficulty to routine design purposes and machine optimisation.Therefore, some of the above mentioned problems are addressed - a torque-ripple-reduction, reliable and low-cost system of SRMs is presented in this thesis. Firstly from the modelling point of view, a combined magnetic equivalent circuit (MEC) and finite element (FE) model of SRMs is developed for fast characterization the nonlinear behavior. Secondly from the control point of view, various torque-ripple reduction techniques are implemented and compared. Moreover, a minimal current sensing strategy with enhanced fault-detection capability is proposed and validated experimentally. It requires two current sensors, to replace the phase current sensors, with no additional devices for fault detection, to achieve a more compact and low-cost drive. Finally from the reliability point of view, an interturn short-circuit fault detection method and a rotor position estimation approach are investigated and validated experimentally, which leads to a more reliable system.Doctorat en Sciences de l'ingénieur et technologie
info:eu-repo/semantics/nonPublished
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Sun, Jing. "New leading/trailing edge modulation strategies for two-stage AC/DC PFC adapters to reduce DC-link capacitor ripple current." Thesis, Texas A&M University, 2003. http://hdl.handle.net/1969.1/5801.
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AC/DC adapters mostly employ two-stage topology: Power Factor Correction (PFC) pre-regulation stage followed by an isolated DC/DC converter stage. Low power AC/DC adapters require a small size to be competitive. Among their components, the bulk DC-link capacitor is one of the largest because it should keep the output voltage with low ripple. Also, the size of this capacitor is penalized due to the universal line voltage application. Synchronization through employing leading edge modulation for the first PFC stage and trailing edge modulation for the second DC/DC converter stage can significantly reduce the ripple current and ripple voltage of the DC-link capacitor. Thus, a smaller DC-link capacitance can be used, lowering the cost and size of the AC/DC adapter. Benefits of the synchronous switching scheme were already demonstrated experimentally. However, no mathematical analysis was presented. In this thesis, detailed mathematical analyses in per-unit quantity are given to facilitate the calculation of the DC-link capacitor ripple current reduction with Leading/Trailing Edge Modulation strategies. One of the limitations of leading/trailing edge modulation is that the switching frequencies of the two stages need to be equal to achieve the best reduction of the DC-link capacitor ripple current. The DC-link capacitor ripple current will become larger if the switching frequency of the DC/DC converter is larger than that of the PFC pre-regulator, which blocks us to employ higher frequency for isolated DC/DC converter to reduce its transformer size. This thesis proposed a new Leading/Trailing Edge Modulation strategy to further reduce the DC-link bulk capacitor ripple current when switching frequency of DC/DC converter stage is twice the switching frequency of PFC stage. This proposed pulse width modulation scheme was verified by simulation. Experimental results obtained through digital control based on FPGA are also presented in this thesis.
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Piňos, Matěj. "Bezsensorové řízení polohy solenoidu." Master's thesis, Vysoké učení technické v Brně. Fakulta strojního inženýrství, 2017. http://www.nusl.cz/ntk/nusl-318655.
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This thesis deals with position control of movable solenoid core without using a distance sensor. There are several methods of sensorless position estimation presented in theoretical part. The method based on measurement of ripple current is chosen for experiments. Firstly, it is verified by simulations with mathematical model of solenoid. After that, the experiment is created. The goal is position control based on sensorless method.
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Patel, Amit P. "High power-supply rejection current-mode low-dropout linear regulator." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/28115.
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Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.Committee Chair: Rincón-Mora, Gabriel; Committee Member: Ghovanloo, Maysam; Committee Member: Leach, W. Marshall.
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Ozkaya, Hasan. "Parallel Active Filter Design, Control, And Implementation." Master's thesis, METU, 2007. http://etd.lib.metu.edu.tr/upload/12608438/index.pdf.
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The parallel active filter (PAF) is the modern solution for harmonic current
mitigation and reactive power compensation of nonlinear loads. This thesis is
dedicated to detailed analysis, design, control, and implementation of a PAF for a 3-
phase 3-wire rectifier load. Specifically, the current regulator and switching ripple
filter (SRF) are thoroughly investigated. A novel discrete time hysteresis current
regulator with multi-rate current sampling and flexible PWM output, DHCR3, is
proposed. DHCR3 exhibits a high bandwidth while limiting the maximum switching
frequency for thermal stability and its implementation is simple. In addition to the
development of DHCR3, in the thesis state of the art current regulation methods are
considered and thoroughly compared with DHCR3. Since the current regulator type
determines the SRF topology choice, various SRF topologies are considered and a
thorough design study is conducted and SRF topology selection and parameter
determination methods are presented via numerical examples. Through a PAF
designed for a 10kW diode/thyristor rectifier load, the superior performance of
DHCR3 is verified through simulations and experiments and via comparison to other
current regulators. The sufficient switching ripple attenuation of the SRF structures
for the designed PAF system and the overall performance of the designed and built
PAF system are demonstrated via detailed computer simulations and laboratory
experiments. This thesis aids the PAF current regulator and SRF selection, design,
and implementation.
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Nonaka, Alan. "Boost Converter Inductor Sizing Effects on the Performance of MPPT Algorithms." DigitalCommons@CalPoly, 2020. https://digitalcommons.calpoly.edu/theses/2229.
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With solar power and other renewables set to take over the market in the coming decades, maximum power point tracking will be essential to optimizing power output. One underserved topic of research is the effect of inductor current ripple on performance of Maximum Power Point Tracking (MPPT) algorithms. Many new topologies are focused on decreasing the ripple from PV source to increase efficiency and power output. However, not much has been done to show ripple degrading performance of MPPT algorithms. This study uses a boost converter topology to test the performance of constant duty cycle step Perturb and Observe (PO), Incremental Conductance IC, and Constant Voltage (CV) PID over a range of inductor current ripple factor. Inductor current ripple is controlled solely by changing inductance. This study concluded that all three algorithms were quite robust and affected very little over an inductor current ripple factor range of 20% to 40%. One novel finding was increased duty cycle oscillation when the MPPT update and sample speed was faster than the boost converter response.
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Wu, Hailong. "Modelization and control of synchronous reluctance machines for the torque ripple minimization - study of vibrational and acoustic behavior." Thesis, Bourgogne Franche-Comté, 2019. http://www.theses.fr/2019UBFCA003.
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Cette thèse porte sur l’optimisation du contrôle des Machines Synchrones à Réluctance Variable (MSRV) et en particulier sur la compensation des phénomènes vibratoires. Elle comprend trois points forts : le développement d’une méthode de minimisation des pulsations de couple et sa validation expérimentale, l’études des facteurs qui peuvent influencer la méthode et l’influence de cette méthode sur les autres performances de la MSRV.Tout d’abord, une méthode de contrôle permettant de compenser les ondulations de couple d’une MSRV existante a été développée. Premièrement, une équation analytique du couple est proposée et analysée afin d’exprimer la relation analytique harmonique entre le couple et les courants d’alimentation. La notion de « fonction de couple » est ensuite introduite. Une stratégie basée sur l’utilisation de cette fonction pour minimiser les ondulations du couple est présentée. Deux méthodes de réduction des ondulations de couple utilisant les différents harmoniques de la fonction de couple sont mises en évidence en. Elles ont été analysées et comparées pour répondre aux différents objectifs. Par la suite, la méthode a été validée par les résultats des simulations pour trois technologies de rotor de MSRV parmi les plus répandues. La méthode est aussi validée par la modélisation analytique et la simulation dynamique à l’aide du logiciel Matlab/Simulink ainsi que par les résultats d’expérimentation avec l’aide du banc d’essai.Ensuite, les facteurs qui peuvent influencer la méthode proposée pour réduire les ondulations de couple et les performances dynamiques ont analysés. Dans un premier temps, une amélioration sensible de l’aptitude au démarrage de la MSRV lorsque la compensation des ondulations de couple est mise en œuvre est mise en évidence. D’autre part la sensibilité de la méthode aux erreurs de mesure de position est évaluée afin de quantifier sa fiabilité dans le cas de l’utilisation d’estimateurs lors du contrôle sans capteur. Enfin, l’influence de la saturation sur la méthode proposée est aussi étudiée à l’aide d’une analyse par éléments finis du comportement magnétique de la MSRV.Finalement, l’influence de la méthode de compensation des ondulations de couple sur d’autres performances de la MSRV est analysée. Les courants optimaux ont plus harmoniques que les courants originaux. Par conséquent, les pertes dans le cuivre, dans le fer et dans les semi-conducteurs de l’onduleur sont modélisées analytiquement, calculées et comparées. Les conclusions montrent que les pertes dans le cuivre sont les plus sensibles à la compensation des harmoniques de couple tandis que les pertes dans le fer et dans l’onduleur sont faiblement affectées. D’autre part, la réduction des ondulations de couple peut changer le comportement vibro-acoustique de la MSRV. La dernière partie est consacrée à l’étude de la relation entre les ondulations de couple et le bruit. Une équation est proposée pour évaluer la variation du bruit produit par la compensation des ondulations de couple. Dans cette partie, les simulations dans Flux 2D sont effectuées pour calculer la variation du bruit. En outre, le logiciel professionnel Manatee réalisant l’analyse des vibrations et de l’acoustique est utilisé dans le but de conforter les résultats obtenus par la modélisation analytiqueThis thesis aims to study the control and optimization of a synchronous reluctance machine for the purpose of improving the vibrational performance. The main works of the thesis can be classified into three parts: the proposed torque ripple reduction method, the factors which can influence the proposed method and the influence of the proposed method.At first, the torque ripple of synchronous reluctance machine is reduced by a control method. Firstly, a torque equation is proposed in order to present the relationship between torque ripple and the optimal currents. Then a new parameter, torque function, is put forward. Based on the torque function, the torque ripple reduction strategy is presented. Two different torque ripple minimizations are proposed by applying different torque function harmonics. They are analyzed and compared in order to define the optimal method. In order to test the proposed method further, the selected torque ripple minimization approach is applied to three SynRMs. The results of finite element simulations imply that the proposed method is effective to decrease the torque ripples of these three SynRMs. The proposed torque ripple reduction method is verified according to the models built in MATLAB/Simulink and the experiment results respectively.Then the factors which could influence the proposed torque ripple reduction method are analyzed. Firstly, torque function is a function of rotor position, current angle and saturation. Based on the model in Simulink, the influence of different starting position on the performance of the studied SynSR is analyzed. Besides, the estimated position errors produced by senserless control could also affect the toque ripple minimization by changing torque function. At last, the influence of saturation on the proposed torque ripple reduction method is introduced because the amplitudes of the optimal currents are increased.In addition, the influence of torque ripple reduction on the other perfomances of SynRM is analyzed. The optimal currents have more harmonics than the original sinusoidal currents. So three losses (copper losses, iron losses and inverter losses) are modeled, calculated, analyzed and compared. According to the results, the copper losses are the most sensible losses. The iron losses and the inverter losses are a little increased and the increased parts can be neglected. Besides, reducing torque ripple by adding stator currents could influence the vibro-acoustic of the studied SynRM. Thus this section aims to explain the relationship between torque ripple reduction and acoustic noise. An analytical equation is proposed in order to evaluate the variation of noise produced by torque ripple reduction. Simulations in Flux 2D have been performed in order to calculate the variation of noise resulted by torque ripple reduction. At last, the software Manatee which is professional in studying the vibration and noise is applied for the purpose of comparing the results with those of the finite element analysis
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Eleyele, Abidemi Oluremilekun. "Isolated Single-Stage Interleave Resonant PFC Rectifier with Active and Novel Passive Output Ripple Cancellation Circuit." Thesis, Uppsala universitet, Institutionen för elektroteknik, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-423117.
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With the increasing demand for fast, cheaper, and efficient power converters come the need for a single-stage power factor correction (PFC) converter. Various single-stage PFC converter proposed in the literature has the drawback of high DC bus voltage at the input side and together with the shift to wide bandgap switches like GaN drives the converter cost higher. However, an interleaved topology with high-frequency isolation was proposed in this research work due to the drastic reduction in the DC bus voltage and extremely low input current ripple thereby making the need for an EMI filter circuit optional. Meanwhile, this research work focuses on adapting the proposed topology for a high voltage low current application (EV charger - 400V, 7KW) and low voltage high current application (telecom power supply - 58V, 58A) owing to cost benefits. However, all single-stage PFC are faced with the drawback of second-order (100Hz) output harmonic ripple. Therefore, the design and simulation presented a huge peak to peak ripple of about 50V/3A and 26V/26A for the EV charger and telecom power supply case, respectively. This created the need for the design of a ripple cancellation circuit as the research required a peak to peak ripple of 8V and 200mV for the EV - charger and telecom power supply, respectively. A novel output passive ripple cancellation technique was developed for the EV charger case due to the ease it offers in terms of control, circuit complexity and extremely low THDi when compared with the active cancellation approach. The ripple circuit reduced the 50V ripple to 431mV with the use of a total of 2.2mF capacitance at the output stage. Despite designing the passive technique, an active ripple cancellation circuit was designed using a buck converter circuit for the telecom power supply. The active approach was chosen because the passive has a slow response and incurs more loss at a high current level. Adding the active ripple cancellation circuit led to a quasi-single stage LLC PFC converter topology. A novel duty-ratio feedforward control was added to synchronize the PFC control of the input side with the buck topology ripple cancellation circuit. The addition of the ripple circuit with the feedforward control offered a peak to peak ripple of 6.7mV and a reduced resonant inductor current by half. After analysis, an extremely low THDi of 0.47%, PF of 99.99% and a peak efficiency of 97.1% was obtained for the EV charger case. The telecom power supply offered a THDi of 2.3%, PF of 99.96% with a peak efficiency of 95%.
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Chalupa, Jan. "Návrh zařízení pro Power HIL simulaci stejnosměrného motoru." Master's thesis, Vysoké učení technické v Brně. Fakulta strojního inženýrství, 2014. http://www.nusl.cz/ntk/nusl-231138.
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This thesis deals with analysis and implementation of Power-HIL system that is designed to simulate real DC motor with comutator and permanent magnets. For problem analysis were used simulations of real components in Matlab / Simulink. The electronic parts of system were simulated with using the SimElectronic library. Idividual hardware components were designed according to simulation results. The outcome of this thesis is a power electronic simulator of real DC motor, which is implemented on dSPACE platform. The system allows software to setup parameters and behavior of simulated motor. The final system can be used for testing DC motor ECU (electronic control units).
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Larsson, Rickard, and Kenny Andersson. "Construction, testing and verification of a brushless excitation system with wireless control of the field current in a synchronous generator." Thesis, Uppsala universitet, Elektricitetslära, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-341021.
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Synchronous generators have been used in hydropower from more than a century where, traditionally, the field current is transferred to the rotor using slip rings and carbon brushes. There are some major disadvantages following the use static excitation; regular and expensive maintenance, as well as a source of carbon dust which, due to buildup, may cause short circuits. To avoid these problems associated with slip ring exciter systems, a system that use induction to transfer power to the rotor could be used instead. Systems that utilize brushless excitation today usually regulates the current by controlling the magnetization of the exciter stator, which is comparably slower than their static counterparts. In order to allow for swift regulation of the field current from a brushless exciter, required power electronics and controllers have to be present on the rotor shaft instead. The aim of this project is to start investigating if commercially available products, which are originally indented to be used in a stationary environment, could accomplish this. The results from this study shows that it is possible to use such products to control the field current. The components were found to withstand the exposure of high g-forces and vibrations, albeit only during the relatively small amount of time in which rotary testing was performed. As such there is no certainty that the components would remain functional for the considerably longer time that any commercial use would require them to.
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Barbagallo, Mariano. "HV Interleaved Multiphase DcDc Buck-Boost Converter." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2017.
Find full textAbstract:
in electric vehicle (ev) systems, bi-directional dc-dc converters are used to interface the rechargeable energy storage system (ress) such as the battery bank with the high voltage dc-link of the inverter. currently multi-cell batteries used in automotive systems, such as ev or hev, are subject to a higher failure rate than single cell batteries. the more cells are used in series, the greater the opportunities to fail and the worse the reliability. when a cell has failed the entire string or even worse the battery must be replaced, which is extremely costly [1]. so, to have less cells in series increases the reliability of the system, which also leads to a lower voltage of the dc link. for this reason and many others, in a hybrid or electric vehicle powertrain, a boost dc-dc converter enables optimization of the battery system.
this work aims to investigate all the benefits that come with interleaving technique in dc-dc converters for automotive systems. indeed, these kind of converters for use in high-performance and high-power applications have received increasing interest in recent years. in particular this research work, done with sevcon ltd focuses on the theory behind bi-directional multiphase interleaved (imc) converter and how it could be used to interface a rechargeable energy storage system (ress) to the powertrain of a hybrid or electric vehicle.
more specifically, it was investigated if it is possible to use (after appropriate hardware and software amendments) a standard three phase ac motor inverter as a multiphase interleaved converter. for this purpose two motor controller, produced by sevcon have been analysed. both the gen4 size 10 and the hvlp inverters were considered for use as a dc-dc converter. the voltage can step up or down based on the power flow direction. each phase is indeed a bi-directional buck or boost converter, which is composed of a bridge of power switches and inductor.
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Yammine, Samer. "Contribution to the Synchronous Reluctance Machine Performance Improvement by Design Optimization and Current Harmonics Injection." Phd thesis, Toulouse, INPT, 2015. http://oatao.univ-toulouse.fr/14555/1/yammine.pdf.
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This thesis is dedicated to the evaluation and the improvement of the synchronous reluctance machine’s performance for variable speed drive applications in general and for automotive applications in particular. The two axes of development are machine design and phase current harmonics injection. The rotor is an important element in the machine design and particular emphasis is placed to the design and evaluation of the rotor for enhancing the machine performance. An analytical procedure is proposed for the rotor design. The rotor elements like the ribs and the bridges that maintain the rotor mechanically strong as well as the q-axis insulation ratio (air-to-steel ratio) are studied. A computer-aided design study based on a parametric optimization problem is presented as well. The main three families of the optimization algorithms are evaluated for the optimization procedure: a gradient-based algorithm (Quasi Newton Algorithm), a non-gradient based non-evolutionary algorithm (Nelder Mead Simplex) and a non-gradient based evolutionary algorithm (Genetic Algorithm). The machine designs based on the analytical procedure and the optimization procedure are both manufactured and tested on a bench. The second axis of study of the thesis is the injection of harmonics in the phase currents of the synchronous reluctance machine. The interaction of current harmonics with the spatial inductance harmonics is studied and formalized for an m-phase machine. Then, the harmonics injection concept is evaluated in the particular case of a 2-phase machine. This study shows the benefi t of harmonics injection in the reduction of the machine torque ripple. A synchronous reluctance machine design is fi nally developed for an automotive application based on parametric optimization of the stator and rotor. This design is evaluated for the electromagnetic specifi cations imposed by a mid-power electric vehicle traction application
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Ridler, Emma Louise. "Wave-current interactions and drift velocities over rippled beds." Thesis, University of Cambridge, 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.624706.
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Dutra, S?lvio Cesar Antunes. "Estudo do conversor D : an?lises qualitativa e quantitativa, crit?rios de dimensionamento e modelagem em espa?o de estados." Pontif?cia Universidade Cat?lica do Rio Grande do Sul, 2018. http://tede2.pucrs.br/tede2/handle/tede/8339.
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Power converters are widely used in the context of power electronics. In the same way that transformers have a fundamental role in applications involving AC circuits, power converters modify voltage magnitudes in DC circuits. These devices can either present an output voltage higher than the input voltage, acting as a Boost converter, or lower, acting, in this case, as a Buck converter. The input and output signals can also present either a voltage source or a current source behavior, depending on the topology. This work presents a systematic study of the D converter operating in the continuous conduction mode, in permanent regime, including the qualitative and quantitative analyzes, resulting in a methodology of dimensioning of the converter, as well as its modeling in space of states, which makes feasible studies of control strategies for it. Although this is not a new topology, this converter has recently been reintroduced due to its ability to increase efficiency in the energy conversion process, especially in photovoltaic systems. However, this research is fully justified given the lack of similar work for the D converter topology. This study was validated from tests performed in the PSIM simulation software, in addition to MATLAB / SIMULINK. A laboratory prototype was specially constructed for validation purposes in a rapid prototyping platform, as well as the consequent implementation in a PCI, for use in future works.
Os conversores est?ticos s?o amplamente utilizados no contexto da eletr?nica de pot?ncia. Da mesma forma que os transformadores t?m papel fundamental nas aplica??es que envolvem circuitos alimentados em corrente alternada, os conversores est?ticos realizam a transforma??o de magnitudes de tens?o em circuitos de corrente cont?nua. Tais dispositivos podem tanto apresentar em sua sa?da um valor de tens?o superior em rela??o ao sinal de entrada, atuando como elevadores, quanto inferior, atuando, neste caso, como redutores. Estes tamb?m podem apresentar suas sa?das ou entradas com um comportamento de fonte de tens?o ou corrente, dependendo da topologia utilizada. Este trabalho apresenta um estudo sistematizado do conversor D operando no modo de condu??o cont?nua, em regime permanente, incluindo as an?lises qualitativa e quantitativa, resultando em uma metodologia de dimensionamento do conversor, bem como a sua modelagem em espa?o de estados, o que viabiliza estudos de estrat?gias de controle para o mesmo. Apesar de n?o se tratar de uma nova topologia, recentemente este conversor foi reintroduzido, devido a sua capacidade de aumentar a efici?ncia no processo de convers?o de energia, especialmente em sistemas fotovoltaicos. Esta pesquisa encontra justificativa dada a inexist?ncia de trabalhos semelhantes especificamente para a topologia do conversor D. Este estudo foi validado a partir de ensaios realizados no software de simula??o PSIM, al?m do MATLAB/SIMULINK. Um prot?tipo de laborat?rio foi especialmente constru?do para fins de valida??o em uma plataforma de prototipagem r?pida, bem como a consequente implementa??o do mesmo em uma PCI, para utiliza??o em trabalhos futuros.
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Guida, Vittorio. "Conception et réalisation d'un convertisseur DC/DC à haut rapport de conversion pour électrolyseurs." Electronic Thesis or Diss., Université de Lorraine, 2020. http://www.theses.fr/2020LORR0134.
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Ces dernières années, l’utilisation des électrolyseurs pour produire proprement et efficacement de l’hydrogène à partir de sources d’énergie renouvelables (éolien, solaire) a profité d’un intérêt croissant de la part des chercheurs et également des industriels. De même que les piles à combustible, les électrolyseurs ont besoin de convertisseurs DC/DC. Généralement, les électrolyseurs exigent une faible tension continue afin de produire de l’hydrogène à partir d’eau dé-ionisée, pure ou distillée. Pour cette raison, les convertisseurs DC/DC buck sont généralement utilisés. Pour des applications électrolyseur, les convertisseurs DC/DC doivent répondre à de nombreuses problématiques en termes d’efficacité énergétique, de compacité et de réduction de l’ondulation de courant de sortie. Les ondulations de courant générées par les convertisseurs DC/DC peuvent conduire à des dégradations à long terme sur les électrolyseurs et par conséquent réduire leurs durées de vie. En outre, la disponibilité et la fiabilité des convertisseurs DC/DC restent une préoccupation majeure afin que les systèmes multi-sources puissent garantir un haut niveau d’autonomie. Dans les systèmes multi-sources, le bus DC de gestion des flux d’énergie est généralement une haute tension de quelques centaines de volt. Etant donné que l’électrolyseur doit être alimenté en tension très faible, le convertisseur DC/DC d’interface doit présenter un haut rapport de conversionIn recent years, the use of electrolyzer to produce cleanly and efficiently hydrogen from renewable energy sources (e.g. wind, solar) has gained growing interest from researchers and industrial. Similarly to fuel cells, electrolyzers require power conditioning systems, such as DC/DC converters. Generally, electrolyzers need a very low DC voltage to generate hydrogen from de-ionized, pure or distilled water. For this reason, DC/DC buck converters are generally used. For electrolyzer applications, DC/DC converters must meet several challenging issues in terms of energy efficiency and output current ripple reduction. Generated high-frequency current ripples from DC/DC converter may lead to long-term degradation on electrolyzers. As a result, high-frequency current ripples can shorten the electrolyzer life span. Furthermore, the availability and reliability of DC/DC converters remain a major concern so that stand-alone power supply can guarantee a high-level of autonomy in case of electrical failures. Within the wind-H2 stand-alone power supply, DC bus is generally a high-voltage of a few hundreds of volt. Given that the electrolyzer must be supplied at a very low DC voltage, interface DC/DC converter has to present a high-conversion ratio
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Zhuo, Shengrong. "Control of interleaved DC-DC converter with switch fault consideration for fuel cell application." Thesis, Bourgogne Franche-Comté, 2020. http://www.theses.fr/2020UBFCA018.
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La pile à combustible, en raison de son faible niveau de tension de fonctionnement et de sa caractéristique volt-ampèremétrique non linéaire, nécessite la présence d’un convertisseur statique de type DC-DC pour la relier à la charge dans le but d’augmenter le niveau de tension et de réguler cette dernière à une valeur constante. Le convertisseur DC-DC du type hacheur élévateur à phases parallèles et à commandes entrelacées est un choix intéressant de part une conception assez simple, une bonne fiabilité, une faible ondulation du courant d'entrée, ce qui est bénéfique pour le fonctionnement à long terme de la pile à combustible. Cependant, le contrôle de cette topologie de convertisseur doit prendre en compte certains critères comme les incertitudes de valeurs au niveau des composants passifs (résistance parasite et tolérance d'inductance / capacité) et des perturbations de l’association pile à combustible – convertisseur – charge (variations du courant de charge et de la tension de la pile à combustible selon le point de fonctionnement envisagé et prise en compte des défauts électriques internes au convertisseur). Dans le but d'améliorer les performances statique et dynamique du système pile à combustible en modes de fonctionnement sain et défaillant, la commande du convertisseur à phases parallèles et à commandes entrelacées avec prise en compte de la robustesse face aux perturbations internes et externes est étudiée dans cette thèse.Pour mieux gérer les incertitudes liées aux paramètres électriques du convertisseur et les perturbations externes (pile à combustible ou charge), un contrôleur de tension robuste basé sur un observateur d'état étendu (ESO) dans le cadre de l'algorithme de contrôle actif du rejet de perturbation (ADRC) est proposé et appliqué à la topologie de convertisseur envisagée pour une application pile à combustible. La comparaison avec le contrôleur du type PI montre que la méthode proposée peut obtenir une meilleure capacité de rejet des perturbations sans dépassement de la réponse à la suite d’un échelon du courant de charge ou à une variation du niveau de tension d’entrée. Le contrôleur proposé est également validé sur une seconde topologie de convertisseur qui est une variante de la première et permettant un gain d’élévation en tension plus élevé.L’apparition d’un défaut électrique sur les interrupteurs de puissance du convertisseur entraîne généralement la perte d’une phase de celui-ci. Ceci occasionne des effets néfastes considérables sur les performances du contrôleur. Par conséquent, un contrôleur adaptatif amélioré, avec la prise en compte des défauts électriques sur les interrupteurs est proposé sur la base du contrôleur développé précédemment. Le contrôleur proposé peut maintenir un fonctionnement continu et obtenir de bonnes performances en cas de défauts. De plus, une méthode de diagnostic basé-modèle de défauts d’interrupteurs de puissance en s’appuyant sur un observateur de mode glissant est proposée et appliquée au système pile à combustible étudié. L'approche proposée dans ce manuscrit permet de diagnostiquer efficacement un défaut d’interrupteur de puissance et de montrer une forte robustesse à l'incertitude des paramètres du convertisseur et aux perturbations externes. Enfin, pour optimiser l'ondulation du courant d'entrée élevée à la suite de la perte d’une phase du convertisseur provoquée par un défaut sur l’un des interrupteurs, une nouvelle méthode de reconfiguration de la commande en appliquant une adaptation du déphasage entre les phases restantes est proposé. En comparaison avec une reconfiguration classique par un déphasage uniforme entre les phases, celle proposée permet une réduction significative de l'ondulation du courant d’entrée après l’apparition, la détection et la reconfiguration d’un défaut. Les différentes méthodes proposées sont toutes validées par des résultats de simulation et expérimentauxThe relatively low voltage and the nonlinear volt-ampere curve of the fuel cell (FC) stack necessitate the interface with the DC-DC power converter, in order to boost and regulate a constant DC bus voltage to satisfy the load requirement. The multi-phase interleaved converter by associating basic converter units via parallel structure is an attractive choice. It features high reliability, and it enables a low input current ripple via phase interleaving, which is beneficial for the long-time operation of the FC stack. The converter for FC application suffers from the converter uncertainties (parasitic resistance and inductance / capacitance tolerance), the external disturbances (dynamic load demand on the output side and variable source voltage on the input side), and the device fault (e.g., switch fault) uncertainty. Aiming to improve the steady-state and dynamic performance under healthy and switch fault mode of the system, the control of the interleaved converter with switch fault consideration for FC application is studied in this thesis.To better deal with the converter uncertainty and external disturbance, a robust voltage controller based on extended state observer (ESO) within the framework of active disturbance rejection control (ADRC) algorithm is proposed and applied to an interleaved boost converter for FC application. The comparison with PI control shows that the proposed method can achieve better disturbance rejection ability without overshoot in step response. The application of the proposed method to another interleaved converter (i.e., floating interleaved boost converter, FIBC) validates again its feasibility.The switch fault generally leads to the loss of the phase of the interleaved converter, which has considerable adverse effects on the controller performance. Therefore, an improved adaptive controller is proposed and applied to a FIBC with switch fault consideration, based on the previously developed controller. The proposed controller adapts the parameter in real-time. It can maintain continuous operation and achieve good performance in both healthy and switch fault mode. Furthermore, a switch fault diagnosis method based on sliding mode observer is proposed and applied to the FIBC for FC application. The proposed approach can diagnose the switch fault effectively, and it shows strong robustness to the converter uncertainties and external disturbances. Finally, to optimize the undesired high input current ripple of the FIBC caused by the switch fault, a novel post-fault control method by applying uneven phase shift reconfiguration is proposed. In comparison with the even phase shift reconfiguration, the proposed one can achieve significant improvement in reducing the post-fault current ripple. The effectiveness of the proposed methods is validated by the simulation and experimental results
38
Shih, Li-Wei, and 施立緯. "Flyback Converter with Current Ripple Reduction." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/47er9a.
Full textAbstract:
碩士國立臺灣科技大學
電機工程系
103
Employing Power over Ethernet (PoE) technology, power devices (PDs), such as VoIP, security cameras and wireless LAN system node are thus powered over the cable without connecting to an AC source. Therefore, system reliability is increased and a DC-DC converter is built in the power device. Currently, flyback converter with RCD clamped topology is the most commonly used in power device due to it’s simple and low cost for PoE applications. To investigate the pros and cons, a thorough discussion will be provided in the chapter 2. However, it suffers from the power dissipations in the RCD network. It occupies precious space and degrades the power efficiency. To improve the efficiency, a lossless passive snubber circuit is used instead and a flyback converter with current ripple reduction (FYRR) topology for the PoE applications is proposed in this thesis. In addition to saving the RCD loss, it also has an input current ripple reduction function by utilizing the clamp capacitor and the leakage inductance of the transformer as an embedded notch filter. Consequently, the EMI noise level can be attenuated with smaller EMI filter components to meet the EMI regulation. In addition to the descriptions of the operation principle, theoretical analysis, and design considerations, two hardware circuits, the flyback with RCD snubber and the FYRR, with 250 kHz, 44-57V input and 12V/24W output specifications are built and tested.
39
Lin, Zhong-Rong, and 林忠榮. "LED Driver with Current Ripple Suppression." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/12913911454205015505.
Full textAbstract:
碩士國立臺灣海洋大學
電機工程學系
103
This thesis studies a LED driver with current ripple suppression. In order to achieve power factor correction, the output current closed-loop crossover frequency must be lower than 100 to 120Hz. Therefore, the output current exists 100 to 120Hz current ripple which results in 100 to 120Hz flickering issue on LED load. With current ripple suppression can improve the above issue, and its improved performance is analyzed and compared under different switching frequency design.
40
Kuo, You-chen, and 郭祐辰. "Low Input Current Ripple LLC Converter with Current Doubler Rectifier." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/32846773820794366626.
Full textAbstract:
碩士國立臺灣科技大學
電機工程系
102
The LLC converter has several advantages, such as zero-voltage switching on the MOSFETs and zero-current switching on the rectifier diodes from no load to full load conditions, high efficiency, high power density, low EMI. However, the LLC converter lacks an output inductor resulting in having large current ripple of the output capacitor. Thus, numerous capacitors have to be connected in parallel to reduce the output voltage ripple. It limits the power density performance. To reduce the output voltage ripple, current doubler rectifier technique has been proposed. It offers a current ripple cancellation mechanism and reduces the rectifier current ripple. To apply this technique, LLC converter can meet the output voltage ripple with a small number of the output capacitor. Therefore, the power density can be increased. The LLC converter with current double rectifier (LLC-CD) is thus proposed in Chapter 2. However, the input current of LLC-CD is pulsating and causes the EMI problems. In general, larger input filter is added to meet the EMI regulation. It limits the power density performance. To reduce the input current ripple, an input ripple cancellation mechanism can be applied to the LLC-CD and input current ripple reduction LLC-CD (RR-LLC-CD) is thus proposed in Chapter 3. To inherit the advantages of its predecessor, the RR-LLC-CD has an additional built-in input current ripple reduction function. As a result, the EMI regulation can be met by using smaller EMI filter components. Consequently, higher power density can be achieved. In addition to the descriptions of the operation principle, theoretical analysis, and design considerations, three hardware circuits, the LLC-CT, the LLC-CD, and the RR-LLC-CD, with 300-400-V input and 12-V/240-W output specification are built and tested to demonstrate their feasibility.
41
Wang, Wei-Kai, and 王威愷. "LLC Resonant Converters with Current Ripple Reduction." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/69548973928814800057.
Full textAbstract:
碩士國立臺灣科技大學
電機工程系
101
Two LLC converters LLC with Taiwan Tech center-tapped rectifier (LLC-TCT) and current ripple reduction LLC-TCT are proposed in the thesis. In addition to having zero-voltage switching operation on the MOSFETs and zero-current switching on the rectifier diodes inherited from their predecessors, both converters have several additional features. For instance, the rectifier diodes are clamped to the output voltage due to the absence of filter inductor, the utilization of the clamping series-diode technique, and the recovery of the transformer secondary leakage energy. Moreover, the load current is shared by the output filter capacitor and the L-C-L filter cell constructed by the leakage inductance of the secondary windings and one clamping capacitor. As a result, the required high-voltage output filter capacitor can be reduced. To reduce input current ripple, moreover, an input current ripple reduction LLC-TCT converter (RR-LLC-TCT) is proposed. It features low di/dt on the input current waveform. As a result, the required high-voltage input filter capacitor can be reduced. These characteristics make it desirable for high frequency, high efficiency and high input-voltage and output-voltage power conversion applications such as solar power conversion or larger size LCD TV back light driver. In addition to the descriptions of the operation principle, theoretical analysis, and design considerations, three high frequency converters, LLC-CT, LLC-TCT, and RR-LLC-TCT, with 300-400-V input and 200-V/400-W output specification are built and tested to demonstrate their feasibility.
42
Yeh, Soung-Poul, and 葉松柏. "Flyback Converter with Current Ripple Reduction (FYRR)." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/30280155530000096555.
Full textAbstract:
碩士國立臺灣科技大學
電機工程系
98
Flyback converter with current ripple reduction (FYRR) is proposed and investigated in this thesis. The input current ripple reduction is achieved by utilizing the clamp capacitor and the leakage inductances of the transformer. Therefore, the EMI noise caused by the pulsating input current waveform can be reduced. Moreover, the EMI noise level can be further reduced by utilizing the clamp capacitor and the leakage inductance of the transformer as an embedded notch filter. To further improve the efficiency of the FYRR by utilizing a high-voltage switch cell, two-switch flyback converter with current ripple reduction (2SFYRR) is also proposed and investigated in this thesis. To demonstrate their feasibility, the operation principles as well as the experimental results with 150 kHz, 40-60V input and 5V/20A output are described in this thesis.
43
Wu, Shing-Lih, and 吳行立. "Study of Sinusoidal Ripple Current Charging Strategy." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/89426430214304710718.
Full textAbstract:
博士國立彰化師範大學
電機工程學系
100
In this dissertation, a sinusoidal ripple current charging strategy (SRCCS) is proposed and the charging performance for different charge frequencies are also discussed. The battery constant-time charging and battery full charging experiment are programmed and conducted. In addition, the aging battery charging experiment and battery overcharge experiments are also conducted. Experimental results show that the charging performance both of the traditional pulse charging strategy and the proposed SRCCS with the minimum AC impedance frequency are better than that with other frequencies. Furthermore, in comparison with the traditional constant-current constant-voltage charge strategy, the charging performance both of the proposed SRCCS and the traditional pulse charging strategies are better proposed SRCCS with the minimum AC impedance frequency can improve charging time, charging efficiency and battery rising temperature. Under the experimental conditions set in this dissertation, the charging time is 18.8% faster, the charging efficiency is 2.1% improved, the battery temperature is 45.5% lower, and the battery life time is 16.1% prolonged.
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Quang, Trong Nha, and 廣眾雅. "Half-Bridge Converter with Input Current Ripple Reduction." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/gp8c4q.
Full textAbstract:
碩士國立臺灣科技大學
電機工程系
99
This study attempts to establish a new low input current ripple topology, namely Half-Bridge Converter with Input Current Ripple Reduction (HBC-CRR). By effectively utilizing leakage inductance of power transformer and adding a clamping capacitor, the HBC-CRR inherited the advantages of the Half-Bridge Converter (HBC) not only has low voltage stress on power devices, lossless snubbing, voltage clamping features but also remarkably reduce the input current ripple with minimum component count. Consequently, both electromagnetic interference (EMI) intensity and root mean square (RMS) value of the input current are significantly decreased. As a result, smaller input filter can be used. These characteristics make it suitable for high frequency, high efficiency, and low EMI power conversion applications. This thesis consists of operating principle, circuit analysis, design considerations, simulated results, and experimental results of the HBC-CRR with 360-440V input, 12V/20A output, and 100kHz operating frequency.
45
Chen, Yi-cheng, and 陳奕錚. "Asymmetrical Push-Pull Converters with Current Ripple Cancellation." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/mhpwhd.
Full textAbstract:
碩士國立臺灣科技大學
電機工程系
102
Asymmetrical push-pull converter with current ripple cancellation (APPRC) is presented to realize current ripple mechanism. In addition to obtaining required voltage gain, it has reduced input current ripple and zero voltage switching resulting in reducing EMI intensity and switching loss, respectively. Consequently, the volume of input filter and the switching loss can be minimized significantly. Moreover, the output current ripple can be reduced because of Taiwan-Tech full-wave rectifier (TFR) built-in output ripple-current reduction mechanism. As a result, a smaller number output capacitance can be used due to reduce the output current ripple. These properties make it desirable for high frequency, high efficiency power conversion applications. To demonstrate its feasibility, the circuit analysis, operational principle and the experimental results of the proposed converters with 300-400V input and 24V/10A output are built and verified in this thesis.
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Chang, Yuan-Shuo, and 張元碩. "Input Current Ripple Reduction Asymmetrical Full-Bridge Converters." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/keyvbn.
Full textAbstract:
碩士國立臺灣科技大學
電機工程系
103
DC-DC converters with a high efficiency and high power density are currently in high demand. Full-bridge converter has high efficiency performance owing to its low voltage and current stress. Consequently, it is suitable for high-input-voltage and high-power power conversion applications. Employing conventional symmetrical control scheme, however, full-bridge converter has a large switching loss because of its variable dead-time. Therefore, the power density is limited. Accordingly, a fixed dead-time control such as phase-shift control is widely used for a full-bridge converter. To achieve zero-voltage switching (ZVS) under wide line and load operation, however, sufficient leakage inductance energy should be also provided. It causes a larger duty-cycle loss, which affect the regulating behavior of the converter. Moreover, the circulation loss of phase-shift control not only increases the conduction loss but also decreases the efficiency of converters. To eliminate this problem, an asymmetrical control signal may be better than a phase-shift control signal. Moreover, there is a circulation loss with phase-shift control. It increases the conduction loss and limits efficiency performance. To alleviate this problem, an asymmetrical control is selected instead. Inheriting the characteristic of the Buck converter, the conventional asymmetrical control has a large di/dt noise that is generated by the pulsating input current waveform. As the result, a larger electromagnetic interference (EMI) filter must be added, which is the only proposed solution so far. To reduce the input current ripple of a conventional asymmetrical full-bridge converter with ZVS, the proposed input-current ripple-reduction asymmetrical full-bridge converter becomes the motivation of this research. To demonstrate the feasibility of the converter, the operational principle was experimentally tested, and a circuit analysis was performed on the proposed converters with an operating frequency of 100 kHz, input voltage range of 300-400V, and output power of 12V/30A. Keywords: input-current ripple reduction, zero-voltage switching (ZVS), asymmetrical full-bridge.
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Liu, Cheng-Chia, and 劉政佳. "Active-Clamp Forward Converter with Current Ripple Reduction." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/01282030322079346444.
Full textAbstract:
碩士國立臺灣科技大學
電機工程系
97
A novel low input-current ripple topology named Active-Clamp Forward Converter with Current Ripple Reduction (ACFRR) is proposed in this thesis. In addition to having lower input current ripple and more than 50% duty cycle operation, the fundamental component intensity of the ACFRR’s input current waveform can be reduced by designing the circuit with its embedded filter. To demonstrate ACFRR’s feasibility, the operational principle, simulation and experimental results of the proposed converter operated at 150 kHz switching frequency, 36-75V input and 5V/30A output are presented and its highest efficiency is 84.88%. Moreover, the conversion efficiency of the ACFRR can be further improved by applying the synchronous rectification. According to the experimental results, the highest efficiency, 86.69% of the synchronous rectification ACFRR is achieved.
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Wang, Jing. "Control of current ripple in dc-dc converters." Thesis, 1998. http://hdl.handle.net/2429/8573.
Full textAbstract:
An investigation is conducted into the analysis of power converters from the ripple point of view. In short, the thesis is about a deep understanding of the basic dc-dc converter from the ripple viewpoint and thus develops a family of converters with ripple free input current or output current by using coupled
inductors, which may achieve reduced component count, reducing the amount of material and increasing
the energy density.
Based on the existing ripple free converter topologies, a synthesis method for ripple free current
converters is summarized and studied. Five elements are found to be the minimum requirement to
achieve ripple free current topology by using coupled inductors and the LCL structure is found important
for ripple free current converters. Several modified converters are developed from the synthesis analysis
which is presented in this thesis.
A pair of generated modified Boost topologies are compared with the well-known Cuk and Sepic
converters and found to have several advantages, such as low switch and diode voltage stress, low switch
and diode current stress and low voltage and current stresses on capacitor Cs. In particular, the developed
Boost converters can achieve ripple-free input current while keeping the properties of the conventional
Boost converters when they operate in both continuous and discontinuous conduction modes.
The modified Boost converters operating in discontinuous conduction mode are investigated for the
application of power factor correction. They can keep the input current continuous or even ripple free,
but be proportional to the input line voltage. An almost unity power factor can be achieved when the
switching frequency and switching duty ratio are fixed. This indicates that the pair of modified Boost
topologies have the same "voltage follower" property as the conventional Boost topology, but with a
continuous and ripple free input inductor current, which is the same as the Cuk and Sepic converters.
As the reverse circuits of the modified Boost topologies, a pair of modified Buck topologies are
developed and analyzed. They are found to have continuous and ripple free output current, in both
continuous conduction mode and discontinuous conduction mode. The modified Buck topologies can
keep the same properties as the conventional Buck topology while they maintain the output current
continuous and ripple free. In addition, the modified Buck topology 1 is found to have high input
impedance which can limit the input in-rush current effectively. All modified topologies can use coupled inductors to decrease the converter size and weight, which
is very desirable.
49
Lin, Yun Shen, and 林運昇. "A Study on dc Current Ripple Compensation for Single-Phase Current-sourced Inverters." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/81206475598606828536.
Full textAbstract:
碩士長庚大學
電機工程學系
100
With single-phase inverters there are second-order harmonic at dc-link circuit accompanying the power pulsations that can be a troublesome in applications. Solutions have been sought to this problem by the utilization of passive LC filter or variable modulation index for the inverter. The prior method is effective in alleviating the second-order harmonic at the dc-link circuit and keeping the harmonic out of the inverter ac output. However, the passive filter is so bulky that it is not suitable for practical use. The former method does not aim to suppress the current ripple but vary the modulation index with the second-order harmonic in order to improve the quality of the inverter ac output. Due to the oscillatory nature of the harmonic, the dc component at dc-link circuit should be high enough for modulating the inverter to ride over the notch caused by the second-order harmonic, which would limit the power range of the single-phase inverter. To facilitate the single-phase inverter operating over a wide power range with reasonable average dc current, an active dc current ripple compensator for current-sourced inverters is presented. The dc current ripple compensator is essentially a buck converter whose output is controlled to imitate the voltage across a passive filter thereby alleviating the ripple at dc-link circuit. To further expedite the voltage tracking capability for the buck converter, a proportional-resonant (PR) controller is adopted. A laboratory prototype, based on a 500W grid-tied single-phase current-sourced inverter, has been implemented. The comparative experimental results confirm that the proposed strategy is superior to the existing solutions.
50
TWU, JHANG-YI, and 涂正誼. "Low Input Current Ripple Asymmetrical Half Bridge Flyback Converter." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/24607791252339196510.
Full textAbstract:
碩士國立臺灣科技大學
電機工程系
102
Asymmetrical half-bridge flyback converter (AHB-flyback) is attractive because of its simplicity of secondary side configuration, and low voltage stress. It can achieve high efficiency by using soft switching techniques, such as the zero-voltage switching (ZVS) of primary power switches and the zero-current switching (ZCS) of output rectifiers. These characteristics make it suitable for high frequency and high input voltage power conversion applications. However, this converter has pulsating input current resulting in generating high di/dt noise. To reduce the pulsating input current ripple, an Input Current Ripple Reduction Asymmetrical Half Bridge flyback converter (RR-AHB-flyback) is proposed in this thesis. In addition to inheriting the advantages of AHB-flyback converter, RR-AHB-flyback has significantly reduces input current ripple due to its built-in current ripple cancellation mechanism. Furthermore, the coupled inductor is used to achieve high power density and wide ZVS range. Operation principles and circuit design are shown in this thesis. Both of AHB-flyback and RR-AHB-flyback are experimented under 100 kHz, 300-400 V input and 24V/10A output to demonstrate its feasibility.