Relevant bibliographies by topics / RTL Design / Dissertations / Theses
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Dissertations / Theses on the topic 'RTL Design'

Author: Grafiati
Published: 4 June 2021
Last updated: 11 September 2023

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1

Kevorkov, Ruslan. "Sounding Rocket ExperimentElectronics – RTL Design and Validation." Thesis, KTH, Rymd- och plasmafysik, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-149252.

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The Infrared Spectroscopy to Analyse the middle Atmosphere Composition (ISAAC) is an experimental module designed by KTH students. It consists of a Rocket Mounted Unit (RMU) and two Free-Falling Units (FFU) carried inside. The main objective of the experiment is to demonstrate ability of one FFU to track the other and to carry out measurements in cooperation. This Master’s thesis covers the development and implementation of the ejection system as well as data acquisition for the ISAAC experiment to have well-timed ejection of the FFUs and data for a post-flight analysis. Ejection control and
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2

Jangid, Anuradha. "Verifying IP-Cores by Mapping Gate to RTL-Level Designs." Case Western Reserve University School of Graduate Studies / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=case1385975878.

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3

Shrestha, Gyanendra. "Ensuring Trust Of Third-Party Hardware Design With Constrained Sequential Equivalence Checking." Thesis, Virginia Tech, 2012. http://hdl.handle.net/10919/44889.

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Globalization of semiconductor design and manufacturing has led to a concern of trust in the final product. The components may now be designed and manufactured from anywhere in the world without the direct supervision of the buyer. As a result, the hardware designs and fabricated chips may be vulnerable to malicious alterations by an adversary at any stage of VLSI design flow, thus compromising the integrity of the component. The effect of any modifications made by the adversary can be catastrophic in the critical applications. Because of the stealthy nature of such insertions, it is extremely
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4

Nilsson, Jesper. "Mixed RTL and gate-level power estimation with low power design iteration." Thesis, Linköping University, Department of Electrical Engineering, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1685.

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<p>In the last three decades we have witnessed a remarkable development in the area of integrated circuits. From small logic devices containing some hundred transistors to modern processors containing several tens of million transistors. However, power consumption has become a real problem and may very well be the limiting factor of future development. Designing for low power is therefore increasingly important. To accomplice an efficient low power design, accurate power estimation at early design stage is essential. The aim of this thesis was to set up a power estimation flow to estimate the
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5

Puri, Prateek. "Design Validation of RTL Circuits using Binary Particle Swarm Optimization and Symbolic Execution." Thesis, Virginia Tech, 2015. http://hdl.handle.net/10919/55815.

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Over the last two decades, chip design has been conducted at the register transfer (RT) Level using Hardware Descriptive Languages (HDL), such as VHDL and Verilog. The modeling at the behavioral level not only allows for better representation and understanding of the design, but also allows for encapsulation of the sub-modules as well, thus increasing productivity. Despite these benefits, validating a RTL design is not necessarily easier. Today, design validation is considered one of the most time and resource consuming aspects of hardware design. The high costs associated with late dete
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6

Ravinath, Vinodh. "Design and Implementation of Single Issue DSP Processor Core." Thesis, Linköping University, Department of Electrical Engineering, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-10160.

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<p>Micro processors built specifically for digital signal processing are DSP processors. DSP is one of the core technologies in rapidly growing applications like communications and audio processing. The estimated growth of DSP processors in the last 6 years is over 40%. The variety of DSP capable processors for various applications also increased with the rising popularity of DSP processors. The design flow and architecture of such processors are not commonly available to students for learning.</p><p>This report is a structured approach to design and implementation of an embedded DSP processor
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7

Niu, Xinwei. "System-on-a-Chip (SoC) based Hardware Acceleration in Register Transfer Level (RTL) Design." FIU Digital Commons, 2012. http://digitalcommons.fiu.edu/etd/888.

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Today, modern System-on-a-Chip (SoC) systems have grown rapidly due to the increased processing power, while maintaining the size of the hardware circuit. The number of transistors on a chip continues to increase, but current SoC designs may not be able to exploit the potential performance, especially with energy consumption and chip area becoming two major concerns. Traditional SoC designs usually separate software and hardware. Thus, the process of improving the system performance is a complicated task for both software and hardware designers. The aim of this research is to develop hardware
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8

Motschull, Jan Even. "TV-Design als wichtiger Faktor für Programmverbindungen im deutschen Fernsehen Analysen und Vergleich zwischen den Vollprogrammsendern RTL, ProSieben und dem Spartensender VIVA zur Ermittlung von designerischen Grundsätzen im Fernsehen /." [S.l. : s.n.], 2005. http://deposit.ddb.de/cgi-bin/dokserv?idn=974085839.

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9

Prado, Rafael Nunes de Almeida. "Desenvolvimento de uma arquitetura em hardware prototipada em FPGA para aplica??es gen?ricas utilizando redes neurais artificiais embarcadas." Universidade Federal do Rio Grande do Norte, 2011. http://repositorio.ufrn.br:8080/jspui/handle/123456789/15342.

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Made available in DSpace on 2014-12-17T14:55:47Z (GMT). No. of bitstreams: 1 RafaelNAP_DISSERT.pdf: 1349793 bytes, checksum: 6843077c7952b1e58788ef395d9822e6 (MD5) Previous issue date: 2011-02-22<br>This work proposes hardware architecture, VHDL described, developed to embedded Artificial Neural Network (ANN), Multilayer Perceptron (MLP). The present work idealizes that, in this architecture, ANN applications could easily embed several different topologies of MLP network industrial field. The MLP topology in which the architecture can be configured is defined by a simple and specifically dat
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10

Láník, Jan. "La réduction de consommation dans les circuits digitaux." Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAM016/document.

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Le sujet de cette thèse est la réduction de consommation dans les circuits digitaux, et plus particulièrement dans ce cadre les méthodes basées sur la réduction de la fréquence de commutation moyenne, au niveau transistor. Ces méthodes sont structurelles, au sens où elles ne sont pas liées à l’optimisation des caractéristiques physique du circuit mais sur la structure de l’implémentation logique, et de ce fait parfaitement indépendantes de la technologie considérée. Nous avons développé dans ce cadre deux méthodes nouvelles. La première est basée sur l’optimisation de la structure de la partie
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11

Sinigaglia, Mattia. "Progettazione ed implementazione di un Sistema On Chip per applicazioni audio." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2021. http://amslaurea.unibo.it/23790/.

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Lo scopo de progetto è stato quello di contribuire alla realizzazione di un microcontrollore progettato per applicazioni audio con bassissimi consumi. Il microcontrollore integra un acceleratore FFT che effettua la trasformata di Fourier su diversi segnali audio acquisiti dalla periferica I2S che è una periferica dedicata alla comunicazione con interfacce audio digitali. Nello specifico, è stato implementato nella periferica I2S il protocollo DSP con TDM per consentire la connessione di molteplici dispositivi sulla stessa linea dati. Il risultato ottenuto è stato quello di riuscire a comunica
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12

Manoni, Simone. "EPAC Multi-FPGA SerDes: Enabling Partitioning of the European Processor Accelerator on Multiple FPGAs." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2022.

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European Processor Initiative (EPI) è un progetto attualmente implementato nella seconda fase di un accordo con la Commissione europea, il cui scopo è quello di progettare e attuare una tabella di marcia per una nuova famiglia di processori europei a basso consumo per l'extreme scale computing, Big-Data, HPC e altre applicazioni emergenti. La prima fase di EPI è iniziata nel dicembre 2018 ed è stata completata con successo nel novembre 2021, con la consegna dei primi 143 test chip (EPACs) per l'unione europea. Il bring-up dei test chip è avvenuto con successo e ha eseguito il suo primo pro
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13

Ström, Marcus. "System Design of RF Receiver and Digital Implementation of Control Logic." Thesis, Linköping University, Department of Science and Technology, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1848.

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<p>This report is the outcome of a thesis work done at Linköpings University, campus Norrköping. The thesis work was part of the development of a RF transceiver chip for implantable medical applications. The development was done in cooperation with Zarlink Semiconductor AB, located in Järfälla, Stockholm.</p><p>The transceiver is divided into three main blocks, which are the wakeup block, the MAC block and the RF block. The wakeup block is always operating and is awaiting a wakeup request in the 2,45GHz ISM-band. The RF-block is operating in the 400MHz ISM-band and is powered up after wakeup T
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14

Vijayaraghavan, Vijay P. "Exploration des liens entre la synthèse de haut niveau (HLS) et la synthèse au niveau transferts de registres (RTL)." Grenoble INPG, 1996. http://www.theses.fr/1996INPG0184.

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Le sujet traite dans cette these, concerne les liens entre la synthese de haut niveau et la synthese au niveau transfert de registres (rtl). Il s'agit d'une adaptation de l'architecture resultat de la synthese de haut niveau par transformation en une description rtl acceptee par les outils industriels actuels. Les objectifs vises par cette transformation, sont: accroitre la flexibilite et l'efficacite, permettre la parametrisation de l'architecture finale. A partir d'une description comportamentale decrite dans un language de description de materiel (la synthese de haut niveau) genere une arch
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15

Márquez, Carlos Iván Castro. "Checagem de equivalência de sequências de estados de projetos digitais em RTL com modelos de referência em alto nível e de protocolo de comunicação." Universidade de São Paulo, 2014. http://www.teses.usp.br/teses/disponiveis/3/3140/tde-23122014-155143/.

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A verificação funcional é o conjunto de tarefas destinado a descobrir erros gerados durante o projeto de circuitos integrados, e representa um importante desafio ao influenciar fortemente a eficiência do ciclo inteiro de produção. Estima-se que até 80% dos custos totais de projeto são devidos à verificação, tornando esta atividade o gargalo principal para reduzir o time-to-market. Tal problemática tem provocado a aparição de diversas estratégias para diminuir o esforço, ou para aumentar a capacidade de cobertura da verificação. Por um lado existe a simulação, que permite descobrir um número ra
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16

Carvalho, Paulo Roberto Bueno de. "Projeto de circuito oscilador controlado numericamente implementado em CMOS com otimização de área." Universidade de São Paulo, 2016. http://www.teses.usp.br/teses/disponiveis/3/3140/tde-26012017-085719/.

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Este trabalho consiste no projeto e implementação em CMOS de um circuito integrado digital para geração de sinais, denominado Oscilador Controlado Numericamente. O circuito será aplicado em um sistema de Espectroscopia por Bioimpedância Elétrica, utilizado como método para detecção precoce de câncer do colo do útero. Durante o trabalho, realizou-se o estudo dos requisitos do sistema de espectroscopia e as especificações dos tipos de sinais a serem gerados. Levantou-se, na bibliografia, algumas técnicas de codificação em linguagem de hardware para otimização do projeto nos quesitos área, potênc
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17

Fiedor, Jan. "Návrh a implementace nástroje pro formální verifikaci systémů specifikovaných jazykem RT logiky." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2009. http://www.nusl.cz/ntk/nusl-236750.

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As systems complexity grows, so grows the risk of errors, that's why it's necessary to effectively and reliably repair those errors. With most of real-time systems this statement pays twice, because a single error can cause complete system crash which may result in catastrophe. Formal verification, contrary to other methods, allows reliable system requirements verification.
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18

MANSOURI, NAZANIN. "AUTOMATED CORRECTNESS CONDITION GENERATION FOR FORMAL VERIFICATION OF SYNTHESIZED RTL DESIGNS." University of Cincinnati / OhioLINK, 2001. http://rave.ohiolink.edu/etdc/view?acc_num=ucin982064542.

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19

Zhou, Zijian. "Multiway decision graphs and their applications in automatic formal verification of RTL designs." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp05/nq26757.pdf.

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20

Zheng, Yexin. "Novel RTD-Based Threshold Logic Design and Verification." Thesis, Virginia Tech, 2008. http://hdl.handle.net/10919/32011.

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Innovative nano-scale devices have been developed to enhance future circuit design to overcome physical barriers hindering complementary metal-oxide semiconductor (CMOS) technology. Among the emerging nanodevices, resonant tunneling diodes (RTDs) have demonstrated promising electronic features due to their high speed switching capability and functional versatility. Great circuit functionality can be achieved through integrating heterostructure field-effect transistors (HFETs) in conjunction with RTDs to modulate effective negative differential resistance (NDR). However, RTDs are intrinsically
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21

Schostak, Daniel Paul. "Methodology for the formal specification of RTL RISC processor designs (with particular reference to the ARM6)." Thesis, University of Leeds, 2003. http://etheses.whiterose.ac.uk/1314/.

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Due to the need to meet increasingly challenging objectives of increasing performance, reducing power consumption and reducing size, synchronous processor core designs have been increasing significantly in complexity for some time now. This applies to even those designs originally based on the RISC principle of reducing complexity in order to improve instruction throughput and the performance of the design. As designs increase in complexity, the difficulty of describing what the design does and demonstrating that the design does indeed do this, also increases. The usual practice of describing
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Fough, Nazila. "Design and analysis of RTP circuit breaker for multimedia applications." Thesis, University of Aberdeen, 2015. http://digitool.abdn.ac.uk:80/webclient/DeliveryManager?pid=228630.

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Live network multimedia applications (e.g., video conferencing, TV on demand) have been very popular in recent years and are expected to dominate Internet traffic in the near future. With multimedia and Internet-enabled devices being ubiquitous, mechanisms that ensure multimedia flows do not congest the Internet are crucial components of multimedia systems that are embraced rather than opposed by network service providers. The emergence of browser-based multimedia conferencing applications using the WebRTC protocol, an open source project aiming at Real-Time Communication (RTC) with Web, and w
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23

Abou-Senna, Hatem. "Microscopic Assessment of Transportation Emissions on Limited Access Highways." Doctoral diss., University of Central Florida, 2012. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/5090.

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On-road vehicles are a major source of transportation carbon dioxide (CO2) greenhouse gas emissions in all the developed countries, and in many of the developing countries in the world. Similarly, several criteria air pollutants are associated with transportation, e.g., carbon monoxide (CO), nitrogen oxides (NOx), and particulate matter (PM). The need to accurately quantify transportation-related emissions from vehicles is essential. Transportation agencies and researchers in the past have estimated emissions using one average speed and volume on a long stretch of roadway. With MOVES, there
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24

Berg, Jens, and Tony Högye. "Reifying Game Design Patterns : A Quantitative Study of Real Time Strategy Games." Thesis, Uppsala universitet, Institutionen för speldesign, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-324158.

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Communicating design is in many aspects a difficult process. Game design is not only directives on look and feel, but also carries intentionality. To properly convey intentionality, a common abstract vocabulary is a well-established method for expressing design. Game design patterns are an attempt to formalize and establish such a vocabulary. Game design patterns are a debated tool and this paper aims to examine the practical application of a pattern through a quantitative study in order to strengthen the potential for a more cohesive definition of the term. This is done by first establishing
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Wang, Hongjie. "Global Optimization of Nonconvex Factorable Programs with Applications to Engineering Design Problems." Thesis, Virginia Tech, 1998. http://hdl.handle.net/10919/36823.

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The primary objective of this thesis is to develop and implement a global optimization algorithm to solve a class of nonconvex programming problems, and to test it using a collection of engineering design problem applications.The class of problems we consider involves the optimization of a general nonconvex factorable objective function over a feasible region that is restricted by a set of constraints, each of which is defined in terms of nonconvex factorable functions. Such problems find widespread applications in production planning, location and allocation, chemical process design and con
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26

Balakrishnan, Aarathi. "Design and analysis of user interface for radiology teaching file (RTF)." [Gainesville, Fla.]: University of Florida, 2003. http://purl.fcla.edu/fcla/etd/UFE0000637.

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27

Karlsson, Simon. "Real-time Location System with Passive RFID for surveillance of trusted objects in a room." Thesis, Linköpings universitet, Institutionen för datavetenskap, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-63803.

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The use of Radio Frequency Identification (RFID) in Real-Time Location Systems (RTLS) in asset management has been in limited use, mainly in large organizations such as hospitals and military. The research in this area is making progress and new solutions with reduced costs with greater resolution are presented by different companies that enable the technology to be used in new operating areas. This thesis is about the development, implementation and integration of a RTLS solution that enables surveillance of the position of keys. The RTLS solution utilizes RTLS hardware to receive the positio
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Moye, Charles David. "The Design and Implementation of a Spatial Partitioner for use in a Runtime Reconfigurable System." Thesis, Virginia Tech, 1999. http://hdl.handle.net/10919/34445.

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<p>Microprocessors have difficulties addressing the demands of today's high-performance embedded applications. ASICs are a good solution to the speed concerns, but their cost and time to market can make them impractical for some needs. Configurable Computing Machines (CCMs) provide a cost-effective way of creating custom components; however, oftentimes it would be better if there were a way to change the configuration of the CCM as a program is executing. An efficient way of doing this is with Runtime Reconfigurable (RTR) computing architectures. <p>In an RTR system, one challenging problem
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Montagut, Climent Mario Alberto. "DESIGN, DEVELOPMENT AND EVALUATION OF AN ADAPTIVE AND STANDARDIZED RTP/RTCP-BASED IDMS SOLUTION." Doctoral thesis, Universitat Politècnica de València, 2015. http://hdl.handle.net/10251/48549.

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Nowadays, we are witnessing a transition from physical togetherness towards networked togetherness around media content. Novel forms of shared media experiences are gaining momentum, allowing geographically distributed users to concurrently consume the same media content while socially interacting (e.g., via text, audio or video chat). Relevant use cases are, for example, Social TV, networked games and multi-party conferencing. However, realizing enjoyable shared media services faces many challenges. In particular, a key technological enabler is the concurrent synchronization of the me
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Pineschi, Vinicius. "El rol del UX Design en la era de la transformación digital." Universidad Peruana de Ciencias Aplicadas (UPC), 2020. http://hdl.handle.net/10757/653481.

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31

Warren, Ashley N. "Disrupting the Connotation of Response to Innovation at the Secondary Level Through Design Thinking." Miami University / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=miami1561990253714983.

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Belhadj, Mohamed Hichem. "Spécification et synthèse de systèmes à controle intensif." Grenoble INPG, 1996. http://www.theses.fr/1996INPG0084.

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La realisation avec succes de nouveaux produits fiables, performants et peu couteux est le resume des defis actuels du marche de l'electronique. Relever ces defis passe par un bon choix des moyens de modelisation et de specification et par l'utilisation d'outils specifiques aux applications visees et aux technologies cibles. Cette these propose quelques elements de reponse pour la specification et la synthese des systemes a controle intensif sur les technologies programmables du type fpga et cpld. Les aspects de specification etudies sont relatifs aux modeles abstraits, aux langages de descrip
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Akyel, Kaya Can. "Statistical methodologies for modelling the impact of process variability in ultra-deep-submicron SRAMs." Thesis, Grenoble, 2014. http://www.theses.fr/2014GRENT080/document.

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La miniaturisation des transistors vers ses ultimes limites physiques a exacerbé les effets négatifs qui sont liées à la granularité de la matière. Plusieurs nouvelles sources de variabilités affectent les transistors qui, bien qu'identiquement dessinés, montrent des caractéristiques électriques qui sont variables entre eux et entre différents moments de leur utilisation. Les circuits de mémoire SRAM, qui sont conçues avec des règles de dessin parmi le plus agressives et contiennent un nombre de transistors très élevé, sont menacés en particulier par ce phéomène de variabilité qui représente l
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Björklén, Simon. "Extending Modelica with High-Level Data Structures: Design and Implementation in OpenModelica." Thesis, Linköping University, Department of Computer and Information Science, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-12148.

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<p>Modelica is an equation-based object-oriented language (EOO). PELAB at Linköping University along with the OpenModelica development group, is developing a metamodeling extension, MetaModelica, to this language along with a compiler called the OpenModelica Compiler (OMC).</p><p>The goal of this thesis was to analyze the compiler, extend it with union type support and then write a report about the extension with union types in particular and extension with high level data structures in general, to facilitate further development. </p><p>The implementation made by this thesis was implemented w
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Monticeli, Francisco Maciel [UNESP]. "Otimização da determinação de vazios em compósitos híbridos processados por RTM." Universidade Estadual Paulista (UNESP), 2017. http://hdl.handle.net/11449/151336.

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Submitted by FRANCISCO MACIEL MONTICELI null (francisco_monticelli@hotmail.com) on 2017-08-15T16:18:26Z No. of bitstreams: 1 Dissertação Francisco_M_Monticeli.pdf: 22030385 bytes, checksum: 6b57793ae92e8109811a1ce2e8318122 (MD5)<br>Approved for entry into archive by Monique Sasaki (sayumi_sasaki@hotmail.com) on 2017-08-22T17:27:29Z (GMT) No. of bitstreams: 1 monticeli_fm_me_guara.pdf: 22030385 bytes, checksum: 6b57793ae92e8109811a1ce2e8318122 (MD5)<br>Made available in DSpace on 2017-08-22T17:27:29Z (GMT). No. of bitstreams: 1 monticeli_fm_me_guara.pdf: 22030385 bytes, checksum: 6b57793ae9
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Soares, Klein Nayara. "El Rol físico del agua en mezclas de cemento Portland." Doctoral thesis, Universitat Politècnica de Catalunya, 2012. http://hdl.handle.net/10803/107994.

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Water is one of the fundamental components of concrete, not only for its role on the hydration of Portland cement, but also because of the physical functions it develops, which are associated with the main phases of concrete life: fresh state, hardened state and the useful life of the structures. The objective of this PhD Thesis is to study in detail the physical role of water in Portland cement mixtures: the aggregate absorption, the wetting and the fluidization of the granular skeletons that compose the cement pastes. The study covers the mathematical modelling of the mentioned physical f
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Dunn, Steven C. "Design and applications of volume holographic optical elements." Doctoral diss., University of Central Florida, 2001. http://digital.library.ucf.edu/cdm/ref/collection/RTD/id/2545.

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University of Central Florida College of Engineering Thesis<br>Volume gratings were studied both theoretically and experimentally in order to design and analyze practical volume holographic optical elements. The diffraction of finite (Gaussian) beams by transmission gratings is investigated.<br>Ph.D.<br>Doctorate;<br>Department of Electrical Engineering and Computer Science<br>Engineering<br>Electrical Engineering and Computer Science<br>225 p.<br>xvi, 225 leaves, bound : ill. ; 28 cm.
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Palacharla, Sridevi. "Design and implementation of a multimedia presentation system using Real-time Transport Protocol (RTP)." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp01/MQ27004.pdf.

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Palacharla, Sridevi Carleton University Dissertation Engineering Systems and Computer. "Design and implementation of a multimedia presentation system using real-time transport protocol (RTP)." Ottawa, 1997.

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40

Bishop, Carlton Delos. "Finite impulse response filter design using cosine series functions." Doctoral diss., University of Central Florida, 1988. http://digital.library.ucf.edu/cdm/ref/collection/RTD/id/43377.

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University of Central Florida College of Engineering Thesis<br>Window functions have been extensively used for the design of SAW filters. The classical truncated cosine series functions, such as the Hamming and Blackmann functions, are only a few of an infinite set of such functions. The derivation of this set of functions from orthonormal basis sets and the criteria for obtaining the constant coefficients of the functions are presented. These functions are very useful because of the closed-form expressions and their easily recognizable Fourier transform. Another approach to the design of
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Di, Jia. "Energy aware design and analysis for synchronous and asynchronous circuits." Doctoral diss., University of Central Florida, 2004. http://digital.library.ucf.edu/cdm/ref/collection/RTD/id/3736.

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University of Central Florida College of Engineering Thesis<br>Power dissipation has become a major concern for IC designers. Various low power design techniques have been developed for synchronous circuits. Asynchronous circuits, however have gained more interests recently due to their benefits in lower noise, easy timing control, etc. But few publications on energy reduction techniques for asynchronous logic are available. Power awareness indicates the ability of the system power to scale with changing conditions and quality requirements. Scalability is an important figure-of-merit since it
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42

Lihitkar, Shalini R. "Design and Develop IR of Electronic Theses of Social-Sciences of RTM,Nagpur University, Nagpur." Universidad Peruana de Ciencias Aplicadas (UPC), 2012. http://hdl.handle.net/10757/622564.

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Conferencia realizado del 12 al 14 de setiembre en Lima, Peru del 2012 en el marco del 15º Simposio Internacional de Tesis y Disertaciones Electrónicas (ETD 2012). Evento aupiciado por la Universidad Nacional Mayor de San Marcos (UNMSM) y la Universidad Peruana de Ciencias Aplicadas (UPC).<br>In the age of Information Technology it is very important to keep a pace with the rapid changes that has been taking place all over the world. Institutional repository play a vital role in dissemination of intellectual output of the organization hence it is essential to all the organization to develop
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43

Resinas, Manuel, Adela del-Río-Ortega, Antonio Ruiz-Cortés, and Macias Cristina Cabanillas. "Specification and Automated Design-Time Analysis of the Business Process Human Resource Perspective." Elsevier, 2015. http://dx.doi.org/10.1016/j.is.2015.03.002.

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The human resource perspective of a business process is concerned with the relation between the activities of a process and the actors who take part in them. Unlike other process perspectives, such as control flow, for which many different types of analyses have been proposed, such as finding deadlocks, there is an important gap regarding the human resource perspective. Resource analysis in business processes has not been defined, and only a few analysis operations can be glimpsed in previous approaches. In this paper, we identify and formally define seven design-time analysis operations relat
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Anderson, Robert K. "Development of scale factors for clarifier design based on batch settling data." Master's thesis, University of Central Florida, 1989. http://digital.library.ucf.edu/cdm/ref/collection/RTD/id/22218.

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University of Central Florida college of Engineering Thesis<br>Traditionally, batch settling tests have been employed to determine the values of the settling parameters V0 and K of the Vesilind equation which represents activated sludge settling velocity as a function of solids concentration. It remains unresolved how closely batch settling tests describe settling in full-scale clarifiers. An experimental procedure was developed to dtermine scale factors between batch settling and full-scale solids flux curves. An experimental protocol was determined for full-scale clarifier operation, incl
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45

Nuñez, Vasquez Victor Rennato. "El rol de la música incidental y el sound design en los videojuegos modernos (1996-2019)." Bachelor's thesis, Universidad Peruana de Ciencias Aplicadas (UPC), 2021. http://hdl.handle.net/10757/655918.

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El presente trabajo de investigación tiene como finalidad explorar y entender el rol del sonido en los videojuegos lanzados al mercado entre 1996 a 2019, usando Resident Evil 7 (2017) como un estudio de caso. Para un mejor análisis del apartado sonoro se ha dividido el estudio del sonido en dos partes: música incidental y sound design, teniendo presente, además, que la línea que divida música y efecto de sonido es cada vez menor. La primera parte del trabajo se centra en el rol de la música incidental en el videojuego; la forma en que el mismo, como medio audiovisual no-lineal e inter
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46

Bengtsson, Robin. "Metodutveckling av vidhäftningsbehandling för textila vävar." Thesis, Mittuniversitetet, Avdelningen för kvalitets- och maskinteknik, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:miun:diva-34795.

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På Trelleborg Engineered Coated Fabrics tillverkas   gummibelagda vävar. För att fästa gummit på väven är det nödvändigt att först   belägga väven med ett vidhäftningsmedel. På Trelleborg ECF används en speciell   kalandreringsmaskin för denna operation. Även om maskinen är effektiv för   storskalig produktion så är den inte lika effektiv när nya produkter ska tas   fram. Därför har två nya labbmaskiner införskaffats så att nya produkter kan   utvecklas i labbet istället. Avsikten med detta projekt är att utvärdera de   nya maskinerna, finna ett samband mellan labbmaskinerna och   produktionsm
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Burridge, Michael J. "Nonlinear robust control of a series dc motor utilizing the recursive design approach." Master's thesis, University of Central Florida, 1995. http://digital.library.ucf.edu/cdm/ref/collection/RTD/id/24126.

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University of Central Florida College of Engineering Thesis<br>In this thesis, the investigation of asymptotic stavility of the series DC motor with unknown load-torque and unknown armature inductance is considered. The control technique of recursive, or backstepping, design is employed. Three cases are considered. In the first case, the system is assumed to be perfectly known. In the second case, the load torque is assumed to be unknown and a proportional-integral controller is developed to compensate for this unknown quantity. In the final case, it is assumed that two system parameters,
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Gratorp, Christina. "Bitrate smooting: a study on traffic shaping and -analysis in data networks." Thesis, Linköping University, Department of Electrical Engineering, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-10136.

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<p>Examensarbetet bakom denna rapport utgör en undersökande studie om hur transmission av mediadata i nätverk kan göras effektivare. Det kan åstadkommas genom att viss tilläggsinformation avsedd för att jämna ut datatakten adderas i det realtidsprotokoll, Real Time Protocol, som används för strömmande media. Genom att försöka skicka lika mycket data under alla konsekutiva tidsintervall i sessionen kommer datatakten vid en godtycklig tidpunkt med större sannolikhet att vara densamma som vid tidigare klockslag. En streamingserver kan tolka, hantera och skicka data vidare enligt instruktionerna i
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Smith, Scott Christopher. "Gate and throughput optimizations for null convention self-timed digital circuits." Doctoral diss., University of Central Florida, 2001. http://digital.library.ucf.edu/cdm/ref/collection/RTD/id/3372.

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University of Central Florida College of Engineering Thesis<br>NULL Convention Logic (NCL) provides an asynchronous design methodology employing dual-rail signals, quad-rail signals, or other Mutually Exclusive Assertion Groups (MEAGs) to incorporate data and control information into one mixed path. In NCL, the control is inherently present with each datum, so there is no need for worse case delay analysis and control path delay matching. This dissertation focuses on optimization methods for NCL circuits, specifically addressing three related architectural areas of NCL design. First, a design
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Lessing, Sara. "ComPron : Learning Pronunciation through Building Associations between Native Language and Second Language Speech Sounds." Thesis, Uppsala universitet, Människa-datorinteraktion, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-414819.

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Current computer-assisted pronunciation training (CAPT) tools are too focused on what technologies can do, rather than focusing on learner needs and pedagogy. They also lack an embodied perspective on learning. This thesis presents a Research through Design project exploring what kind of interactive design features can support second language learners’ pronunciation learning of segmental speech sounds with embodiment in mind. ComPron was designed: an open simulated prototype that supports learners in learning perception and production of new segmental speech sounds in a second language, by com
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