Relevant bibliographies by topics / Scalable Technology Architecture

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Scalable Technology Architecture'

Author: Grafiati
Published: 7 June 2025
Last updated: 16 July 2025

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Journal articles on the topic "Scalable Technology Architecture"

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Kumar, Harish, Muhammad Rashid, Ahmed Alhomoud, Sikandar Zulqarnain Khan, Ismail Bahkali, and Saud S. Alotaibi. "A Scalable Digit-Parallel Polynomial Multiplier Architecture for NIST-Standardized Binary Elliptic Curves." Applied Sciences 12, no. 9 (2022): 4312. http://dx.doi.org/10.3390/app12094312.

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This work presents a scalable digit-parallel finite field polynomial multiplier architecture with a digit size of 32 bits for NIST-standardized binary elliptic fields. First, a dedicated digit-parallel architecture is proposed for each binary field recommended by NIST, i.e., 163, 233, 283, 409 and 571. Then, a scalable architecture having support for all variants of binary fields of elliptic curves is proposed. For performance investigation, we have compared dedicated multiplier architectures with scalable design. After this, the dedicated and scalable architectures are compared with the most
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Kumar, Harish, Muhammad Rashid, Ahmed Alhomoud, Sikandar Zulqarnain Khan, Ismail Bahkali, and Saud S. Alotaibi. "A Scalable Digit-Parallel Polynomial Multiplier Architecture for NIST-Standardized Binary Elliptic Curves." Applied Sciences 12, no. 9 (2022): 4312. http://dx.doi.org/10.3390/app12094312.

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This work presents a scalable digit-parallel finite field polynomial multiplier architecture with a digit size of 32 bits for NIST-standardized binary elliptic fields. First, a dedicated digit-parallel architecture is proposed for each binary field recommended by NIST, i.e., 163, 233, 283, 409 and 571. Then, a scalable architecture having support for all variants of binary fields of elliptic curves is proposed. For performance investigation, we have compared dedicated multiplier architectures with scalable design. After this, the dedicated and scalable architectures are compared with the most
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Vikas, Kulkarni. "Scalable Java Architectures for Financial Services: Lessons from Real-World Implementations." INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH AND CREATIVE TECHNOLOGY 7, no. 4 (2021): 1–12. https://doi.org/10.5281/zenodo.14752596.

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The financial services sector increasingly demands scalable, secure, and high-performance software solutions to manage complex operations, ensure regulatory compliance, and deliver superior customer experiences. Java, a cornerstone technology in enterprise development, offers robust frameworks and tools that facilitate scalable architecture design. This paper explores scalable Java architectures tailored for financial services, emphasizing real-world implementations, challenges, and best practices. Key topics include microservices, distributed systems, and event-driven architectures, supported
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Lingkau, Mingalu Pangare, Kuo Ling Haoseng, Mingalu Pangare Lingkau, Mingalu Pangare Lingkau, and Yong Meng Phaotangu. "Healthcare and IoT devices: role of information technology in the healthcare industry." Business & IT XII, no. 1 (2022): 169–76. http://dx.doi.org/10.14311/bit.2022.01.20.

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Today, wearable health products play a crucial role in most locations, such as constant wellness monitoring of people, street traffic management, weather forecasting, along with smart house. These sensor devices constantly generate massive amounts of data and are kept in cloud computing. This particular chapter proposes Internet of Things design to store and system scalable sensor information for healthcare apps. Proposed architecture comprises 2 primary architecture, specifically, MetaFog-Redirection and Choosing and Grouping architecture. Though cloud computing offers scalable data storage,
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Kapil, Dharika, and Yamini Kannan. "Best Practices for Building Scalable Application in FinTech: Discuss architecture and design patterns effective in the financial technology sector." European Journal of Advances in Engineering and Technology 9, no. 12 (2022): 118–21. https://doi.org/10.5281/zenodo.10889721.

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<strong>ABSTRACT</strong> This paper addresses the critical need for scalable and robust application architectures in the rapidly evolving FinTech sector. We focus on the transition from monolithic to microservices architectures, highlighting their benefits for scalability and adaptability in response to regulatory changes. The role of DevOps in ensuring rapid deployment and high-quality software is also examined, along with the importance of security in protecting sensitive financial data. Additionally, we discuss user-centric design practices, such as user research, prototyping, and testing,
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K, Kavya Mohan, and A. Rengarajan. "Reverse Proxy Technology." International Journal of Innovative Research in Computer and Communication Engineering 12, no. 02 (2024): 1067–71. http://dx.doi.org/10.15680/ijircce.2024.1202057.

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Reverse proxy technology plays a critical role in modern web architecture by enhancing security, improving performance, and facilitating efficient content delivery. This paper provides a comprehensive review of reverse proxy technology, covering its fundamental concepts, architectural components, deployment scenarios, and practical applications. We delve into the mechanisms behind reverse proxy servers, discussing how they intercept client requests and forward them to backend servers, as well as how they handle responses. Additionally, we explore the various benefits of using reverse proxies,
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Vinay Siva Kumar Bhemireddy. "Understanding microservices architecture: Building scalable and resilient systems." World Journal of Advanced Engineering Technology and Sciences 15, no. 3 (2025): 2348–62. https://doi.org/10.30574/wjaets.2025.15.3.1139.

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Microservices architecture represents a paradigm shift in software design, breaking monolithic applications into independently deployable services with clear boundaries and responsibilities. This article explores the fundamental principles of microservices, tracing their evolution from service-oriented architecture while examining strategic decomposition methodologies, domain modeling, and API design. It investigates communication patterns between services, comparing synchronous and asynchronous models, and addresses the challenges of distributed data management through patterns like event sou
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Dhanorkar, Tejas, Sai Charan Ponnoju, and Shemeer Sulaiman Kunju. "Cloud-Native Wallet Fabric: Engineering Scalable, Multicurrency e-Wallet Platforms." Journal of Artificial Intelligence General science (JAIGS) ISSN:3006-4023 6, no. 1 (2024): 766–76. https://doi.org/10.60087/jaigs.v6i1.368.

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The rapid evolution of digital financial ecosystems demands e-wallet platforms that can seamlessly scale while supporting diverse currencies and high transaction volumes. Traditional e-wallet systems, often constrained by monolithic architectures, struggle to meet these requirements, particularly in global, multi-currency contexts. This paper introduces the Cloud-Native Wallet Fabric (CNWF), a novel architecture designed to address these challenges through cloud-native technologies. By leveraging microservices, containerization, Kubernetes orchestration, and serverless computing, CNWF ensures
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Dileep Domakonda. "Secure and Scalable Microservices Architecture : Principles, Benefits, and Challenges." International Journal of Scientific Research in Computer Science, Engineering and Information Technology 11, no. 2 (2025): 1897–902. https://doi.org/10.32628/cseit23112569.

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Microservices architecture is one approach to structuring applications as a collection of small, independently deployable services interacting via APIs, which improves modularity, scalability, and fault isolation. Microservices provide better resilience, deployment flexibility, and utilization of resources compared to monolithic architectures, making them a perfect fit for cloud-native applications. In today's paper, we discuss fundamental principles such as independent deployment, decoupling, fault tolerance, and technology agnosticism while considering challenges such as inter-service commun
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Landman, Adam B., Ivan C. Rokos, Kevin Burns, et al. "An Open, Interoperable, and Scalable Prehospital Information Technology Network Architecture." Prehospital Emergency Care 15, no. 2 (2011): 149–57. http://dx.doi.org/10.3109/10903127.2010.534235.

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Dissertations / Theses on the topic "Scalable Technology Architecture"

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Fero, Allison. "A scalable architecture for the interconnection of microgrids." Thesis, Massachusetts Institute of Technology, 2017. http://hdl.handle.net/1721.1/115007.

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Thesis: S.M. in Technology and Policy, Massachusetts Institute of Technology, School of Engineering, Institute for Data, Systems, and Society, Technology and Policy Program, 2017.<br>This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.<br>Cataloged from student-submitted PDF version of thesis.<br>Includes bibliographical references (pages 789-84).<br>Electrification is a global challenge that is especially acute in India, where about one fifth of the population has no access to electricity. Solar powe
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Eriksson, Pär. "Providing a scalable architecture to support low-latency ad-hoc funnel analysis on custom defined events for an A/B testing use case." Thesis, Linköpings universitet, Medie- och Informationsteknik, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-138986.

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A/B testing combined with funnel analysis is a highly interesting technique to support data driven decision making. This thesis outlines a scalable architecture that gathers custom defined events and applies funnel analysis to gain valuable insights about user behaviour. The insights of the users are discussed from an A/B testing point of view, however, these insights are just as valuable for scenarios outside A/B testing as well. Custom defined events together with A/B testing is an interesting combination, since it provides opportunities to test different versions of an application against e
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Kim, Changkyu. "A technology-scalable composable architecture." Thesis, 2007. http://hdl.handle.net/2152/3279.

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Nagarajan, Ramadass 1977. "Design and evaluation of a technology-scalable architecture for instruction-level parallelism." Thesis, 2007. http://hdl.handle.net/2152/3534.

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Reis, Daniel Silva. "Distributed and Scalable Architecture for SAF-T Analysis and Processing." Master's thesis, 2018. https://repositorio-aberto.up.pt/handle/10216/114099.

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Reis, Daniel Silva. "Distributed and Scalable Architecture for SAF-T Analysis and Processing." Dissertação, 2018. https://repositorio-aberto.up.pt/handle/10216/114099.

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Nogueira, Luís Rodrigues Zilhão. "An Architecture for the Scalable Benchmarking of IoT Middleware and Streaming Platforms." Master's thesis, 2018. https://repositorio-aberto.up.pt/handle/10216/114248.

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Nogueira, Luís Rodrigues Zilhão. "An Architecture for the Scalable Benchmarking of IoT Middleware and Streaming Platforms." Dissertação, 2018. https://repositorio-aberto.up.pt/handle/10216/114248.

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"A server-less architecture for building scalable, reliable, and cost-effective video-on-demand systems." 2002. http://library.cuhk.edu.hk/record=b5891220.

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Leung Wai Tak.<br>Thesis (M.Phil.)--Chinese University of Hong Kong, 2002.<br>Includes bibliographical references (leaves 58-60).<br>Abstracts in English and Chinese.<br>Acknowledgement --- p.I<br>Abstract --- p.II<br>摘要 --- p.III<br>Chapter Chapter 1 --- Introduction --- p.1<br>Chapter Chapter 2 --- Related Works --- p.5<br>Chapter 2.1 --- Previous Works --- p.5<br>Chapter 2.2 --- Contributions of this Study --- p.7<br>Chapter Chapter 3 --- Architecture --- p.9<br>Chapter 3.1 --- Data Placement Policy --- p.10<br>Chapter 3.2 --- Retrieval and Transmission Scheduling --- p.13<br>Ch
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Books on the topic "Scalable Technology Architecture"

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Zhiwei, Xu, ed. Scalable parallel computing: Technology, architecture, programming. WCB/McGraw-Hill, 1998.

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Schlossnagle, Theo. Scalable Internet Architectures. Sams Publishing, 2007.

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Lee, Jack. Scalable Continuous Media Streaming Systems: Architecture, Design, Analysis and Implementation. Wiley & Sons, Incorporated, John, 2007.

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Lee, Jack. Scalable Continuous Media Streaming Systems: Architecture, Design, Analysis and Implementation. Wiley & Sons Australia, Limited, John, 2005.

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Scalable Multicore Architectures Design Methodologies And Tools. Springer, 2011.

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Allende, Marcos. LACChain Framework for Permissioned Public Blockchain Networks: From Blockchain Technology to Blockchain Networks. Edited by Alejandro Pardo and Marcelo Da Silva. Inter-American Development Bank, 2021. http://dx.doi.org/10.18235/0003747.

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Over the past decade, different blockchain technologies have contributed to the creation of thousands of blockchain networks which have hosted thousands of proofs of concepts and pilots, with generally satisfactory results for stakeholders. However, scalability has been a big roadblock for most of these projects. We believe that the reasons why most blockchain-based solutions do not scale well are that they are built on ledgers that are not properly designed as the instrumental piece of architecture needed by these projects and that it is not clear who is liable for what. There is rarely an up
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Roy, Radhika Ranjan. Handbook on Networked Multipoint Multimedia Conferencing and Multistream Immersive Telepresence Using SIP: Scalable Distributed Applications and Media Control over Internet. Taylor & Francis Group, 2020.

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Handbook on Networked Multipoint Multimedia Conferencing and Multistream Immersive Telepresence Using SIP: Scalable Distributed Applications and Media Control over Internet. Taylor & Francis Group, 2020.

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Handbook on Networked Multipoint Multimedia Conferencing and Multistream Immersive Telepresence Using SIP: Scalable Distributed Applications and Media Control over Internet. Taylor & Francis Group, 2023.

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Raz, Danny, Cheng Jin, Sugih Jamin, and Yuval Shavitt. Building Scalable Network Services: Theory and Practice. Springer, 2003.

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Book chapters on the topic "Scalable Technology Architecture"

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Ferreira, Nuno, Gracinda Carvalho, and Paulo Rogério Pereira. "A Scalable Spam Filtering Architecture." In IFIP Advances in Information and Communication Technology. Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-37291-9_12.

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Roşoiu, Ionuţ. "A Scalable Architecture for Real-Time Online Data Access." In Distributed Computing and Internet Technology. Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-19056-8_17.

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Rajasekhar, Sathish, Ibrahim Khalil, and Zahir Tari. "A Scalable and Robust QoS Architecture for WiFi P2P Networks." In Distributed Computing and Internet Technology. Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30555-2_9.

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Sankaralingam, Karthikeyan, Ramadass Nagarajan, Doug Burger, and Stephen W. Keckler. "A Technology-Scalable Architecture for Fast Clocks and High ILP." In Interaction between Compilers and Computer Architectures. Springer US, 2001. http://dx.doi.org/10.1007/978-1-4757-3337-2_7.

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Kuhrt, Marius, Nikolaus Glombiewski, Michael Körber, Andreas Morgen, Dominik Brandenstein, and Bernhard Seeger. "Efficient Event Processing on Modern Hardware." In Scalable Data Management for Future Hardware. Springer Nature Switzerland, 2025. https://doi.org/10.1007/978-3-031-74097-8_3.

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Abstract Complex event processing (CEP) is an essential technology for analyzing streams of events. A key feature of a modern CEP architecture is the ability to process both continuous queries and analytical ad hoc queries on high-volume streams. Both query types support common operations (filter, aggregation, joins) known in event stream and database systems. Additionally, a crucial and unique operation in CEP is pattern matching, which matches user-defined predicates to subsequences of events. We present our solution for a system supporting continuous queries, fast ingestion, and efficient analytical ad hoc queries. The system follows the principles of a Lambda Architecture and is specialized for a large variety of pattern-matching queries, including sequential, situation, and group patterns. To offer efficient processing, we use modern hardware in each of the components. For continuous queries, we explore multi-core CPUs and GPUs. For ingestion and ad hoc queries, we analyze SSDs and persistent memory as ways to provide a robust system. Furthermore, we explore unique characteristics of the hardware and event processing applications such as temporal data, energy efficiency, and compression. We give an overview of the overall systems, highlight the research accomplishments, and describe common application scenarios that benefit from our architecture.
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Galimberti, Andrea. "FPGA-Based Design and Implementation of a Code-Based Post-quantum KEM." In Special Topics in Information Technology. Springer Nature Switzerland, 2024. http://dx.doi.org/10.1007/978-3-031-51500-2_3.

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AbstractPost-quantum cryptography aims to design cryptosystems that can be deployed on traditional computers and resist attacks from quantum computers, which are widely expected to break the currently deployed public-key cryptography solutions in the upcoming decades. Providing effective hardware support is crucial to ensuring a wide adoption of post-quantum cryptography solutions, and it is one of the requirements set by the USA’s National Institute of Standards and Technology within its ongoing standardization process. This research delivers a configurable FPGA-based hardware architecture to support BIKE, a post-quantum QC-MDPC code-based key encapsulation mechanism. The proposed architecture is configurable through a set of architectural and code parameters, which make it efficient, providing good performance while using the resources available on FPGAs effectively, flexible, allowing to support different large QC-MDPC codes defined by the designers of the cryptosystem, and scalable, targeting the whole Xilinx Artix-7 FPGA family. Two separate modules target the cryptographic functionality of the client and server nodes of the quantum-resistant key exchange, respectively, and a complexity-based heuristic that leverages the knowledge of the time and space complexity of the configurable hardware components steers the design space exploration to identify their best parameterization. The proposed architecture outperforms the state-of-the-art reference software that exploits the Intel AVX2 extension and runs on a desktop-class CPU by 1.77 and 1.98 times, respectively, for AES-128- and AES-192-equivalent security instances of BIKE, and it provides a speedup of more than six times compared to the fastest reference state-of-the-art hardware architecture, which targets the same FPGA family.
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Ibrahimi, Mëmëdhe. "Innovative Cross-Layer Optimization Techniques for the Design of Optical Networks." In Special Topics in Information Technology. Springer Nature Switzerland, 2024. http://dx.doi.org/10.1007/978-3-031-51500-2_12.

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AbstractOptical networks have become indispensable in the era of 5G-and-beyond communications, supporting applications that require unprecedented capacity, reliability, and high Quality-of-Transmission (QoT) of lightpaths. To meet these requirements, network operators strive to provide innovative solutions while managing network costs effectively. This work summarizes the main findings of my Ph.D. thesis Innovative Cross-Layer Optimization Techniques for the Design of Filterless and Wavelength-Switched Optical Networks, that has been conducted in partnership with an industrial partner, SM-Optics. The main objective of the Ph.D. thesis is to investigate solutions to reduce network costs while enabling network expandability through novel network architectures. To ensure cost savings and scalability, (1) we optimize the deployment of Optical Amplifiers (OA) while accurately modeling physical layer impairments in filterless networks, (2) we propose a modular node architecture relying on pluggable devices and a scalable add/drop section at the node level for traffic grooming and capacity increase, and (3) we investigate the application of Machine Learning (ML)—regression approaches to estimate lightpaths’ QoT as they allow to make informed decisions about how conservative or aggressive a network operator can be when taking network planning choices, i.e., deploying a new lightpath. Numerical evaluations show that our proposed approaches achieve significant cost savings compared to benchmark approaches: (1) $${\sim }50\%$$ ∼ 50 % savings in OA cost, (2) $${\sim }50\%$$ ∼ 50 % savings in node architecture equipment cost, (3) $${\sim }70\%$$ ∼ 70 % in penalty costs for deploying wrong lightpath configurations.
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Somesula, Raaga Sai, Sibi Rajagopal Sivakumar, and Srinivas Katkoori. "Programmable and Scalable Bit-Sliced VLSI Architecture for Decision Tree-Based Machine Learning Edge Inference." In IFIP Advances in Information and Communication Technology. Springer Nature Switzerland, 2024. https://doi.org/10.1007/978-3-031-81900-1_3.

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Sanju, V., and Niranjan Chiplunkar. "RiCoBiT—Ring Connected Binary Tree: A Structured and Scalable Architecture for Network-on-Chip Based Systems: an Exclusive Summary." In Proceedings of the International Conference on Data Engineering and Communication Technology. Springer Singapore, 2016. http://dx.doi.org/10.1007/978-981-10-1678-3_4.

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Piperidis, Stelios, Penny Labropoulou, Dimitris Galanis, Miltos Deligiannis, and Georg Rehm. "The European Language Grid Platform:Basic Concepts." In European Language Grid. Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-17258-8_2.

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AbstractIn the fragmented Language Technology (LT) landscape of multilingual Europe, ELG has set out to bring together language resources and technologies (LRTs) and boost the LT sector and its activities. The primary goal is to build a scalable and comprehensive cloud platform for providers, developers, integrators and consumers of language resources and technologies. We describe the basic concepts of the ELG platform in terms of its architecture, the functionalities and services offered to its types of users and the policies it implements. We present the ELG repository, its catalogue features, the LT services execution environment as well as the metadata model underlying the platform operations and the resources life cycle, from creation to publication. We also discuss the compliance of ELG with the FAIR principles and the relation to other platforms and infrastructure initiatives which have inspired certain aspects and with which ELG has been establishing strong links.
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Conference papers on the topic "Scalable Technology Architecture"

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Tang, Chunhua, Yang Jiang, Wuyi Fu, et al. "SPONGE: A Scalable Heterogeneous Chiplet Accelerator Architecture for Autonomous Driving." In 2025 4th International Symposium on Computer Applications and Information Technology (ISCAIT). IEEE, 2025. https://doi.org/10.1109/iscait64916.2025.11010368.

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Rao, P. Varaprasad, Neeraj Varshney, N. Kalyana Sundaram, B. Kishore, Saif O. Husain, and N. Kanys. "Developing a Scalable IoT Architecture for Precision Agriculture Using Edge Computing." In 2024 International Conference on IoT, Communication and Automation Technology (ICICAT). IEEE, 2024. https://doi.org/10.1109/icicat62666.2024.10923487.

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Serge, Germanetti, and Erwan Guillanton. "An Alternative Approach for System Architecture Design." In Vertical Flight Society 70th Annual Forum & Technology Display. The Vertical Flight Society, 2014. http://dx.doi.org/10.4050/f-0070-2014-9649.

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In the frame of the avionics development, more and more risks have to be managed. The technology risk is the one which concerns most of the engineers. But industrial risk is perhaps more critical for a company. In the current context, the high level of integration to reduce weight and cost is the key factor that drives most of the Hardware developments. This paper addresses this problem, explains past experience, and provides rationale for evolution. The possibility to introduce a set of independent reusable sub-systems is proposed to ease incremental certification. The driven elements for sel
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Gaska, Thomas, Doug Summerville, Marilyn Gaska, and Yu Chen. "Model Based Engineering for Advanced Integrated Modular Avionics - Focus and Challenges." In Vertical Flight Society 73rd Annual Forum & Technology Display. The Vertical Flight Society, 2017. http://dx.doi.org/10.4050/f-0073-2017-12031.

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Advanced Integrated Modular Avionics (A-IMA) will drive new focus and challenges for Model Based Engineering (MBE). First, there is the need to bridge MBE to legacy system elements that were developed without MBE along with the need to handle hybrid Open System Architecture / Integrated Modular Avionics (OSA/IMA) based architectures. Second, there is the need for MBE to be reusable and interoperable across product development cycles as technology insertions occur. Third, there is the need for integration of MBE into synthesizable descriptions that can also be effectively validated for mixed ge
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Roy, Bipraneel, Hon Cheung, and Chun Ruan. "GAN-Driven Iterative Method for Automated IoT Intrusion Detection Architecture Design and Scalable Training-Set Creation." In 2025 International Conference on Computer Sciences, Engineering, and Technology Innovation (ICoCSETI). IEEE, 2025. https://doi.org/10.1109/icocseti63724.2025.11019135.

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Lee, Feng-Min, Po-Hao Tseng, Yu-Yu Lin, et al. "Bit-Cost-Scalable 3D DRAM Architecture and Unit Cell First Demonstrated with Integrated Gate-Around and Channel-Around IGZO FETs." In 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). IEEE, 2024. http://dx.doi.org/10.1109/vlsitechnologyandcir46783.2024.10631386.

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Marchiori, Alan, Brian Bouquillon, Sanjay Bajekal, Mark Davis, Nicholas Soldner, and Cagatay Tokgoz. "Rotor Wireless Load and Motion Monitoring Sensor Network." In Vertical Flight Society 70th Annual Forum & Technology Display. The Vertical Flight Society, 2014. http://dx.doi.org/10.4050/f-0070-2014-9652.

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The Sikorsky Aircraft Corporation (SAC) and the U.S. Army Aviation Development Directorate - Aviation Applied Technology Directorate (ADD-AATD) are jointly sponsoring the Capability-Based Operations and Sustainment Technology-Aviation (COST-A) program. The objective of COST-A is to demonstrate an integrated set of high-value diagnostics, prognostics, and system health management technologies that reduce the maintenance burden, without sacrificing safety. A key technology for the COST-A project was the development of a rotor local wireless sensor network (RLWSN) for purposes of data acquisition
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Lima, Clecio D., Kentaro Sano, Hiroaki Kobayashi, Tadao Nakamura, and Michael J. Flynn. "A Technology-Scalable Multithreaded Architecture." In Simpósio de Arquitetura de Computadores e Processamento de Alto Desempenho. Sociedade Brasileira de Computação, 2001. http://dx.doi.org/10.5753/sbac-pad.2001.22197.

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Advances in integrated circuit technology have offered an increasing transistor density with a continuous performance improvement. Soon, it will be possible to integrate a billion of transistors on a chip running at very high speeds. At this levei of integration, however, physical constraints related to wire delay will become dominant, requiring microprocessors to be more partitioned and use short wires for on-chip communication. On the other hand, effective parallel processing by taking advantage of the large number of transistors will be challenging. In this research, we propose the Shift Ar
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Kim, John, Wiliam J. Dally, Steve Scott, and Dennis Abts. "Technology-Driven, Highly-Scalable Dragonfly Topology." In 2008 35th International Symposium on Computer Architecture (ISCA). IEEE, 2008. http://dx.doi.org/10.1109/isca.2008.19.

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Lougher, Phillip, Robert Lougher, William D. Shepherd, and David W. Pegler. "Scalable hierarchical video storage architecture." In Electronic Imaging: Science & Technology, edited by Martin Freeman, Paul Jardetzky, and Harrick M. Vin. SPIE, 1996. http://dx.doi.org/10.1117/12.235863.

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Reports on the topic "Scalable Technology Architecture"

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Pasupuleti, Murali Krishna. 2D Quantum Materials for Next-Gen Semiconductor Innovation. National Education Services, 2025. https://doi.org/10.62311/nesx/rrvi425.

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Abstract The emergence of two-dimensional (2D) quantum materials is revolutionizing next-generation semiconductor technology, offering superior electronic, optical, and quantum properties compared to traditional silicon-based materials. 2D materials, such as graphene, transition metal dichalcogenides (TMDs), hexagonal boron nitride (hBN), and black phosphorus, exhibit high carrier mobility, tunable bandgaps, exceptional mechanical flexibility, and strong light-matter interactions, making them ideal candidates for ultra-fast transistors, spintronics, optoelectronic devices, and quantum computin
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