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1
Kumar, Harish, Muhammad Rashid, Ahmed Alhomoud, Sikandar Zulqarnain Khan, Ismail Bahkali, and Saud S. Alotaibi. "A Scalable Digit-Parallel Polynomial Multiplier Architecture for NIST-Standardized Binary Elliptic Curves." Applied Sciences 12, no. 9 (2022): 4312. http://dx.doi.org/10.3390/app12094312.
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This work presents a scalable digit-parallel finite field polynomial multiplier architecture with a digit size of 32 bits for NIST-standardized binary elliptic fields. First, a dedicated digit-parallel architecture is proposed for each binary field recommended by NIST, i.e., 163, 233, 283, 409 and 571. Then, a scalable architecture having support for all variants of binary fields of elliptic curves is proposed. For performance investigation, we have compared dedicated multiplier architectures with scalable design. After this, the dedicated and scalable architectures are compared with the most relevant state-of-the-art multipliers. All multiplier architectures are implemented in Verilog HDL using the Vivado IDE tool. The implementation results are reported on a 28 nm Virtex-7 FPGA technology. The dedicated multipliers utilize slices of 1182 (for m=163), 1451 (for m=233), 1589 (for m=283), 2093 (for m=409) and 3451 (for m=571). Moreover, our dedicated designs can operate at a maximum frequency of 500, 476, 465, 451 and 443 MHz. Similarly, for all supported binary fields, our scalable architecture (i) utilizes 3753 slices, (ii) achieves 305 MHz clock frequency, (iii) takes 0.013 μs for one finite field multiplication and (iv) consumes 3.905 W power. The proposed scalable digit-parallel architecture is more area-efficient than most recent state-of-the-art multipliers. Consequently, the reported results and comparison to the state of the art reveal that the proposed architectures are well suited for cryptographic applications.
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Kumar, Harish, Muhammad Rashid, Ahmed Alhomoud, Sikandar Zulqarnain Khan, Ismail Bahkali, and Saud S. Alotaibi. "A Scalable Digit-Parallel Polynomial Multiplier Architecture for NIST-Standardized Binary Elliptic Curves." Applied Sciences 12, no. 9 (2022): 4312. http://dx.doi.org/10.3390/app12094312.
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This work presents a scalable digit-parallel finite field polynomial multiplier architecture with a digit size of 32 bits for NIST-standardized binary elliptic fields. First, a dedicated digit-parallel architecture is proposed for each binary field recommended by NIST, i.e., 163, 233, 283, 409 and 571. Then, a scalable architecture having support for all variants of binary fields of elliptic curves is proposed. For performance investigation, we have compared dedicated multiplier architectures with scalable design. After this, the dedicated and scalable architectures are compared with the most relevant state-of-the-art multipliers. All multiplier architectures are implemented in Verilog HDL using the Vivado IDE tool. The implementation results are reported on a 28 nm Virtex-7 FPGA technology. The dedicated multipliers utilize slices of 1182 (for m=163), 1451 (for m=233), 1589 (for m=283), 2093 (for m=409) and 3451 (for m=571). Moreover, our dedicated designs can operate at a maximum frequency of 500, 476, 465, 451 and 443 MHz. Similarly, for all supported binary fields, our scalable architecture (i) utilizes 3753 slices, (ii) achieves 305 MHz clock frequency, (iii) takes 0.013 μs for one finite field multiplication and (iv) consumes 3.905 W power. The proposed scalable digit-parallel architecture is more area-efficient than most recent state-of-the-art multipliers. Consequently, the reported results and comparison to the state of the art reveal that the proposed architectures are well suited for cryptographic applications.
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Vikas, Kulkarni. "Scalable Java Architectures for Financial Services: Lessons from Real-World Implementations." INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH AND CREATIVE TECHNOLOGY 7, no. 4 (2021): 1–12. https://doi.org/10.5281/zenodo.14752596.
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The financial services sector increasingly demands scalable, secure, and high-performance software solutions to manage complex operations, ensure regulatory compliance, and deliver superior customer experiences. Java, a cornerstone technology in enterprise development, offers robust frameworks and tools that facilitate scalable architecture design. This paper explores scalable Java architectures tailored for financial services, emphasizing real-world implementations, challenges, and best practices. Key topics include microservices, distributed systems, and event-driven architectures, supported by examples from banking and insurance domains. Lessons from successful implementations offer valuable insights for architects and developers.
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Lingkau, Mingalu Pangare, Kuo Ling Haoseng, Mingalu Pangare Lingkau, Mingalu Pangare Lingkau, and Yong Meng Phaotangu. "Healthcare and IoT devices: role of information technology in the healthcare industry." Business & IT XII, no. 1 (2022): 169–76. http://dx.doi.org/10.14311/bit.2022.01.20.
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Today, wearable health products play a crucial role in most locations, such as constant wellness monitoring of people, street traffic management, weather forecasting, along with smart house. These sensor devices constantly generate massive amounts of data and are kept in cloud computing. This particular chapter proposes Internet of Things design to store and system scalable sensor information for healthcare apps. Proposed architecture comprises 2 primary architecture, specifically, MetaFog-Redirection and Choosing and Grouping architecture. Though cloud computing offers scalable data storage, effective computing platforms must process it. There's a requirement for scalable algorithms to process the big sensor information and recognize the helpful patterns. To conquer this problem, this particular chapter proposes a scalable MapReduce based logistic regression to process such massive quantities of sensor information. Apache Mahout includes scalable logistic regression to system BDA in a distributed way. This particular chapter uses Apache Mahout with Hadoop Distributed File System to process the sensor information produced by the wearable health units.
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Kapil, Dharika, and Yamini Kannan. "Best Practices for Building Scalable Application in FinTech: Discuss architecture and design patterns effective in the financial technology sector." European Journal of Advances in Engineering and Technology 9, no. 12 (2022): 118–21. https://doi.org/10.5281/zenodo.10889721.
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<strong>ABSTRACT</strong> This paper addresses the critical need for scalable and robust application architectures in the rapidly evolving FinTech sector. We focus on the transition from monolithic to microservices architectures, highlighting their benefits for scalability and adaptability in response to regulatory changes. The role of DevOps in ensuring rapid deployment and high-quality software is also examined, along with the importance of security in protecting sensitive financial data. Additionally, we discuss user-centric design practices, such as user research, prototyping, and testing, essential for creating effective FinTech applications. The paper underscores the use of popular frameworks and tools that aid in developing scalable FinTech applications, offering insights through realworld examples. This study serves as a guide for adopting best practices in software architecture and design within the FinTech ecosystem.
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K, Kavya Mohan, and A. Rengarajan. "Reverse Proxy Technology." International Journal of Innovative Research in Computer and Communication Engineering 12, no. 02 (2024): 1067–71. http://dx.doi.org/10.15680/ijircce.2024.1202057.
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Reverse proxy technology plays a critical role in modern web architecture by enhancing security, improving performance, and facilitating efficient content delivery. This paper provides a comprehensive review of reverse proxy technology, covering its fundamental concepts, architectural components, deployment scenarios, and practical applications. We delve into the mechanisms behind reverse proxy servers, discussing how they intercept client requests and forward them to backend servers, as well as how they handle responses. Additionally, we explore the various benefits of using reverse proxies, such as load balancing, SSL termination, caching, and protection against common web attacks. Furthermore, we analyze real-world use cases of reverse proxy technology across different industries, including e-commerce, media streaming, and enterprise applications. Lastly, we go over new developments and trends in reverse proxy technology, like the use of serverless architectures for deployments that are both scalable and economical and the incorporation of machine learning for intelligent request routing. Our goal in offering this thorough review is to improve knowledge of reverse proxy technology and stimulate additional study and advancement in this area.
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Dhanorkar, Tejas, Sai Charan Ponnoju, and Shemeer Sulaiman Kunju. "Cloud-Native Wallet Fabric: Engineering Scalable, Multicurrency e-Wallet Platforms." Journal of Artificial Intelligence General science (JAIGS) ISSN:3006-4023 6, no. 1 (2024): 766–76. https://doi.org/10.60087/jaigs.v6i1.368.
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The rapid evolution of digital financial ecosystems demands e-wallet platforms that can seamlessly scale while supporting diverse currencies and high transaction volumes. Traditional e-wallet systems, often constrained by monolithic architectures, struggle to meet these requirements, particularly in global, multi-currency contexts. This paper introduces the Cloud-Native Wallet Fabric (CNWF), a novel architecture designed to address these challenges through cloud-native technologies. By leveraging microservices, containerization, Kubernetes orchestration, and serverless computing, CNWF ensures elastic scalability, fault tolerance, and dynamic resource allocation. Additionally, the framework integrates blockchain technology to enhance security and transparency in cross-currency transactions. Empirical evaluations conducted in simulated high-load environments demonstrate CNWF’s ability to process over 50,000 transactions per second with sub-50ms latency, outperforming conventional systems. The architecture also reduces operational costs by 40% through efficient cloud-resource utilization. These findings underscore CNWF’s potential as a foundational model for next-generation, multicurrency e-wallet platforms, aligning with the agility and resilience demands of modern financial technology (FinTech).
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Dileep Domakonda. "Secure and Scalable Microservices Architecture : Principles, Benefits, and Challenges." International Journal of Scientific Research in Computer Science, Engineering and Information Technology 11, no. 2 (2025): 1897–902. https://doi.org/10.32628/cseit23112569.
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Microservices architecture is one approach to structuring applications as a collection of small, independently deployable services interacting via APIs, which improves modularity, scalability, and fault isolation. Microservices provide better resilience, deployment flexibility, and utilization of resources compared to monolithic architectures, making them a perfect fit for cloud-native applications. In today's paper, we discuss fundamental principles such as independent deployment, decoupling, fault tolerance, and technology agnosticism while considering challenges such as inter-service communication, data consistency, and management of distributed systems. Furthermore, we discuss how microservices improve agility, scalability, and operational efficiency while demanding strong API management and monitoring. The article also discusses real-world deployments, illustrating how companies use microservices to simplify software development, enhance fault isolation, and update applications conveniently. By considering these aspects, companies can migrate from monolithic to microservices-based architectures, which facilitates the efficient deployment, scalability, and management of cloud-based applications in the current era.
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Landman, Adam B., Ivan C. Rokos, Kevin Burns, et al. "An Open, Interoperable, and Scalable Prehospital Information Technology Network Architecture." Prehospital Emergency Care 15, no. 2 (2011): 149–57. http://dx.doi.org/10.3109/10903127.2010.534235.
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G Renugadevi, M L Sharvesh, S Subhashini, and V S Vaishaal Krishna. "Scalable Cloud Execution Engines." International Research Journal on Advanced Engineering Hub (IRJAEH) 2, no. 10 (2024): 2521–28. http://dx.doi.org/10.47392/irjaeh.2024.0346.
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Scalability remains a major concern for many organizations, and as technology evolves expeditiously, the number of users utilizing it also increases rapidly. In this paper, we propose a novel approach to address this challenge through the implementation of a scalable cloud execution engine using a microservices architecture. By using this design we can achieve a system with loosely coupled and independently deployable methods. Also through this, we can achieve enhanced flexibility, scalability, and reusability in our application. Through experimenting with various execution engines it is evident that most of their design relies on monolithic architecture. However, this design poses potential challenges especially when the traffic experiences sudden spikes. Our proposed design provides practical insights for architects and developers seeking to design and deploy highly scalable cloud applications.
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ZHENG, XIAO-HU, MING YANG, PING DONG, and ZHUO-LIANG CAO. "IMPLEMENTING DEUTSCH–JOZSA ALGORITHM USING SUPERCONDUCTING QUBIT NETWORK." Modern Physics Letters B 22, no. 31 (2008): 3035–42. http://dx.doi.org/10.1142/s0217984908017540.
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An improved architecture, which performs a universal set of gates by current biasing of coupling Josephson junction, has been proposed. This improvement is necessary to the realization of a functional and scalable quantum computer. The proposed architecture is in line with current technology. Secondly, we investigate a scheme for implementing the Deutsch–Jozsa algorithm via the improved architecture. It is a simple, scalable and feasible scheme for the implementation of the Deutsch–Jozsa algorithm based on the current-controlled superconducting charge qubit network.
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Bourassa, J. Eli, Rafael N. Alexander, Michael Vasmer, et al. "Blueprint for a Scalable Photonic Fault-Tolerant Quantum Computer." Quantum 5 (February 4, 2021): 392. http://dx.doi.org/10.22331/q-2021-02-04-392.
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Photonics is the platform of choice to build a modular, easy-to-network quantum computer operating at room temperature. However, no concrete architecture has been presented so far that exploits both the advantages of qubits encoded into states of light and the modern tools for their generation. Here we propose such a design for a scalable fault-tolerant photonic quantum computer informed by the latest developments in theory and technology. Central to our architecture is the generation and manipulation of three-dimensional resource states comprising both bosonic qubits and squeezed vacuum states. The proposal exploits state-of-the-art procedures for the non-deterministic generation of bosonic qubits combined with the strengths of continuous-variable quantum computation, namely the implementation of Clifford gates using easy-to-generate squeezed states. Moreover, the architecture is based on two-dimensional integrated photonic chips used to produce a qubit cluster state in one temporal and two spatial dimensions. By reducing the experimental challenges as compared to existing architectures and by enabling room-temperature quantum computation, our design opens the door to scalable fabrication and operation, which may allow photonics to leap-frog other platforms on the path to a quantum computer with millions of qubits.
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Masnad, Md Mahadi, S. Mohammad Reza Safaee, Najla Najeeb, et al. "Scalable Photonic Digital-to-Analog Converters." Photonics 11, no. 2 (2024): 112. http://dx.doi.org/10.3390/photonics11020112.
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This work introduces a novel architecture for implementing a parallel coherent photonic digital-to-analog converter (PDAC), designed to transform parallel digital electrical signals into corresponding analog optical output, convertible to analog electrical signals using photodiodes. The proposed architecture incorporates microring resonator-based modulators (MRMs), phase shifters, and symmetric multimode interference couplers. Efficient modulation is achieved by MRMs utilizing carrier depletion-induced refractive index changes, while metal heaters facilitate tuning of the ring resonator resonance wavelength. The proposed architecture is scalable to higher bit resolutions and exhibits a dynamic range limited by MRM’s sensitivity to applied bias and noise levels. Experimental results of the fabricated chip in the silicon-on-insulator (SOI) platform showcase the successful realization of a 4 GSample/sec conversion rate in a 2-bit resolution operation, along with a stationary conversion of four parallel DC digital signals into 16 analog intensity levels in a 4-bit PDAC configuration. The study encompasses a proof-of-concept experimental demonstration of 8 Gbps data conversion, along with a 50 Gbps data conversion rate using the optimized design in the simulation, affirming the accuracy and quality of the PDAC architecture. These findings contribute to the advancement of PDAC technology, providing insights into performance characteristics, limitations, and potential applications.
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Urkudkar, Chetan. "Building Scalable ETL Pipelines for HR Data." American Journal of Engineering and Technology 07, no. 06 (2025): 88–95. https://doi.org/10.37547/tajet/volume07issue06-09.
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The article is devoted to the development and experimental validation of scalable ETL pipelines for HR data, aimed at bridging the gap between the volume of heterogeneous workforce events and the capabilities of traditional nightly processes. The relevance of the study is determined by the exponential growth of the HR technology market to USD 40.45 billion in 2024 and its forecasted doubling by 2032 at a 9.2% CAGR, as well as by the fragmentation of corporate systems, which leads to data incompleteness, inconsistency, and latency in turnover metrics and talent-development program effectiveness analysis. The work is aimed at formalizing requirements for Extraction, Transformation, Loading, Scalability, and Observability; at designing a containerized architecture based on Kubernetes, Apache Airflow, Spark, and Flink-CDC; and to ensure low latency, exactly-once semantics as well as linear scaling up to 32 worker pods with an efficiency η of 0.78 or greater. The novelty of the work lies in the first formal model that integrates adaptive API-request throttling with idempotent SCD-attribute transformations for a hybrid Iceberg/Snowflake storage layer and a complete observability system using Prometheus and OpenTelemetry with real-time alerts. An experimental evaluation on a private Kubernetes cluster under load up to 10⁸ records per day demonstrated end-to-end latency ≤ 15 min in batch mode and p95 latency reduction to 48s in near-real-time mode, throughput up to 18.7k records/min with linear worker scaling (η = 0.82), and full lineage-graph traceability in compliance with GDPR. The main conclusions confirm that the proposed architecture provides reliable and reproducible HR-data integration with minimal latency and predictable cost, paving the way for practical deployment in large enterprises. This article will be helpful to data engineers, cloud-architecture designers, and project managers in HR analytics automation.
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Manea, A. M., and T. Almani. "Scalable Graphics Processing Unit–Based Multiscale Linear Solvers for Reservoir Simulation." SPE Journal 27, no. 01 (2021): 643–62. http://dx.doi.org/10.2118/203939-pa.
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Summary In this work, the scalability of two key multiscale solvers for the pressure equation arising from incompressible flow in heterogeneous porous media, namely, the multiscale finite volume (MSFV) solver, and the restriction-smoothed basis multiscale (MsRSB) solver, are investigated on the graphics processing unit (GPU) massively parallel architecture. The robustness and scalability of both solvers are compared against their corresponding carefully optimized implementation on the shared-memory multicore architecture in a structured problem setting. Although several components in MSFV and MsRSB algorithms are directly parallelizable, their scalability on the GPU architecture depends heavily on the underlying algorithmic details and data-structure design of every step, where one needs to ensure favorable control and data flow on the GPU, while extracting enough parallel work for a massively parallel environment. In addition, the type of algorithm chosen for each step greatly influences the overall robustness of the solver. Thus, we extend the work on the parallel multiscale methods of Manea et al. (2016) to map the MSFV and MsRSB special kernels to the massively parallel GPU architecture. The scalability of our optimized parallel MSFV and MsRSB GPU implementations are demonstrated using highly heterogeneous structured 3D problems derived from the SPE10 Benchmark (Christie and Blunt 2001). Those problems range in size from millions to tens of millions of cells. For both solvers, the multicore implementations are benchmarked on a shared-memory multicore architecture consisting of two packages of Intel® Cascade Lake Xeon Gold 6246 central processing unit (CPU), whereas the GPU implementations are benchmarked on a massively parallel architecture consisting of NVIDIA Volta V100 GPUs. We compare the multicore implementations to the GPU implementations for both the setup and solution stages. Finally, we compare the parallel MsRSB scalability to the scalability of MSFV on the multicore (Manea et al. 2016) and GPU architectures. To the best of our knowledge, this is the first parallel implementation and demonstration of these versatile multiscale solvers on the GPU architecture. NOTE: This paper is also published as part of the 2021 SPE Reservoir Simulation Conference Special Issue.
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Richard, William D. "A Scalable Architecture for Real-Time Synthetic-Focus Imaging." Ultrasonic Imaging 25, no. 3 (2003): 151–61. http://dx.doi.org/10.1177/016173460302500303.
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A scalable architecture for forming real-time synthetic focus images is described and the design of a 256-channel system using currently-available technology is presented as an example implementation of the architecture. The parallelism of the system scales directly with the number of array elements and the image computation rate for a given image size (in pixels) stays constant as the number of array elements is increased. The system leverages earlier work in the real-time generation of the required time-of-flight surfaces and allows either real-time image generation or iterative adaptive image generation from a single complete data set.
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Shumba, Angela-Tafadzwa, Teodoro Montanaro, Ilaria Sergi, Luca Fachechi, Massimo De Vittorio, and Luigi Patrono. "Leveraging IoT-Aware Technologies and AI Techniques for Real-Time Critical Healthcare Applications." Sensors 22, no. 19 (2022): 7675. http://dx.doi.org/10.3390/s22197675.
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Personalised healthcare has seen significant improvements due to the introduction of health monitoring technologies that allow wearable devices to unintrusively monitor physiological parameters such as heart health, blood pressure, sleep patterns, and blood glucose levels, among others. Additionally, utilising advanced sensing technologies based on flexible and innovative biocompatible materials in wearable devices allows high accuracy and precision measurement of biological signals. Furthermore, applying real-time Machine Learning algorithms to highly accurate physiological parameters allows precise identification of unusual patterns in the data to provide health event predictions and warnings for timely intervention. However, in the predominantly adopted architectures, health event predictions based on Machine Learning are typically obtained by leveraging Cloud infrastructures characterised by shortcomings such as delayed response times and privacy issues. Fortunately, recent works highlight that a new paradigm based on Edge Computing technologies and on-device Artificial Intelligence significantly improve the latency and privacy issues. Applying this new paradigm to personalised healthcare architectures can significantly improve their efficiency and efficacy. Therefore, this paper reviews existing IoT healthcare architectures that utilise wearable devices and subsequently presents a scalable and modular system architecture to leverage emerging technologies to solve identified shortcomings. The defined architecture includes ultrathin, skin-compatible, flexible, high precision piezoelectric sensors, low-cost communication technologies, on-device intelligence, Edge Intelligence, and Edge Computing technologies. To provide development guidelines and define a consistent reference architecture for improved scalable wearable IoT-based critical healthcare architectures, this manuscript outlines the essential functional and non-functional requirements based on deductions from existing architectures and emerging technology trends. The presented system architecture can be applied to many scenarios, including ambient assisted living, where continuous surveillance and issuance of timely warnings can afford independence to the elderly and chronically ill. We conclude that the distribution and modularity of architecture layers, local AI-based elaboration, and data packaging consistency are the more essential functional requirements for critical healthcare application use cases. We also identify fast response time, utility, comfort, and low cost as the essential non-functional requirements for the defined system architecture.
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Suresh Kumar Gundala. "Microservices Architecture: A Comprehensive Guide to Modern Distributed Systems." International Journal of Scientific Research in Computer Science, Engineering and Information Technology 11, no. 2 (2025): 37–45. https://doi.org/10.32628/cseit251112380.
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Microservices architecture has emerged as a transformative paradigm in modern software development, enabling organizations to build resilient and scalable distributed systems. This comprehensive exploration delves into the fundamental principles, implementation strategies, and real-world applications of microservices architecture. The architectural framework facilitates independent service deployment, enhanced fault isolation, and streamlined maintenance processes while promoting technology stack flexibility. Through the implementation of sophisticated monitoring patterns, testing strategies, and data consistency mechanisms, organizations can effectively address common challenges in distributed systems. The integration of enterprise architecture principles with microservices has demonstrated significant improvements in resource utilization, system reliability, and operational efficiency. The adoption of API gateway patterns, security frameworks, and containerization technologies further enhances system performance and scalability. Real-world applications, particularly in e-commerce platforms, showcase the practical benefits of microservices architecture in managing complex business operations while maintaining high availability and performance standards.
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Baikenych, Iryna-Anastasiia, and Yurii Shcherbyna. "SERVERLESS ARCHITECTURE OVERVIEW: AN IN-DEPTH EXPLANATION OF WHAT SERVERLESS ARCHITECTURE IS, ITS KEY COMPONENTS, BENEFITS, AND CHALLENGES." Grail of Science, no. 38 (April 29, 2024): 169–78. http://dx.doi.org/10.36074/grail-of-science.12.04.2024.028.
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Serverless architecture has emerged as a revolutionary paradigm in cloud computing, offering developers a scalable and cost-effective approach to building and deploying applications. This article provides a comprehensive overview of serverless architecture, focusing on its key components, benefits, challenges, and future trends. We delve into core components such as Function as a Service (FaaS), Backend as a Service (BaaS), and event-driven architecture, highlighting their roles in enabling developers to build highly scalable and responsive applications. Furthermore, we explore the benefits of serverless architecture, including cost-effectiveness, scalability, and improved development velocity, while also addressing challenges such as cold start latency, vendor lock-in, and observability and debugging complexities. Looking ahead, we discuss future trends and considerations in serverless architecture, including advancements in technology, hybrid and multi-cloud deployments, and the importance of observability and DevOps practices. Finally, we encourage further exploration and adoption of serverless computing, emphasizing its potential to drive innovation and business success in the digital era.
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Reynolds, Grahame, Xiongfei Jiang, Shiwei Wang, Alex Serb, Spyros Stathopolous, and Themis Prodromakis. "A Scalable, Multi-Core, Multi-Function, Integrated CMOS/Memristor Sensor Interface for Neural Sensing Applications." Electronics 14, no. 1 (2024): 30. https://doi.org/10.3390/electronics14010030.
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This paper presents the architecture, design, and testing results of a scalable, multi-core, multi-function sensor interface, integrating CMOS technology and memristor elements for efficient neuromorphic and bio-inspired analysis. The architecture leverages the high-density and non-volatile properties of memristors to support different analysis functions. Each processing core is equipped with hybrid CMOS/memristor arrays, enabling real-time parallel acquisition and analysis, and each can be configured independently. The system facilitates communication between cores and is fully scalable. The first implementation supports 16 input channels, storing 256 neural signal samples, and the second implementation supports 576 input channels, storing 9k neural signal samples.
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Virakwan Hai Kelian, Mohd Nazri Mohd Warip, R. Badlishah Ahmad, Phaklen Ehkan, Fazrul Faiz Zakaria, and Mohd Zaizu Ilyas. "Toward Adaptive and Scalable Topology in Distributed SDN Controller." Advanced Research in Applied Sciences and Engineering Technology 30, no. 1 (2023): 115–31. http://dx.doi.org/10.37934/araset.30.1.115131.
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The increasing need for automated networking platforms like the Internet of Things, as well as network services like cloud computing, big data applications, wireless networks, mobile Internet, and virtualization, has driven existing networks to their limitations. Software-defined network (SDN) is a new modern programmable network architectural technology that allows network administrators to control the entire network consistently and logically centralized in software-based controllers and network devices become just simple packet forwarding devices. The controller that is the network's brain, is mostly based on the OpenFlow protocol and has distinct characteristics that vary depending on the programming language. Its function is to control network traffic and increase network resource efficiency. Therefore, selecting the right controllers and monitoring their performance to increase resource usage and enhance network performance metrics is required. For network performance metrics analysis, the study proposes an implementation of SDN architecture utilizing an open-source OpenDaylight (ODL) distributed SDN controller. The proposed work evaluates the deployment of distributed SDN controller performance on three distinct customized network topologies based on SDN architecture for node-to-node performance metrics such as delay, throughput, packet loss, and bandwidth use. The experiments are conducted using the Mininet emulation tool. Wireshark is used to collect and analyse packets in real-time. The results obtained from the comparison of networks are presented to provide useful guidelines for SDN research and deployment initiatives.
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McCaughan, A. N., Y. Zhai, B. Korzh, et al. "The thermally coupled imager: A scalable readout architecture for superconducting nanowire single photon detectors." Applied Physics Letters 121, no. 10 (2022): 102602. http://dx.doi.org/10.1063/5.0102154.
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Although superconducting nanowire single-photon detectors (SNSPDs) are a promising technology for quantum optics, metrology, and astronomy, they currently lack a readout architecture that is scalable to the megapixel regime and beyond. In this work, we have designed and demonstrated such an architecture for SNSPDs, called the thermally coupled imager (TCI). The TCI uses a combination of time-of-flight delay lines and thermal coupling to create a scalable architecture that can scale to large array sizes, allows neighboring detectors to operate independently, and requires only four microwave readout lines to operate no matter the size of the array. We give an overview of how the architecture functions and demonstrate a proof-of-concept 32 × 32 imaging array. The array was able to image a free-space focused spot at 373 nm, count at 9.6 Mcps, and resolve photon location with greater than 99.83% distinguishability.
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Zhou, Shu Xun, Jie An, Jian Guo Yao, and Fei Hu. "Highly Scalable Flight Control Architecture for Small Autonomous Helicopter Using PC104/ARM Technology." Advanced Materials Research 748 (August 2013): 718–22. http://dx.doi.org/10.4028/www.scientific.net/amr.748.718.
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Autonomous helicopter flight presents challenges in flight control system design with scalability. In this paper, we present the integration architecture of hardware and software for the flight control system based TREX 600 helicopter. In order to enhance scalability, the flight control system uses the PC104 and the ARM which is exerted to process the measurement data, including the position, attitude, height etc. The flight control is developed based multi-loop decoupling PID control which is easy to be implemented. Finally, the flight control system is successfully verified in the actual autonomous flight control experiment.
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Zheng, Gui De, and Ming Chen. "A Scalable Routing Architecture for Resource Discovery in Cloud Computing." Advanced Materials Research 179-180 (January 2011): 203–11. http://dx.doi.org/10.4028/www.scientific.net/amr.179-180.203.
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Cloud Computing technology enables the sharing and collaborating of wide variety of resources. To fully utilize these resources, effective discovery techniques are necessities. Proposing and designing a resource discovery scheme based on Economic Agent. Base on the economic model and the technique in agent of grouping nodes sharing similar files to improve efficiency, this thesis suggests a resource discovery scheme based on economic agent, which is called EAGRD. Theoretical models on resource discovery are provided, under which EAGRD is compared with existing schemes theoretically. By controlling propagation of message into related communities, EAGRD improves time and network efficiency at the cost of topological maintenance overhead. Results from simulation demonstrate that this architecture is very effective in Cloud Computing resource discovery.
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Gilbert, Frank, Timo Vogt, and Norbert Wehn. "Architecture-driven voltage scaling for high-throughput turbo-decoders." Journal of Embedded Computing 1, no. 3 (2005): 391–402. https://doi.org/10.3233/emc-2005-00041.
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The outstanding forward error correction provided by Turbo-Codes made them part of today's and emerging communications standards. Therefore, efficient Turbo-Decoder architectures are important building blocks in communications systems. In this paper we present a scalable, highly parallel architecture for UMTS compliant Turbo decoding and apply architecture-driven voltage scaling to reduce the energy consumption. We will show that this approach adds some additional, more energy-efficient solutions to the design space of low power Turbo decoding systems. It can save up to 34% of the decoding energy per datablock under realistic voltage assumptions. We present throughput, area, and energy results for various degrees of parallelization based on synthesis on a 0.18 μm ASIC-technology library, which is characterized for two different supply voltages: nominal 1.8 V and nominal 1.3 V.
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Rathore, Nitin, and Anand Rajavat. "Scalable Edge Computing Environment Based on the Containerized Microservices and Minikube." International Journal of Software Science and Computational Intelligence 14, no. 1 (2022): 1–14. http://dx.doi.org/10.4018/ijssci.312560.
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The growing number of connected IoT devices and their continuous data collection will generate huge amounts of data in the near future. Edge computing has emerged as a new paradigm in recent years for reducing network congestion and offering real-time IoT applications. Processing the large amount of data generated by such IoT devices requires the development of a scalable edge computing environment. Accordingly, applications deployed in an edge computing environment need to be scalable enough to handle the enormous amount of data generated by IoT devices. The performance of MSA and monolithic architecture is analyzed and compared to develop a scalable edge computing environment. An auto-scaling approach is described to handle multiple concurrent requests at runtime. Minikube is used to perform auto-scaling operation of containerized microservices on resource constraint edge node. Considering performance of both the architecture and according to the results and discussions, MSA is a better choice for building scalable edge computing environment.
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Mantar, Haci A., Ibrahim T. Okumus, Junseok Hwang, and Steve J. Chapin. "A scalable intra-domain resource management architecture for DiffServ networks." Journal of High Speed Networks 15, no. 2 (2006): 185–205. https://doi.org/10.3233/hsn-2006-286.
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With the rapid growth of the Internet into a global communication and commercial infrastructure, the need for Quality of Services (QoS) in the Internet becomes more and more important. With a Bandwidth Broker (BB) support in each administrative domain Differentiated Services (DiffServ) is seen as a key technology for achieving QoS guarantees in a scalable, efficient, and deployable manner in the Internet. This paper presents the design and implementation of a new Bandwidth Broker (BB) model to achieve QoS across a DiffServ domain. Our BB uses centralized network state maintenance and pipe-based intra-domain resource management schemes. The proposed model significantly reduces admission control time and minimizes scalability problems present in prior research while optimizing network resource utilization. The experimental results verify the achievements of our model.
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Richard, William D. "A Scalable Architecture for Real-Time Synthetic-Focus Imaging." Ultrasonic Imaging 30, no. 1 (2008): NP. http://dx.doi.org/10.1177/016173460803000101.
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Taylor, J., and B. Parvin. "A Scalable Approach to Teleoperation." Proceedings, annual meeting, Electron Microscopy Society of America 54 (August 11, 1996): 388–89. http://dx.doi.org/10.1017/s0424820100164404.
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Due to the fast pace of computer instrumentation and technology, we are quickly approaching an age where on-line use of expensive research facilities will become commonplace. The consequences of this trend will be multifaceted. It will allow scientist and researchers to perform experiments and access data with greater ease without the burden some overhead associated with working onsite. It will allow for the on-line storage and analysis of data. And lastly, an ideal testbed will be provided for integrating intelligent man-machine interfaces in order to reduce labor intensive tasks. This will simplify the control of complicated instruments via automation of the controls whose human control is not essential. Unfortunately, attempts at building a common platform for remote operation will face several problems. First of all, a successful general purpose architecture will frequently need to be extended in order to perform new functions as well as utilize new hardware. Similarly, the continued development of new microscopes, stage controls, etc. will undoubtedly create incompatible interfaces which will break presently working systems. Lastly, the environment that such a system will operate will likely be characterized by heterogeneous hardware and software. Based on the experience of building on-line systems for use of optical and electron microscopes, we propose a scalable system architecture based on the principles of object oriented design and analysis, a machine independent user- interface based on Java, and a software bus that supports distributed objects over the network.
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Mokkapati, Chandrasekhara, Punit Goel, and Anshika Aggarwal. "Scalable Microservices Architecture: Leadership Approaches for High-Performance Retail Systems." Darpan International Research Analysis 11, no. 1 (2023): 92–109. http://dx.doi.org/10.36676/dira.v11.i1.84.
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The rapid evolution of retail systems in the digital age necessitates the adoption of scalable microservices architectures to meet the demands of high-performance and responsive platforms. As the retail sector increasingly relies on technology to drive customer engagement, operational efficiency, and competitive advantage, the role of leadership in designing and implementing scalable microservices architectures becomes critical. This paper explores leadership approaches that are essential for guiding the successful deployment of microservices in high-performance retail systems.The shift from monolithic to microservices architectures represents a fundamental change in how retail systems are built and maintained. Microservices, characterized by their modularity, independence, and scalability, offer significant advantages over traditional monolithic architectures, particularly in handling the dynamic demands of modern retail environments. However, the successful implementation of microservices requires more than just technical expertise; it demands strategic leadership that understands the complexities of system design, cross-functional collaboration, and long-term maintenance.
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Chandrasekhara Mokka Pati, Prof.(dr.) Punit Goel, and Anshika Aggarwal. "Scalable Microservices Architecture: Leadership Approaches for High-Performance Retail Systems." Modern Dynamics: Mathematical Progressions 1, no. 2 (2024): 58–71. http://dx.doi.org/10.36676/mdmp.v1.i2.11.
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The rapid evolution of retail systems in the digital age necessitates the adoption of scalable microservices architectures to meet the demands of high-performance and responsive platforms. As the retail sector increasingly relies on technology to drive customer engagement, operational efficiency, and competitive advantage, the role of leadership in designing and implementing scalable microservices architectures becomes critical. This paper explores leadership approaches that are essential for guiding the successful deployment of microservices in high-performance retail systems. The shift from monolithic to microservices architectures represents a fundamental change in how retail systems are built and maintained. Microservices, characterized by their modularity, independence, and scalability, offer significant advantages over traditional monolithic architectures, particularly in handling the dynamic demands of modern retail environments. However, the successful implementation of microservices requires more than just technical expertise; it demands strategic leadership that understands the complexities of system design, cross-functional collaboration, and long-term maintenance.
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Seshendranath Balla Venkata. "Architecting Enterprise-Scale Data Products: A Framework for Advanced Data Science and AI/ML Operations." International Journal of Scientific Research in Computer Science, Engineering and Information Technology 10, no. 6 (2024): 1724–34. https://doi.org/10.32628/cseit241061218.
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This article presents a comprehensive framework for building enterprise-scale data products that power modern Customer & Product Analytics, Data Science, artificial intelligence, and machine learning initiatives. The article examines the foundational architecture patterns, pipeline engineering strategies, and advanced distributed computing approaches in both on-prem and cloud. These are essential for developing robust data infrastructure capable of handling complex Data Analytics, Data Science, and AI/ML workflows. The article explores critical aspects of feature engineering at scale, real-time processing capabilities, and the implementation of feature stores, while addressing the challenges of data quality, governance, legal, and security in regulated environments. The article introduces a systematic approach to integrating data products with MLOps pipelines, emphasizing the importance of automated workflows, monitoring systems, and feedback loops in production environments. The findings demonstrate that successful implementation of scalable data products requires a careful balance of architectural decisions, technology selection, and operational practices. The article contributes to the field by providing actionable insights and architectural patterns that organizations can adopt to build resilient, scalable, and efficient data products for their Data Analytics, Data Science, and AI/ML use cases. This article establishes a foundational framework that bridges the gap between theoretical data architecture principles and practical implementation challenges in enterprise settings.
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Chung, Sungwook, Eunsam Kim, and Jonathan Liu. "A scalable PVR-based content sharing architecture for community networks." IEEE Transactions on Consumer Electronics 54, no. 3 (2008): 1192–99. http://dx.doi.org/10.1109/tce.2008.4637606.
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Chang, Xiao Lin, Ji Qiang Liu, Bin Xing, and Zhong Lan Yuan. "Lightweight, Scalable and OS-Transparent Remote Attestation of Runtime Program." Applied Mechanics and Materials 198-199 (September 2012): 506–11. http://dx.doi.org/10.4028/www.scientific.net/amm.198-199.506.
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Secure channel technologies alone can not provide the sufficient protection to the server data as long as the server can not guarantee the trustworthiness of the client program which accesses the server. The current Trusted Computing solution offers the guarantee on the trustworthiness of the client program by evaluating the integrity of all executable elements on the client platform. However, this solution may not work effectively in the monolithic legacy and commodity operating system. This paper considers the remote attestation of program execution on the untrusted legacy platform. We propose an architecture, which (1) collects the run-time information of the client program in a secure, scalable and OS-transparent way, and (2) reports to the remote server the collected run-time information of the client program in a lightweight and secure way. The architecture achieves these features by exploiting the system virtualization technology, the existing VMI tools, and the time stamping functionality in TCG TPM. We give the detailed description of the architecture.
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Ghovanlooy Ghajar, Fatemeh, Javad Salimi Sratakhti, and Axel Sikora. "SBTMS: Scalable Blockchain Trust Management System for VANET." Applied Sciences 11, no. 24 (2021): 11947. http://dx.doi.org/10.3390/app112411947.
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With many advances in sensor technology and the Internet of Things, Vehicle Ad Hoc Network (VANET) is becoming a new generation. VANET’s current technical challenges are deploying decentralized architecture and protecting privacy. Because Blockchain features are decentralized, distributed, mass storage, and non-manipulation features, this paper designs a new decentralized architecture using Blockchain technology called Blockchain-based VANET. Blockchain-based VANET can effectively resolve centralized problems and mutual distrust between VANET units. To achieve this, it is needed to provide scalability on the blockchain to run for VANET. In this system, our focus is on the reliability of incoming messages on the network. Vehicles check the validity of the received messages using the proposed Bayesian formula for trust management system and some information saved in the Blockchain. Then, based on the validation result, the vehicle computes a rate for each message type and message source vehicle. Vehicles upload the computed rates to Roadside Units (RSUs) in order to calculate the net reliability value. Finally, RSUs using a sharding consensus mechanism generate blocks, including the net reliability value as a transaction. In this system, all RSUs collaboratively maintain the latest updated Blockchain. Our experimental results show that the proposed system is effective, scalable and dependable in data gathering, computing, organization, and retrieval of trust values in VANET.
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Mehmood, Rashid, and Raad Alturki. "A scalable multimedia QoS architecture for ad hoc networks." Multimedia Tools and Applications 54, no. 3 (2010): 551–68. http://dx.doi.org/10.1007/s11042-010-0569-0.
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Hatirnaz, İ., F. K. Gürkaynak, and Y. Leblebici. "A Modular and Scalable Architecture for the Realization of High-speed Programmable Rank Order Filters Using Threshold Logic." VLSI Design 11, no. 2 (2000): 115–28. http://dx.doi.org/10.1155/2000/98945.
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We present a new scalable architecture for the realization of fully programmable rank order filters (ROF). Capacitive Threshold Logic (CTL) gates are utilized for the implementation of the multi-input programmable majority (voting) functions required in the architecture. The CTL-based realization of the majority gates used in the ROF architecture allows the filter rank as well as the window size to be user-programmable, using a much smaller silicon area, compared to conventional realizations of digital median filters. The proposed filter architecture is completely modular and scalable, and the circuit complexity grows only linearly with maximum window size (m) and with word length (n). A prototype of the proposed filter circuit has been designed and fabricated using double-polysilicon 0.8 μm CMOS technology. Detailed post-layout simulations and test results of the ROF prototype circuit indicate that the new architecture can accommodate sampling clock rates of up to 50 MHz, corresponding to an effective data processing rate of 800 Mb/s for a very large filter with window size 63 and word length of 16 bits.
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Alhaisoni, Majed, Mohammed Ghanbari, and Antonio Liotta. "Scalable P2P Video Streaming." International Journal of Business Data Communications and Networking 6, no. 3 (2010): 49–65. http://dx.doi.org/10.4018/jbdcn.2010070103.
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P2P networks are a technology able to deliver real time and video-on-demand services over IP networks. Layered video coding techniques are being introduced due to their ability to deliver streams at different scales (temporal, spatial and SNR) that solve the heterogeneity problem. This eases transmission in the case of limited bandwidth, as the devices can pick and decode the minimum bit rate base layer. Existing work examines layered video in client-server scenarios. In contrast, this paper analyzes scalable coding H.264/SVC over P2P networks based on an SNR-temporal Codec. Due to the interdependency between the different SVC layers, issues of reliability and quality of experience arise unless proper measures are taken to protect the base layer. The authors explore the effectiveness of a combination of P2P strategies, for example, hybrid P2P architecture, P2P locality, and P2P redundancy, to assess the viability and benefits of scalable video coding over P2P. The resulting performance is compared with a state-of-the-art P2P TV platform.
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Rao, Lila, Maurice McNaughton, and Sameer Verma. "Towards a Scalable Digital Skills Training Architecture for Resource-Constrained Environments: The Case of Ayitic Goes Global in Haiti." Communications of the Association for Information Systems 52 (2023): 966–87. http://dx.doi.org/10.17705/1cais.05245.
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In developing countries such as Haiti, which are marked by high unemployment and gender inequality, online education has the potential to change lives. Returns on education are particularly high in Information Communications Technology (ICT)-intensive jobs and IT outsourcing offers opportunities for remote employment, providing alternatives for economic diversification and job creation that are particularly relevant for youth and women. However, the problem faced by many developing countries, is that traditional models, frameworks, architectures, and platforms for online learning do not lend themselves well to their context and, therefore, it is important to develop context-specific platforms. This need for suitable platforms has motivated the research question that this paper seeks to address, that is: What is the appropriate architecture that supports learning strategies for delivering scalable digital skills training in a resource-constrained environment? We propose an architecture that was developed specifically for blended learning in resource-constrained environments and describe how a prototype for this was designed, built, and deployed in Haiti. The initial responses to the application of the architecture, including the testimonials of the participants and the interest expressed by other countries of the region in adopting the proposed architecture, have been extremely positive.
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Wang, Lu Feng. "Design and Implementation of E-Commerce System Based on SOA." Advanced Materials Research 433-440 (January 2012): 5500–5505. http://dx.doi.org/10.4028/www.scientific.net/amr.433-440.5500.
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Through the in-depth study on a variety of existing E-Commerce system building technologies, in the use of mature and stable JZEE multi-tier architecture, combined with the emerging Web services technology and Web services dynamic combination technology, this paper designs and implements a comprehensive Enterprise-Class E-Commerce transaction platform based Service-Oriented architecture. This design is simple, flexible and strongly scalable, that is, when the business needs and business process changes, the system just needs to be simply adjusted to complete the application software updates, so it has high practical value.
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Acher, Georg, Detlef Fliegl, and Thomas Fuhrmann. "A Software and Hardware IPTV Architecture for Scalable DVB Distribution." International Journal of Digital Multimedia Broadcasting 2009 (2009): 1–9. http://dx.doi.org/10.1155/2009/617203.
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Many standards and even more proprietary technologies deal with IP-based television (IPTV). But none of them can transparently map popular public broadcast services such as DVB or ATSC to IPTV with acceptable effort. In this paper we explain why we believe that such a mapping using a light weight framework is an important step towards all-IP multimedia. We then present the NetCeiver architecture: it is based on well-known standards such as IPv6, and it allows zero configuration. The use of multicast streaming makes NetCeiver highly scalable. We also describe a low cost FPGA implementation of the proposed NetCeiver architecture, which can concurrently stream services from up to six full transponders.
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Krishna, Mohan Pitchikala. "Serverless Architecture: Transforming Application Development for the Next Generation." European Journal of Advances in Engineering and Technology 10, no. 5 (2023): 94–97. https://doi.org/10.5281/zenodo.13320171.
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In the past, most software development followed monolithic and server-centric architectures, meaning developers had to handle everything from provisioning to managing and scaling servers. This process was often time-consuming and prone to errors, leading to inefficiencies and increased costs for businesses. Serverless architecture was developed to address these issues, making it easier to develop and deploy applications by handling infrastructure tasks such as monitoring and managing servers. This approach is not only cost-effective but also allows applications to scale easily when needed. Many serverless providers have now emerged, offering solutions that take care of tasks like server provisioning, patching, and capacity planning. This allows developers to focus on creating valuable features. Many companies are moving towards serverless architectures because of the advantages and availability they offer. Like any technology, serverless architecture has some drawbacks. However, it has significantly changed how applications are developed by providing a scalable, cost-efficient, and simplified deployment method that overcomes these drawbacks. This paper will explore the concept of serverless architecture, its core principles, benefits and challenges. We will also discuss a case study showing how moving to serverless architecture benefited a company and when it is recommended for a company to adopt serverless architecture.
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Merolla, Paul A., John V. Arthur, Rodrigo Alvarez-Icaza, et al. "A million spiking-neuron integrated circuit with a scalable communication network and interface." Science 345, no. 6197 (2014): 668–73. http://dx.doi.org/10.1126/science.1254642.
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Inspired by the brain’s structure, we have developed an efficient, scalable, and flexible non–von Neumann architecture that leverages contemporary silicon technology. To demonstrate, we built a 5.4-billion-transistor chip with 4096 neurosynaptic cores interconnected via an intrachip network that integrates 1 million programmable spiking neurons and 256 million configurable synapses. Chips can be tiled in two dimensions via an interchip communication interface, seamlessly scaling the architecture to a cortexlike sheet of arbitrary size. The architecture is well suited to many applications that use complex neural networks in real time, for example, multiobject detection and classification. With 400-pixel-by-240-pixel video input at 30 frames per second, the chip consumes 63 milliwatts.
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Mohan Babu Talluri Durvasulu. "Understanding Network File Systems (NFS): Architecture, Variations, and Implementation." International Journal of Scientific Research in Computer Science, Engineering and Information Technology 11, no. 1 (2025): 2045–54. https://doi.org/10.32628/cseit251112210.
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Network File System (NFS) represents a critical technology in distributed computing, evolving significantly since its inception by Sun Microsystems. This comprehensive article explores the architectural framework, performance characteristics, and implementation strategies of NFS across various protocol versions and enterprise environments. The article delves into technical considerations including network optimization, security mechanisms, and storage efficiency, highlighting how modern NFS implementations deliver robust, scalable, and secure distributed storage solutions that meet the complex demands of contemporary computing infrastructures.
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Abrar O. Alkhamisi and Fathy Alboraei, Abrar O. Alkhamisi and Fathy Alboraei. "Privacy-aware Decentralized and Scalable Access Control Management for IoT Environment." journal of king abdulaziz university computing and information technology sciences 8, no. 1 (2019): 71–84. http://dx.doi.org/10.4197/comp.8-1.7.
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In recent years, the Internet of Things (IoT) plays a vital role in our daily activities .Owing to the increased number of vulnerabilities on the IoT devices, security becomes critical in the untrustworthy IoT environment. Access control is one of the top security concerns, however, implementing the traditional access control mechanisms in the resource-constrained nature of the IoT devices is a challenging task. With the emergence of blockchain technology, several recent research works have focused on the adoption of blockchain in IoT to resolve the security concerns. Despite, integrating the blockchain in the resource-constrained IoT context is difficult. To overcome these obstacles, the proposed work presents a privacy-aware IoT security architecture to ensure the access control based on Smart contract for resource-constrained and distributed IoT devices. The design of the proposed architecture incorporates three main components such as the contextual blockchain gateway, decentralized revocation manager, and non-interactive zero-knowledge proof based validation. By modeling the contextual blockchain gateway, the proposed architecture ensures the dynamic authentication and authorization based on the contextual information and access policies. Instead of integrating the blockchain technology into resource-constrained IoT devices, the smart contract-based distributed access control system with the contextual blockchain gateway provides the scalable solution. With the association of decentralized revocation manager in the smart contract, it prevents the resource access from the unauthorized users by dynamically generating and updating the revoked user list of all the nodes in the smart contract. Moreover, the proposed architecture employs the non-interactive zeroknowledge proof cryptographic protocol to ensure the transaction privacy within the smart contract. Consequently, it maintains the trade-off between the transparency and privacy while ensuring the security for the distributed IoT environment.
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Elagib, Sara B., Aisha-Hassan A. Hashim, and R. F. Olanrewaju. "A Proposed Architecture for Generic and Scalable CDR Analytics Platform Utilizing Big Data Technology." Advanced Science Letters 23, no. 11 (2017): 11149–52. http://dx.doi.org/10.1166/asl.2017.10239.
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Li, Da Chuan, Qing Li, Nong Cheng, and Jing Yan Song. "SOA-Cloud Computing Based Fast and Scalable Simulation Architecture for Advanced Flight Management System." Advanced Materials Research 1016 (August 2014): 471–77. http://dx.doi.org/10.4028/www.scientific.net/amr.1016.471.
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This paper presents a SOA and cloud computing based architecture for the distributed simulation of advanced flight management system (FMS). The architecture is designed to facilitate the fast simulation, validation and evaluation of different FMS system designs and functionalities with customized system configurations and widely varying aircraft equipage levels under various operation conditions. It is also intended to accommodate the potential evolutionary extensions of new avionics concepts and functionalities such as the future CNS/ATM and 4-D trajectory based technologies. To address the requirements of flexibility, scalability and reusability, the design of the simulation architecture takes advantage of the cloud computing and service oriented architecture (SOA) and the key enabling technologies are developed: simulation unit service encapsulation, simulation agent technology and simulation orchestration. Based on the proposed architecture associated technologies, the simulation components are encapsulated as services or accessed through agents, and the configuration of different FMS system frameworks and simulation tasks can be achieved through simulation orchestration. A prototype avionic simulation system that implements the SOA/cloud computing architecture is developed and illustrated with application cases. The applications demonstrate that the proposed architecture enables fast and scalable simulation of both existing and new FMS design and technologies.
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Malviya, Rajendra Kumar. "A secure and Scalable iot Framework using tiered Blockchain Technology: Challenges and Solutions." International Journal of Information Technology and Management 19, no. 1 (2024): 272–79. https://doi.org/10.29070/rewc9a22.
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The Internet of Things (IoT) has experienced massive growth in recent years, which has resulted in considerable issues in terms of data integrity, scalability, and security. The traditional architectures that are centralised have a difficult time managing the increasing number of devices that are connected to one another while maintaining trust and efficiency. However, the significant processing cost and scalability concerns that blockchain technology presents present constraints for Internet of Things applications. Blockchain technology provides a system that is both decentralised and immune to tampering. In order to overcome these difficulties, this article provides a framework for the Internet of Things that is both safe and scalable, and it makes use of a layered blockchain architecture. Multiple blockchain layers are integrated into the framework. At the edge, a lightweight and high-speed blockchain is responsible for managing Internet of Things transactions. At the centre, a more robust blockchain is responsible for ensuring the integrity and security of data. Through the utilisation of this hierarchical technique, transaction processing efficiency is improved, latency is decreased, and resource utilisation is maximised. The most important technological difficulties, such as consensus procedures, data management, interoperability, and energy efficiency, are studied by us. In addition to this, we investigate potential solutions such as lightweight cryptographic protocols, optimised consensus algorithms, and cross-chain communication methods. Based on the results of performance testing, the framework that has been suggested is a suitable option for Internet of Things applications that are used in the real world since it enhances security, scalability, and efficiency.
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Patel, Jay, and Harshal Shah. "Creating Safe and Secure AI- From Computer Design to Cloud Technology." INTERNATIONAL RESEARCH JOURNAL OF ENGINEERING & APPLIED SCIENCES 9, no. 4 (2021): 54–59. https://doi.org/10.55083/irjeas.2021.v09i04012.
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As AI technologies quickly develop and infiltrate different industries, guaranteeing their safety and security has become crucial. This article offers an in-depth analysis of the structures, methods, and optimal techniques required for creating safe and secure AI systems. The conversation covers various fields, such as computer architecture, data management, and cloud computing. We examine the difficulties and weaknesses present in conventional architectures and determine how contemporary AI systems can mitigate these shortcomings. In particular, the document emphasizes the need for implementing secure coding methods, strong data governance, and ongoing oversight of AI systems to reduce risks linked to adversarial attacks and data leaks. Additionally, we address the importance of cloud computing in delivering scalable resources for AI advancement while stressing the necessity for secure cloud infrastructures. This paper presents a comprehensive method for developing AI systems that can withstand threats by combining secure software engineering principles with machine learning. Utilizing case studies and empirical evidence, we demonstrate the efficacy of different security measures and architectural designs in practical applications. In conclusion, this project seeks to offer a guide for researchers and professionals in the AI sector, directing them to develop systems that not only operate efficiently but also maintain the utmost levels of safety and security. As artificial intelligence influences our future, it is crucial to emphasize the creation of technologies that foster trust and protect user interests.
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Alasmary, Hisham. "ScalableDigitalHealth (SDH): An IoT-Based Scalable Framework for Remote Patient Monitoring." Sensors 24, no. 4 (2024): 1346. http://dx.doi.org/10.3390/s24041346.
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Addressing the increasing demand for remote patient monitoring, especially among the elderly and mobility-impaired, this study proposes the “ScalableDigitalHealth” (SDH) framework. The framework integrates smart digital health solutions with latency-aware edge computing autoscaling, providing a novel approach to remote patient monitoring. By leveraging IoT technology and application autoscaling, the “SDH” enables the real-time tracking of critical health parameters, such as ECG, body temperature, blood pressure, and oxygen saturation. These vital metrics are efficiently transmitted in real time to AWS cloud storage through a layered networking architecture. The contributions are two-fold: (1) establishing real-time remote patient monitoring and (2) developing a scalable architecture that features latency-aware horizontal pod autoscaling for containerized healthcare applications. The architecture incorporates a scalable IoT-based architecture and an innovative microservice autoscaling strategy in edge computing, driven by dynamic latency thresholds and enhanced by the integration of custom metrics. This work ensures heightened accessibility, cost-efficiency, and rapid responsiveness to patient needs, marking a significant leap forward in the field. By dynamically adjusting pod numbers based on latency, the system optimizes system responsiveness, particularly in edge computing’s proximity-based processing. This innovative fusion of technologies not only revolutionizes remote healthcare delivery but also enhances Kubernetes performance, preventing unresponsiveness during high usage.