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Dissertations / Theses on the topic 'SCAU architecture'

Author: Grafiati

Published: 28 July 2024

Last updated: 31 July 2025

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1

Samaranayake, Samitha 1978. "A reconfigurable shared scan-in architecture." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/87890.

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Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.<br>Includes bibliographical references (p. 97-100).<br>by Samitha Samaranayake.<br>M.Eng.

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2

Hassan, Abu S. M. (Abu Saleem Mahmudul). "Testing of board interconnects using boundary scan architecture." Thesis, McGill University, 1989. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=74304.

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The testing of printed circuit board (PCB) interconnects is a complex task that requires enormous amount of resources. With the increasing use of new technologies like surface mounting technology (SMT), testing PCB interconnects using the available techniques, like in-circuit testing and functional testing, is becoming very difficult. To make testing manageable, it must be considered earlier in the design process. This is known as 'design for testability' (DFT). A hierarchical DFT approach known as boundary scan architecture has recently become an increasingly attractive solution for PCB inter

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3

Medhat, Saad Sabih Ahmed. "High level behavioural modelling of boundary scan architecture." Thesis, Bournemouth University, 1993. http://eprints.bournemouth.ac.uk/324/.

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This project involves the development of a software tool which enables the integration of the IEEE 1149.1/JTAG Boundary Scan Test Architecture automatically into an ASIC (Application Specific Integrated Circuit) design. The tool requires the original design (the ASIC) to be described in VHDL-IEEE 1076 Hardware Description Language. The tool consists of the two major elements: i) A parsing and insertion algorithm developed and implemented in 'C'; ii) A high level model of the Boundary Scan Test Architecture implemented in 'VHDL'. The parsing and insertion algorithm is developed to deal with ide

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4

Paone, Eduardo. "Open-Source SCA Implementation-EmbeddedandSoftware Communication Architecture : OSSIE and SCA Waveform Development." Thesis, KTH, Microelectronics and Information Technology, IMIT, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-24259.

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<p>Software Defined Radios (SDRs) are redefining the current landscape of wireless communications in both military and commercial sectors. The rapidly evolving capabilities of digital electronics are making it possible to execute significant amounts of signal processing on general purpose processors ratherthan using special-purpose hardware.</p><p>As a consequence of the availability of SDR, applications can be used to implement flexible communication systems in an operating prototype within a very short time. However, the initial lack of standards and design rules leads to incompatibility pro

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5

Sayed, Shereef. "Black-Box Fuzzing of the REDHAWK Software Communications Architecture." Thesis, Virginia Tech, 2015. http://hdl.handle.net/10919/54566.

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As the complexity of software increases, so does the complexity of software testing. This challenge is especially true for modern military communications as radio functionality becomes more digital than analog. The Software Communications Architecture was introduced to manage the increased complexity of software radios. But the challenge of testing software radios still remains. A common methodology of software testing is the unit test. However, unit testing of software assumes that the software under test can be decomposed into its fundamental units of work. The intention of such decomp

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6

Reijo, Stella. "Scan, Cut, Unfold : A Critical Analysis of The Swedish Review of Architecture." Thesis, KTH, Arkitektur, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-169196.

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I have zoomed in and out, cut and pasted, simplified and exaggerated my way through twelve shelf metres of Swedish architecture history. My ambition with this project has been to understand how Swedish architecture has been narrated in The Swedish Review of Architecture - tidskriften Arkitektur - during the 113 years the publication has existed. Has its "dramaturgy" changed and is this reflected in the development of Swedish design? Through using the architectural skills I have developed through my education, I was able to use the relatively simple, yet complex technique of photomontage as a m

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7

Hofmann, von Kap-herr Ulrich [Verfasser]. "SCA : strategische Corporate Architecture im Automobilvertrieb / Ulrich Hofmann von Kap-herr." Hannover : Technische Informationsbibliothek und Universitätsbibliothek Hannover (TIB), 2011. http://d-nb.info/1036525651/34.

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8

Bäckström, David. "Boundary-Scan in the ATCA standard." Thesis, Linköping University, Department of Computer and Information Science, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-3282.

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<p>Larger systems today, like telephone and optical switches, are usually based on a multiboard architecture where a set of printed-circuit boards are connected to a backplane board. These systems are also equipped with Boundary-Scan to enable testing, however, the backplane in a multi-board system has a limited wiring capability, which makes the additional backplane Boundary-Scan wiring highly costly. The problem is to access the Boundary-Scan enabled boards with the Boundary-Scan controller located at a central board. In this MSc. thesis project we propose an approach suitable for the Advanc

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9

Sitchinava, Nodari S. (Nodari Shalva) 1981. "Dynamic scan chains : a novel architecture to lower the cost of VLSI test." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/18034.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.<br>Includes bibliographical references (p. 61-64).<br>Fast developments in semiconductor industry have led to smaller and cheaper integrated circuit (IC) components. As the designs become larger and more complex, larger amount of test data is required to test them. This results in longer test application times, therefore, increasing cost of testing each chip. This thesis describes an architecture, named Dynamic Scan, that allows to reduce this cost by reducing the test data volu

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10

Ahwal, Saher B. "Optimizations to a massively parallel database and support of a shared scan architecture." Thesis, Massachusetts Institute of Technology, 2014. http://hdl.handle.net/1721.1/91454.

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Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.<br>34<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (pages 92-94).<br>This thesis presents a new architecture and optimizations to MapD, a database server which uses a hybrid of multi-CPU/multi-GPU architecture for query execution and analysis. We tackle the challenge of partitioning the data across multiple nodes with many CPUs and GPUs by means of an indexing framework. We implement a QuadTree spatial partitioning scheme and demonstrate ho

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11

Dackenberg, Jens. "Software Communication Architecture - Waveform Distribution with MHAL." Thesis, Linköping University, Communication Systems, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-58747.

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<p>For a long time radio devices have been constructed in hardware with a fixed functionality. This way of constructing radio devices is starting to change with the concept of Software Defined Radio (SDR) evolving. The SDR concept leads to more flexible and long lasting radio devices. In order to make the radio software more standardized and portable, the U.S. military has defined the Software Communication Architecture (SCA). Internal communication within the SCA is done by CORBA, which limit waveforms to be only distributed over CORBA-capable hardware. The U.S. military has defined the Modem

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12

Brukman, Louise Kathleen. "Reconfiguring the burnt scar: a landscape architectural response to the Knysna fires of June 2017." Master's thesis, University of Cape Town, 2018. http://hdl.handle.net/11427/27985.

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June 2017 will be remembered by South Africans for decades to come. A moment when Mother Nature showed her true power and the only options was to get out her path or watch in awe. Within 72hours 20 000 hectares of land and in excess of 800 homes were burnt in the Knysna region along the Garden Route. While fires are not uncommon in this area, this fire had all the conditions to make it 'The Perfect fire'. It was simply a matter of time for these conditions to align. This project begins with an understanding of conditions that caused the fire using the agent of time. Time, according to French p

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13

José, Costa Alves Diogo. "A logic built-in self-test architecture that reuses manufacturing compressed scan test patterns." Universidade Federal de Pernambuco, 2009. https://repositorio.ufpe.br/handle/123456789/1831.

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Made available in DSpace on 2014-06-12T15:52:41Z (GMT). No. of bitstreams: 1 license.txt: 1748 bytes, checksum: 8a4605be74aa9ea9d79846c1fba20a33 (MD5) Previous issue date: 2009<br>A busca por novas funcionalidades no que diz respeito a melhoria da confiabilidade dos sistemas eletrônicos e também a necessidade de gerir o tempo gasto durante o teste faz do mecanismo Built-in-Self-Test (BIST) um característica promissora a ser integrada no fluxo atual de desenvolvimento de Circuitos Integrados (IC). Existem vários tipos de BIST: Memories BIST, Logical BIST (LBIST) e também alguns mecanism

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Overby, Heather A. "Scan & Scansion: An Urban Residency for Poets & Artists Working in Collaboration." VCU Scholars Compass, 2018. https://scholarscompass.vcu.edu/etd/5374.

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Scansion is the act of discerning a poem’s meter and measure to discover its overall meaning. To achieve beauty in poetry, just as in interior design, content must continually be in conversation with form. And, just as a building must be scaled against the human figure to determine its final shape, a poem is scaled against human breath, the breadth of our sounds. Scan & Scansion is a Richmond-based residency with a six-month term providing a work, living and exhibition space to poets and artists who wish to work collaboratively across disciplines. As the program is essentially about applied po

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15

Low, Kian Wai. "Software Communications Architecture (SCA) compliant software defined radio design for IEEE 802.16 wirelessman-OFDMtm transceiver." Thesis, Monterey, Calif. : Naval Postgraduate School, 2006. http://bosun.nps.edu/uhtbin/hyperion.exe/06Dec%5FLow.pdf.

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Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, December 2006.<br>Thesis Advisor(s): Frank Kragh. "December 2006." Includes bibliographical references (p. 71-72). Also available in print.

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Ramdat, Upendra. "Software Communications Architecture (SCA) compliant software radio design for Interim Standard 95B (IS-95B) transceiver." Thesis, Monterey, Calif. : Naval Postgraduate School, 2007. http://bosun.nps.edu/uhtbin/hyperion.exe/07Mar%5FRamdat.pdf.

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Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, March 2007.<br>Thesis Advisor(s): Frank Kragh. "March 2007." Includes bibliographical references (p. 139-140). Also available in print.

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17

Wildeboer, Michele D. "Self-Help: Reconstructing Over-the-Rhine." Cincinnati, Ohio : University of Cincinnati, 2009. http://www.ohiolink.edu/etd/view.cgi?acc_num=ucin1235530307.

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Thesis (Master of Architecture)--University of Cincinnati, 2009.<br>Advisors: Udo Greinacher (Committee Chair), Robert Burnham (Committee Member), Michaele Pride (Committee Member). Title from electronic thesis title page (viewed May 2, 2009). Includes abstract. Keywords: Over-the-Rhine;inner-city architecture; community building; anti-gentrification; architectural salvage; mobile architecture; architecture; Cincinnati; SCAD; South Bronx; self-help housing; grassroots organization; construction training; breakdown of welfare. Includes bibliographical references.

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18

Berhault, Guillaume. "Exploration architecturale pour le décodage de codes polaires." Thesis, Bordeaux, 2015. http://www.theses.fr/2015BORD0193/document.

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Les applications dans le domaine des communications numériques deviennent de plus en plus complexes et diversifiées. En témoigne la nécessité de corriger les erreurs des messages transmis. Pour répondre à cette problématique, des codes correcteurs d’erreurs sont utilisés. En particulier, les Codes Polaires qui font l’objet de cette thèse. Ils ont été découverts récemment (2008) par Arıkan. Ils sont considérés comme une découverte importante dans le domaine des codes correcteurs d’erreurs. Leur aspect pratique va de paire avec la capacité à proposer une implémentation matérielle de décodeur. Le

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19

Leong, Wai Kiat Chris. "Software defined radio design for an IEEE 802.11A transceiver using open source Software Communications Architecture (SCA) implementation." Thesis, Monterey California. Naval Postgraduate School, 2006. http://hdl.handle.net/10945/10084.

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20

Dai, Wenbin. "On migration of scan cycle based PLC programs to distributed component-based event driven software architecture with semantic correctness assurance." Thesis, University of Auckland, 2012. http://hdl.handle.net/2292/19374.

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In current automation world, majority of systems are designed using programmable logic controllers (PLC) under the IEC 61131-3 standard. The IEC 61131-3 standard PLCs are struggling with increasing demand for reconfigurability and flexibility in distributed control systems. The IEC 61499 standard is considered as the key of enabling distributed and intelligent control into industrial automation. However, the use of the IEC 61499 standard in the automation industry is still minimal. Although advantages of replacing legacy systems with function block controlled systems are substantial, th

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21

GHOSH, SWAROOP. "SCAN CHAIN FAULT IDENTIFICATION USING WEIGHT-BASED CODES FOR SoC CIRCUITS." University of Cincinnati / OhioLINK, 2004. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1085765670.

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22

Chaudhuri, Sumanta. "Architectures des FPGAs asynchrones pour les applications cryptographiques." Phd thesis, Paris, ENST, 2009. https://pastel.hal.science/pastel-00006190.

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La cryptologie est un moyen de protéger la confidentialité, d'assurer l'intégrité, ou d'authentifier un système, tandis que la cryptanalyse est le moyen de retrouver l'information secrète. Les algorithmes cryptographiques modernes tels que AES ou DES sont impossibles à attaquer au niveau mathématique. La fuite d'information liée aux fonctionnements de ces machines est devenue un moyen puissant de cryptanalyse pour retrouver la clé secrète. Ces attaques sont connues sous le nom d'attaques par canaux cachés. Ce travail de thèse tente de trouver une réponse aux questions suivantes : • Existe t'il

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23

Chaudhuri, Sumanta. "Architectures des FPGAs Asynchrones pour les Applications Cryptographiques." Phd thesis, Télécom ParisTech, 2009. http://pastel.archives-ouvertes.fr/pastel-00006190.

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La cryptologie est un moyen de protéger la confidentialité, d'assurer l'intégrité, ou d'authentifier un système, tandis que la cryptanalyse est le moyen de retrouver l'information secrète. Les algorithmes cryptographiques modernes tels que AES ou DES sont impossibles à attaquer au niveau mathématique. La fuite d'information liée aux fonctionnements de ces machines est devenue un moyen puissant de cryptanalyse pour retrouver la clé secrète. Ces attaques sont connues sous le nom d'attaques par canaux cachés. Ce travail de thèse tente de trouver une réponse aux questions suivantes : * Existe t'il

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24

Colombo, Antony. "La micro-architecture de l'os trabéculaire en croissance : variabilité tridimensionnelle normale et pathologique analysée par microtomodensitométrie." Thesis, Bordeaux, 2014. http://www.theses.fr/2014BORD0291/document.

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L’imagerie médicale et la 3D, en pleine expansion dans le champ de l'anthropologie biologique, permettent d’explorer les structures internes tout en les préservant. L’étude de la micro-architecture osseuse trabéculaire permet d’appréhender la variabilité de l'os humain à une échelle jusqu'à présent peu explorée. Dans le cadre de cette recherche, cette variabilité est analysée et caractérisée en termes de croissance et de maturation, en fonction des critères individuels d’âge et de sexe, ainsi que dans des contextes pathologiques variés. Les images microtomodensitométriques des métaphyses humér

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Гордюк, Іван Васильович, та Ivan Vasilyevich Gordyuk. "Можливості наповнення BIM моделі додатковою інформацією за допомогою 3D сканування". Thesis, Національний авіаційний університет, 2018. http://er.nau.edu.ua/handle/NAU/37930.

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Можливості наповнення BIM моделі додатковою інформацією за допомогою 3D сканування в оцифруванні архітектурних об'єктів дає великі переваги: скорочення часу отримання просторових даних, немає потреби в спеціальних умовах для сканування, немає залежності від зовнішнього освітлення, велика мобільність за рахунок невеликих габаритів 3D скануючого устаткування. Іншою важливою перевагою є універсальність формату вихідних даних, які підтримуються сучасними CAD-програми, такі як Autodesk AutoCAD, Revit, Trimble RealWorks. Результати тривимірної точкової хмари дозволяють виміряти об'єкт за один раз,

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26

Segura, Salvador Albert. "High-performance and energy-efficient irregular graph processing on GPU architectures." Doctoral thesis, Universitat Politècnica de Catalunya, 2021. http://hdl.handle.net/10803/671449.

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Graph processing is an established and prominent domain that is the foundation of new emerging applications in areas such as Data Analytics and Machine Learning, empowering applications such as road navigation, social networks and automatic speech recognition. The large amount of data employed in these domains requires high throughput architectures such as GPGPU. Although the processing of large graph-based workloads exhibits a high degree of parallelism, memory access patterns tend to be highly irregular, leading to poor efficiency due to memory divergence.In order to ameliorate these issues,

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27

Ali, Cheikhmous. "Recherches sur les représentations architecturales dans la glyptique du Proche-Orient ancien." Phd thesis, Université de Strasbourg, 2012. http://tel.archives-ouvertes.fr/tel-00869944.

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Les représentations architecturales que nous donne à voir la glyptique du Proche-Orient ancien constituent une source primordiale d'informations sur l'art de bâtir dans cette région du IVe au Ier millénaire av. J.-C.,car les édifices, généralement en briques crue, sont la plupart du temps mal conservés. Le but de cette recherche est donc de recenser tous les motifs architecturaux présents sur sceaux ou sur empreintes et de les réunir dans un corpus qui sert de base à une vaste exploration de l'architecture mésopotamienne à travers son iconographie, les bâtiments trouvés en fouille, les formes

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28

Chok, Anna. "Khirbet el-Libneh : Études architecturale et archéologique des vestiges protobyzantins (Tartous - Syrie)." Thesis, Aix-Marseille, 2015. http://www.theses.fr/2015AIXM3031.

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Les premiers indices archéologiques de Khirbet el-Libneh ont été signalés en 1997 dans la zone industrielle de Tartous (sur la côte syrienne). Depuis, neuf campagnes de fouilles réalisées sous la direction de la D.G.A.M., entre 1998 et 2009, ont permis la découverte partielle d'un ensemble protobyzantin. Les vestiges dispersés sur un terrain de 11400 m² se composent essentiellement d'une grande salle basilicale ornée d'une mosaïque géométrique, d'un complexe agricole (des pressoirs à huile, de petits fours à pain et un moulin) et une citerne. Parmi les objets mis au jour les plus intéressants,

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Wibergh, Alexandra. "En digital publikations skapandeprocess : Dagens funktioner och framtidsvisioner." Thesis, Södertörns högskola, Institutionen för naturvetenskap, miljö och teknik, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:sh:diva-23580.

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Detta projekt har haft som syfte att producera och grafiskt formge det kommande numret av tidskriftsapplikationen Scandinavian Architectural Review för förlaget It Is Media Svenska AB i Stockholm. Skapandet har utgått från applikationens tidigare grafiska profil och har ämnat att följa tidigare utseende och funktioner utan nya tillägg. Hela produktionen har skapats genom Adobe InDesigns tilläggstjänst Adobe Digital Publishing Suite. Efter att produktionen färdigställts har en analys gjorts av den färdiga applikationen enligt en heuristisk utvärdering ur ett människa-datorinteraktionsperspektiv

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Dahman, Karim. "Gouvernance et étude de l'impact du changement des processus métiers sur les architectures orientées services : une approche dirigée par les modèles." Electronic Thesis or Diss., Université de Lorraine, 2012. http://www.theses.fr/2012LORR0241.

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La plupart des entreprises évoluent dans des marchés concurrentiels en adaptant rapidement leurs processus métiers. Leur performance dépend de leur capacité à utiliser des techniques d'amélioration continue de leur organisation par la mise au point de Systèmes Informatiques (SI) durables pour l'automatisation des processus. En ce sens, les architectures orientées services (Service Oriented Architectures) ont permis le développement de SI flexibles avec un style d'architecture prédominant de composition de services. Cependant, l'alignement de ces architectures aux impératifs de l'évolution des

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Dahman, Karim. "Gouvernance et étude de l'impact du changement des processus métiers sur les architectures orientées services : une approche dirigée par les modèles." Phd thesis, Université de Lorraine, 2012. http://tel.archives-ouvertes.fr/tel-00785771.

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La plupart des entreprises évoluent dans des marchés concurrentiels en adaptant rapidement leurs processus métiers. Leur performance dépend de leur capacité à utiliser des techniques d'amélioration continue de leur organisation par la mise au point de Systèmes Informatiques (SI) durables pour l'automatisation des processus. En ce sens, les architectures orientées services (Service Oriented Architectures) ont permis le développement de SI flexibles avec un style d'architecture prédominant de composition de services. Cependant, l'alignement de ces architectures aux impératifs de l'évolution des

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Gailliard, Grégory. "Vers une approche commune pour le logiciel et le matériel de spécification et d’implémentation des systèmes embarqués temps-réels distribués, basée sur les intergiciels et les composants orientés objet : Application aux modèles de composants Software Communications Architecture (SCA) et Lightweight Corba Component Model (LwCCM) pour les systèmes de radio logicielle." Cergy-Pontoise, 2010. http://biblioweb.u-cergy.fr/theses/2010CERG0518.pdf.

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Cette thèse s’intéresse à la déclinaison matérielle des concepts logiciels d’intergiciel et d’architecture logicielle à base de composants, conteneurs et connecteurs dans les réseaux de portes programmables in situ (Field-Programmable Gate Array - FPGA). Le domaine d’applications ciblé est la radio définie logiciellement (Software Defined Radio (SDR)) conforme au standard Software Communications Architecture) (SCA). Avec le SCA, les applications radio sont décomposées en composants fonctionnels, qui sont déployés sur des plateformes radios hétérogènes et distribuées. Ces composants fournissent

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Chiang, Yao-Ching, and 蔣耀慶. "Design Automation for Advanced Scan Architecture." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/03054028316289730445.

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碩士<br>國立成功大學<br>電機工程學系碩博士班<br>92<br>The most commonly used DFT technique for cell-based circuits is the scan-based design. However, because a typical ASIC today may contain more than one million logic gates, the test time and test volume have become two major concerns of the system-on-a-chip (SOC) testing. Advanced Scan Architecture (ASA) based on the previously developed input reduction method and a new zero aliasing output reduction method can significantly reduce the length of the necessary scan chain length with no fault coverage sacrificed for reducing the test time and test volume. 　　　　　

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Stone, Heather R. "Wound/ Healing/ Scar: an Urban School." 2007. http://etd.utk.edu/2007/StoneHeather.pdf.

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Zong-en, Yu. "Low Power Design of a Routing-Constrained Scan Architecture." 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1407200521105100.

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Yu, Zong-en, and 余宗恩. "Low Power Design of a Routing-Constrained Scan Architecture." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/03228675168913624831.

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碩士<br>國立臺灣大學<br>電機工程學研究所<br>93<br>Scan-based architectures are widely adapted in modern VLSI and SoC testing. Therefore reducing the expensive power consumption in testing procedure has become a primary concern. Recently, a low power scan chain design technique based on clustering and reordering of scan cells is proposed in [15], which effectively reduces the power consumption and the wire length. In this thesis, we improve this technique. With a more precise concern of the notion of weighted transitions, a better way to order scan cells is found. Moreover, a cluster reordering technique is in

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Chen, Rei-Lung, and 陳瑞嶸. "A Reconfigurable Broadcast Scan Architecture for SOC Test Platforms." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/89431789938542896232.

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碩士<br>國立成功大學<br>電機工程學系碩博士班<br>93<br>The number of intellectual property (IP) cores in a chip increases with the function complicating in SOC designs. The bottleneck of testing a system-on-a-chip (SOC) is the long test time arisen from the limited test data bandwidth between the tester and the SOC. 　　　A novel scan-based design technique called the “Reconfigurable Broadcast Scan Technique” is proposed in this thesis. This scan technique can be applied to the cores in an SOC without modifying the cores, and hence the number of scan chains of each core can be arbitrarily determined by the designe

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Tzeng, Chao-Wen, and 曾昭文. "Scan Architecture Supporting Low Power Test Compression and Easy Diagnosis." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/23127442066816387353.

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博士<br>國立清華大學<br>電機工程學系<br>97<br>Scan test has been an indispensable test methodology for guaranteeing test quality in industry. However, as the designs become larger and larger, the cost of scan test has been skyrocketing as the test data volume grows prohibitively high and thus increasing the test time proportionally. At the same time, excessive test power consumption is causing yield loss during the scan test. Moreover, diagnosis quality has degraded significantly when test compression is in use. In addition, it is often desirable to port the scan test methodology to a low cost indirect-acce

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Hsu, Che-Wei, and 許哲瑋. "Shared-scan and Locality-aware Scheduling Algorithm in Hadoop Architecture." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/35969556610567481476.

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碩士<br>淡江大學<br>資訊管理學系碩士班<br>102<br>Using different scheduling polices can affect the system performance in Hadoop architecture. In Hadoop architecture, the default scheduling policy is First-In-First-Out (FIFO). However, the FIFO scheduler simply schedule jobs according to their arrival time and does not consider any other factors that may have great impact on system performance. As a result, using FIFO cannot achieve good enough performance in Hadoop. In this paper, we propose a novel scheduling algorithm, called FSSL (FIFO with Shared-Scan and Locality-aware). FSSL is a scheduling policy base

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Yang, Chia-Kai, and 楊家凱. "Advanced Scan Architecture for Test Time and Test Volume Reductions." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/92263566111501235004.

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碩士<br>國立成功大學<br>電機工程學系碩博士班<br>91<br>Scan-based techniques are the most commonly used design for test (DFT) techniques for large digital circuits. However, long test time and large amount of test volume are two serious problems in a scan-based design. The above two problems will result in more demand on the expensive automatic test equipment (ATE) which acts as the test sources and sinks during testing. In this thesis, we propose an advanced scan architecture for test time and test volume reductions. The basic idea of this architecture is to shorten the scan chain length without using extra sca

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Kao, Che-Wei, and 高哲緯. "Design of Scan Architecture Targeted for Test Input/Output Compaction." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/50654158691508571245.

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Shyu, Hwai-Yan, and 許槐烟. "Design and Analysis of Routing-Aware Skew Probability Scan Chain Architecture." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/12679843316036969629.

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Tudu, Jaynarayan Thakurdas. "Power Issues in SoCs : Power Aware DFT Architecture and Power Estimation." Thesis, 2016. http://etd.iisc.ac.in/handle/2005/3003.

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Test power, data volume, and test time have been long-standing problems for sequential scan based testing of system-on-chip (SoC) design. The modern SoCs fabricated at lower technology nodes are complex in nature, the transistor count is as large as billions of gate for some of the microprocessors. The design complexity is further projected to increase in the coming years in accordance with Moore's law. The larger gate count and integration of multiple functionalities are the causes for higher test power dissipation, test time and data volume. The dynamic power dissipation during scan testing,

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Tudu, Jaynarayan Thakurdas. "Power Issues in SoCs : Power Aware DFT Architecture and Power Estimation." Thesis, 2016. http://hdl.handle.net/2005/3003.

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Test power, data volume, and test time have been long-standing problems for sequential scan based testing of system-on-chip (SoC) design. The modern SoCs fabricated at lower technology nodes are complex in nature, the transistor count is as large as billions of gate for some of the microprocessors. The design complexity is further projected to increase in the coming years in accordance with Moore's law. The larger gate count and integration of multiple functionalities are the causes for higher test power dissipation, test time and data volume. The dynamic power dissipation during scan testing,

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Rau, Jiann-Chyi, and 饒建奇. "Partitioning and Pseudo-Exhaustive Testing of VLSI Circuits Using Scan-Tree Test Architecture." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/62978614102159904696.

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博士<br>國立中正大學<br>資訊工程研究所<br>89<br>In this thesis, we first presents a new test architecture, called TLS (Tree-LFSR/SR), to more effectively generate pseudo-exhaustive test patterns for both combinational and sequential VLSI circuits. Instead of using a single scan chain, the proposed test architecture routes a scan tree driven by the LFSR (linear feedback shift register) to generate all possible input patterns for each output cone. The new test architecture is able to take advantages of both signal sharing a

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Jeng, Sheng-Yih, and 鄭昇益. "Automatic synthesis of boundary scan and BIST architectures for digital and analog circuits." Thesis, 1994. http://ndltd.ncl.edu.tw/handle/78615229875621494733.

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碩士<br>國立成功大學<br>電機工程研究所<br>82<br>Due to the rapid increase in the density of digital integrated circuit, the number of logic within a single chip has become extremely high. This makes the chips hard to test since there is little access to the internal circuit elements. Many digital Design-For-Testability (DFT) techniques has been developed to reduce the difficulty of test generation by increasing accessibility to internal elements of a circuit. Boundary Scan and BIST gain great popularity a

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Chen, Shih-Cheng, and 陳世政. "Design and Analysis of Efficient Scan Chain Architecture for Improving Code-Based Test Data Compression." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/97807109296453983104.

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Weng, Hung-Ming, and 翁宏銘. "Test Data and Test Time Reduction for LOS Transition Test in Multi-Mode Segmented Scan Architecture." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/68222248359088505127.

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碩士<br>中興大學<br>資訊科學系所<br>95<br>Launch-off-Shift (LOS) is a widely used technique for delay test in scan-based design. Test data compression for LOS patterns, however, is less efficient. In this paper, we analyze the reason for low compression rate in LOS patterns, and present an LOS test enabled scan architecture that supports three operation modes: broadcast, multicast, and serial. Efficient LOS test data compression can be achieved under this architecture with limited hardware overhead. An ATPG method for LOS test patterns under the proposed architecture is also presented. Experimental re

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Law, Pok-Man, and 羅博文. "An Enhanced Boundary Scan Architecture for Inter-Die Interconnect Leakage Measurement in 2.5D and 3D Packages." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/urmpwm.

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碩士<br>國立清華大學<br>電機工程學系所<br>105<br>3D-IC is a solution to achieve lower cost and higher performance as the transistor density doubles every 18 months following Moore’s law. In recent years, Integrated Fan-Out Wafer-Level Chip-Scale Packaging (InFO WLCSP) is one of the most promising packaging technologies for 3D-IC. In InFO WLCSP, there are some inter-die interconnects. We cannot access these interconnects directly. Therefore, it causes 1-2% test coverage loss. As a result, a built-in self-test (BIST) or other design-for-test (DFT) methodology is necessary to test these interconnects. It is eas

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Wu, Kuo-Yu, and 吳國瑜. "Design of Multi-Mode Broadcast under Skew Probability Scan Chain Architecture to Improve Test Data Compression Rate." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/57313189485643340230.

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