Dissertations / Theses on the topic 'Schottky-barrier'
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Brezeanu, Mihai. "Diamond Schottky barrier diodes." Thesis, University of Cambridge, 2008. https://www.repository.cam.ac.uk/handle/1810/226757.
Full textChern, Kevin Tsun-Jen. "GaInN/GaN Schottky Barrier Solar Cells." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/52899.
Full textPh. D.
Fröjdh, Christer. "Schottky barriers and Schottky barrier based device on Si and SiC /." Sundsvall, 1998. http://www.lib.kth.se/abs98/froj0302.pdf.
Full textDahlquist, Fanny. "Junction Barrier Schottky Rectifiers in Silicon Carbide." Doctoral thesis, KTH, Microelectronics and Information Technology, IMIT, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3367.
Full textThambirasa, Grace Padmini. "Study of Cu2O/Cu Schottky barrier junction." Thesis, Thambirasa, Grace Padmini (1985) Study of Cu2O/Cu Schottky barrier junction. PhD thesis, Murdoch University, 1985. https://researchrepository.murdoch.edu.au/id/eprint/52368/.
Full textYates, Kenneth Lee 1959. "Avalanche characteristics of silicide Schottky barrier diodes." Thesis, The University of Arizona, 1987. http://hdl.handle.net/10150/276634.
Full textBlasciuc-Dimitriu, Cezar. "Theoretical modelling of Schottky barrier diodes in SiC." Thesis, University of Newcastle Upon Tyne, 2004. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.405314.
Full textNgoepe, P. N. M. (Phuti Ngako Mahloka). "Optoelectronic characterisation of AlGaN based Schottky barrier diodes." Diss., University of Pretoria, 2013. http://hdl.handle.net/2263/24890.
Full textDissertation (MSc)--University of Pretoria, 2013.
Physics
unrestricted
Zhang, Min. "Modelling and fabrication of high performance Schottky barrier SOI-MOSFETs with low effective Schottky barriers." [S.l.] : [s.n.], 2006. http://deposit.ddb.de/cgi-bin/dokserv?idn=982694466.
Full textKorkmaz, Sibel. "Characterization Of Cds Thin Films And Schottky Barrier Diodes." Master's thesis, METU, 2005. http://etd.lib.metu.edu.tr/upload/12606623/index.pdf.
Full textand of the transmission analysis optical band gap was found to be around 2.4 eV. Temperature dependent conductivity measurements were carried out in the range of 180 K &ndash
400 K. The dominant conduction mechanism is identified as tunnelling between 180 K &ndash
230 K and thermionic emission between 270 K and 400 K. To produce Schottky devices, CdS thin films were deposited onto the tin-oxide and indium-tin-oxide coated glasses, by the same method. Gold, platinum, carbon and gold paste were used as metal front contact in these devices. The area of these contacts were about...... Temperature dependent current-voltage measurements between 200 K and 350 K, room temperature current-voltage measurements, capacitance-voltage measurement in the frequency range 1 kHz &ndash
1 MHz and photoresponse measurements were carried out for the characterization of these diodes. Ideality factor of the produced Schottky devices were found to be at least 1.5, at room temperature. Dominant current transport mechanism in the diodes with gold contacts was determined to be tunnelling from the temperature dependent current voltage analysis. Donor concentration was calculated to be about ........ from the voltage dependent capacitance measurement.
Magill, Stephen Hugh Samuel. "The application of Schottky barrier diodes to infrared imaging." Thesis, Queen's University Belfast, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.283889.
Full textNaredla, Sai Bhargav. "Electrical Properties of Molybdenum Silicon Carbide Schottky Barrier Diodes." Youngstown State University / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=ysu155901806279725.
Full textKummari, Rani S. "Improved SiC Schottky Barrier Diodes Using Refractory Metal Borides." Connect to resource online, 2009. http://rave.ohiolink.edu/etdc/view?acc_num=ysu1266422079.
Full textXu, Hui Park Minseo. "Fabrication and electrical/optical characterization of bulk GaN-based Schottky diodes." Auburn, Ala, 2009. http://hdl.handle.net/10415/1871.
Full textDiale, Mmantsae Moche. "Schottky barrier diode fabrication on n-GaN for ultraviolet detection /." Access to E-Thesis, 2009. http://upetd.up.ac.za/thesis/available/etd-02112010-211125/.
Full textBurnett, George Evan. "STATISTICAL YIELD AND PRELIMINARY CHARACTERIZATION OF SiC SCHOTTKY BARRIER DIODES." MSSTATE, 2001. http://sun.library.msstate.edu/ETD-db/theses/available/etd-04102001-093048/.
Full textKashefi-Naini, A. "A study of some transition metal-silicon Schottky barrier diodes." Thesis, University of Kent, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.375200.
Full textMorrison, Dominique Johanne. "The fabrication and characterisation of 4H-SiC Schottky barrier diodes." Thesis, University of Newcastle Upon Tyne, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.324784.
Full textDong, Longtao. "Development of an electrodeposited PdNi-Si Schottky barrier hydrogen sensor." Thesis, University of Southampton, 2015. https://eprints.soton.ac.uk/376508/.
Full textDiale, M. (Mmantsae Moche). "Schottky barrier diode fabrication on n-GaN for altraviolet detection." Thesis, University of Pretoria, 2010. http://hdl.handle.net/2263/28143.
Full textThesis (PhD)--University of Pretoria, 2010.
Physics
unrestricted
Maguire, Paul. "The characteristics of field effect transistors with Schottky barrier source and drain electrodes." Thesis, Queen's University Belfast, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.329351.
Full textMOONEY, JONATHAN MARTIN. "INVESTIGATION OF THE PROCESS OF INTERNAL PHOTOEMISSION IN PLATINUM SILICIDE SCHOTTKY BARRIER DIODES (DETECTOR, INFRARED)." Diss., The University of Arizona, 1986. http://hdl.handle.net/10150/188156.
Full textChe, Yulu. "Ambipolar Ballistic Electron Emission Microscopy Studies of Gate-field Modified Schottky Barriers." The Ohio State University, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=osu1282070943.
Full textArnold, John Christopher 1964. "Modification of Schottky diode performance due to ion bombardment." Thesis, The University of Arizona, 1989. http://hdl.handle.net/10150/277047.
Full textZhang, Zhen. "Integration of silicide nanowires as Schottky barrier source/drain in FinFETs." Doctoral thesis, Stockholm : Informations- och kommunikationsteknik, Kungliga Tekniska högskolan, 2008. http://www.diva-portal.org/kth/theses/abstract.xsql?dbid=4628.
Full textEvans, D. A. "The metal-indium phosphide (110) interface : Interactions and Schottky barrier formation." Thesis, Bucks New University, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.234721.
Full textKundeti, Krishna Chaitanya. "The Properties of SiC Barrier Diodes Fabricated with Ti Schottky Contacts." Youngstown State University / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=ysu1495150103584503.
Full textHardy, Philippa Kate. "Fabrication and characterisation of a nanocrystal activated Schottky barrier solar cell." Thesis, University of Leeds, 2014. http://etheses.whiterose.ac.uk/7517/.
Full textZhou, Yi Park Minseo. "Bulk gallium nitride based electronic devices Schottky diodes, Schottky-type ultraviolet photodetectors and metal-oxide-semiconductor capacitors /." Auburn, Ala., 2007. http://hdl.handle.net/10415/1401.
Full textHonda, S., H. Itoh, J. Inoue, H. Kurebayashi, T. Trypiniotis, C. H. W. Barnes, A. Hirohata, and J. A. C. Bland. "Spin polarization control through resonant states in an Fe/GaAs Schottky barrier." American Physical Society, 2008. http://hdl.handle.net/2237/11246.
Full textPenate, Quesada L. "Exploiting resistive macro to nano scale metal electrodes in Schottky barrier structures." Thesis, Queen's University Belfast, 2009. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.492515.
Full textPostoyalko, V. "The influence of interband states on the characteristics of Schottky barrier diodes." Thesis, University of Leeds, 1985. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.354437.
Full textPang, Zhengda. "Schottky contacts to indium phosphide and their applications." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp03/NQ30109.pdf.
Full textSchwarz, Mike. "Two-dimensional analytical predictive modeling of schottky barrier soi and multi-gate mosfets." Doctoral thesis, Universitat Rovira i Virgili, 2012. http://hdl.handle.net/10803/108995.
Full text王銘材. "PtSi Schottky barrier IR diode." Thesis, 1988. http://ndltd.ncl.edu.tw/handle/94072522588390831233.
Full textChang, Shih Sheng, and 張士陞. "Electronic transport and Schottky barrier." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/44636559529126505225.
Full text國立彰化師範大學
光電科技研究所
97
Carrier transport mechanisms and a barrier height of Ni contact to p-type GaN (p-GaN) with the structure of a transmission line model (TLM) were investigated from current-voltage measurements in this study. We find that the method can be adopted for p-GaN, especially in the case where high-quality ohmic contacts are difficult to make. Excellent agreement between simulated and measured data was obtained when the tunneling component in the transport current was taken into account. In addition, the result of the barrier-height calculation based on the reverse-bias thermionic field emission model for Ni/p-GaN samples with the TLM structures is similar to the result for conventional Ni/p-GaN Schottky diodes. That provides a rational guideline for the development of processing methodologies to estimate the barrier-height value for Schottky diodes without ohmic contacts.
Clifford, Jason Paul. "Colloidal Quantum Dot Schottky Barrier Photodetectors." Thesis, 2008. http://hdl.handle.net/1807/16746.
Full textChen, Yied-Fu, and 陳彥甫. "Study of Schottky Junctions and Schottky Barrier MOSFETs with Nickel Silicide." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/54643610127137716620.
Full text元智大學
電機工程學系
96
By eliminating the implanted Source/Drain junctions, the metallic Schottky barrier MOSFETs become attracting candidates in deep sub-50 nm regime. The objectives of this thesis are to simulate and analyze the Schottky barrier MOSFETs through two-dimensional device simulations, and to develop the dopant segregated Schottky Source/Drain junction with Nickle silicidation. Through this work, it is found that the insertion of the heavily doped segregation layers can effectively modify the Schottky bar-rier to significantly increase the driving on current and to suppress the ambipolar conduction behavior. Furthermore, the key dopant segregated techniques of Ni silicide technology are fabricated, and the effects of the dopant segregation layer on silicide metal-semiconductor contact are ob-served by measurements.
Yeh, Sheng-Pin, and 葉昇平. "Design and Application of Schottky Barrier MOSFETs." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/87228739301641072419.
Full text國立清華大學
電子工程研究所
97
As MOSFETs scale into nanoscale regime, extensively minimizing source/drain depth limits the improvement of driving drain current due to the increased series resistance. By eliminating implanted ultra-shallow junctions, the metallic Schottky Barrier MOSFET (SBMOS) becomes a most attracting candidate in deep sub-50 nm regime. The objective of this dissertation is to explore in depth the design and application of SBMOS devices using two-dimensional numerical simulations for the use of SBMOS in future CMOS technologies. The current-voltage characteristics of SBMOS are highly dependent on Schottky barrier height, source/drain to gate misalignment, and gate-oxide thickness. Ambipolar conduction of SBMOS can be optimized by an appropriate choice of these primary parameters. A dopant segregated layer can efficiently modify the Schottky barriers to suppress the off-state ambipolar conduction and simultaneously to enhance the on-state driving current. However, apparent degradations of ambipolar conduction in SBMOS are observed when a thin gate-insulator or a heavy halo profile is used for scaled short-channel devices. A novel Dual Workfunction Gate architecture is innovated to optimize SBMOS by tailoring Schottky barrier distributions through vertical gate engineering. An optimal SBMOS can be achieved with enhanced driving current, minimized ambipolar conduction and suitable short-channel effect. This study also elucidates the latent noise mechanisms in SBMOS devices. The complex noise problems in SBMOS arise from the particular ambipolar conduction and the additional interface states at metallic source/drain junctions. In addition to the excess noise of conventional MOSFETs, the interface traps at the metallic source/drain are keys to the overall noise characteristics of SBMOS. Most possible noise sources under various operating conditions are summarized herein to provide a comprehensive understanding of how noise potentially limits the practical applications of SBMOS devices.
Liang, Ji-Ting, and 梁紀庭. "Schottky Barrier Multibit Charge-Trapping Flash Memory." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/26348063641353357830.
Full textYu, Hsin-Lung, and 于鑫龍. "Study of Trench MOS Barrier Schottky Rectifier." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/83730016523016465709.
Full text國立臺灣科技大學
電子工程系
98
Improved barrier controlled power Schottky rectifiers are of interest for application in low-voltage switching mode power supplies for integrated circuits. For these applications, it is desirable to have rectifiers with very low forward drop and high switching speed. The forward voltage drop of a Schottky rectifier can be reduced by decreasing the Schottky barrier height. Unfortunately, a low barrier height results in a severe increase in leakage current and reduction in maximum operating temperature. Further, Schottky power rectifiers fabricated with barrier heights of less than 0.7 eV have been found to exhibit extremely soft breakdown characteristics which make them prone to failure. So there’re several Schottky structures to improve the conventional Schottky disadvantages such as JBS (Junction Barrier Schottky) rectifier and TMBS (Trench MOS Barrier Schottky) rectifier. However, JBS structure is difficult to scale down the device feature size to achieve forward drops below 250mV due to the dead-zone presented by P+ junction regions and the breakdown susceptibility of very shallow (<0.3�慆) junctions. Although TMBS structure has improved JBS dead-zone issue by using trench MOS technology, the conventional TMBS rectifier has MOS structure built into whole trench regions but there’s still trench bottom corner electric field crowding effect to restrict the reverse blocking capability. In this paper, a novel trench MOS barrier Schottky (TMBS) rectifier has been proposed by carrying out trench-bottom counter-doping implantation. By additionally implementing a counter-doped region enclosing the trench bottom, the reverse blocking voltage of the conventional TMBS rectifier can be significantly enhanced without considerable degradation of on-state characteristics. The large peak electric field in the corner of trench bottom, which limits the blocking voltage of the conventional TMBS rectifier, can be largely alleviated due to charge compensation. Though the counter-doped region enclosing the trench bottom may partly encroach into the mesa region, no considerable deterioration of on-state characteristics is caused. In this study, a too low-dose trench-bottom implantation cannot provide sufficient charge compensation, and a too high-dose trench-bottom implantation would create a large peak electric field below the trench bottom. As a result, a proper trench-bottom implantation may be employed to significantly enhance the blocking voltage without considerable degradation of on-state characteristics.
Chang, Wei, and 章緯. "Schottky Barrier Silicon Nanowire SONOS Flash Memory." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/02018208850287818702.
Full text國立清華大學
電子工程研究所
100
Silicon nanowire has attracted a growing interest from semiconductor industry to replace the bulk Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) memory in future cell scaling, system-on-chip, system-on-panel, and 3D integration applications. However, a relatively high gate voltage is still required for the conventional nanowire SONOS cell during programming or erasing. Aggressive scaling of operation voltage is much preferred to improve cell speed, energy dissipation, periphery circuitry, and cell reliability for the use in practical embedded or mobile applications. This dissertation presents an innovative Schottky barrier Silicon nanowire charge-trapping SONOS Flash memory cell, and performs a thorough study of its operations for use in future nonvolatile memory cell. Real silicon cell fabrications and in-depth measurements are performed to examine the programming, erasing and reading operations of this new memory cell incorporated with thermal retention and cycling reliability characterizations. By applying Schottky barrier source/drain to enhance electrical field in silicon gate-all-around nanowire, the nonvolatile Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) memory can operate at a gate voltage of 5 to 7V for programming, and -7 to -9V for erasing through Fowler-Nordheim tunneling. The larger gate voltage is, the faster programming/erasing speed and wider threshold-voltage shift are attained. Importantly, the Schottky barrier nanowire SONOS cells exhibit superior 100K cycling endurance and high-temperature retention without any damages from metallic silicidation process or field-enhanced tunneling. In addition, a localized programing and erasing scheme can be utilized to enhance the threshold voltage shift window in this Schottky barrier nanowire SONOS cell. The breakthrough in low-voltage programming and erasing operations with simple silicidation process make the Schottky barrier silicon nanowire SONOS cell very promising in future 3D integration, system-on-chip, and system-on-panel applications.
Shia, Ruei-Kai, and 夏瑞鍇. "Study of Short Recessed Channel Schottky Barrier MOSFETs." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/92204154405515488122.
Full text元智大學
電機工程學系
99
This thesis explores the current transport and device scaling of the recessed channel dopant segregated Schottky barrier MOSFETs (RC DS SBMOS). It also discusses an asymmetric source/drain structure of the RC DS SBMOS device to demonstrate a high on-current and suppress short-channel effect. The use of the dopant segregation layer reduces the parasitic resistance, caused by the recessed channel, to have a higher on-current of the recessed channel Schottky barrier MOSFETs. The recessed channel structure has a separate source, channel and drain region. The separately isolated drain region relieves the penetration of drain-side electrical field to have a suppressed short-channel effect. A halo implant profile helps to improve the scalability of Schottky barrier MOSFETs further. The asymmetric drain recessed structure enhances the driving on-current, and simultaneously, minimizes the short-channel effect to have an optimized RC DS SBMOS device for the use in future CMOS applications.
Luo, Yan-Xiang, and 羅彥翔. "Design and Simulation of Schottky Barrier Flash Memory." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/97333038717092396795.
Full text元智大學
電機工程學系
97
The standard floating gate Flash cells is the mainstream nonvolatile semiconductor memory. The challenges to future scaling are imposed by the non-scalable tunneling oxide and high voltage to provide sufficient drain-side hot electron injections. This study uses two-dimensional device simulator to present a novel Schottky barrier source/drain Flash memory cell with promising source-side hot electron injection. Rather than conventional cell, the unique Schottky barrier formed at source/channel interface significantly promotes the amount of source-side hot electrons to provide high injection efficiency at considerably low voltages without compromising between gate and drain biases. An optimal design of Schottky Barrier Flash cell is achieved using the dopant segregation layer, silicon-on-insulator substrate and dual workfunction gate with enhanced gate current.
Liu, Yuan-Heng, and 劉原亨. "Fabrication of 4H-SiC Junction Barrier Schottky Diode." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/77937083865545343484.
Full textBarlow, Mark D. "Metal-semiconductor contacts for schottky diode fabrication /." 2007. http://rave.ohiolink.edu/etdc/view?acc_num=ysu1198114671.
Full textHuang, Bo-Jhung, and 黃柏彰. "The Fabrication of Quasi Vertical Schottky Diode and Junction Barrier Schottky Diode GaN on Sapphire." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/84452802013149827757.
Full textLin, Shin-Wei, and 林仕尉. "Conductive transparent oxide applied to GaN Schottky barrier diodes." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/04735008512118252762.
Full textChien-ChunChen and 陳健群. "AlGaN-based Schottky Barrier Ultraviolet Photodetector with Micropillar Structures." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/71019778652652679160.
Full text國立成功大學
光電科學與工程研究所
98
In this study, we demomstrated a single AlGaN layer with two different Al contents on the GaN μ-pillars template. It was found by the selective wavelength spatial cathodoluminescence images that the emission wavelength of the AlGaN layer were at 340 and 320nm on the side of the cone and on the top and valley surface of pillars, respectively. The Schottky-type photodector were also demonstrated on double Al contents of deposited AlGaN on GaN micropillar template. The three steps of response occurred at about 326, 346, and 356nm with responsivities of 1.1×10-2, 5.9×10-3, and 4.04×10-3 A/W, respectively. However, the pits formation might arise from the lattice mismatch and the higher strain of AlGaN layer on sidewall of GaN pillar, resulting in the larger leakage current. In order to restrain the leakage current and improve the performances, we treated out the surface on sample with (NH4) 2Sx .We found that after (NH4) 2Sx treatment might result in a decrease in the carrier concentration and optical bandgap of ITO film. The effects of an (NH4) 2Sx treatment could change the properties of ITO films and form sulfide passivation for the enhancement of the schottky barrier height.
連敏宏. "The Application of Schottky-Barrier MOSFET with Ytterbium Silicide." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/83418020064988655231.
Full text國立交通大學
光電系統研究所
100
Ytterbium silicide was used to form the Schottky barrier source/drain (S/D) of N-channel MOSFETs. The device fabrication was performed at low temperature, which is highly preferred in the establishment of Schottky barrier S/D transistor (SSDT) technology, including the LaAlO3 (LAO) gate dielectric, and TaN metal gate. The YbSi2-x silicided N-SSDT is attributed to the lower electron barrier height and better film morphology of the YbSi2-x/Si contact compared with other metal silicide Schottky junctions. This thesis explores two low temperature technological developments related to future n-MOSFETs using silicon, germanium, or III-V semiconductors as channel materials. It was found that Yb/p-Si Schottky contact with rapid thermal annealing (RTA) at 600℃ for 30s has good rectifying characteristics, low effective electron barrier height, low sheet resistivity, atomically sharp junction with p-Si. These properties are suitable for source/drain (S/D) formation in n-MOSFETs. MOS capacitors were fabricated by dual E-gun deposition of LaAlO3 dielectric and PVD deposition of TaN electrode. The capacitors with well-behaved C-V and J-V characteristics with equivalent-oxide-thickness (EOT) = 1.48nm, gate leakage currents 3.18×10-2 A/cm2 for 400℃ RTA treated samples at Vfb-1V were achieved. The Schottky barrier MOSFETs are pitifully failed with various analyses. We hope that these analyses will be useful in the future.