Relevant bibliographies by topics / Self test

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  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Self test'

Author: Grafiati
Published: 4 June 2021
Last updated: 10 February 2022

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Journal articles on the topic "Self test"

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&NA;. "SELF-TEST." Nursing 24, no. 11 (November 1994): 71–75. http://dx.doi.org/10.1097/00152193-199411000-00025.

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HARALD, ELIZABETH A., and KATHLEEN KAUFMAN. "SELF-TEST." Nursing 25, no. 3 (March 1995): 68–70. http://dx.doi.org/10.1097/00152193-199503000-00024.

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&NA;. "Self-Test." Nursing 25, no. 8 (August 1995): 22–23. http://dx.doi.org/10.1097/00152193-199508000-00008.

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&NA;. "SELF-TEST." Nursing 25, no. 9 (September 1995): 22–24. http://dx.doi.org/10.1097/00152193-199509000-00010.

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&NA;. "Self-Test." Nursing 25, no. 8 (August 1995): 22–23. http://dx.doi.org/10.1097/00152193-199525080-00008.

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&NA;. "SELF-TEST." Nursing 23, no. 4 (April 1993): 91–93. http://dx.doi.org/10.1097/00152193-199304000-00025.

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&NA;. "SELF-TEST." Nursing 22, no. 10 (October 1992): 103–5. http://dx.doi.org/10.1097/00152193-199210000-00034.

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Smith, Sandra R., and Donna J. Ducll. "Self-Test." Nursing 22, no. 11 (November 1992): 94–101. http://dx.doi.org/10.1097/00152193-199211000-00031.

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&NA;. "SELF-TEST." Nursing 23, no. 1 (January 1993): 26–27. http://dx.doi.org/10.1097/00152193-199301000-00012.

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&NA;. "Self-Test." Nursing 23, no. 2 (February 1993): 87–90. http://dx.doi.org/10.1097/00152193-199302000-00026.

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Dissertations / Theses on the topic "Self test"

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Muradali, Fidel. "A self-driven test methodology for built-in self-test of sequential circuits /." Thesis, McGill University, 1996. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=42106.

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Test cost comprises a substantial portion of producing an integrated circuit. As a result, structural modifications of the circuit via design for test (DFT) techniques are commonly used as an aid to reduce test cost to the lowest possible level. One important class of DFT is Built-In Self-Test (BIST). In BIST, test generation and response analysis logic is integrated into the original circuit and are transparent during normal operation. In this manner, in-circuit tests can be performed with minimal need of external test equipment, if any.
Test strategies based on pseudorandom test stimuli are attractive since the simplicity of the pattern generation logic facilitates on-chip test application. Unfortunately, until now, these methods have been more appropriate for testing combinational rather than sequential circuits. This is largely because, unlike combinational testing, detection of sequential faults can require specific orderings of circuit operations which are prohibitively difficult to produce using a pseudorandom source.
This thesis introduces a new DFT technique which permits at-speed on-chip sequential testing using parallel pseudorandom test patterns applied only to the primary inputs of the circuit under test. Test network design focuses on adjusting fault free circuit activity and aiding error propagation. This is done via the strategic insertion of a small number of low area test points. The resulting system is unique in that aside from a test mode flag, all I/O signals needed for test system operation are tapped from within the circuit itself. This feature virtually eliminates the control signal generation logic typically needed in other test point strategies. Also, as opposed to the conventional approach of restricting circuit alterations to the state elements, the proposed flexibility in choosing modification sites is beneficial when considering speed constrained designs.
Experiments demonstrate that high single stuck-at fault coverage is achieved for a number of benchmark circuits.
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Muradali, Fidel. "A self-driven test methodology for built-in self-test of sequential circuits." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp02/NQ30348.pdf.

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Miller, Ashley K. "Examining the Errors and Self-Corrections on the Stroop Test." Cleveland State University / OhioLINK, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=csu1274111033.

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Zhang, Shujian. "Evaluation in built-in self-test." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp02/NQ34293.pdf.

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Prince, Ryan 1977. "A disposable, self-administered electrolyte test." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/18029.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.
Includes bibliographical references.
This thesis demonstrates the novel concept that it is possible to make a disposable, self-administered electrolyte test to be introduced to the general consumer market. Although ion specific electrodes have been used to perform point of care electrolyte tests in supervised health care environments since 1992, there has never been a personalized self-administered test available in a supermarket or convenience store. This thesis lays out a novel approach to adapting ion specific electrode technology to produce such a test. The suitability and method of integration of miniature ion-specific electrode technology has been analyzed and shown to be viable for such a purpose. A microelectronic chip has been specifically designed to interface to the sensor, perform the necessary calibration and decision making, and indicate the results to the user. It has been determined that the sensor, the electronics, and the supporting structures will be small and inexpensive enough to be included on a commercial sport drink bottle. The blueprints for this extension, including the selection and integration of a suitable power source, and method of result indication have been specified and shown to support this thesis.
by Ryan Prince.
M.Eng.
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Khalaf, Arkan. "A self-reconfigurable platform for built-in-self-test applications." Thesis, University of Ottawa (Canada), 2007. http://hdl.handle.net/10393/27865.

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This thesis introduces a novel architecture of a run-time reconfigurable microsystem on chip (SoC). This system consists of a logic block that can be reconfigured at run time, and an embedded multi-microprocessor system that connects to this logic block and can reconfigure it at run time using special resources of Field Programmable Gate Arrays (FPGA). A design flow for run-time reconfigurable logic circuits has been developed and is presented in the context of the implementation of the SoC on a FPGA. This reconfigurable architecture is validated by an application that implements the novel idea of verifying algorithms for testing digital circuits by using run-time reconfigurable techniques, in order to minimize circuit area, as well as test generation and application time. The idea revolves around the dynamic partial reconfiguration of circuits under test, in order to inject stuck-at faults at different locations of the circuit, to verify for and uncover logic structural faults. The thesis presents the design and implementation of a self-reconfigurable platform, where faults are injected at run-time to the circuit under test. It analyzes the ways of injecting faults and the run-time reconfiguration overhead associated with it, while the rest of the circuit is present on the reconfigurable architecture, in order to validate run-time reconfigurable built-in-self-test techniques, as compared to the more traditional methods.
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Olbrich, Thomas. "Design-for-Test and Built-In-Self-Test for integrated systems." Thesis, Lancaster University, 1996. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.312594.

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Ho, Thanh Huong. "Test compaction technique for built-in self-test in VLSI circuits." Thesis, University of Ottawa (Canada), 1994. http://hdl.handle.net/10393/6460.

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In recent years, many test output data compression techniques have been introduced, which reduce the storage requirements of reference signatures for the circuit under test. A major problem, however, is that the compression always results in loss of error coverage. This work proposes a space compression technique for digital circuits with the objective of minimizing the storage for the circuits under test while maintaining the fault coverage information. The technique introduced is called a Modified Dynamic Space Compression method. For a circuit under test, a compaction tree is generated based on its structure. The detectable error probability was calculated by using the Boolean Difference Method. The output data modification was employed to minimize the number of faulty output data patterns which have the same compressed form as the fault free patterns. The compressed outputs were then fed into a syndrome counter to derive the signature for the circuit. A design program is written in C language and executed on PC which combines the space compression, output data modification, and faults testing. Simulations were performed on known combinational circuits and the results indicate that the loss in fault coverage caused by compression is rather small.
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XIONG, XINGGUO. "BUILT-IN SELF-TEST AND SELF-REPAIR FOR CAPACITIVE MEMS DEVICES." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1123038236.

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Jervan, Gert. "Hybrid Built-In Self-Test and Test Generation Techniques for Digital Systems." Doctoral thesis, Linköping : Dept. of Computer and Information Science, Univ, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2994.

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Books on the topic "Self test"

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Miller, C. D. Paramedic national standards self test. 5th ed. Upper Saddle River, N.J: Pearson Prentice Hall, 2008.

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Paramedic national standards self test. 5th ed. Upper Saddle River, N.J: Pearson Prentice Hall, 2008.

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Gizopoulos, Dimitris, Antonis Paschalis, and Yervant Zorian. Embedded Processor-Based Self-Test. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4020-2801-4.

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Miller, C. D. Paramedic national standards self test. 5th ed. Upper Saddle River, N.J: Pearson Prentice Hall, 2008.

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Test your intelligence 2: 165 new intelligence tests. London: Blandford, 1990.

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Walker, Wilson L. The self-development test study guide. Manassas Park, VA: Impact Publications, 1994.

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Test your I.Q. New York: Wings Books, 1996.

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Test your I.Q. 2nd ed. New York: Arco, 1991.

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Test your I.Q. 4th ed. New York: Macmillan Reference USA, 1997.

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Sullivan, Norman. Test your IQ skills. New York: Quality Paperback Book Club, 1997.

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Book chapters on the topic "Self test"

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Weik, Martin H. "self-test." In Computer Science and Communications Dictionary, 1543. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_16913.

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Hansen, Lee D., Mark K. Transtrum, and Colette F. Quinn. "Self-test Questions." In SpringerBriefs in Molecular Science, 41–45. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-78250-8_7.

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Hansen, Lee D., Mark K. Transtrum, and Colette F. Quinn. "Self-test Key." In SpringerBriefs in Molecular Science, 47–49. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-78250-8_8.

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Wyld, Lynda, and Christos Markopoulos. "MCQ Self-Test." In Breast Cancer Management for Surgeons, 715–18. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-56673-3_64.

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Hunt, John. "Java Self-Test Examination." In Java for Practitioners, 499–517. London: Springer London, 1999. http://dx.doi.org/10.1007/978-1-4471-0843-6_43.

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Weik, Martin H. "power-on self-test." In Computer Science and Communications Dictionary, 1312. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_14421.

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Wang, Ran, and Krishnendu Chakrabarty. "Built-In Self-Test." In Testing of Interposer-Based 2.5D Integrated Circuits, 109–33. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-54714-5_5.

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Stanson, Anthony W., M. Habib Bouhaouala, Paul Legmann, and Lotfi Hendaoui. "Self-Assessment Questions (Test)." In Systemic Vasculitis, 479–83. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/174_2011_330.

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Kilgour, O. F. G. "Complete Course Self-test." In Work Out Biology GCSE, 291–314. London: Macmillan Education UK, 1987. http://dx.doi.org/10.1007/978-1-349-09450-9_16.

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Kunzmann, Arno, and Sven Kriebel. "Self-test with deterministic test pattern generators." In IFIP Advances in Information and Communication Technology, 377–88. Boston, MA: Springer US, 1995. http://dx.doi.org/10.1007/978-0-387-34920-6_39.

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Conference papers on the topic "Self test"

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Pathare, Rahul, Tejas Chopra, and Devrath Chatterjee. "Self-test circuits." In ICWET '10: International Conference and Workshop on Emerging Trends in Technology. New York, NY, USA: ACM, 2010. http://dx.doi.org/10.1145/1741906.1742211.

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Yilmaz, Mahmut, Derek Hower, Sule Ozev, and Daniel Sorin. "Self-Checking and Self-Diagnosing 32-bit Microprocessor Multiplier." In 2006 IEEE International Test Conference. IEEE, 2006. http://dx.doi.org/10.1109/test.2006.297634.

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Singh Gulshan, Maninder Bir, Bhavya Sharma, Manasvi Grover, and Prerna Gupta. "TSA: Self-Train Self-Test Algorithm." In 2020 IEEE International Conference for Innovation in Technology (INOCON). IEEE, 2020. http://dx.doi.org/10.1109/inocon50539.2020.9298410.

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Christi, Arpit, Alex Groce, and Rahul Gopinath. "Resource Adaptation via Test-Based Software Minimization." In 2017 IEEE 11th International Conference on Self-Adaptive and Self-Organizing Systems (SASO). IEEE, 2017. http://dx.doi.org/10.1109/saso.2017.15.

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Mazumder, P. "An integrated built-in self-testing and self-repair of VLSI/WSI hexagonal arrays." In Proceedings International Test Conference 1992. IEEE, 1992. http://dx.doi.org/10.1109/test.1992.527924.

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Jeong, Jae Woong, Jennifer Kitchen, and Sule Ozev. "A self-compensating built-in self-test solution for RF phased array mismatch." In 2015 IEEE International Test Conference (ITC). IEEE, 2015. http://dx.doi.org/10.1109/test.2015.7342414.

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Stroele, A. P. "Self-test scheduling with bounded test execution time." In Proceedings International Test Conference 1992. IEEE, 1992. http://dx.doi.org/10.1109/test.1992.527813.

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Sosnowski, Janusz. "Self-testing of microcontrollers in the field." In Test Symposium (EWDTS). IEEE, 2010. http://dx.doi.org/10.1109/ewdts.2010.5742137.

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Bhunia, Swarup, and Kaushik Roy. "Power dissipation, variations and nanoscale CMOS design: Test challenges and self-calibration/self-repair solutions." In 2007 IEEE International Test Conference. IEEE, 2007. http://dx.doi.org/10.1109/test.2007.4437659.

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Roopa, Y. Mohana, and M. Ramesh Babu. "Self-test framework for self-adaptive software architecture." In 2017 International Conference of Electronics, Communication and Aerospace Technology (ICECA). IEEE, 2017. http://dx.doi.org/10.1109/iceca.2017.8212749.

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Reports on the topic "Self test"

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Corwin, R. F. Self-potential investigation, Nevada Test Site, Mercury, Nevada. Office of Scientific and Technical Information (OSTI), January 1989. http://dx.doi.org/10.2172/5923551.

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Kostelnik, A. J. Acceptance test procedure for a portable, self-contained nitrogen supply. Office of Scientific and Technical Information (OSTI), October 1994. http://dx.doi.org/10.2172/10191976.

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Forrest, Stephanie. Helix Project Test Bed: Towards the Self-Regenerative Incorruptible Enterprise. Fort Belvoir, VA: Defense Technical Information Center, October 2011. http://dx.doi.org/10.21236/ada566364.

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Gichangi, Anthony, Jeffrey E. Korte, Caroline Vrana, Danielle Stevens, and Jonesmus Wambua. Increasing male partner HIV testing using self-test kits in Kenya. International Initiative for Impact Evaluation, July 2017. http://dx.doi.org/10.23846/tw2208.

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Gichangi, Anthony, Jeffrey E Korte, Jonesmus Wambua, Caroline Vrana, and Danielle Stevens. Increasing male partner HIV testing using self-test kits in Kenya. International Initiative for Impact Evaluation (3ie), July 2017. http://dx.doi.org/10.23846/tw2208jhpiego.

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Aviles-Ramos, Cuauhtemoc. Simulation of the PBX 9501 Self-Ignited Heavily Confined Cookoff Test. Office of Scientific and Technical Information (OSTI), July 2021. http://dx.doi.org/10.2172/1810489.

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Aamodt, Stephen, and Mary Goryca. M109A6 Paladin Self-Propelled Howitzer: Full Load, High Ambient Cooling Test and Follow-on Engineering Tests. Fort Belvoir, VA: Defense Technical Information Center, December 2004. http://dx.doi.org/10.21236/ada445815.

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Thirumurthy, Harsha, Eunice Omanga, Beatrice Obonyo, Samuel Masters, and Kawango Agot. Promoting partner and couples HIV testing using self-test kits in Kenya. International Initiative for Impact Evaluation (3ie), July 2017. http://dx.doi.org/10.23846/tw2202unc.

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Word, Sheela. Eeny, meeny, miny, mo : self and close-other selection of personality test interpretations. Portland State University Library, January 2000. http://dx.doi.org/10.15760/etd.5739.

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Mack, Kyle. Sour Grapes While You're Down and Out: Self-Serving Bias and Applicant Attributions for Test Performance. Portland State University Library, January 2000. http://dx.doi.org/10.15760/etd.5323.

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