Dissertations / Theses: 'Self test'

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Muradali, Fidel. "A self-driven test methodology for built-in self-test of sequential circuits /." Thesis, McGill University, 1996. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=42106.

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Test cost comprises a substantial portion of producing an integrated circuit. As a result, structural modifications of the circuit via design for test (DFT) techniques are commonly used as an aid to reduce test cost to the lowest possible level. One important class of DFT is Built-In Self-Test (BIST). In BIST, test generation and response analysis logic is integrated into the original circuit and are transparent during normal operation. In this manner, in-circuit tests can be performed with minimal need of external test equipment, if any.
Test strategies based on pseudorandom test stimuli are attractive since the simplicity of the pattern generation logic facilitates on-chip test application. Unfortunately, until now, these methods have been more appropriate for testing combinational rather than sequential circuits. This is largely because, unlike combinational testing, detection of sequential faults can require specific orderings of circuit operations which are prohibitively difficult to produce using a pseudorandom source.
This thesis introduces a new DFT technique which permits at-speed on-chip sequential testing using parallel pseudorandom test patterns applied only to the primary inputs of the circuit under test. Test network design focuses on adjusting fault free circuit activity and aiding error propagation. This is done via the strategic insertion of a small number of low area test points. The resulting system is unique in that aside from a test mode flag, all I/O signals needed for test system operation are tapped from within the circuit itself. This feature virtually eliminates the control signal generation logic typically needed in other test point strategies. Also, as opposed to the conventional approach of restricting circuit alterations to the state elements, the proposed flexibility in choosing modification sites is beneficial when considering speed constrained designs.
Experiments demonstrate that high single stuck-at fault coverage is achieved for a number of benchmark circuits.

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Muradali, Fidel. "A self-driven test methodology for built-in self-test of sequential circuits." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp02/NQ30348.pdf.

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Miller, Ashley K. "Examining the Errors and Self-Corrections on the Stroop Test." Cleveland State University / OhioLINK, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=csu1274111033.

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Zhang, Shujian. "Evaluation in built-in self-test." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp02/NQ34293.pdf.

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Prince, Ryan 1977. "A disposable, self-administered electrolyte test." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/18029.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.
Includes bibliographical references.
This thesis demonstrates the novel concept that it is possible to make a disposable, self-administered electrolyte test to be introduced to the general consumer market. Although ion specific electrodes have been used to perform point of care electrolyte tests in supervised health care environments since 1992, there has never been a personalized self-administered test available in a supermarket or convenience store. This thesis lays out a novel approach to adapting ion specific electrode technology to produce such a test. The suitability and method of integration of miniature ion-specific electrode technology has been analyzed and shown to be viable for such a purpose. A microelectronic chip has been specifically designed to interface to the sensor, perform the necessary calibration and decision making, and indicate the results to the user. It has been determined that the sensor, the electronics, and the supporting structures will be small and inexpensive enough to be included on a commercial sport drink bottle. The blueprints for this extension, including the selection and integration of a suitable power source, and method of result indication have been specified and shown to support this thesis.
by Ryan Prince.
M.Eng.

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Khalaf, Arkan. "A self-reconfigurable platform for built-in-self-test applications." Thesis, University of Ottawa (Canada), 2007. http://hdl.handle.net/10393/27865.

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This thesis introduces a novel architecture of a run-time reconfigurable microsystem on chip (SoC). This system consists of a logic block that can be reconfigured at run time, and an embedded multi-microprocessor system that connects to this logic block and can reconfigure it at run time using special resources of Field Programmable Gate Arrays (FPGA). A design flow for run-time reconfigurable logic circuits has been developed and is presented in the context of the implementation of the SoC on a FPGA. This reconfigurable architecture is validated by an application that implements the novel idea of verifying algorithms for testing digital circuits by using run-time reconfigurable techniques, in order to minimize circuit area, as well as test generation and application time. The idea revolves around the dynamic partial reconfiguration of circuits under test, in order to inject stuck-at faults at different locations of the circuit, to verify for and uncover logic structural faults. The thesis presents the design and implementation of a self-reconfigurable platform, where faults are injected at run-time to the circuit under test. It analyzes the ways of injecting faults and the run-time reconfiguration overhead associated with it, while the rest of the circuit is present on the reconfigurable architecture, in order to validate run-time reconfigurable built-in-self-test techniques, as compared to the more traditional methods.

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Olbrich, Thomas. "Design-for-Test and Built-In-Self-Test for integrated systems." Thesis, Lancaster University, 1996. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.312594.

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Ho, Thanh Huong. "Test compaction technique for built-in self-test in VLSI circuits." Thesis, University of Ottawa (Canada), 1994. http://hdl.handle.net/10393/6460.

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In recent years, many test output data compression techniques have been introduced, which reduce the storage requirements of reference signatures for the circuit under test. A major problem, however, is that the compression always results in loss of error coverage. This work proposes a space compression technique for digital circuits with the objective of minimizing the storage for the circuits under test while maintaining the fault coverage information. The technique introduced is called a Modified Dynamic Space Compression method. For a circuit under test, a compaction tree is generated based on its structure. The detectable error probability was calculated by using the Boolean Difference Method. The output data modification was employed to minimize the number of faulty output data patterns which have the same compressed form as the fault free patterns. The compressed outputs were then fed into a syndrome counter to derive the signature for the circuit. A design program is written in C language and executed on PC which combines the space compression, output data modification, and faults testing. Simulations were performed on known combinational circuits and the results indicate that the loss in fault coverage caused by compression is rather small.

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XIONG, XINGGUO. "BUILT-IN SELF-TEST AND SELF-REPAIR FOR CAPACITIVE MEMS DEVICES." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1123038236.

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Jervan, Gert. "Hybrid Built-In Self-Test and Test Generation Techniques for Digital Systems." Doctoral thesis, Linköping : Dept. of Computer and Information Science, Univ, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2994.

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Goodby, James Laurence. "Test synthesis and self-test in high performance VLSI digital signal processing /." Diss., Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 1997. http://wwwlib.umi.com/cr/ucsd/fullcit?p9811793.

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Bogue, Tracey M. "Aliasing reduction in built-in self-test." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/nq21280.pdf.

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Dhawan, Sanjay. "A built-in self-test PLA generator." Thesis, This resource online, 1991. http://scholar.lib.vt.edu/theses/available/etd-08042009-040315/.

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Rose, Vanessa Karen Public Health &amp Community Medicine Faculty of Medicine UNSW. "Sociostructural determinants of diabetes self-management: test of a self-efficacy model." Awarded by:University of New South Wales. School of Public Health and Community Medicine, 2007. http://handle.unsw.edu.au/1959.4/31881.

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Diabetes self-management has clear benefits in reducing diabetes symptoms and complications and improving the health, wellbeing and quality of life of people with diabetes. Successful intervention programs focus on the development of diabetes self-efficacy, which promotes the capacity of people with diabetes to perform diabetes self-management even in the face of difficulty. Diabetes self-management, however, presents considerable challenges for health systems that have been structured to provide acute, rather than chronic care, and health professionals who have been trained to cure illness, rather than manage behaviour. It presents further challenges for people with diabetes who live in socioeconomically disadvantaged circumstances and have limited financial resources for diabetes care and therapies, and poor access to resources for diabetes self-management, such as clean, safe exercise areas and healthy foods at low-cost. These sociostructural determinants of diabetes self-management, defined here as GP care and socioeconomic resources, have the potential to impede the uptake and effective dissemination of diabetes self-management policy and intervention. This research thesis investigated the impact of sociostructural determinants on diabetes self-management using a model developed from self-efficacy theory. The model was empirically examined using a mixed quantitative and qualitative methodology, where qualitative data were used to illuminate the findings of quantitative data. The quantitative component comprised a random cross-sectional survey of 105 people with diabetes subjected to hierarchical multiple regression with tests for moderator effects. The qualitative component comprised three group interviews of 27 English-speaking, Vietnamese-speaking and Arabic-speaking people with diabetes, analysed using the phenomenological method. Findings provided partial support for the model. Relationships between sociostructural determinants and diabetes self-management were complex. While good quality GP care facilitated diabetes self-management, it also acted as a barrier to self-monitoring of blood glucose for people with low levels of diabetes self-efficacy. Having limited access to socioeconomic resources did not impede diabetes self-management, even for people with low levels of diabetes self-efficacy, although this may have been masked by access to public health schemes and welfare support. The findings from this small-scale exploratory study suggest that self-efficacy may exert an impact on diabetes self-management, even in the face of sociostructural determinants.

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Jervan, Gert. "High-Level Test Generation and Built-In Self-Test Techniques for Digital Systems." Licentiate thesis, Linköping : Univ, 2002. http://www.ep.liu.se/lic/science_technology/09/73/index.html.

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Radecka, Katarzyna. "Arithmetical built-in self test for DSP architectures." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp01/MQ29624.pdf.

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Castro, Javier Alejandro. "Robot self-configuration using a physical test harness." Thesis, Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/46008.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
Includes bibliographical references (leaves 101-102).
Robot control software packages require a configuration step prior to use. The configuration requires that robot parameters such as the dimensions of the robot, the radius of its wheels, and the location of sensors in body coordinates be provided to the system. Typically, this is accomplished through manual measurement. This thesis describes a method for automating the configuration of essential robot parameters - specifically the size of the wheel radii, the dimensions of the chassis, and the location of the wheelbase with respect to the body frame and compares the results of a preliminary configuration system for the CARMEN robot navigation toolkit to the parameters determined via user measurement. The method is able to estimate the parameters of morphologically analogous robots, for which the shape and sensor types are given, through the use of a physical test harness. The targeted family of robots consists of rectangular, two-wheeled, differential drive robots that are equipped with quadrature phase encoders and current-sensing capabilities. Parameters are discovered by placing the robot in a known physical environment and moving it throughout the enclosed area, performing experiments from which each of the parameters can be calculated. The resulting self-configured parameters are then compared quantitatively to user-measured parameters through several methods including a complete system comparison using the University of Michigan Benchmark (UMBmark) as the standard for comparison. The results demonstrate that while the self-configured parameters do not match user-measured values perfectly, the proposed method remains an adequate technique for automating the configuration of microbot-class robots for use with robotics toolkits.
by Javier Alejandro Castro.
M.Eng.

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18

José, Costa Alves Diogo. "A logic built-in self-test architecture that reuses manufacturing compressed scan test patterns." Universidade Federal de Pernambuco, 2009. https://repositorio.ufpe.br/handle/123456789/1831.

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Made available in DSpace on 2014-06-12T15:52:41Z (GMT). No. of bitstreams: 1 license.txt: 1748 bytes, checksum: 8a4605be74aa9ea9d79846c1fba20a33 (MD5) Previous issue date: 2009
A busca por novas funcionalidades no que diz respeito a melhoria da confiabilidade dos sistemas eletrônicos e também a necessidade de gerir o tempo gasto durante o teste faz do mecanismo Built-in-Self-Test (BIST) um característica promissora a ser integrada no fluxo atual de desenvolvimento de Circuitos Integrados (IC). Existem vários tipos de BIST: Memories BIST, Logical BIST (LBIST) e também alguns mecanismos usados para teste as partes analógicas do circuito. O LBIST tradicional usa um hardware on-chip para gerar todos os padrões de teste com um gerador pseudo aleatório (PRPG) e analisa a assinatura de saída gerada por um registrador de assinatura de múltipla entradas (MISR). Essa abordagem requer a inserção de pontos de teste extras or armazenagem de informação fora do chip que tornará possível alcançar uma cobertura de teste > 98%. Também a geração de todos os estímulos de teste implica no sacrifício no tempo aplicação do teste, o qual pode ser aceitável para pequenos sistemas executarem auto-teste durante a inicialização do sistema mas pode tornasse um aspecto negativo quando testando System-on-chip (SOC) ICs. O fluxo corrente de desenvolvimento de um IC insere scan chains e gera automaticamente padrões de teste de scan para alcançar uma alta cobertura para o teste de manufatura. Técnicas de compressão de dados provaram ser muito úteis para reduzir o custo de teste enquanto reduzem o volume de dados e o tempo de aplicação dos testes. Esse trabalho propõe o reuso de padrões de teste comprimidos usados durante o teste de manufatura para implementar um LBIST com objetivo de testar o circuito quando ele já está em campo. O mecanismo LBIST proposto objetiva descobrir defeitos que podem ocorrer devido ao desgasto do circuito. Uma arquitetura e um fluxo de desenvolvimento semi-automático do mecanísmo LBIST baseado em padrões de teste de scan são propostos e validados usando um SoC real como caso de teste

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Bou, Sleiman Sleiman. "Built-in-Self-Test and Digital Self-Calibration for Radio Frequency Integrated Circuits." The Ohio State University, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=osu1311685013.

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20

Tamarapalli, Nagesh V. "A method of constructive test point insertion for scan-based built-in-self-test /." Thesis, McGill University, 1996. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=34464.

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A new testing paradigm called Built-In Self-Test (BIST) has been gaining increasing acceptance over the traditional automatic test pattern generation for testing the current complex integrated circuits. The basic idea in BIST is to integrate the design with test functionalities like pattern generation, response analysis, and test control. Of the various schemes, pseudo-random pattern testing is an attractive technique for BIST because of the simple hardware required for on-chip test pattern generation. Besides, structures for pseudo-random pattern generation like linear feedback shift register (LFSR) or cellular automata (CA) can also be utilized for on-chip response analysis.
In general, pseudo-random BIST is effective only for combinational circuits. This is due to the difficulty associated in obtaining a specific sequence of vectors, through a pseudo-random source, that may be necessary for detecting a fault in a sequential circuit. Thus during test mode, the circuit-under-test (CUT) is transformed to a combinational circuit by configuring memory elements into scan chain(s). However, this may not suffice for circuits that contain random pattern resistant faults or faults not easily detected by random patterns.
Two distinct classes of solutions have been proposed to address the random pattern resistance problem--those that modify input patterns and those that modify the CUT. This thesis presents a new, effective circuit modification method for scan-based BIST of integrated circuits. The proposed circuit modification technique utilizes control and observation points to improve the fault coverage, much like the previous techniques. However, unlike the previous methods, the proposed technique is based on a constructive methodology. A divide and conquer approach is used to partition the entire test into multiple phases. In each phase control/observation points targeting a specific set of undetected faults are identified utilizing a new technique called probabilistic fault simulation. This technique blends fault-free simulation and analytical forward fault propagation to accurately compute the information necessary for the identification of control/observation points.
Observation points in the proposed scheme are kept enabled for the entire test. However, control points are enabled during specific test phases by fixed values. The usage of fixed values leads to a simple and inherent sharing of the logic driving them. This sharing, as well as the reduction of number of control points result in significant reduction in area overhead. Furthermore, fixed values reduce power dissipation during test mode, since control points instead of toggling are set to a constant value during the entire phase.
Experimental results indicate that complete or near-complete stuck-at fault coverage can be achieved by the proposed technique with the insertion of few test points and phases. Results show that modification of less than 1% of circuit nodes is sufficient to achieve complete coverage or greater than 99% coverage. In addition, the proposed techniques are fast and hence are applicable to large circuits.

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Tamarapalli, Nagesh V. "A method of constructive test point insertion for scan-based built-in self-test." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp02/NQ30398.pdf.

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22

Isaac, Jolly. "Comparing Basic Computer Literacy Self-Assessment Test and Actual Skills Test in Hospital Employees." Thesis, Walden University, 2015. http://pqdtopen.proquest.com/#viewpdf?dispub=3715299.

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A new hospital in United Arab Emirates (UAE) plans to adopt health information technology (HIT) and become fully digitalized once operational. The hospital has identified a need to assess basic computer literacy of new employees prior to offering them training on various HIT applications. Lack of research in identifying an accurate assessment method for basic computer literacy among health care professionals led to this explanatory correlational research study, which compared self-assessment scores and a simulated actual computer skills test to find an appropriate tool for assessing computer literacy. The theoretical framework of the study was based on constructivist learning theory and self-efficacy theory. Two sets of data from 182 hospital employees were collected and analyzed. A t test revealed that scores of self-assessment were significantly higher than they were on the actual test, which indicated that hospital employees tend to score higher on self-assessment when compared to actual skills test. A Pearson product moment correlation revealed a statistically weak correlation between the scores, which implied that self-assessment scores were not a reliable indicator of how an individual would perform on the actual test. An actual skill test was found to be the more reliable tool to assess basic computer skills when compared to self-assessment test. The findings of the study also identified areas where employees at the local hospital lacked basic computer skills, which led to the development of the project to fill these gaps by providing training on basic computer skills prior to them getting trained on various HIT applications. The findings of the study will be useful for hospitals in UAE who are in the process of adopting HIT and for health information educators to design appropriate training curricula based on assessment of basic computer literacy.

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Isaac, Jolly Peter. "Comparing Basic Computer Literacy Self-Assessment Test and Actual Skills Test in Hospital Employees." ScholarWorks, 2015. http://scholarworks.waldenu.edu/dissertations/1294.

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A new hospital in United Arab Emirates (UAE) plans to adopt health information technology (HIT) and become fully digitalized once operational. The hospital has identified a need to assess basic computer literacy of new employees prior to offering them training on various HIT applications. Lack of research in identifying an accurate assessment method for basic computer literacy among health care professionals led to this explanatory correlational research study, which compared self-assessment scores and a simulated actual computer skills test to find an appropriate tool for assessing computer literacy. The theoretical framework of the study was based on constructivist learning theory and self-efficacy theory. Two sets of data from 182 hospital employees were collected and analyzed. A t test revealed that scores of self-assessment were significantly higher than they were on the actual test, which indicated that hospital employees tend to score higher on self-assessment when compared to actual skills test. A Pearson product moment correlation revealed a statistically weak correlation between the scores, which implied that self-assessment scores were not a reliable indicator of how an individual would perform on the actual test. An actual skill test was found to be the more reliable tool to assess basic computer skills when compared to self-assessment test. The findings of the study also identified areas where employees at the local hospital lacked basic computer skills, which led to the development of the project to fill these gaps by providing training on basic computer skills prior to them getting trained on various HIT applications. The findings of the study will be useful for hospitals in UAE who are in the process of adopting HIT and for health information educators to design appropriate training curricula based on assessment of basic computer literacy.

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Sundström, Anna. "Developing and validating self-report instruments : assessing perceived driver competence." Doctoral thesis, Umeå universitet, Beteendevetenskapliga mätningar, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:umu:diva-26764.

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The overall aim of this thesis was to develop and validate a self-report instrument for perceived driver competence. The thesis includes six papers and a summary. All papers focus on perceived driver competence from a measurement perspective; that is, how to develop an instrument for perceived driver competence and how to use and interpret the scores from the instrument in a reliable and valid manner. Study I reviews how perceived driver competence has been measured in other studies and discusses these methods from a measurement perspective. Most studies have examined perceived driver competence by asking drivers to compare their own skill to that of the average driver. That method is problematic, since it is not possible to determine if drivers are overconfident or not, when empirical information of their own skills is missing. In order to examine if drivers overestimate their skills or not, perceived driver competence should be compared with actual driving performance. Study II reports on the development and psychometric evaluation of a self-report instrument for perceived driver competence - the Self-Efficacy Scale for Driver Competence (SSDC). The findings provides support for construct validity, as the SSDC demonstrated sound psychometric properties and as the internal structure of the SSDC corresponded to the theoretical model used as a basis for instrument development. In study III, the psychometric properties of the SSDC were further examined using an item response theory (IRT) model. The findings confirmed the results indicated by the classical analyses in Study II. Additional information was provided by the IRT analyses, as it was indicated that the scale would benefit from fewer scale points or by putting labels on each scale point. In study IV, Swedish and Finnish candidates’ self-assessment accuracy was examined by comparing candidates’ scores on the SSDC and a similar instrument for self-assessment of driving skill used in Finland, with driving test performance. Unlike previous studies, in which drivers compared their perceived skills to that of the average driver, a relatively large proportion made a realistic assessment of their own skills. In addition, in contrast to previous studies, no gender differences were found. These results were also confirmed in study V, where the results from the Finnish instrument for self-assessment of driving skill were compared with the results from a similar instrument used in the Netherlands. Study VI further examined the construct validity of a revised version of the SSDC, combining qualitative and quantitative sources of evidence. There was a strong relationship between the SSDC and an instrument for self-assessment of driving skills, providing support for convergent validity. No relationship was found between the SSDC and driving test performance. Explanations of the lack of relationship were provided from semi-structured interviews, as they indicated that confidence in performing different tasks in the test are different from being confident of passing the test, and that the candidates are familiar neither with assessing their own skills nor with the requirements for passing the test. In conclusion, the results from this thesis indicated that the choice of methods for assessing perceived driver competence as well as the quality of these methods affect the validity. The results provided support for different aspects of construct validity of the SSDC. Moreover, the findings illustrated the benefits of combining different methods in test validation, as each method contributed information about the validity of the SSDC. The studies in this thesis mainly examined internal and external aspects of construct validity. Future studies should examine procedural validity of the SSDC.

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Huang, Li. "Family processes, low self-control, and deviance a longitudinal test of self-control theory /." Auburn, Ala., 2007. http://repo.lib.auburn.edu/2007%20Spring%20Dissertations/HUANG_LI_23.pdf.

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Blackley, William Sinclair. "Self test and self repair strategies in VLSI architectures for high speed digital correlation." Thesis, University of Edinburgh, 1985. http://hdl.handle.net/1842/14106.

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Pedersen, Trond Jarle. "Automated Self-Test of an Analog Delta-Sigma Modulator." Thesis, Norges teknisk-naturvitenskapelige universitet, Institutt for elektronikk og telekommunikasjon, 2007. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-16752.

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This project investigates the feasibility of automating the test of ΔΣ-modulators using circuitcomponents available on 8-bit microcontrollers, and by doing so reducing test costs.A Built-In-Self-Test (BIST) scheme, using a binary stream as stimuli and two differentsolutions for signal analysis is suggested and simulated in SPICE to investigate its suitability.The test can not lead to a large area increase, increasing area leads to an increase inproduction cost. The test has to reduce testing time. The extra area occupied by the testarchitecture has to be paid in shorter testing time and therefore a lower unit price. The test hasto remove or lower the requirements of the off-chip tester, and by doing so reducing cost.The proposed BIST requires a very small area and is capable of calculating offset, gain andSignal to Noise Ratio with a high degree of accuracy. The proposed solution enables on-chiptesting without the need for expensive external stimuli and signal analyzers, making testing onwafer possible thus improving production yield.The proposed test will not reduce test time by itself, however by integrating the test on-chipand allowing this to run in the background while other on-chip modules are tested total testtime can be reduced to the time required to shift the stimuli into the chip

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Gopalan, Anand. "Built-in-self-test of RF front-end circuitry /." Link to online version, 2005. https://ritdml.rit.edu/dspace/handle/1850/942.

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Dahir, Sarmad Jamal. "Functional Self-Test of DSP cores in a SOC." Thesis, KTH, Microelectronics and Information Technology, IMIT, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4612.

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The rapid progress made in integrating enormous numbers of transistors on a single chip is making it possible for hardware designers to implement more complex hardware architectures in their designs. Nowadays digital telecommunication systems are implementing several forms of SOC (System-On-Chip) structures. These SOCs usually contain a microprocessor, several DSP cores (Digital-Signal-Processors), other hardware blocks, on-chip memories and peripherals.

As new IC process technologies are deployed, with decreasing geometrical dimensions, the probabilities of hardware faults to occur during operation are increasing. Testing SOCs is becoming a very complex issue due to the increasing complexity of the design and the increasing need of a test mechanism that is able to achieve acceptable fault coverage in a short test application time with low power consumption without the use of external logic testers.

As a part of the overall test strategy for a SOC, functional self-testing of a DSP core is considered in this project to be applied in the field. This test is used to verify whether fault indications in systems are caused by permanent hardware faults in the DSP. If so, the DSP where the fault is located needs to be taken out of operation, and the board it sits on will be later replaced. If not, the operational state can be restored, and the system will become fully functional again.

The main purpose of this project is to develop a functional self-test of a DSP core, and to evaluate the characteristics of the test. This project also involves proposing a scheme on how to apply a functional test on a DSP core in an embedded environment, and how to retrieve results from the test. The test program shall run at system speed.

To develop and measure the quality of the test program, two different coverage metrics were used. The first is the code coverage metric achieved by simulating the test program on the RTL representation of the DSP. The second metric used was the fault coverage achieved. The fault coverage of the test was calculated using a commercial Fault Simulator working on a gate-level representation of the DSP. The results achieved in this report show that this proposed approach can achieve acceptable levels of fault coverage in short execution time without the need for external testers which makes it possible to perform the self-test in the field. This approach has the unique property of not requiring any hardware modifications in the DSP design, and the ability of testing several DSPs in parallel.

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Lee, Catharine H. "The Parenting Styles Self-Test, reliability and construct validity." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1999. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape10/PQDD_0029/MQ62237.pdf.

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31

Bale, Christopher. "Attractiveness and self-esteem : a test of sociometer theory." Thesis, University of Central Lancashire, 2010. http://clok.uclan.ac.uk/1860/.

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Sociometer theory (Leary & Baumeister, 2000) proposes that self-esteem is an evolutionary adaptation which functions to monitor the quality and quantity of people’s interpersonal relationships together with their eligibility for these, and to motivate adaptive behaviour in response to these assessments. The present work describes a series of studies designed to systematically test hypotheses concerning relationships between self-perceptions of physical attractiveness, self-esteem and relationship behaviour, derived from sociometer theory. Study 1 extended previous research by employing a novel measure of self-perceived attractiveness and showing that this significantly and positively correlated with both global and multidimensional measures of self-esteem in both women and men. Studies 2 and 3 tested the hypothesis, derived from sociometer theory, that using a social comparison manipulation of self-perceived physical attractiveness should causally affect self-esteem in women. The results of these studies did not support this hypothesis and challenged previous findings in the literature: Women exposed to images of highly attractive others did not report significantly lower subsequent levels of self-esteem than those exposed to unattractive others. Study 4 examined whether exposing women to an implicit manipulation of self-esteem would affect their subsequent self-perceptions of attractiveness. The results showed that women exposed to a negative priming condition reported significantly lower levels of self-esteem and self-perceived physical attractiveness than those in the positive condition. These results constitute the first empirical demonstration that implicit manipulations of self-esteem can exert causal effects on specific self-perceptions. Study 5 examined the previously untested prediction that self-perceptions of desirability and self-esteem would correlate with self reports of romantic relational behaviour in women. The results indicated that although self-perceptions of desirability significantly correlated with relational behaviour, self-esteem did not. These results, together with previous research in self-esteem are discussed in relation to sociometer theory, and a novel modification of the theory is proposed.

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32

El-Mahlawy, Mohamed Hassan Mohamed. "Pseudo-exhaustive built-in self-test for boundary scan." Thesis, University of Kent, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.324714.

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33

Gaur, Manoj Singh. "Integration of built in self test during behavioural synthesis." Thesis, University of Southampton, 2004. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.427421.

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34

Bayraktaroğlu, I̊smet. "Extending the reach of self-test approaches in VLSI /." Diss., Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 2001. http://wwwlib.umi.com/cr/ucsd/fullcit?p3029651.

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35

Kwan, Tinna. "Psychometric properties of the Draw-A-Person Test." Thesis, The University of Arizona, 1989. http://hdl.handle.net/10150/277147.

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This study examined the psychometric properties for the Draw-A-Person (DAP) test (Naglieri, 1988). Data were collected from 191 children following the accepted procedure from an earlier study (Badger & Jones, 1988). Drawings were scored using both Harris' (1963) and Naglieri's (1988) scoring systems following the procedures outlined in the manuals. Basically, the DAP test demonstrated reliable and valid properties. The Naglieri's (1988) scoring system was favored in this study because it demonstrated more consistent internal consistency, higher inter- and intra-rater reliability and satisfactory construct validity. Positive and moderate high correlations with the scores obtained from Goodenough-Harris's scoring systems supported that the Naglieri's version measured the same concept as the old system. Psychometric properties of the DAP test support use in clinical and research settings to gather data from children about their general abilities.

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36

Garrison, Brooks Stroud Charles E. "Analysis and improvement of Virtex-4 block RAM Built-In Self-Test and introduction to Virtex-5 block RAM Built-In Self-Test." Auburn, Ala, 2009. http://hdl.handle.net/10415/1667.

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37

Jessica, Lennvall. "OMFATTNING AV STI-TEST BLAND HÖGSKOLESTUDENTER." Thesis, Mälardalens högskola, Akademin för hälsa, vård och välfärd, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-32053.

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The health risks associated with sexual behaviour may be prevented by strengthening the individual's identity, self-esteem and the ability to handle relationships. Increase of the use of condoms among youth and young adults, 15 to 29 year olds, may reduce the spread of the most common sexually transmitted infection (STI); chlamydia. The project “love ambassadors” are situated at Mälardalen University and works according to “the peer-to-peer education”, which means that students educate other students. The theoretical perspective of this study is the “diffusion theory”, which involves the dissemination of knowledge and “Self-efficacy” which includes a self-belief of the individuals own ability to influence events that has effects on the individual's life. The purpose of this study was to investigate in which extent college students are testing for STI and HIV and furthermore, if there were gender differences. Moreover, the students were asked about if they considered any specific need for more knowledge about sexual health issues. The study was performed through a quantitative method, with a cross-sectional studydesign. Secondary data was used from a web-based survey, provided by the County council of Sörmland. Results revealed that the most sought knowledge among students regarding sexual health issues is about STI is infectious, and advises regarding relationships. Keywords; college students, cross-sectional study, Love Ambassadors, self-efficacy, sexuality, STI.
De hälsorisker som kan förknippas med sexuellt beteende kan förebyggas genom att stärka individens identitet och självkänsla samt förmågan att hantera relationer till andra människor. Att öka kondomanvändningen bland unga och unga vuxna, 15 till 29 år, är ett sätt att minska smittspridningen av klamydia som är den vanligaste förekommande sexuellt överförbara infektionen (STI). Projektet Kärleksambassadörerna verkar på Mälardalens högskola och arbetar enligt metoden peer-to-peer education som innebär att studenter utbildar studenter. I denna studie beskrivs diffusionsteorin som handlar om spridningen av kunskap och self-efficacy som innebär tron på den egna förmågan att kunna påverka händelser som influerar individens liv. Syftet med denna studie var att undersöka utsträckning av testningen av STI och hiv bland högskolestudenter och om det fanns könsskillnader samt vilken kunskap om sexuell hälsa som efterfrågas. Som metod valdes en kvantitativ ansats med en tvärsnittsdesign. Sekundär data användes från en webbaserad enkätstudie som tillhandahölls från Landstinget Sörmland. Resultatet visar att den mest efterfrågade kunskapen gällande sexuell hälsa bland studenterna gäller smittvägar för STI och hur man får en relation att fungera bra. Nyckelord: högskolestudenter, Kärleksambassadörerna, self-efficacy, sexualitet, STI, tvärsnittsstudie.

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38

Lloyd, David W. "Design methods for asynchronous circuits." Thesis, University of Nottingham, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.282817.

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39

Zöllin, Christian G. [Verfasser], and Hans-Joachim [Akademischer Betreuer] Wunderlich. "Test planning for low-power built-in self test / Christian G. Zöllin. Betreuer: Hans-Joachim Wunderlich." Stuttgart : Universitätsbibliothek der Universität Stuttgart, 2015. http://d-nb.info/1065235917/34.

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40

Lynch, Bridget Petersen. "Do Autonomous Individuals Strive for Self Positivity? A Test of the Universality of Self-Enhancement." University of Dayton / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1366371829.

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41

Anderson, Nicholas Lee. "A test of two models of non-suicidal self-injury." [Kent, Ohio] : Kent State University, 2009. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=kent1240238153.

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Thesis (M.A.)--Kent State University, 2009.
Title from PDF t.p. (viewed Jan 12, 2010). Advisor: Janis Crowther. Keywords: worry, rumination, experiential avoidance, non-suicidal self-injury, functional model. Includes bibliographical references (p. 44-55).

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42

Muradali, Fidel. "A new procedure for weighted random built-in self-test /." Thesis, McGill University, 1990. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=59424.

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Experience has shown that an excessive time penalty can be incurred when testing large scan circuits with a uniform random test pattern generation approach. As a solution to this problem, this work explores the use of weighted random patterns (WRP) to reduce, by orders of magnitude, the test application time in self-testing circuits.
Much work has been done on the off-line development of compact test sets, but a problem which still remains is how to efficiently apply them on-chip. A means of transforming a given test set into a relatively short weighted sequence and pseudorandom sequence, whose cumulative fault coverages approximate that guaranteed by the original test set, is proposed.
The single weight set is formulated using a method which does not explicitly consider the circuit structure. Instead, sufficient circuit information contained in the given test set can be extracted using simulation techniques. This is done by analyzing a random pattern detection profile and isolating the vectors which cover faults difficult to detect using random patterns. After extracting the useful bits from these vectors, a weight set characteristic of the corresponding faults is estimated as the ratio of 1's to 0's at each bit (input) position.
The generation scheme is evaluated using five large scannable circuits. A local approach to on-chip pattern generation is examined.

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43

Kantasuwan, Thana. "RF front-end CMOS design for build-in-self-test." Thesis, Linköping University, Department of Electrical Engineering, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2642.

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In this master degree work, a digital attenuator and a low noise amplifier (LNA) have been designed and integrated with the RF front-end receiver for IEEE 802.11b Wireless LAN standard. Firstly, the 4-bit digitally controlled attenuator has been designed with theattenuation range of 50 to 80 dB and reflection coefficient less than -25 dB. Next, the single stage wide band low noise amplifier with voltage gain larger than 14 dB and noise figure below 4 dB has been designed to operate at frequency 2.4 GHz. Finally, the integration with a down-conversion mixer has been done and evaluated its performance.

The attenuator and low noise amplifier desired in this thesis have been implemented using standard CMOS 0.35µm technology and validated by the simulation tools Cadence Spectre-RF.

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44

Creighton-Lacroix, Wendy Denise. "The self-regulation of test anxiety using metacognitive strategy instruction." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2000. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape3/PQDD_0014/NQ59617.pdf.

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45

Herbert, Carey Lynn 1967. "A test of self-control explanations of white-collar crime." Diss., The University of Arizona, 1997. http://hdl.handle.net/10150/288709.

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Nowhere is the tendency to typologize in criminological research more evident than in the area of white-collar crime research, which is often aimed at distinguishing white-collar criminals and their crimes from other types of criminals and their offenses. This study incorporates a test of the applicability of Gottfredson and Hirschi's self-control theory to white-collar crime--a form of criminal conduct to which the theory's critics assert it is inapplicable. For those who attribute more planning and sophistication to white-collar crime than to other forms of offending, explanations for white-collar offending that reference impulsivity and inattention to the consequences of action are decidedly unsatisfactory. Analyses of survey data, collected as part of the Tucson Youth Project, indicate that self-control is a significant predictor of workplace offending. From an operational standpoint, the relative merits of behavioral versus attitudinal measures of self-control were considered. These findings suggest that behavioral measures of self-control are better predictors of offending. Although possibly a measurement artifact, the findings also suggest that attitudinal self-control is only spuriously related to offending. The perceived need to distinguish white-collar crime stems from the dissimilarities between white-collar crime and "ordinary" street crime. These crimes are often separated along spatial lines, and their perpetrators are often separated along race and socioeconomic status lines. Testing the validity of these distinctions was another objective of this study. Analyses were performed to determine whether the patterns of association between offending and known correlates of offending are similar for both white-collar and non-white-collar crime. The results indicate that offending in the workplace and offending beyond the workplace are more similar than not. One important finding is that self-control explains less of the variation in white-collar offending than in non-white-collar offending. One plausible explanation for this finding is that criminal opportunity plays a relatively more important role in workplace deviance than in other contexts. The mechanisms by which organizations affect the behavior of individuals are, of course, still a matter of theoretical conjecture, and an important subject for future research.

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46

Barus, Jasa. "An analysis of aliasing in built-in self test procedure." Thesis, Monterey, California. Naval Postgraduate School, 1991. http://hdl.handle.net/10945/27945.

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47

Taylor, David. "Design of certain silicon semi-customised structures incorporating self-test." Thesis, University of Huddersfield, 1989. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.329218.

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48

Hsu, An-Chi, and 許安琪. "A Novel Test Pattern Generator for Built-In-Self-Test." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/94567365087518651005.

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碩士
義守大學
電子工程學系
91
ABSTRACT The built-in-self-test (BIST) is a powerful test strategy for very large scale integrated circuit. The test pattern generator is a critical portion of an efficient BIST structure. In this paper, we blend the weighted-random-pattern generator and controllable-linear-feedback-shift register to develop a novel test pattern generator for BIST. The whole testing is performed in two phases. The weighted-random-pattern generator generates the test patterns to drop some of the faults from the fault list during the first phase fault simulations. During the second-phase fault simulations, remain faults will be tested by the test patterns generated by the controllable-linear-feedback-shift register. We adopt controllable-linear-feedback-shift register to generate the deterministic patterns instead of modifying the configuration of the weighted-random-pattern generator such that a better fault coverage can be achieved with a lower hardware cost and shorter test length. (Keywords: BIST; WRPG; CLFSR; Fault Coverage; Test Pattern Length)

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49

Qi, Dandan. "Modified Geffe test pattern generator for built-in self-test." Thesis, 2005. http://hdl.handle.net/1828/2210.

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Unlike linear Finite State Machines (FSM) such as Linear Feedback Shift Registers (LFSR), the Geffe generator, a nonlinear FSM, hasn't been frequently studied or used in the scenario of digital system testing. Such machines are used as pattern generators for built-in self-test. LFSRs have become widely used in today's integrated circuits since they have a comparatively low hardware overhead. While it is known that a Geffe generator when used as a pattern generator for a built-in self-test, gives improved fault detection, the area overhead is sufficiently high for this not to be a practical approach. In this thesis, we propose three possible redesigns of the Geffe generator, and these redesigns are analyzed on both theoretical grounds and experiments. Our results show that two of our redesigned machines lead to fault coverage that is comparable to the original Geffe generator, but with very sharply reduced area overhead.

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50

Chen, Yi-Hoang, and 陳奕宏. "Innovation Battery Self-Discharge Characteristic Test." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/b7jszp.

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碩士
遠東科技大學
電機工程研究所
107
AbstractCurrently, widely used mobile device battery or vehicle battery designers, in the past, it is a great challenge to quickly measure the self-discharge characteristics of their battery design. A large amount of space and personnel costs are required to store the batteries, and the data reproducibility of the test results is also problematic, time cost, and safety issues arise. This paper proposes a solution to solve the small cylindrical battery such as the 18650 or 21700 battery that is commonly used in the market. It can quickly determine the stable self-discharge current in 30 minutes to 2 hours, effectively reducing the time pressure and cost of product testing.Keywords: Boost converter, Buck converter,Pulse width modulation

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Dissertations / Theses on the topic 'Self test'

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