Books on the topic 'Semiconductor storage devices'

Sharma, Ashok K. Semiconductor memories: Technology, testing, and reliability. Piscataway, N.J: IEEE Press, 1997.

Sharma, Ashok K. Advanced semiconductor memories: Architectures, designs, and applications. Piscataway, NJ: IEEE Press, 2003.

Prince, Betty. Semiconductor memories: A handbook of design manufacture and application. 2nd ed. Chichester: Wiley, 1995.

Prince, Betty. Semiconductor memories: A handbook of design, manufacture, and application. 2nd ed. Chichester: Wiley, 1991.

Corporation, Dallas Semiconductor, ed. Book of DS199x touch memory standards. Dallas, Tex: Dallas Semiconductor, 1992.

A, Kosarev I͡U. Ėlektricheski izmeni͡aemye PZU. Leningrad: Ėbergoatomizdat, Leningradskoe otd-nie, 1985.

Adams, R. Dean. High performance memory testing: Design principles, fault modeling, and self-test. Boston: Kluwer Academic, 2003.

Konopelʹko, V. K. Nadezhnoe khranenie informat͡s︡ii v poluprovodnikovykh zapominai͡u︡shchikh ustroĭstvakh. Moskva: "Radio i svi͡a︡zʹ, 1986.

Calif.) IEEE International Memory Workshop (5th 2013 Monterey. 2013 5th IEEE International Memory Workshop (IMW): Monterey, California, 26-29 May 2013. Piscataway, NJ: IEEE, 2013.

Sharma, Ashok K. Semiconductor memories: Technology, testing, and reliability. New York: IEEE, the Institute of Electrical and Electronics Engineers, 1997.

1939-, Nakamura Takashi, ed. Terrestrial neutron-induced soft errors in advanced memory devices. Hackensack, NJ: World Scientific, 2008.

Non-Volatile, Semiconductor Memory Workshop (21st 2006 Monterey Calif ). 21st IEEE Non-Volatile Semiconductor Memory Workshop : IEEE NVSMW 2006. New York City, NY: IEEE, 2006.

Przybylski, Steven A. New DRAM technologies: A comprehensive analysis of the new architectures. 2nd ed. Sebastopol, CA: MicroDesign Resources, 1996.

1943-, Brown William D., and Brewer Joe, eds. Nonvolatile semiconductor memory technology: A comprehensive guide to understanding and to using NVSM devices. New York: IEEE Press, 1998.

Non-Volatile Semiconductor Memory Workshop (22nd 2007 Monterey, Calif.). 22nd IEEE Non-Volatile Semiconductor Memory Workshop: Proceedings : August 26th-30th, 2007, Monterey, California. Piscataway, NJ: IEEE, 2007.

Non-Volatile Semiconductor Memory Workshop (23rd 2008 Opio, France). 2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design: Proceedings : May 18th-22nd, 2008 Opio, France. Piscataway, NJ: IEEE, 2008.

Iniewski, Krzysztof. CMOS processors and memories. Dordrecht: Springer, 2010.

IEEE Electron Devices Society. Standards Committee., Institute of Electrical and Electronics Engineers., and IEEE-SA Standards Board, eds. IEEE standard definitions and characterization of floating gate semiconductor arrays. New York, N.Y., USA: Institute of Electrical and Electronics Engineers, 1999.

IEEE, International Workshop on Memory Technology Design and Testing (17th 2009 Hsinchu Taiwan). MTDT 2009: 2009 IEEE International Workshop on Memory Technology, Design, and Testing : proceedings, 31 August- 2 September 2009, Hsinchu, Taiwan. Los Alamitos, Calif: IEEE Computer Society, 2009.

IEEE, International Workshop on Memory Technology Design and Testing (1994 San Jose Calif ). Records of the IEEE International Workshop on Memory Technology, Design, and Testing, August 8-9, 1994, San Jose, California. Los Alamitos, Calif: IEEE Computer Society Press, 1994.

IEEE International Workshop on Memory Technology, Design, and Testing (1997 San Jose, Calif.). Proceedings: International Workshop on Memory Technology, Design, and Testing. Los Alamitos, Calif: IEEE Computer Society Press, 1997.

IEEE International Workshop on Memory Technology, Design and Testing (12th 2004 San Jose, Calif.). MTDT 2004: Records of the 2004 International Workshop on Memory Technology, Design and Testing : 9-10 August, 2004, San Jose, California, USA. Los Alamitos, Calif: IEEE Computer Society, 2004.

IEEE International Workshop on Memory Technology, Design and Testing (8th 2000 San Jose, Calif.). Records of the 2000 IEEE International Workshop on Memory Technology, Design and Testing: August 7-8, 2000, San Jose, California. Los Alamitos, Calif: IEEE Computer Society, 2000.

IEEE International Workshop on Memory Technology, Design, and Testing (1999 San Jose, Calif.). Records of the 1999 IEEE International Workshop on Memory Technology, Design, and Testing, August 9-10, 1999, San Jose, California, USA. Los Alamitos, Calif: IEEE Computer Society Press, 1999.

International, Test Conference (34th 2003 Charlotte N. C. ). Proceedings: Board and system test track. Washington, D.C: International Test Conference, 2003.

IEEE, International Nonvolatile Memory Technology Conference (7th 1998 Albuquerque New Mexico). Seventh biennial IEEE Nonvolatile Memory Technology Conference: Proceedings : 1998 conference : June 22-24, 1998, Albuquerque, NM, USA. Piscataway, N.J: IEEE, 1998.

IEEE International Nonvolatile Memory Technology Conference (6th 1996 Albuquerque, N.M.). Sixth Biennial IEEE International Nonvolatile Memory Technology Conference: Proceedings 1996 conference : June 24-26, 1996, Albuquerque, NM, USA. [Piscataway, NJ]: Institute of Electrical and Electronics Engineers, 1996.

Armed Forces Communications and Electronics Association (U.S.), Signal Corps Regimental Association (U.S.), and IEEE Components, Hybrids, and Manufacturing Technology Society., eds. Fifth biennial nonvolatile memory technology review: Proceedings, 1993 conference, June 23-24, 1993, Linthicum Heights, MD, USA. New York: [Institute of Electrical and Electronics Engineers, 1993.

IEEE International Nonvolatile Memory Technology Conference (6th 1996 Albuquerque, N.M.). Sixth Biennial IEEE International Nonvolatile Memory Technology Conference: Proceedings 1996 conference, June 24-26, 1996, Albuquerque, NM, USA. [New York: Institute of Electrical and Electronics Engineers, 1996.

Grun, Peter. Memory architecture exploration for programmable embedded systems. Boston: Kluwer Academic Publishers, 2003.

Horiguchi, Masashi. Nanoscale memory repair. New York: Springer, 2011.

International Test Conference (34th 2003 Charlotte, N.C.). Proceedings International Test Conference 2003: [September 30-October 2, 2003, Charlotte Convention Center, Charlotte, NC, USA. Washington, D.C: International Test Conference, 2003.

Prince, Betty. High performance memories: New architecture DRAMs and SRAMs--evolution and function. Chichester: Wiley, 1996.

K, Hearn Gregory, BACUS (Technical group), and Society of Photo-optical Instrumentation Engineers., eds. 64- to 256-megabit reticle generation: Technology requirements and approaches. Bellingham, Wash: SPIE Optical Engineering Press, 1994.

A, Al-Jumaily Ghanim, Duparré Angela, Singh Bhanwar, and Society of Photo-optical Instrumentation Engineers., eds. Optical metrology roadmap for the semiconductor, optical, and data storage industries: 30-31 July 2000, San Diego, USA. Bellingham, Wash., USA: SPIE, 2000.

Angela, Duparré, Singh Bhanwar, and Society of Photo-optical Instrumentation Engineers., eds. Optical metrology roadmap for the semiconductor, optical, and data storage industries II: 2-3 August, 2001, San Diego, USA. Bellingham, Wash., USA: SPIE, 2001.

Materials Research Society. Meeting Symposium A. and Symposium on Materials Science and Technology for Nonvolatile memories (4th : 2008 : San Francisco, Calif.), eds. Materials science and technology for nonvolatile memories: Symposium held March 24-27, 2008, San Francisco, California, U.S.A. Warrendale, Pa: Materials Research Soc, 2008.

IEEE International Workshop on Memory Technology, Design, and Testing (1998 San Jose, California). Memory technology, design and testing: Proceedings : International Workshop on Memory Technology, Design, and Testing. Los Alamitos, California: IEEE Computer Society Press, 1998.

Sunami, Hideo, Shōji Kawahito, and Kazutami Arimoto. Memori debaisu, imēji sensa. Tōkyō: Maruzen, 2009.

1976-, Chen Yiran, ed. Nonvolatile memory design: Magnetic, resistive, and phase change. Boca Raton, FL: Taylor & Francis, 2012.

Sharma, Ashok K. Semiconductor Memories. Wiley-IEEE Press, 2003.

Sharma, Ashok K. Semiconductor Memories: Technology, Testing, and Reliability. Wiley-IEEE Press, 2002.

Prince, Betty. Semiconductor Memories: A Handbook of Design, Manufacture and Application. John Wiley & Sons, 1992.

Prince, Betty. Semiconductor Memories: A Handbook of Design, Manufacture and Application. 2nd ed. Wiley, 1996.

Prince, Betty. Emerging Memories: Technologies and Trends. Springer London, Limited, 2007.

Prince, Betty. Emerging Memories: Technologies and Trends. Springer, 2013.

Prince, Betty. Emerging Memories: Technologies and Trends. Springer, 2002.

Emerging memories: Technologies and trends. Norwell, Mass: Kluwer Academic Publishers, 2002.

Hu, Chenming. Nonvolatile Semiconductor Memories: Technologies, Design, and Applications (Ieee Press Selected Reprint Series). Institute of Electrical & Electronics Enginee, 1991.

Aloysius Anscrutha Marino De Almeida. Effects of processing variations and endurance stress on the MNOS nonvolatile memory device. 1986.