Relevant bibliographies by topics / Serial peripheral interface SPI

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Book chapters
  4. Conference papers

Academic literature on the topic 'Serial peripheral interface SPI'

Author: Grafiati
Published: 4 June 2021
Last updated: 7 February 2022

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Journal articles on the topic "Serial peripheral interface SPI"

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Tian, Xiao Chun, Jie Li, Yu Bao Fan, Xi Ning Yu, and Jun Liu. "Design and Implementation of SPI Communication Based-On FPGA." Advanced Materials Research 291-294 (July 2011): 2658–61. http://dx.doi.org/10.4028/www.scientific.net/amr.291-294.2658.

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SPI (Serial Peripheral Interface) is a full-duplex serial communication interface bus. Now, many devices adopt SPI. However, in many other aspects, microcontroller and microprocessor have no SPI interface, data transmission is inconvenient. With the development of FPGA technology, the problem can be solved absolutely by the I/O port of FPGA. In this paper, after introducing the principle of SPI, we designed SPI interface with FPGA and implemented the communication between SPI interface and the device of CRG20 which has a SPI interface. The algorithm of design SPI interface through FPGA is implemented with VHDL. The results of simulation in Quartus II and FPGA simulation are also described. The SPI bus interface modules fulfill the goal demanded.
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Baskoro, Farid, Miftahur Rohman, and Aristyawan Putra Nurdiansyah. "SERIAL PERIPHERAL INTERFACE (SPI) COMMUNICATION APPLICATION AS OUTPUT PIN EXPANSION IN ARDUINO UNO." INAJEEE Indonesian Journal of Electrical and Eletronics Engineering 3, no. 2 (2020): 63. http://dx.doi.org/10.26740/inajeee.v3n2.p63-69.

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Serial Peripheral Interface (SPI) is a synchronous serial communication whose data or signal transmission involves Chip Select (CS) or Slave Select (SS) pins, Serial Clock (SCK), Master Out Slave In (MOSI), and Master In Slave Out (MISO). In the Arduino Uno, there are four pins that allow Arduino Uno to perform SPI communication. In this research, SPI communication is implemented to expand the output of the Arduino Uno by using the features of the MCP23S17 IC so that the Arduino Uno, which initially has 20 output pins, can expand to 36 output pins.The results of the research show that the Arduino Uno manages to control 36 output pins. 16 output pins from the MCP23S17, 16 output pins from the Arduino Uno, and 4 pins are used for the SPI communication line. The results of this study also show the form of the SPI communication signal from Arduino Uno in declaring 21 registers on MCP23S17, declaring the MCP23S17 pin register as output, and implementing the output using LEDs.
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SUSANA, RATNA, MUHAMMAD ICHWAN, and SAVERO AL PHARD. "Penerapan Metoda Serial Peripheral Interface (SPI) pada Rancang Bangun Data Logger berbasis SD card." ELKOMIKA: Jurnal Teknik Energi Elektrik, Teknik Telekomunikasi, & Teknik Elektronika 4, no. 2 (2018): 208. http://dx.doi.org/10.26760/elkomika.v4i2.208.

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ABSTRAKSerial Peripheral Interface (SPI) adalah protokol komunikasi yang dapat digunakan sebagai interface komunikasi antara mikrokontroler dengan SD Card. Dengan menerapkan metoda SPI pada data logger berbasis SD Card, maka dapat diketahui karakteristik protokol komunikasi SPI antara mikrokontroler dengan SD Card. SD Card diformat dengan tipe FAT 16, dan data di dalam SD Card berupa sekumpulan paket data sensor yang diambil secara periodik dan disimpan dalam bentuk file dengan format.csv. Berdasarkan format paket data sensor yang dibuat, dapat dihitungwaktu perekaman data yang diperlukan agar kapasitas SD Card terisi penuh oleh data sensor. Hasil penelitian menunjukkan,bahwa metoda SPI yang diterapkan pada penelitian ini memiliki sifat akan melakukan pemeriksaan berulang pada pin MISO terhadap command yang dikirimkan oleh mikrokontroler melalui pin MOSI. Proses read/write data pada SD Card data logger memiliki keberhasilan 100%, karena SD Card telah terinisialisasi dalam mode SPI melalui perintah reset dan init SD Card. Komunikasi ini dapat dilakukan dengan menggunakan crystal 4 Mhz – 20 Mhz. Untuk pengujian konfigurasi SPI, hanya Independent Slave Configuration yang dapat digunakan pada komunikasi SPI dengan 2 SD card sebagai slave. Kata kunci: Serial Peripheral Interface (SPI), Data Logger, SD card, FAT16ABSTRACTSerial Peripheral Interface (SPI) is a communication protocol that can be applied as a communication interface between microcontroller to SD Card. By implementing the SPI method to a data logger based on SD Card, it can be known the characteristics of the SPI communications protocol between microcontroller to SD Card. SD Card formatted in FAT 16 type, and data on the SD Card is the form of sensor data packets collection which be captured periodically and saved in .csv format file. Based on the sensor data packet format is created, it can be calculated recording time data required so that the SD Card capacity completely filled by the sensor data. Research results show, that the SPI method applied in this study has the properties will do repeated testing on MISO pin to the command sent by the microcontroller through the MOSI pin. The read / write data on the SD Card data logger has a 100% success, because the SD Card has been initialized in SPI mode through the reset and init SD Card command. This communication can be established using crystal 4 Mhz - 20 Mhz. At SPI configuration testing, only the Independent Slave Configuration can be used in SPI communication with 2 SD card as a slave.Keywords: Serial Peripheral Interface (SPI), Data Logger, SD card, FAT16
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DHURY, S. CHOU, G. K. SINGH, and R. M. ME HRA. "Design and Verification Serial Peripheral Interface (SPI) Protocol for Low Power Applications." International Journal of Innovative Research in Science, Engineering and Technology 03, no. 10 (2014): 16750–58. http://dx.doi.org/10.15680/ijirset.2014.0310048.

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Semka, E. V., A. B. Buslaev, V. V. Ovcharov, A. A. Pirogov, and S. A. Gvozdenko. "Software driver for working with different types of SPI interfaces." Issues of radio electronics 49, no. 9 (2020): 38–45. http://dx.doi.org/10.21778/2218-5453-2020-9-38-45.

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Field-Programmable Gate Arrays (FPGAs) are configurable integrated circuits whose logic is defined through programming. The use of FPGAs makes it possible to obtain devices capable of changing the configuration, adapting to a specific task due to their flexibly changeable, programmable structure. When developing complex devices, ready-made IP-cores can be used as components for design. The use of software IP-cores allows them to be used most effectively in the final structure, to a significant extent to reduce design costs. A software driver has been developed for working with different types of SPI interfaces (Serial Peripheral Interface), which implements switching the input-output line when transmitting data through a FPGA.
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Zhang, Yan, and Ru Lin Wang. "Underground Sensor Interaction Technique Based on DSP." Advanced Materials Research 488-489 (March 2012): 1429–33. http://dx.doi.org/10.4028/www.scientific.net/amr.488-489.1429.

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In the underground data gathering and processing system, TMS320VC55X acquires signal and send it to display correctly on the LCD. The related hardware and software design of system is introduced in this paper. System adopts MzLH01-12864 display module with serial peripheral interface to realize graphic & text display. On the basis of the hardware interface circuit, SPI working mode of DSP multi-channel buffer serial port, software protocol and sequential flow are recommended. System realizes to display signal on LCD correctly, to demonstrate multiple menu of character and graphics and to implement the human-computer interaction.
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Chen, Shih-Lun, Tsun-Kuang Chi, Min-Chun Tuan, et al. "A Novel Low-Power Synchronous Preamble Data Line Chip Design for Oscillator Control Interface." Electronics 9, no. 9 (2020): 1509. http://dx.doi.org/10.3390/electronics9091509.

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In this paper, a novel low-power synchronous preamble data line protocol chip design for serial communication is proposed. The serial communication only uses two wires, chip select (CS) and secure digital (SD), to transmit and receive data between two devices. The proposed protocol aims to use a fewer number of wires for the interface, therefore reducing the complexity as well as the area of the chip design. Moreover, it increases the efficiency through a synchronous serial communication-controlled oscillator. The low-power synchronous preamble data line protocol design was successfully verified using a field-programmable gate array (FPGA) as a master device and a real chip as a slave device. The signals are checked through the use of a logic analyzer. The realized low-power synchronous preamble data line protocol chip design has a gate count of only 5.07 K gates, a low power dissipation of 12 mW, and a chip area of 453,260 μm2 using the Taiwan semiconductor manufacturing company (TSMC) 0.18 μm CMOS process. Compared with the three-wire serial peripheral interface (SPI) protocol, the proposed design has the advantages of having a lower cost and a lower power consumption.
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Sheybani, Ehsan, and Giti Javidi. "GUI Design Considerations for Hyperspectral Microwave Atmospheric Sounder." International Journal of Interdisciplinary Telecommunications and Networking 10, no. 2 (2018): 40–50. http://dx.doi.org/10.4018/ijitn.2018040104.

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This article contains information on how the Hyperspectral Microwave Atmospheric Sounder is the next step in technology for weather and climate missions. This technology can help improve both the vertical and horizontal resolutions of the atmosphere. Hyperspectral microwave describes an all-weather sounding that acts just like hyperspectral infrared sounders. In hyperspectral infrared sounders clouds decease the accuracy of the results, this is a big reason hyperspectral microwave are considered necessary. Hyperspectral measurements allow the user to determine the Earth's temperature with vertical resolution exceeding 1km (1093.61 yards). One of the objectives of Hyperspectral Microwave Atmospheric Sounder (HyMAS) is to develop a data system that will store and display the date received. PIC24 data stream will transfer 52 Data plus 16 H/K = 64 channels over Serial Peripheral Interface (SPI) at 100 Hz to scan head computer. Serial Peripheral is a synchronous protocol that allows the master device communication with a slave device. A Graphical User Interface (GUI) will be used to display the data received. A Graphical User Interface (GUI) is a type of user interface that allows users to interact with electronic devices using images rather than text commands. The author also develops documentation on how to operate the Explorer 16 development board. An Explorer 16 board can be used to interface with the emulator.
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Pogra, Vivek, Amandeep Singh, Santosh Kumar Vishvakarma, and Balwinder Raj. "Design and Performance Analysis of Application Specific Integrated Circuit for Internet of Things Applications." Sensor Letters 18, no. 9 (2020): 700–705. http://dx.doi.org/10.1166/sl.2020.4239.

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This paper proposes a novel design of application specific integrated circuit (ASIC) which is capable of connecting sensor network and other electronic systems to the internet. The transfer of data between different networks and electronic systems is controlled by internet of things (IoT) platform with the help of instruction sent to ASIC. ASIC will act as serial peripheral interface (SPI) master to all connected networks and data will be transferred serially between them. The different ASIC modules are SPI module, control module, memory module and data/instruction decoder with additional modules built-in self-test (BIST) and direct memory access (DMA). The proposed ASIC will consume less power as compared to conventional microcontroller/microprocessor due to SPI feature along with DMA on ASIC for IoT applications. It is described in very high speed integrated circuit hardware description language (VHDL) at register transfer level (RTL) and simulation is done on the Vivado 2016.2.
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Pogra, Vivek, Santosh Kumar Vishvakarma, and Balwinder Raj. "Design and Performance Analysis of Application Specific Integrated Circuit for Internet of Things Application." Sensor Letters 18, no. 1 (2020): 31–38. http://dx.doi.org/10.1166/sl.2020.4176.

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This paper proposes a novel design of application specific integrated circuit (ASIC) which is capable of connecting sensor network and other electronic systems to the Internet. The transfer of data between different networks and internet of things (IoT) platform is controlled by IoT platform with the help of instruction sent to ASIC. ASIC will act as serial peripheral interface (SPI) master to all connected networks and data will be transferred serially between them. The different ASIC modules are SPI module, control module, memory module and data/instruction decoder with additional modules built-in self-test (BIST) and direct memory access (DMA). The proposed ASIC will consume less power as compared to conventional microcontroller/microprocessor due to the fact that it is designed for IoT applications. It is described in VHDL at RTL level and simulation is done on the Vivado 2016.2.
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Dissertations / Theses on the topic "Serial peripheral interface SPI"

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Kurapati, Jyothsna. "A design methodology for implementation of serial peripheral interface using VHDL." [Tampa, Fla.] : University of South Florida, 2005. http://purl.fcla.edu/fcla/etd/SFE0001271.

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Rachamadugu, Arun. "Digital implementation of high speed pulse shaping filters and address based serial peripheral interface design." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/26603.

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Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.<br>Committee Chair: Laskar, Joy; Committee Member: Anderson, David; Committee Member: Cressler, John. Part of the SMARTech Electronic Thesis and Dissertation Collection.
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Gustafsson, Christopher. "Joystick Radar Control : Implementing joystick control of a radar rig using single board micro-controllers by emulating generic mouse and keyboard commands." Thesis, Linköpings universitet, Datorteknik, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-175357.

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The Swedish Defence Materiel Administration provides tests and evaluations of military Aircrafts and their systems as well as provide services in connection with military exercises. Testing aircraft against a radar antenna and training crews with this radar is part of that offering. The radar is deployed in a container rig and controlled by a computer running Windows 2000. The current option to control this computer is a mouse and keyboard. In this thesis, a system will be designed that is able to improve the ease of use of this rig while minimizing any need to modify the radar rig’s already established hardware and software. The resulting system designed used a commercially available joystick and off the shelf single board micro-controllers in combination with a graphical user interface to supply the radar rig with a converted input from the joystick in the form of mouse and keyboard commands, simplifying the end-user experience.<br>Försvarets materielverk tillhandahåller test och evaluering av militära flygsystem. De tillhandahåller även tjänster rörande militära övningar såsom belysning av flygplan med en radar för att öva piloter. Denna radar är monterad i en container och kontrolleras av en styrdator som kör operativsystemet Windows 2000. Denna dator styrs med hjälp av en mus och tangentbord. I denna rapport kommer ett system designas som kan förbättra användarupplevelsen av denna dator samtidigt som förändringar av hårdvara eller mjukvara i styrdatorn undviks. Resultatet av rapporten var ett system bestående av en kommersiellt tillgänglig joystick och två microkontrollers i kombination med ett grafiskt användargränssnitt som omvandlar knapptryck och styrutslag från joysticken till mus och tangentbords kommandon i styrdatorn.
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Hedin, Alexander. "Testing and evaluation of the integratability of the Senior processor." Thesis, Linköpings universitet, Datorteknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-71043.

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The first version of the Senior processor was created as part of a thesis projectin 2007. This processor was completed and used for educational purposes atLinköpings University. In 2008 several parts of the processor were optimized andthe processor expanded with additional functionality as part of another thesisproject. In 2009 an EU funded project called MULTI-BASE started, in which theComputer Division at the Department of Electrical Engineering participated in.For their part of the MULTI-BASE project, the Senior processor was selected tobe used. After continuous revision and development, this processor was sent formanufacturing. The assignment of this thesis project was to test and verify the different func-tions implemted in the Senior processor. To do this a PCB was developed fortesting the Senior processor together with a Virtex-4 FPGA. Extensive testingwas done on the most important functions of the Senior processor. These testsshowed that the manufactured Senior processor works as designed and that it alonecan perform larger calculations and use external hardware accelerators with thehelp of its various interfaces.<br>Den första versionen av Senior processorn skapades som en del i ett examensarbe-te under 2007, denna processor färdigställdes och användes i utbildningssyfte påLinköping Universitet. 2008 optimerades flera delar av processorn och utökadesmed extra funktionalitet som del av ytterligare ett examensarbete. 2009 startadeett EU finansierat projekt vid namn MULTI-BASE, som ISYs Datortekniks avdel-ning deltar i. Till deras del av MULTI-BASE projektet valdes Senior processorn attanvändas, efter ytterligare utveckling skickades denna processor för tillverkning. Detta examensarbete hade i uppgift att testa och verifiera de olika funktionernasom Senior processorn har implementerats med. För att göra detta tillverkades ettkretskort som ska användas för att testa Senior processorn tillsammans med enVirtex-4 FPGA. Utförliga tester gjordes på de viktigaste funktionerna hos Seniorprocessorn, dessa tester visade att den tillverkade Senior processorn fungerar somplanerat. Den kan på egen hand utföra större beräkningar och använda sig avexterna hårdvare acceleratorer med hjälp av sina olika gränssnitt.
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Šebesta, Patrik. "Ověření vybraných komunikačních rozhraní procesoru TC275." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2015. http://www.nusl.cz/ntk/nusl-221276.

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Diploma thesis handles with set up of peripheral modules of the processor TC275 families’ AURIX developed by Infineon. Processor’s peripheral module QSPI implements communication SPI set up as master on a bus supported by another processor’s module DMA. Module DMA periodically service transmit and receive shift buffers of QSPI which are connected with slave analog to digital converter IC CIC751. Another peripheral module is MultiCAN. Programmed drivers used only basic header files with register definition of processor TC275, which are part of IDE TriCore Free Entry Tool Chain used for created drivers.
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Karim, Rafid, and Haidara Al-Fakhri. "Smart Door Lock : A first prototype of a networked power lock controller with an NFC interface." Thesis, KTH, Radio Systems Laboratory (RS Lab), 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-134894.

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Most major cell phone manufacturers have been releasing cell phones equipped with Near Field Communication (NFC). At the same time there is also increasing use of mobile payments and user verification with the use of the NFC technology. These trends indicate both the increasing popularity and great potential for increased use of NFC in today’s society. As a result NFC has a huge potential to simplify our everyday tasks, ranging from paying for items to accessing our office or home. In this context we will focus on using NFC together with a Power over Ethernet (PoE) powered circuit board and NFC reader to realize a simple system for granting access to open a locked door. One of the purposes of this realization is to explore what services can be realized when such a system is connected to the home/building network and connected to the Internet. A second purpose is to learn how to use network attached devices, as the concept of the Internet of Things is considered by many to be a driving force in the next generation Internet. This project uses very in expensive and low power hardware, as the number of devices is potentially very large and thus in order to minimize the technology’s impact on the environment we must consider how to minimize the power used – while maintaining the desired user functionality. This bachelor’s thesis project made it possible for a PoE powered circuit board containing a MSP430 microcontroller to work along with a NFC reader, which was connected through the Serial Peripheral Interface (SPI). We hope that the end result of this project will lead to a simpler life by exploiting this increasingly ubiquitous technology. For example, a homeowner could send a one-time key to a repair person who is coming to fix their sink. Similarly a homeowner could send a key to their neighbor which is valid for two weeks so that their neighbor could come into their home to water the plants while they are away on vacation. Another example is lending your apartment key to a friend while you are out of town.<br>Det blir allt vanligare med närfältskommunikation (NFC) i dagens samhälle, mobiltelefons-tillverkarna börjar utveckla nya telefoner med NFC teknik inbyggd, samtidigt som användningen av NFC ökat. Det sker även en utveckling inom mobila betalningar och användar-verifiering med användning av NFC, då NFC förenklar detta. Med detta sagt kommer vi att arbeta med detta i detta kandidatexamens-arbete där vi fokuserar på NFC samt Power over Ethernet som använder MSP430 chippet som kärna. Med dessa enheter kombinerade kommer en enkel rörelse med ett NFC kort över en NFC läsare som sedan skall ge åtkomst till en låst dörr. Detta i större kombination med en Internetuppkoppling kunna ge ägaren möjligheten att kunna skicka ut dörrnycklar till andra användare. I detta kandidatexamensarbete gjorde vi det möjligt för ett PoE kretskort bestående av ett MPS430 mikroprocessor att samarbeta med en NFC läsare genom SPI protokollet. Genom att utveckla detta projekt hoppas vi att vårt slutresultat leder till en enklare delning av nycklar med hjälp av denna teknologi.
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Havran, Josef. "Řízení obvodu účastnického rozhraní." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2008. http://www.nusl.cz/ntk/nusl-217312.

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The aim of this thesis is to design a connection of the development kit for the subscriber line interface circuit Si3220 with the development kit for the digital signal processor DSP56858EVM and implement a test application, which will allow us to use the development kit as a small private branch exchange. The application allows us to operate up to ten telephone machines and it disposes of basic telephone exchange functions -- generating tones to the headphone, detecting the DTMF dialing, generating the ringing and the voice connection of the subscribers.
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Feltane, Saâdi. "Conception et réalisation d'un concentrateur de périphériques." Paris 6, 1986. http://www.theses.fr/1986PA066343.

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Nous avons essayé dans les architectures de machines que nous avons développé de dissocier le CPU du processeur d'e/s. De cette manière, si l'on change de cpu, le processeur d'e/s n'est plus à rebâtir. La ligne série avec les fibres optiques peut supporter des débits importants. L'efficacité du système dépend de la manière dont est gérée cette ligne. Si le cpu adresse une requête au processeur d'e/s et qu'il attende que la requête soit exécutée pour en envoyer une autre, le système va être lent car les périphériques vont être inactifs pendant le temps de transfert de l'information sur la ligne série. Nous avons imaginé une gestion de la ligne série telle que pendant le traitement d'une requête, les autres requêtes continuent à arriver: de cette manière, les périphériques fonctionnent à leur pleine vitesse. Nous avons utilisé pour cela le plus simple protocole de dialogue: la procédure on/off
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Huang, Chien-Hsing, and 黃建興. "Serial to Parallel Interface (SPI slave)." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/31837264953271404013.

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Book chapters on the topic "Serial peripheral interface SPI"

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Wootton, Cliff. "Serial Peripheral Interface (SPI)." In Samsung ARTIK Reference. Apress, 2016. http://dx.doi.org/10.1007/978-1-4842-2322-2_21.

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Rossi, Mattia, Nicola Toscani, Marco Mauri, and Francesco Castelli Dezza. "Serial Communication Interface (SCI) Peripheral." In Introduction to Microcontroller Programming for Power Electronics Control Applications. CRC Press, 2021. http://dx.doi.org/10.1201/9781003196938-10.

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Gazi, Orhan, and A. Çağrı Arlı. "Serial Peripheral Interface." In State Machines using VHDL. Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-61698-4_4.

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Yadlapati, Avinash, and Hari Kishore Kakarla. "Constrained Level Validation of Serial Peripheral Interface Protocol." In Smart Computing and Informatics. Springer Singapore, 2017. http://dx.doi.org/10.1007/978-981-10-5544-7_73.

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Frenzel, Louis E. "Serial Peripheral Interface (SPI)." In Handbook of Serial Communications Interfaces. Elsevier, 2016. http://dx.doi.org/10.1016/b978-0-12-800629-0.00035-8.

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"8. SPI, Serial Peripheral Interface." In AVR - Mikrocontroller. De Gruyter Oldenbourg, 2015. http://dx.doi.org/10.1515/9783110407693-009.

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"The Serial Peripheral Interface." In Advances in Systems Analysis, Software Engineering, and High Performance Computing. IGI Global, 2017. http://dx.doi.org/10.4018/978-1-68318-000-5.ch013.

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Ibrahim, Dogan. "Serial Peripheral Interface Bus Operation." In SD Card Projects Using the PIC Microcontroller. Elsevier, 2010. http://dx.doi.org/10.1016/b978-1-85617-719-1.00011-7.

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Conference papers on the topic "Serial peripheral interface SPI"

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Hafeez, Muhammad, and Azilah Saparon. "IP Core of Serial Peripheral Interface (SPI) with AMBA APB Interface." In 2019 IEEE 9th Symposium on Computer Applications & Industrial Electronics (ISCAIE). IEEE, 2019. http://dx.doi.org/10.1109/iscaie.2019.8743871.

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Arshad, M. K. Md, U. Hashim, and Chew Ming Choo. "Characteristics of Serial Peripheral Interfaces (SPI) Timing Parameters for Optical Mouse Sensor." In 2006 IEEE International Conference on Semiconductor Electronics. IEEE, 2006. http://dx.doi.org/10.1109/smelec.2006.380697.

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Waite, Adam R., Jonathan H. Scholl, Joshua Baur, Adam Kimura, Michael Strizich, and Glen David Via. "IC Decomposition and Imaging Metrics to Optimize Design File Recovery for Verification and Validation." In ISTFA 2020. ASM International, 2020. http://dx.doi.org/10.31399/asm.cp.istfa2020p0202.

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Abstract This paper presents an in-depth review of the critical front end stages of the fabricated integrated circuit (IC) assurance workflow used for recovering the design stack-up of a fabricated IC. In this work, a Serial Peripheral Interface (SPI) embedded on a 130 nm static random access memory (SRAM) chip is targeted for recovering the full design stack-up. This process leverages state-of-the-art techniques for high precision material processing and image acquisition to optimize and ensure the highest accuracy in the feature extraction stage. To this end, we present metrics that can be leveraged for optimizing the front end stages of the assurance workflow. Novel imaging figures of merit (FOM) for optimizing image acquisition parameters have been developed and are presented. The Image Quality Factor (IQF) FOM was established to quantify overall image quality as it pertains to feature extraction and the Quality and Efficiency Rating (QER) FOM was demonstrated to optimize imaging parameter selection, balancing image quality and image acquisition time.
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Mi, Minhong, Steve Taliaferro, Rajen Murugan, and Daniel de Araujo. "Skinny trace compensation methodology for high speed serial interface." In 2012 IEEE 16th Workshop on Signal and Power Integrity (SPI). IEEE, 2012. http://dx.doi.org/10.1109/sapiw.2012.6222900.

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Gaidhane, Awani N., and Manish Pankaj Khorgade. "FPGA Implementation of Serial Peripheral Interface of FlexRay Controller." In 2011 UkSim 13th International Conference on Computer Modelling and Simulation (UKSim). IEEE, 2011. http://dx.doi.org/10.1109/uksim.2011.33.

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Jamaludin, Izhar Izzudin bin, and Hasliza binti Hassan. "Design and Analysis of Serial Peripheral Interface for Automotive Controller." In 2020 IEEE Student Conference on Research and Development (SCOReD). IEEE, 2020. http://dx.doi.org/10.1109/scored50371.2020.9250981.

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Anand N, George Joseph, Suwin Sam Oommen, and R. Dhanabal. "Design and implementation of a high speed Serial Peripheral Interface." In 2014 International Conference on Advances in Electrical Engineering (ICAEE). IEEE, 2014. http://dx.doi.org/10.1109/icaee.2014.6838431.

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Mohd Noor, NurQamarina binti, and Azilah Saparon. "FPGA implementation of high speed serial peripheral interface for motion controller." In 2012 IEEE Symposium on Industrial Electronics and Applications (ISIEA 2012). IEEE, 2012. http://dx.doi.org/10.1109/isiea.2012.6496676.

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Pandey, Anil Kumar, Amit Jangale, and Sujanth Narayan. "Signal Integrity and Compliance Test of DSI and CSI2 Serial Interface over MIPI D-PHY." In 2020 IEEE 24th Workshop on Signal and Power Integrity (SPI). IEEE, 2020. http://dx.doi.org/10.1109/spi48784.2020.9218161.

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Ekekwe, Ndubuisi, Ralph Etienne-Cummings, and Peter Kazanzides. "Incremental Encoder Based Position and Velocity Measurements VLSI Chip with Serial Peripheral Interface." In 2007 IEEE International Symposium on Circuits and Systems. IEEE, 2007. http://dx.doi.org/10.1109/iscas.2007.378451.

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