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Journal articles on the topic 'SEU mitigation'

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1

HEIDERGOTT, W. F. "SYSTEM LEVEL SINGLE EVENT UPSET MITIGATION STRATEGIES." International Journal of High Speed Electronics and Systems 14, no. 02 (June 2004): 341–52. http://dx.doi.org/10.1142/s0129156404002399.

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Use of a systems engineering process and the application of techniques and methods of fault tolerant systems are applicable to the development of a mitigation strategy for Single Event Upsets (SEU). Specific methods of fault avoidance, fault masking, detection, containment, and recovery techniques are important elements in the mitigation of single event upsets. Fault avoidance through the use of SEU hardened technology, fault masking using coding and redundancy provisions, and solutions applied at the subsystem and system level are available to the system developer. Validation and verification of SEU mitigation and performance of fault tolerance provisions are essential elements of systems design for operation in energetic particle environments.
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2

Graham, P., M. Caffrey, D. E. Johnson, N. Rollins, and M. Wirthlin. "Seu mitigation for half-latches in xilinx virtex FPGAs." IEEE Transactions on Nuclear Science 50, no. 6 (December 2003): 2139–46. http://dx.doi.org/10.1109/tns.2003.820744.

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3

Pratt, Brian, Michael Caffrey, James F. Carroll, Paul Graham, Keith Morgan, and Michael Wirthlin. "Fine-Grain SEU Mitigation for FPGAs Using Partial TMR." IEEE Transactions on Nuclear Science 55, no. 4 (August 2008): 2274–80. http://dx.doi.org/10.1109/tns.2008.2000852.

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4

Batista, Antonio J. N., Carlos Leong, Bruno Santos, Ana Fernandes, Ana Rita Ramos, Joana P. Santos, José G. Marques, et al. "SEU mitigation exploratory tests in a ITER related FPGA." Fusion Engineering and Design 118 (May 2017): 111–16. http://dx.doi.org/10.1016/j.fusengdes.2017.03.106.

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5

Julai, Norhuzaimin. "Soft Error Mitigation on Dual Rail Latch." Applied Mechanics and Materials 833 (April 2016): 119–25. http://dx.doi.org/10.4028/www.scientific.net/amm.833.119.

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A single event upset (SEU) or soft error is defined as a temporary error on digital electronics due to the effect of radiation. Such an error can cause system failure, e.g. a deadlock in an asynchronous system or production of incorrect outputs due to data corruption. With increasing system complexities and integration scale, transistors have become more vulnerable to soft error, necessitating analysis of soft error in circuits, which is the focus of this thesis. Vulnerability of circuits to soft errors is further aggravated by several factors, such as variations in the process and temperatures. Process variations are inaccuracies in the manufacturing process which may lead to deterioration of circuit performance and increase in power consumption. Temperature variation degrades the threshold voltage, carrier mobility and velocity saturation of transistor. As a result of degrading carrier mobility, the drain current becomes lower thus increasing the sensitivity of the node to SEU.
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6

Huang, Zheng Feng, and Mao Xiang Yi. "BISS: A Built-In SEU Sensor for Soft Error Mitigation." Applied Mechanics and Materials 130-134 (October 2011): 4228–31. http://dx.doi.org/10.4028/www.scientific.net/amm.130-134.4228.

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This paper presents a built-in SEU sensor (BISS) to detect soft errors in CMOS digital systems. BISS detects SEU-induced soft errors by monitoring the meta-stability in the flip-flops. BISS includes positive pulse generator, footed dynamic inverter and keeper. SPICE simulations validate the approach. Experiments show minor overhead in terms of area. BISS can yield 80% error coverage at the cost of 22% area overhead. As its prominent advantage, insertion of BISS will incur minimal performance degradation.
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7

Nidhin, T. S., Anindya Bhattacharyya, R. P. Behera, and T. Jayanthi. "A Review on SEU Mitigation Techniques for FPGA Configuration Memory." IETE Technical Review 35, no. 2 (January 23, 2017): 157–68. http://dx.doi.org/10.1080/02564602.2016.1265905.

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8

Wang, Peng, Chengxiang Jiang, Zhen Li, Qiannan Xue, and Yi Tian. "SEU Mitigation for SRAM Based on Dual Redundancy Check Method." International Journal of Hybrid Information Technology 7, no. 5 (September 30, 2014): 191–200. http://dx.doi.org/10.14257/ijhit.2014.7.5.18.

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9

He, Guanghui, Sijie Zheng, and Naifeng Jing. "A Hierarchical Scrubbing Technique for SEU Mitigation on SRAM-Based FPGAs." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28, no. 10 (October 2020): 2134–45. http://dx.doi.org/10.1109/tvlsi.2020.3010647.

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10

Cheng Gao, Wei Guo, and Jiaoying Huang. "Single-Event-Upset (SEU) Mitigation Techniques for Routing Resources of SRAM-FPGA." International Journal of Advancements in Computing Technology 4, no. 20 (November 30, 2012): 205–13. http://dx.doi.org/10.4156/ijact.vol4.issue20.25.

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11

Yan, Yunyi, Changqing Hu, Lingxia Zhang, Weikang Ning, and Baolong Guo. "Multilevel Redundancy Allocation for SEU Mitigation of DSP Codes Based on OMA." IEEE Transactions on Device and Materials Reliability 19, no. 1 (March 2019): 201–10. http://dx.doi.org/10.1109/tdmr.2019.2899611.

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12

She, Xiaoxuan, and N. Li. "Reducing Critical Configuration Bits via Partial TMR for SEU Mitigation in FPGAs." IEEE Transactions on Nuclear Science 64, no. 10 (October 2017): 2626–32. http://dx.doi.org/10.1109/tns.2017.2743198.

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13

Marshall, P. W., C. J. Dale, T. R. Weatherford, M. La Macchia, and K. A. LaBel. "Particle-induced mitigation of SEU sensitivity in high data rate GaAs HIGFET technologies." IEEE Transactions on Nuclear Science 42, no. 6 (1995): 1844–49. http://dx.doi.org/10.1109/23.489225.

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14

Phillips, Stanley D., Tushar Thrivikraman, Aravind Appaswamy, Akil K. Sutton, John D. Cressler, Gyorgy Vizkelethy, Paul Dodd, and Robert A. Reed. "A Novel Device Architecture for SEU Mitigation: The Inverse-Mode Cascode SiGe HBT." IEEE Transactions on Nuclear Science 56, no. 6 (December 2009): 3393–401. http://dx.doi.org/10.1109/tns.2009.2033185.

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15

Baig, Hasan, Jeong-A. Lee, and Zahid Ali Siddiqui. "A Low-Overhead Multiple-SEU Mitigation Approach for SRAM-based FPGAs with Increased Reliability." IEEE Transactions on Nuclear Science 61, no. 3 (June 2014): 1389–99. http://dx.doi.org/10.1109/tns.2014.2315432.

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16

Keller, Andrew M., and Michael J. Wirthlin. "Benefits of Complementary SEU Mitigation for the LEON3 Soft Processor on SRAM-Based FPGAs." IEEE Transactions on Nuclear Science 64, no. 1 (January 2017): 519–28. http://dx.doi.org/10.1109/tns.2016.2635028.

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17

Aguiar, Ygor Q., Frédéric Wrobel, Jean-Luc Autran, Paul Leroux, Frédéric Saigné, Vincent Pouget, and Antoine D. Touboul. "Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions." Aerospace 7, no. 2 (February 5, 2020): 12. http://dx.doi.org/10.3390/aerospace7020012.

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Due to the intrinsic masking effects of combinational circuits in digital designs, Single-Event Transient (SET) effects were considered irrelevant compared to the data rupture caused by Single-Event Upset (SEU) effects. However, the importance of considering SET in Very-Large-System-Integration (VLSI) circuits increases given the reduction of the transistor dimensions and the logic data path depth in advanced technology nodes. Accordingly, the threat of SET in electronics systems for space applications must be carefully addressed along with the SEU characterization. In this work, a systematic prediction methodology to assess and improve the SET immunity of digital circuits is presented. Further, the applicability to full-custom and cell-based design methodologies are discussed, and an analysis based on signal probability and pin assignment is proposed to achieve a more application-efficient SET-aware optimization of synthesized circuits. For instance, a SET-aware pin assignment can provide a reduction of 37% and 16% on the SET rate of a NOR gate for a Geostationary Orbit (GEO) and the International Space Station (ISS) orbit, respectively.
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18

Shen, Zhongtao, Changqing Feng, Shanshan Gao, Deliang Zhang, Di Jiang, Shubin Liu, and Qi An. "Study on FPGA SEU Mitigation for the Readout Electronics of DAMPE BGO Calorimeter in Space." IEEE Transactions on Nuclear Science 62, no. 3 (June 2015): 1010–15. http://dx.doi.org/10.1109/tns.2015.2427293.

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19

GOSHEBLAGH, REZA OMIDI, and KARIM MOHAMMADI. "SEU-SECURE PARITY PREDICTION MULTIPLIER ON SRAM-BASED FPGAs." Journal of Circuits, Systems and Computers 23, no. 06 (May 14, 2014): 1450081. http://dx.doi.org/10.1142/s0218126614500819.

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Modern SRAM-based field programmable gate array (FPGA) devices offer high capability in implementing satellites and space systems. Unfortunately, these devices are extremely sensitive to various kinds of unwanted effects induced by space radiations especially single-event upsets (SEUs) as soft errors in configuration memory. To face this challenge, a variety of soft error mitigation techniques have been adopted in literature. In this paper, we describe an area-efficient multiplier architecture based on SRAM-FPGA that provides the self-checking capability against SEU faults. The proposed design approach, which is based on parity prediction, is able to concurrently detect the SEU faults. The implementation results of the proposed architecture reveal that the average area and delay overheads are respectively 25% and 34% in comparison with the plain version while the conventional duplication with comparison (DWC) architecture imposes 117% and 22% overheads. Moreover, the single and multi-upset fault injection experiments reveal that the proposed architecture averagely provides the failure coverage of 83% and 79% while the failure coverage of the duplicated structure is 85% and 84%, respectively for SEU and MEU faults.
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20

Gantel, Laurent, Quentin Berthet, Emna Amri, Alexandre Karlov, and Andres Upegui. "Fault-Tolerant FPGA-Based Nanosatellite Balancing High-Performance and Safety for Cryptography Application." Electronics 10, no. 17 (September 3, 2021): 2148. http://dx.doi.org/10.3390/electronics10172148.

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With the growth of the nano-satellites market, the usage of commercial off-the-shelf FPGAs for payload applications is also increasing. Due to the fact that these commercial devices are not radiation-tolerant, it is necessary to enhance them with fault mitigation mechanisms against Single Event Upsets (SEU). Several mechanisms such as memory scrubbing, triple modular redundancy (TMR) and Dynamic and Partial Reconfiguration (DPR), can help to detect, isolate and recover from SEU faults. In this paper, we introduce a dynamically reconfigurable platform equipped with configuration memory scrubbing and TMR mechanisms. We study their impacts when combined with DPR, providing three different execution modes: low-power, safe and high-performance mode. The fault detection mechanism permits the system to measure the radiation level and to estimate the risk of future faults. This enables the possibility of dynamically selecting the appropriate execution mode in order to adopt the best trade-off between performance and reliability. The relevance of the platform is demonstrated in a nano-satellite cryptographic application running on a Zynq UltraScale+ MPSoC device. A fault injection campaign has been performed to evaluate the impact of faulty configuration bits and to assess the efficiency of the proposed mitigation and the overall system reliability.
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21

Hoque, Khaza Anuarul, Otmane Ait Mohamed, and Yvon Savaria. "Formal analysis of SEU mitigation for early dependability and performability analysis of FPGA-based space applications." Journal of Applied Logic 25 (December 2017): 47–68. http://dx.doi.org/10.1016/j.jal.2017.03.001.

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22

Hu, Xueye, Jinhong Wang, Reid Pinkham, Suen Hou, Thomas Schwarz, and Bing Zhou. "A multi-layer SEU mitigation strategy to improve FPGA design robustness for the ATLAS muon spectrometer upgrade." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 939 (September 2019): 30–35. http://dx.doi.org/10.1016/j.nima.2019.05.045.

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23

Cabanas-Holmen, Manuel, Ethan H. Cannon, Salim Rabaa, Tony Amort, Jon Ballast, Michael Carson, Duncan Lam, and Roger Brees. "Robust SEU Mitigation of 32 nm Dual Redundant Flip-Flops Through Interleaving and Sensitive Node-Pair Spacing." IEEE Transactions on Nuclear Science 60, no. 6 (December 2013): 4374–80. http://dx.doi.org/10.1109/tns.2013.2288090.

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24

Berg, Melanie, C. Poivey, D. Petrick, D. Espinosa, Austin Lesea, K. A. LaBel, M. Friendlich, H. Kim, and Anthony Phan. "Effectiveness of Internal Versus External SEU Scrubbing Mitigation Strategies in a Xilinx FPGA: Design, Test, and Analysis." IEEE Transactions on Nuclear Science 55, no. 4 (August 2008): 2259–66. http://dx.doi.org/10.1109/tns.2008.2001422.

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25

Yaa’cob, Norsuzila, Muhammad Fauzan Ayob, Noraisyah Tajudin, Murizah Kassim, and Azita Laily Yusof. "Single event latch-up detection for nano-satellite external solar radiation mitigation system." Bulletin of Electrical Engineering and Informatics 10, no. 1 (February 1, 2021): 39–45. http://dx.doi.org/10.11591/eei.v10i1.2488.

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This paper presents the single event latch-up (SEL) detection for nano-satellite external solar radiation mitigation system. In this study, the SEL detection analysis was conducted using circuit test and simulation. An electrical power subsystem (EPS) is a part of all CubeSat bus subsystems and it comprises solar arrays, rechargeable batteries, and a power control and distribution unit (PCDU). In order to extract the maximum power generated by the solar arrays, a peak power tracking topology is required. This may lead to the SEL with the presence of high voltage produced by solar. To overcome the SEL problems, the circuit test and simulation must be done so that the flow of SEL will be easily detected and mitigate. The method that been used are by using microcontroller, the SEL will be created in the certain time. The programable integrated circuit (PIC) are used to mitigate SEL effect. It indicates that, the SEL occur very fast in certain time. When the simulation is conducted by using SPENVIS, the result shows, only single event upset (SEU) was affected on UiTMSAT-1.
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26

Lourenco, Nelson E., Stanley D. Phillips, Troy D. England, Adilson S. Cardoso, Zachary E. Fleetwood, Kurt A. Moen, Dale McMorrow, et al. "An Investigation of Single-Event Effects and Potential SEU Mitigation Strategies in Fourth-Generation, 90 nm SiGe BiCMOS." IEEE Transactions on Nuclear Science 60, no. 6 (December 2013): 4175–83. http://dx.doi.org/10.1109/tns.2013.2290301.

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27

S.Yoganand, S. Md Yousuf, C. Balaji Kumar,. "Verification of Fault Tolerant Techniques in Finite State Machines Using Simulation Based Fault Injection Targeted At FPGAs for SEU Mitigation." International Journal of Innovative Research in Science, Engineering and Technology 1, no. 1 (January 15, 2012): 109–15. http://dx.doi.org/10.15680/ijirset.2012.0101013.

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28

Ricardo Coelho Fonseca, Sebastião. "MANIFESTAÇÕES PATOLÓGICAS EM POSTES DE CONCRETO ARMADO EM DECORRÊNCIA DO SEU PROCESSO PRODUTIVO." Revista Científica Semana Acadêmica 9, no. 209 (September 20, 2021): 1–31. http://dx.doi.org/10.35265/2236-6717-209-9223.

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Pathological manifestations originate mainly in the production process of the poles, and knowing which measures can be taken in the production process to avoid pathological manifestations in the poles is the main problem. The purpose of this research is to elaborate these measures that will mitigate the pathological manifestations present in the company, which are blisters, spots and segregation. For this, the entire fabrication will be evaluated, making a follow-up from the project, assembling the reinforcement, preparing the concrete, launching, densification and storage of the posts, and then the pathological manifestations in the parts that had their manufacturing process will be analyzed. accompanied, verifying the cause and effect relationship, to then elaborate necessary measures to minimize these problems of the produced poles. For this, service verification sheets, test reports and projects provided by the company will be used. That done, it was observed that the company was using burnt oil as a release agent and did not perform an adequate cleaning of the forms, resulting in dark spots on the posts and bubbles, and these still found a relationship with the wrong launch and thickening. Other than that, it was observed that segregation was directly related to the leakage of forms. With this, it is known that the mitigation of the company's pathological manifestations will be done with the use of an appropriate release agent, an adequate cleaning of the forms and its correct sealing, the densification of the concrete with sufficient number of vibrators for its uniform densification together with the training of the employees responsible for concreting the posts.
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29

CRESSLER, JOHN D. "TOTAL-DOSE AND SINGLE-EVENT EFFECTS IN SILICON-GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTORS." International Journal of High Speed Electronics and Systems 14, no. 02 (June 2004): 489–501. http://dx.doi.org/10.1142/s0129156404002478.

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We present an overview of radiation effects in silicon-germanium heterojunction bipolar transistors ( SiGe HBT). We begin by reviewing SiGe HBTs, and then examine the impact of ionizing radiation on both the dc and ac performance of SiGe HBTs, the circuit-level impact of radiation-induced changes in the transistors, followed by single-event phenomena in SiGe HBT circuits. While ionizing radiation degrades both the dc and ac properties of SiGe HBTs, this degradation is remarkably minor, and is far better than that observed in even radiation-hardened conventional Si BJT technologies. This fact is particularly significant given that no intentional radiation hardening is needed to ensure this level of both device-level and circuit-level tolerance (typically multi-Mrad TID). SEU effects are pronounced in SiGe HBT circuits, as expected, but circuit-level mitigation schemes will likely be suitable to ensure adequate tolerance for many orbital missions. SiGe HBT technology thus offers many interesting possibilities for space-borne electronic systems.
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30

Aranda, Luis, Pedro Reviriego, and Juan Maestro. "Protecting Image Processing Pipelines against Configuration Memory Errors in SRAM-Based FPGAs." Electronics 7, no. 11 (November 15, 2018): 322. http://dx.doi.org/10.3390/electronics7110322.

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Image processing systems are widely used in space applications, so different radiation-induced malfunctions may occur in the system depending on the device that is implementing the algorithm. SRAM-based FPGAs are commonly used to speed up the image processing algorithm, but then the system could be vulnerable to configuration memory errors caused by single event upsets (SEUs). In those systems, the captured image is streamed pixel by pixel from the camera to the FPGA. Certain local operations such as median or rank filters need to process the image locally instead of pixel by pixel, so some particular pixel caching structures such as line-buffer-based pipelines can be used to accelerate the filtering process. However, an SRAM-based FPGA implementation of these pipelines may have malfunctions due to the mentioned configuration memory errors, so an error mitigation technique is required. In this paper, a novel method to protect line-buffer-based pipelines against SRAM-based FPGA configuration memory errors is presented. Experimental results show that, using our protection technique, considerable savings in terms of FPGA resources can be achieved while maintaining the SEU protection coverage provided by other classic pipeline protection schemes.
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31

Renken, PhD, Katharina, Andrea M. Jackman, PhD, and Mario G. Beruvides, PhD, PE. "Quantifying the relationship between predisaster mitigation spending and major disaster declarations for US states and territories." Journal of Emergency Management 18, no. 4 (July 1, 2020): 341–47. http://dx.doi.org/10.5055/jem.2020.0478.

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Since the Stafford Act of 1988, the process of obtaining a formal Major Disaster Declaration has been codified for national implementation, with tasks defined at the smallest levels of local government up to the President. The Disaster Mitigation Act of 2000 (DMA 2000) placed additional requirements on local government to plan for mitigation activities within their jurisdictions. The goal of DMA 2000 was to not only implement more mitigative actions at the local level, but also initiate a process by which local governments could set up ongoing conversations and collaborative efforts with neighboring jurisdictions to ensure continuous, proactive measures were taken against the impacts of disasters. Based on the increased attention paid to mitigation and planning activities, a reasonable expectation would be to see a decline in the number of major disaster declarations since DMA 2000. However, simple correlation analysis shows that since DMA 2000, the number of major disaster declarations continues to increase. This article is intended as a preliminary study to encourage more detailed analysis in the future of the impacts of federal policy on local-level disaster prevention.
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32

FERNANDEZ, MARIO A., and ADAM J. DAIGNEAULT. "MONEY DOES GROW ON TREES: IMPACTS OF THE PARIS AGREEMENT ON THE NEW ZEALAND ECONOMY." Climate Change Economics 09, no. 03 (August 2018): 1850005. http://dx.doi.org/10.1142/s2010007818500057.

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The Paris Agreement (PA) asserts that emissions pathways of greenhouse gases (GHG) should be consistent with holding the increase in global temperature below 1.5[Formula: see text]C or 2[Formula: see text]C above pre-industrial levels. New Zealand (NZ) committed to reduce emissions to 30% below 2005 levels by 2030. The purpose of this paper is to assess the range of economic costs for NZ derived from the commitment under the PA, conditional to the mitigation potential of forestry carbon sequestration (FCS), pricing agricultural emissions, and linking the NZ emissions tradable scheme (NZ ETS) to the European Union ETS (EU ETS). We use a general equilibrium model and “soft-link” it with the global timber model. We found that NZ can meet the PA terms; however, important GDP decreases may arise due to limited domestic mitigation potential from the energy and transport sectors. FCS plays a significant role in mitigating the negative impacts, where the benefits of FCS outweigh those of pricing agricultural emission and linking the NZ ETS.
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33

Khoshabi Nobar, Sina, and Javad Musevi Niya. "Robust mitigation of selfish misbehavior in wireless networks." Security and Communication Networks 8, no. 9 (December 21, 2014): 1772–79. http://dx.doi.org/10.1002/sec.1141.

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34

Morris, John C., Madeleine W. McNamara, and Amy Belcher. "Building Resilience Through Collaboration Between Grassroots Citizen Groups and Governments: Two Case Studies." Public Works Management & Policy 24, no. 1 (September 30, 2018): 50–62. http://dx.doi.org/10.1177/1087724x18803116.

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As sea level rise grows in importance as a public policy issue, coastal communities must search for alternative strategies to develop resilience to the growing threat. One way to tap into existing resources involves partnerships between local governments and citizen-based environmental organizations to explore strategies aimed at mitigating the effects of sea level rise and recurrent flooding in coastal communities. This article presents two cases of collaboration between governments and existing citizen groups in a region among the most threatened by sea level rise in the continental United States—Hampton Roads, Virginia. We find that these efforts are quite effective in developing and implementing low-cost mitigation strategies that can protect infrastructure while applying social capital to serve as a bridge between citizens and government.
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35

Bogalecka, M. "Mitigation of sea accident consequences." IOP Conference Series: Earth and Environmental Science 642, no. 1 (January 1, 2021): 012011. http://dx.doi.org/10.1088/1755-1315/642/1/012011.

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36

Lacarbonara, Walter, and Stefano Ballerini. "Vibration mitigation of guyed masts via tuned pendulum dampers." Structural Engineering and Mechanics 32, no. 4 (July 10, 2009): 517–29. http://dx.doi.org/10.12989/sem.2009.32.4.517.

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37

Septaria, Kiki, and Binar Ayu Dewanti. "Implementation of Project Based Learning on Student Reasoning on Covid-19 Disaster Mitigation." Prisma Sains : Jurnal Pengkajian Ilmu dan Pembelajaran Matematika dan IPA IKIP Mataram 9, no. 1 (June 1, 2021): 20. http://dx.doi.org/10.33394/j-ps.v9i1.2951.

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Disaster mitigation is activity that very important to teach and learning to someone as early as possible. Disaster mitigation can teach through positive activities such as school learning. This study aims to describe the implementation of Project Based Learning on students' reasoning for Class VII Covid-19 Disaster Mitigation at SMP 1 Maduran. This research is very much needed to see students' reasoning for understanding the concept of Covid-19 disaster mitigation and to train Covid-19 disaster preparedness as early as possible for students of SMPN 1 Maduran. The research method used One Group Pre-test Post-test Design with 30 students of grade VII at SMPN 1 Maduran. The results generally showed increase student reasoning with an average N-Gain score of 0.68 in the moderate category. The results of the increase in reasoning on each indicator, (1) namely explaining the relationship between the elements in the problem increased with an average N-Gain score of 0.58 in the moderate category, (2) made the problem solving project structure increase with an average N-Gain score of 0.76 with the High category, and (3) realizing projects that have been designed in the form of completion results increased with an average N-Gain score of 0.67 in the moderate category. Based on the data generated, it can be shown that learning using Project Based Learning is able to improve students' reasoning in class VII Covid-19 disaster mitigation material at SMPN 1 Maduran. Future research expected to be able measure students' creativity in the process of problems solving in mitigating the Covid-19 disaster.
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Lee, Hsien Hua. "Seismic and vibration mitigation for the A-type offshore template platform system." Structural Engineering and Mechanics 6, no. 3 (April 25, 1998): 347–62. http://dx.doi.org/10.12989/sem.1998.6.3.347.

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Chen, Genda, Gabriel T. Garrett, Chaoqiang Chen, and Franklin Y. Cheng. "Piezoelectric friction dampers for earthquake mitigation of buildings: design, fabrication, and characterization." Structural Engineering and Mechanics 17, no. 3_4 (March 25, 2004): 539–56. http://dx.doi.org/10.12989/sem.2004.17.3_4.539.

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40

Kim, Hyo-Jin, Jeong-In Chang, and Seung-Hoon Yoo. "Non-Market Valuation of Water Pollution Remediation and Disaster Risk Mitigation Functions: The Case of Nakdong River Estuary in South Korea." Sustainability 11, no. 3 (February 1, 2019): 770. http://dx.doi.org/10.3390/su11030770.

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The Nakdong river estuary in South Korea has two important functions: first, remediating water pollution from the Nakdong river; second, mitigating the risk of disaster caused by waves from the open sea. The two functions of the Nakdong river estuary have been continuously threatened due to constant development pressure. This short note tries to investigate the non-market value of the water pollution remediation and disaster risk mitigation functions. For this purpose, 1000 households throughout the country were randomly selected, and a choice experiment (CE) survey of them was implemented in September 2017. The two attributes considered here are water pollution remediation and disaster risk mitigation. An increase in the yearly income tax was also considered as an attribute. The results of applying the CE approach show that the non-market values of a 1%p increase in the water pollution remediation ability and a 1 m decrease in the wave height of the estuary are KRW 105 (USD 0.09) and KRW 501 (USD 0.44), respectively, per household per year. These figures can be used to establish and execute marine spatial planning for the estuary.
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Yaseen, Qussai, Qutaibah Althebyan, Brajendra Panda, and Yaser Jararweh. "Mitigating insider threat in cloud relational databases." Security and Communication Networks 9, no. 10 (January 5, 2016): 1132–45. http://dx.doi.org/10.1002/sec.1405.

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42

Conte, E., and A. De Maio. "Mitigation Techniques for Non-Gaussian Sea Clutter." IEEE Journal of Oceanic Engineering 29, no. 2 (April 2004): 284–302. http://dx.doi.org/10.1109/joe.2004.826901.

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43

Karaczun, Zbigniew M. "Climate protection as an ethical challenge." Studia Ecologiae et Bioethicae 15, no. 4 (December 31, 2017): 23–30. http://dx.doi.org/10.21697/seb.2017.15.4.3.

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Mitigation of the global climate change is one of the most important challenges facing humanity in the 21st century. It will require significant changes in the economy, consumption, the style of life. However, the climate protection is also an ethical problem. It is a problem of responsibility for the climate – the common good of all creatures. This article discusses selected ethical issues that are related to the implementation of climate policy. It was indicated that the acceptance of research results indicating human responsibility for climate change is a prerequisite for active climate action. It has also been found that the common but differentiated responsibility of individual countries is primarily due to their historical greenhouse gas emissions. It also results from the fact that most of the significant negative impacts of climate change will occur in the poorest countries, whose share of greenhouse gas emissions is very small. The rejection of human responsibility for climate change and the responsibility of rich societies for already occurring changes and their effects in developing countries means that climate mitigation actions are not being sufficiently addressed. Behind the Pope Francis repeated that without changing ethical attitudes towards the natural environment and accepting responsibility for the whole world around us, effective climate protection would not be possible.
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44

Tsai, C. S., Yung-Chang Lin, Wen-Shin Chen, Tsu-Cheng Chiang, and Bo-Jen Chen. "Piecewise exact solution for seismic mitigation analysis of bridges equipped with sliding-type isolators." Structural Engineering and Mechanics 35, no. 2 (May 30, 2010): 205–15. http://dx.doi.org/10.12989/sem.2010.35.2.205.

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45

Giotis, Kostas, George Androulidakis, and Vasilis Maglaris. "A scalable anomaly detection and mitigation architecture for legacy networks via an OpenFlow middlebox." Security and Communication Networks 9, no. 13 (October 2, 2015): 1958–70. http://dx.doi.org/10.1002/sec.1368.

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46

Ahmed, Firoz, and Young-Bae Ko. "Mitigation of black hole attacks in Routing Protocol for Low Power and Lossy Networks." Security and Communication Networks 9, no. 18 (October 26, 2016): 5143–54. http://dx.doi.org/10.1002/sec.1684.

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47

Eberhardt, E., L. Bonzanigo, and S. Loew. "Long-term investigation of a deep-seated creeping landslide in crystalline rock. Part II. Mitigation measures and numerical modelling of deep drainage at Campo Vallemaggia." Canadian Geotechnical Journal 44, no. 10 (October 2007): 1181–99. http://dx.doi.org/10.1139/t07-044.

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For more than 200 years, the villages of Campo Vallemaggia and Cimalmotto have been slowly moving on top of a deep-seated landslide in the southern Swiss Alps. Numerous mitigation measures have been carried out during this time to stabilize the landslide but with limited to no success. Those attempts largely focussed on minimizing erosion at the toe of the landslide. More recently, the need to stabilize the slope began to intensify, as with each passing year the two villages were being pushed closer to the edge of a 100 m high erosion front at the foot of the landslide. This led to an extensive investigation and monitoring campaign to better understand the factors controlling the landslide movements, which as reported in Part I (see companion paper, this issue), pointed to high artesian pore pressures as being the primary destabilizing mechanism. Here in Part II, the arguments supporting the need for a deep drainage solution are reported, as is the history, implementation, and measured response of the Campo Vallemaggia landslide to the various mitigative measures taken. Numerical modelling results are also presented, based on hydromechanically coupled distinct-element models, to help demonstrate why deep drainage succeeded where other mitigation measures failed.
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Rottondi, Cristina, Marco Savi, Giacomo Verticale, and Christoph Krauß. "Mitigation of peer-to-peer overlay attacks in the automatic metering infrastructure of smart grids." Security and Communication Networks 8, no. 3 (March 17, 2014): 343–59. http://dx.doi.org/10.1002/sec.983.

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Debbarma, Rama, and Subrata Chakraborty. "Robust design of liquid column vibration absorber in seismic vibration mitigation considering random system parameter." Structural Engineering and Mechanics 53, no. 6 (March 25, 2015): 1127–41. http://dx.doi.org/10.12989/sem.2015.53.6.1127.

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Wong, Kaufui V. "Mitigation and Adaptation Responses to Sea Level Rise." Open Hydrology Journal 9, no. 1 (June 26, 2015): 24–27. http://dx.doi.org/10.2174/1874378101509010024.

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