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Relevant bibliographies by topics / Silicon Controlled Rectifier (SCR)

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Journal articles

Academic literature on the topic 'Silicon Controlled Rectifier (SCR)'

Author: Grafiati

Published: 4 June 2021

Last updated: 26 January 2023

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Journal articles on the topic "Silicon Controlled Rectifier (SCR)"

1

Stoliar, P., I. Akita, O. Schneegans, M. Hioki, and M. J. Rozenberg. "A spiking neuron implemented in VLSI." Journal of Physics Communications 6, no. 2 (2022): 021001. http://dx.doi.org/10.1088/2399-6528/ac4e2a.

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Abstract A VLSI implementation of a Silicon-Controlled Rectifier (SCR)-based Neuron that has the functionality of the leaky-integrate and fire model (LIF) of spiking neurons is introduced. The silicon-controlled rectifier is not straightforward to efficiently migrate to VLSI. Therefore, we propose a MOS transistor-based circuit that provides the same functionality as the SCR. The results of this work are based on Spice simulation using open libraries and on VLSI layout and post layout simulations for a 65 nm CMOS process.

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2

Prasetia, Vicky, and Roy Aries Permana T. "ANALISA PENGGUNAAN SILICON CONTROLLED RECTIFIER PADA ELEKTROPLATING TEMBAGA/BAJA KARBON RENDAH." Infotekmesin 10, no. 1 (2019): 6–11. http://dx.doi.org/10.35970/infotekmesin.v10i1.19.

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Electroplating is one of the engineering improvements in the characteristics of metal materials. Copper coating is a pre-coating before further coating for steel. The surface area of the material is in line with the strong current requirements required for the normal coating process. However, too much current flowing into the cathode results in erosion at the anode. Silicon Controlled Rectifier (SCR) is a component made of semiconductor silicon. It has a function as a controller or switch. Silicon Controlled Rectifiers can be used to reduce coating currents in copper electroplating. The setting of the coating current can be done on copper electroplating of low carbon steel cathodes with a cross-sectional area of 7500 mm2 of 4.5 A; 5 A; 6 A; 6.5 A and 6.7 A. The best copper coating results with a 10 minute coating time are shown in the current 6.5 A with a coating mass of 1.11 grams and 1.06 grams. This proves the need for a reduction in the maximum flow so that optimal coating is achieved.

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3

Jiang, Yibo, Hui Bi, and Hui Li. "Low trigger voltage bulk FinFET silicon controlled rectifier in nanotechnology." Modern Physics Letters B 32, no. 34n36 (2018): 1840072. http://dx.doi.org/10.1142/s0217984918400729.

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The bulk fin field-effect transistor (FinFET) has been the primary semiconductor technology in nanotechnology. To protect low supply voltage circuits based on FinFET, trigger voltage [Formula: see text] of the silicon controlled rectifier (SCR) which acts as electrostatic discharge (ESD) protection device should be lowered further. In this paper, in order to lower the [Formula: see text] an extra implant technique is proposed to form bridging well low trigger voltage FinFET SCR (FinFET BRLVTSCR). The experiments demonstrate that the trigger voltage can be lowered effectively. Moreover, the TCAD simulations bring an in-depth physical understanding of ESD current conduction and failure mechanism during ESD protection. Finally, the turn-on characteristic demonstrates proposed novel SCRs are fast and effective under TLP and very fast TLP (VFTLP) stress.

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4

Hou, Du, Yang, Liu, and Liu. "Area-Efficient Embedded Resistor-Triggered SCR with High ESD Robustness." Electronics 8, no. 4 (2019): 445. http://dx.doi.org/10.3390/electronics8040445.

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The trigger voltage of the direct-connected silicon-controlled rectifier (DCSCR) was effectively reduced for electrostatic discharge (ESD) protection. However, a deep NWELL (DNW) is required to isolate PWELL from P-type substrate (PSUB) in DCSCR, which wastes part of the layout area. An area-efficient embedded resistor-triggered silicon-controlled rectifier (ERTSCR) is proposed in this paper. As verified in a 0.3-μm CMOS process, the proposed ERTSCR exhibits lower triggering voltage due to series diode chains and embedded deep n-well resistor in the trigger path. Additionally, the proposed ERTSCR has a failure current of more than 5 A and a corresponding HBM ESD robustness of more than 8 KV. Furthermore, compared with the traditional DCSCR, to sustain the same ESD protection capability, the proposed ERTSCR will consume 10% less silicon area by fully utilizing the lateral dimension in the deep n-well extension region, while the proposed ERTSCR has a larger top metal width.

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5

Zhu, Xinyu, Shurong Dong, Fangjun Yu, et al. "Silicon-Controlled Rectifier Embedded Diode for 7 nm FinFET Process Electrostatic Discharge Protection." Nanomaterials 12, no. 10 (2022): 1743. http://dx.doi.org/10.3390/nano12101743.

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A new silicon-controlled rectifier embedded diode (SCR-D) for 7 nm bulk FinFET process electrostatic discharge (ESD) protection applications is proposed. The transmission line pulse (TLP) results show that the proposed device has a low turn-on voltage of 1.77 V. Compared with conventional SCR and diode string, the proposed SCR-D has an additional conduction path constituting by two additional inherent diodes, which results in a 1.8-to-2.2-times current surge capability as compared with the simple diode string and conventional SCR with the same size. The results show that the proposed device meets the 7 nm FinFET process ESD design window and has already been applied in actual circuits.

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6

Du, Feibo, Fei Hou, Wenqiang Song, et al. "An Improved Silicon-Controlled Rectifier (SCR) for Low-Voltage ESD Application." IEEE Transactions on Electron Devices 67, no. 2 (2020): 576–81. http://dx.doi.org/10.1109/ted.2019.2961124.

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7

Tian, Zhuo, та Bai Cheng Li. "Conduction Uniformity Improvement of ESD Protection Device in 0.35 μm Partially-Depleted SOI Salicided CMOS Technology". Applied Mechanics and Materials 687-691 (листопад 2014): 3251–54. http://dx.doi.org/10.4028/www.scientific.net/amm.687-691.3251.

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ComparedtobulkCMOStechnology,Silicon-on-Insulator (SOI) CMOS technology has many advantages, such as low power consumption, low leakage current, low parasitic capacitance and a low soft error rate from both alpha particles and cosmic rays. However,electrostatic discharge (ESD) protection in SOI technology is still a major substantial barrier to overcome for the poor thermal conductivity of isolation oxide and the absence of vertical diode and silicon controlled rectifier (SCR).

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8

Liu, Zhiwei, Juin J. Liou, and Jim Vinson. "Novel Silicon-Controlled Rectifier (SCR) for High-Voltage Electrostatic Discharge (ESD) Applications." IEEE Electron Device Letters 29, no. 7 (2008): 753–55. http://dx.doi.org/10.1109/led.2008.923711.

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9

Song, Wenqiang, Feibo Du, Fei Hou, and Zhiwei Liu. "A modified low voltage triggered silicon controlled rectifier (SCR) for ESD applications." Semiconductor Science and Technology 35, no. 5 (2020): 055015. http://dx.doi.org/10.1088/1361-6641/ab78f8.

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10

Chen, Ruibo, Hao Wei, Hongxia Liu, Zhiwei Liu, and Yaolin Chen. "Ultra-Low-Voltage-Triggered Silicon Controlled Rectifier ESD Protection Device for 2.5 V Nano Integrated Circuit." Nanomaterials 12, no. 23 (2022): 4250. http://dx.doi.org/10.3390/nano12234250.

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In this paper, an improved low-voltage-triggered silicon-controlled rectifier (LVTSCR) called an ultra-low-voltage-triggered SCR (ULVTSCR) is proposed and fabricated in a 40-nm CMOS process. By adding an external NMOSs-chain triggering component to the conventional LVTSCR, the proposed ULVTSCR can realize ~2 V lower trigger voltage. Meanwhile, the trigger voltage of the ULVTSCR is adjustable with the number of its incorporated NMOS transistors. Compared with the existing Diodes-chain Triggered SCR (DTSCR) scheme, the NMOSs-chain triggered ULVTSCR possesses a 25% lowered overshoot voltage in the same area consumption, and thus it is more suitable for 2.5 V circuits ESD protections considering the CDM protection applications.

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