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Journal articles on the topic 'Silicon Controlled Rectifier (SCR)'

Author: Grafiati

Published: 4 June 2021

Last updated: 26 January 2023

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1

Stoliar, P., I. Akita, O. Schneegans, M. Hioki, and M. J. Rozenberg. "A spiking neuron implemented in VLSI." Journal of Physics Communications 6, no. 2 (February 1, 2022): 021001. http://dx.doi.org/10.1088/2399-6528/ac4e2a.

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Abstract A VLSI implementation of a Silicon-Controlled Rectifier (SCR)-based Neuron that has the functionality of the leaky-integrate and fire model (LIF) of spiking neurons is introduced. The silicon-controlled rectifier is not straightforward to efficiently migrate to VLSI. Therefore, we propose a MOS transistor-based circuit that provides the same functionality as the SCR. The results of this work are based on Spice simulation using open libraries and on VLSI layout and post layout simulations for a 65 nm CMOS process.

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2

Prasetia, Vicky, and Roy Aries Permana T. "ANALISA PENGGUNAAN SILICON CONTROLLED RECTIFIER PADA ELEKTROPLATING TEMBAGA/BAJA KARBON RENDAH." Infotekmesin 10, no. 1 (January 30, 2019): 6–11. http://dx.doi.org/10.35970/infotekmesin.v10i1.19.

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Electroplating is one of the engineering improvements in the characteristics of metal materials. Copper coating is a pre-coating before further coating for steel. The surface area of the material is in line with the strong current requirements required for the normal coating process. However, too much current flowing into the cathode results in erosion at the anode. Silicon Controlled Rectifier (SCR) is a component made of semiconductor silicon. It has a function as a controller or switch. Silicon Controlled Rectifiers can be used to reduce coating currents in copper electroplating. The setting of the coating current can be done on copper electroplating of low carbon steel cathodes with a cross-sectional area of 7500 mm2 of 4.5 A; 5 A; 6 A; 6.5 A and 6.7 A. The best copper coating results with a 10 minute coating time are shown in the current 6.5 A with a coating mass of 1.11 grams and 1.06 grams. This proves the need for a reduction in the maximum flow so that optimal coating is achieved.

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3

Jiang, Yibo, Hui Bi, and Hui Li. "Low trigger voltage bulk FinFET silicon controlled rectifier in nanotechnology." Modern Physics Letters B 32, no. 34n36 (December 30, 2018): 1840072. http://dx.doi.org/10.1142/s0217984918400729.

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The bulk fin field-effect transistor (FinFET) has been the primary semiconductor technology in nanotechnology. To protect low supply voltage circuits based on FinFET, trigger voltage [Formula: see text] of the silicon controlled rectifier (SCR) which acts as electrostatic discharge (ESD) protection device should be lowered further. In this paper, in order to lower the [Formula: see text] an extra implant technique is proposed to form bridging well low trigger voltage FinFET SCR (FinFET BRLVTSCR). The experiments demonstrate that the trigger voltage can be lowered effectively. Moreover, the TCAD simulations bring an in-depth physical understanding of ESD current conduction and failure mechanism during ESD protection. Finally, the turn-on characteristic demonstrates proposed novel SCRs are fast and effective under TLP and very fast TLP (VFTLP) stress.

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Hou, Du, Yang, Liu, and Liu. "Area-Efficient Embedded Resistor-Triggered SCR with High ESD Robustness." Electronics 8, no. 4 (April 18, 2019): 445. http://dx.doi.org/10.3390/electronics8040445.

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The trigger voltage of the direct-connected silicon-controlled rectifier (DCSCR) was effectively reduced for electrostatic discharge (ESD) protection. However, a deep NWELL (DNW) is required to isolate PWELL from P-type substrate (PSUB) in DCSCR, which wastes part of the layout area. An area-efficient embedded resistor-triggered silicon-controlled rectifier (ERTSCR) is proposed in this paper. As verified in a 0.3-μm CMOS process, the proposed ERTSCR exhibits lower triggering voltage due to series diode chains and embedded deep n-well resistor in the trigger path. Additionally, the proposed ERTSCR has a failure current of more than 5 A and a corresponding HBM ESD robustness of more than 8 KV. Furthermore, compared with the traditional DCSCR, to sustain the same ESD protection capability, the proposed ERTSCR will consume 10% less silicon area by fully utilizing the lateral dimension in the deep n-well extension region, while the proposed ERTSCR has a larger top metal width.

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5

Zhu, Xinyu, Shurong Dong, Fangjun Yu, Feifan Deng, Kalya Shubhakar, Kin Leong Pey, and Jikui Luo. "Silicon-Controlled Rectifier Embedded Diode for 7 nm FinFET Process Electrostatic Discharge Protection." Nanomaterials 12, no. 10 (May 19, 2022): 1743. http://dx.doi.org/10.3390/nano12101743.

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A new silicon-controlled rectifier embedded diode (SCR-D) for 7 nm bulk FinFET process electrostatic discharge (ESD) protection applications is proposed. The transmission line pulse (TLP) results show that the proposed device has a low turn-on voltage of 1.77 V. Compared with conventional SCR and diode string, the proposed SCR-D has an additional conduction path constituting by two additional inherent diodes, which results in a 1.8-to-2.2-times current surge capability as compared with the simple diode string and conventional SCR with the same size. The results show that the proposed device meets the 7 nm FinFET process ESD design window and has already been applied in actual circuits.

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6

Du, Feibo, Fei Hou, Wenqiang Song, Long Chen, Yanlin Nie, Yihong Qing, Yichen Xu, Jizhi Liu, Zhiwei Liu, and Juin J. Liou. "An Improved Silicon-Controlled Rectifier (SCR) for Low-Voltage ESD Application." IEEE Transactions on Electron Devices 67, no. 2 (February 2020): 576–81. http://dx.doi.org/10.1109/ted.2019.2961124.

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7

Tian, Zhuo, and Bai Cheng Li. "Conduction Uniformity Improvement of ESD Protection Device in 0.35 μm Partially-Depleted SOI Salicided CMOS Technology." Applied Mechanics and Materials 687-691 (November 2014): 3251–54. http://dx.doi.org/10.4028/www.scientific.net/amm.687-691.3251.

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ComparedtobulkCMOStechnology,Silicon-on-Insulator (SOI) CMOS technology has many advantages, such as low power consumption, low leakage current, low parasitic capacitance and a low soft error rate from both alpha particles and cosmic rays. However,electrostatic discharge (ESD) protection in SOI technology is still a major substantial barrier to overcome for the poor thermal conductivity of isolation oxide and the absence of vertical diode and silicon controlled rectifier (SCR).

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8

Liu, Zhiwei, Juin J. Liou, and Jim Vinson. "Novel Silicon-Controlled Rectifier (SCR) for High-Voltage Electrostatic Discharge (ESD) Applications." IEEE Electron Device Letters 29, no. 7 (July 2008): 753–55. http://dx.doi.org/10.1109/led.2008.923711.

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9

Song, Wenqiang, Feibo Du, Fei Hou, and Zhiwei Liu. "A modified low voltage triggered silicon controlled rectifier (SCR) for ESD applications." Semiconductor Science and Technology 35, no. 5 (March 31, 2020): 055015. http://dx.doi.org/10.1088/1361-6641/ab78f8.

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10

Chen, Ruibo, Hao Wei, Hongxia Liu, Zhiwei Liu, and Yaolin Chen. "Ultra-Low-Voltage-Triggered Silicon Controlled Rectifier ESD Protection Device for 2.5 V Nano Integrated Circuit." Nanomaterials 12, no. 23 (November 29, 2022): 4250. http://dx.doi.org/10.3390/nano12234250.

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In this paper, an improved low-voltage-triggered silicon-controlled rectifier (LVTSCR) called an ultra-low-voltage-triggered SCR (ULVTSCR) is proposed and fabricated in a 40-nm CMOS process. By adding an external NMOSs-chain triggering component to the conventional LVTSCR, the proposed ULVTSCR can realize ~2 V lower trigger voltage. Meanwhile, the trigger voltage of the ULVTSCR is adjustable with the number of its incorporated NMOS transistors. Compared with the existing Diodes-chain Triggered SCR (DTSCR) scheme, the NMOSs-chain triggered ULVTSCR possesses a 25% lowered overshoot voltage in the same area consumption, and thus it is more suitable for 2.5 V circuits ESD protections considering the CDM protection applications.

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11

Lou, Lifang, Juin J. Liou, Shurong Dong, and Yan Han. "Silicon controlled rectifier (SCR) compact modeling based on VBIC and Gummel–Poon models." Solid-State Electronics 53, no. 2 (February 2009): 195–203. http://dx.doi.org/10.1016/j.sse.2008.11.007.

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12

Salcedo, J. A., J. J. Liou, and J. C. Bernier. "Novel and Robust Silicon-Controlled Rectifier (SCR) Based Devices for On-Chip ESD Protection." IEEE Electron Device Letters 25, no. 9 (September 2004): 658–60. http://dx.doi.org/10.1109/led.2004.834736.

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13

Du, Feibo, Zhiwei Liu, Jizhi Liu, Jun Wang, and Juin J. Liou. "A Compact and Self-Isolated Dual-Directional Silicon Controlled Rectifier (SCR) for ESD Applications." IEEE Transactions on Device and Materials Reliability 19, no. 1 (March 2019): 169–75. http://dx.doi.org/10.1109/tdmr.2019.2895208.

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14

Lou, Lifang, and Juin J. Liou. "An Improved Compact Model of Silicon-Controlled Rectifier (SCR) for Electrostatic Discharge (ESD) Applications." IEEE Transactions on Electron Devices 55, no. 12 (December 2008): 3517–24. http://dx.doi.org/10.1109/ted.2008.2006739.

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15

Zhang, Peng, Yuan Wang, Xing Zhang, XiaoHua Ma, and Yue Hao. "Novel silicon-controlled rectifier (SCR) for digital and high-voltage ESD power supply clamp." Science China Information Sciences 57, no. 2 (November 29, 2013): 1–6. http://dx.doi.org/10.1007/s11432-013-5016-1.

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16

Chen, Shen Li, and Chun Ju Lin. "Evaluation of ESD/LU Reliabilities by Different SCR Layout Types in a 0.35μm 3.3V CMOS Process." Advanced Materials Research 779-780 (September 2013): 1124–29. http://dx.doi.org/10.4028/www.scientific.net/amr.779-780.1124.

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This paper aimed at the evaluation of layout dependence on ESD/LU reliabilities in the 0.35μm 3.3V low-voltage triggered silicon-controlled-rectifier (LVTSCR) DUTs. In this work, the parameter of channel L in a pMOS and the parameter S of an SCR are varied to study the influence on trigger voltage (Vt1), holding voltage (Vh) and secondary breakdown current (It2), respectively. Eventually, it can be found that the layout illustration of type-2 has a higher It2than that of type-1, i.e., the ratio of (It2)type-2/(It2)type-1> 3 among all the LVTpSCRs. Meanwhile, the holding voltage of all SCR devices are latch-up free while operated at 3.3V. Therefore, the type-2 layouts of SCR devices are so excellent structure in the ESD/LU reliability considerations for this 0.35μm 3.3V CMOS process.

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17

Li, Mingzhu, Xiaowu Cai, Chuanbin Zeng, Xiaojing Li, Tao Ni, Juanjuan Wang, Duoli Li, Fazhan Zhao, and Zhengsheng Han. "The ESD Characteristics of a pMOS-Triggered Bidirectional SCR in SOI BCD Technology." Electronics 11, no. 4 (February 11, 2022): 546. http://dx.doi.org/10.3390/electronics11040546.

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In this work, the electrostatic discharge (ESD) characteristics of a pMOS-triggered bidirectional silicon-controlled rectifier (PTBSCR) that was fabricated in a 0.18 μm silicon-on-insulator (SOI) bipolar-CMOS-DMOS (BCD) process, is investigated. The multi-snapback phenomenon was observed under the transmission line pulsing (TLP) test system. It was found that gate voltage and inserting shallow trench isolation (STI) can significantly affect the trigger voltage and holding voltage. The underlying physical mechanism related to the multi-snapback phenomenon and the effects of gate voltage on the critical parameters was investigated through the experimental results and the assistance of technology computer-aided design (TCAD) simulations. The adjustments of gate voltage and STI on the critical ESD parameters of the device provide an effective design idea for low-voltage ESD protection in the SOI BCD process.

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18

Zhou, Guo Shun, Tu Ya, Shen Hua, and Shu Kun Zhao. "A Design of SCR Three-Phase AC-Voltage Regulator Simplify Circuitry Based on STM32 MCU." Applied Mechanics and Materials 433-435 (October 2013): 1271–75. http://dx.doi.org/10.4028/www.scientific.net/amm.433-435.1271.

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This paper introduces a novel design of three-phase AC-voltage regulation trigger circuitry using silicon controlled rectifier (SCR), and presents its application in an energy-saving design of oil extractor control system. The design employs photoelectric isolation technique and the inter-phase of three-phase power supply itself, only three groups of triggering signals are required to control the six thyristors conducting angles. The generation of high-precision triggering signals and PID control regulator functions are realized by programming the multiple high-performance timers and the AD interface of a STM32 microprocessor. Experiments and in-field tests have shown the feasibility of the proposed scheme.

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19

Chen, Shen-Li, and Yi-Cih Wu. "Sensing and Reliability Improvement of Electrostatic-Discharge Transient by Discrete Engineering for High-Voltage 60-V n-Channel Lateral-Diffused MOSFETs with Embedded Silicon-Controlled Rectifiers." Sensors 18, no. 10 (October 6, 2018): 3340. http://dx.doi.org/10.3390/s18103340.

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High-voltage n-channel lateral-diffused metal-oxide-semiconductor field-effect transistor (nLDMOS) components, fabricated by a TSMC 0.25-m 60-V bipolar-CMOS-DMOS (BCD) process with drain-side embedded silicon-controlled rectifier (SCR) of the n-p-n-arranged and p-n-p-arranged types, were investigated, in order to determine the devices’ electrostatic discharge (ESD)-sensing behavior and capability by discrete anode engineering. As for the drain-side n-p-n-arranged type with discrete-anode manners, transmission–line–pulse (TLP) testing results showed that the ESD ability (It2 value) was slightly upgraded. When the discrete physical parameter was 91 rows, the optimal It2 reached 2.157 A (increasing 17.7% compared with the reference sample). On the other hand, the drain-side SCR p-n-p-arranged type with discrete-anode manner had excellent SCR behavior, and its It2 values could be increased to >7 A (increasing >281.9% compared with the reference DUT). Moreover, under discrete anode engineering, the drain-side SCR n-p-n-arranged and p-n-p-arranged types had clearly higher ESD ability, except for the few discrete physical parameters. Therefore, using the anode discrete engineering, the ESD dissipation ability of a high-voltage (HV) nLDMOS with drain-side SCRs will have greater effectiveness.

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20

WALL, RICHARD W., and HERBERT L. HESS. "DESIGN AND MICROCONTROLLER IMPLEMENTATION OF A THREE PHASE SCR POWER CONVERTER." Journal of Circuits, Systems and Computers 06, no. 06 (December 1996): 619–33. http://dx.doi.org/10.1142/s0218126696000431.

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A single processor controls a three phase silicon controlled rectifier (SCR) power converter. An inexpensive, dual optoisolator interface to the power line provides noise rejection and an improved measure of the zero crossing. A dynamic digital phase-locked loop (PLL) algorithm implemented in an Intel 87C196KD-20 processor achieves frequency tracking, dynamically changing characteristics for improved performance. Dynamically modifying the PLL characteristics permits independent capture and locked dynamics. A feedforward method provides command tracking for improved response without loss of performance. This three-component design (processor, optoisolator, and SCR gate drivers) represents a minimal implementation with potential for closed loop voltage and current control. High speed input and output resources included on the 87C196KD processor make an efficient single-device implementation possible. The processor is less than 1% utilized allowing for additional functions to be added in the future. This system operates on both 50 Hz and 60 Hz power systems without modification or loss of performance.

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21

Zhou, Zijie, Xiangliang Jin, Yang Wang, Peng Dong, Yan Peng, and Jun Luo. "Analysis of Non-Uniform Current Distribution in Multi-Fingered and Low-Voltage-Triggered LVTSCR." Elektronika ir Elektrotechnika 27, no. 1 (February 25, 2021): 41–47. http://dx.doi.org/10.5755/j02.eie.25352.

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Laterally Diffused Metal Oxide Semiconductor Silicon-Controlled Rectifier (LDMOS-SCR) is usually used in Electrostatic Discharge (ESD) protection. LDMOS-SCR discharges current by parasitic SCR, but the MOS in it cannot work when parasitic SCR is stabilized. To further enhance the Electrostatic Discharge (ESD) discharging capability of LDMOS-SCR, a novel high failure current LDMOS-SCR with 12 V operation voltage is fabricated and verified in a 0.18-um high-voltage Bipolar-CMOS-DMOS (BCD) process. Compared with conventional LDMOS-SCR, the novel LDMOS-SCR (LDMOS-SCR-R) introduced a heavily doped p-type region, which is located between the heavily doped n-type and p-type regions of Cathode and is connected with the gate. The adding p-well resistance can drop the voltage on the gate, and the gate with p-well resistance also has resistance and capacitance coupling effect. According to the results of the transmission line pulse test (TLP), the voltage applied to the gate by increasing the p-well resistance plays a major role in the device working mechanism. Under the same device size, LDMOS-SCR-R has higher It2 (8.6 A) than conventional LDMOS (2.21 A) or LDMOS-SCR (6.62 A) in TLP results. Compared with LDMOS-SCR, the failure current of LDMOS-SCR-R increases by 30 %, and the FOM of LDMOS-SCR-R increases by 34 %. The response of LDMOS-SCR-R is also faster than that of LDMOS-SCR under larger current conditions. In addition, the phenomenon in TLP results is consistent with simulation results. The proposed LDMOS-SCR-R can effectively increase failure current without affecting the device’s design window, and the additional p-type region will not increase the layout area.

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22

Faranda, Roberto, Hossein Hafezi, Kishore Akkala, and Massimo Lazzaroni. "AC “Back to Back” Switching Device in Industrial Application." Energies 13, no. 14 (July 9, 2020): 3539. http://dx.doi.org/10.3390/en13143539.

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In industrial applications, among several varieties of semiconductor devices available, a silicon-controlled rectifier (SCR) is often used in managing and protecting various systems with different applications. Hence, it is of the utmost importance to design a control system which can operate over a range of electrical loads without any modifications in its hardware and/or software. This paper analyzes and investigates in detail the power circuit effects on conduction delay and SCR functioning. Moreover, two different commonly used driving systems for SCR application have been introduced, discussed, and evaluated. Concerning driving systems, here, three aspects have paramount importance and are consequently taken into consideration, namely the driver system losses, the conduction delay, and in particular, some power quality indices. The conduction delay is a parameter of great importance, as being able to control and reduce it to the minimum allowed by the application can bring significant practical advantages (both in terms of application and economic terms, as better summarized in the article). Theoretical analysis has been performed, followed and verified by simulation studies and, for some cases, laboratory experimental test results are presented which provide credibility to the study.

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23

Shah, Minsha, Hitesh Mandaliya, Lavkesh Lachhvani, Manu Bajpai, and Rachana Rajpal. "Microcontroller Based High Voltage, High Speed Trigger Control Circuit for SMARTEX-C." WSEAS TRANSACTIONS ON ELECTRONICS 12 (September 13, 2021): 100–105. http://dx.doi.org/10.37394/232017.2021.12.14.

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Microcontroller based trigger control circuit for fast pulsing of electrode potentials on wide range of time scales has been designed, installed, and tested for electron plasma experiments which are carried out in partial toroidal trap SMall Aspect Ratio Toroidal Electron plasma EXperiment in C – shaped geometry (SMARTEX – C), a device to create and confine non-neutral plasma (electron plasma). The sequence of trap operation is inject-hold-dump for which electrodes need to be pulsed with applied voltages at a high switching speed of few nanoseconds. Also this sequence of operation needs to be controlled over a very wide range of time scales from few microseconds to few seconds. As the available COTS (Commercial-Off-The-Shelf) high voltage DC power supplies generally do not provide this feature of fast switching at nanosecond time scale, MOSFET based circuit is developed which provides fast switching in the range of 20 – 100 nanoseconds of high voltages (200Vdc - 500Vdc) of multiple electrodes. The timing pulse widths of these trigger pulses are controlled using a microcontroller-based circuit. This experimental set-up also requires the triggering of a high current dc power supply used for an Electro-magnet (Toroidal Field Coil) to generate a toroidal magnetic field, at the start of this experiment. For this purpose, a Silicon Controlled Rectifier (SCR) based circuit is used. The gate pulse to trigger the SCR circuit is also generated from this microcontroller-based circuit. National Instrument’s LabVIEW software based Graphical User Interface (GUI) is developed for triggering the SCR and electrodes with a programmable time period through the serial link.

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24

Shi, Changli, Tongzhen Wei, Yushu Sun, Dongqiang Jia, and Tianchu Li. "Seamless Switching Control Technology for the Grid-Connected Converter in Micro-Grids." Electronics 9, no. 12 (December 10, 2020): 2109. http://dx.doi.org/10.3390/electronics9122109.

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In order to ensure the reliable power supply of the local load in the micro-grid (MG), a seamless switching control technology (SSCT) suitable for grid-connected converter (GCC) is proposed. This technology includes silicon-controlled rectifiers (SCR) forced shutdown control strategy (SCR-FSCS) and three-loop control strategy (TLCS). The SCR-SSCT adjusts the load voltage in real time to form a back voltage at the grid-connected inductor, which greatly reduces the SCR shutdown time and ensures the reliability of local load power supply. The TLCS can easily realize the switching between the current source mode and the voltage source mode of the GCC. An experimental platform is established to carry out the relevant experiments. The experimental results show the rationality and effectiveness of the theoretical analysis and the proposed control technology.

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25

Cheng, Guoxiao, Zhiqun Li, Pengfei Yue, Lei Luo, Xiaodong He, and Boyong He. "A 6.5-kV HBM ESD-protected high-gain LNA using cascaded L-match input network." Modern Physics Letters B 33, no. 23 (August 16, 2019): 1950280. http://dx.doi.org/10.1142/s0217984919502804.

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A wideband (2–3 GHz) three-stage low noise amplifier (LNA) with electrostatic discharge (ESD) protection circuits using 0.18 [Formula: see text]m CMOS technology is presented in this paper. Low-parasitic silicon-controlled rectifier (SCR) devices are co-designed with the LNA in the form of [Formula: see text]-parameters, and a new cascaded L-match input network is proposed to reduce the parasitic effects of them on the input matching. To improve linearity performance, an optimized multiple-gated transistors method (MGTR) is proposed and applied to the third stage, which takes both transconductance [Formula: see text] and third-order nonlinear coefficient [Formula: see text] into consideration. The measured results show a wide input matching across 2–8 GHz and a high third-order input intercept point (IIP3) of −12.8 dBm. The peak power gain can achieve 29.1 dB, and the noise figure (NF) is in a range of 3.1–3.6 dB within the 3-dB bandwidth. Using SCR devices with low parasitic capacitance of [Formula: see text]80 fF and robust gate-driven power clamps, a 6.5-kV human body mode (HBM) ESD performance is obtained.

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Han, Hong Biao, and Yu Peng Guo. "Study on Electrospark Depositing & Welding Power Supply." Advanced Materials Research 314-316 (August 2011): 165–70. http://dx.doi.org/10.4028/www.scientific.net/amr.314-316.165.

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The requirements of the power supply design are proposed based on the principle of discharge process in depositing & welding power supply, and a depositing & welding power system schematic is designed according to the requirements. The control manner of the power supply combines RLC (Resistance-Inductance-Capacitance) circuit with fast SCR, and the deposition and restoration can be achieved by using the NE555 circuit to trigger the fast silicon controlled rectifier. Furthermore, parameters such as voltage, capacitance, frequency, motion mode of electrode are probed into, a depositing & welding test is experimented and the waveform of the power supply are analyzed. According to the results of experiments and analysis, it is clear that the output of the power supply can meet the requirements of working successfully and achieve the required standard to do electrospark depositing and welding operations. However, the actual working electrospark frequency is lower than the trigger pulse frequency added on the fast SCR, which result in a lower efficiency in depositing & welding work. Main reasons for this situation is that the relative movement of the electrode and the work-piece can’ t guarantee the best conditions for electrospark and the fast SCR in circuit can’t be reliably turn-off fast. These research laid foundations for further electrospark depositing & welding power supply design and efficiency improvement.

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27

Ker, Ming-Dou, and Kuo-Chun Hsu. "Dummy-Gate Structure to Improve Turn-on Speed of Silicon-Controlled Rectifier (SCR) Device for Effective Electrostatic Discharge (ESD) Protection." Japanese Journal of Applied Physics 42, Part 2, No. 11B (November 2003): L1366—L1368. http://dx.doi.org/10.1143/jjap.42.l1366.

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28

Lee, Jian-Hsing, Yi-Hsun Wu, Shao-Chang Huang, Yu-Huei Lee, and Ke-Horng Chen. "Two-stage trigger silicon-controller rectifier (SCR) for radio-frequency (RF) input and output protections in nanometer technologies." Solid-State Electronics 74 (August 2012): 134–41. http://dx.doi.org/10.1016/j.sse.2012.04.024.

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29

Irwanto, Riandi. "Analisa Harmonisa Pada Transformator 3 Fasa." JURNAL PERSEGI BULAT 1, no. 1 (February 1, 2022): 7–12. http://dx.doi.org/10.36490/jurnalpersegibulat.v1i1.248.

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Gangguan harmonisa yang terjadi pada sistem distribusi tenaga listrik akibat terjadinya distorsi gelombang arus dan tegangan. Distorsi gelombang arus dan tegangan ini disebabkan adanya pembentukan gelombang-gelombang dengan frekuensi kelipatan bulat dari frekuensi fundamentalnya. Gelombang-gelombang ini kemudian menumpang pada gelombang aslinya sehingga terbentuk gelombang cacat yang merupakan jumlah antara gelombang murni sesaat dengan gelombang harmonik. Keberadaan beban non-linier yang terdapat pada jaringan di Gedung A sebagai sebagian penyumbang harmonisa yang terjadi diantaranya electronic ballast, variable frequency, thyristor ac power controllers (TCR), silicon controlled rectifier (SCR), serta adjustable speed drive (ASD) yang terdapat pada unit mesin Drawn Texture Yarn (DTY). Pengukuran dilakukan untuk melihat kandungan harmonisa arus dan tegangan listrik dengan menggunakan alat ukur Power and Harmonic Analyzer Langlois 6830 selama 2 (dua) hari kerja berturut- turut pada jam-jam tertentu. Sebagai perbandingan pengukuran dilakukan perbandingan dengan standar IEEE 519. 1992 sebagai evaluasi terhadap kualitas daya listrik pada jaringan di Gedung A. Hasil data analisis menunjukkan jaringan pada Gedung A besarnya THDv adalah 1,85% masih di bawah 5% yang artinya belum melampaui batas yang ditentukan sesuai standard. Dan besarnya THDi 30,65% sehingga sudah tidak sesuai dengan standard yang ditetapkan

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Suryadi, Aris. "STUDI HARMONISA ARUS DAN TEGANGAN LISTRIK PADA KAMPUS POLITEKNIK ENJINERING INDORAMA." SINERGI 20, no. 3 (December 14, 2016): 213. http://dx.doi.org/10.22441/sinergi.2016.3.007.

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Gangguan harmonisa yang terjadi pada sistem distribusi tenaga listrik akibat terjadinya distorsi gelombang arus dan tegangan. Distorsi gelombang arus dan tegangan ini disebabkan adanya pembentukan gelombang-gelombang dengan frekuensi kelipatan bulat dari frekuensi fundamentalnya. Gelombang-gelombang ini kemudian menumpang pada gelombang aslinya sehingga terbentuk gelombang cacat yang merupakan jumlah antara gelombang murni sesaat dengan gelombang harmonik. Keberadaan beban non-linier yang terdapat pada Kampus Politeknik Enjinering Indorama sebagai sebagian penyumbang harmonisa yang terjadi diantaranya electronic ballast, variable frequency, thyristor ac power controllers (TCR), silicon controlled rectifier (SCR), serta adjustable speed drive (ASD) yang terdapat pada unit mesin Drawn Texture Yarn (DTY). Pengukuran dilakukan untuk melihat kandungan harmonisa arus dan tegangan listrik di Panel Room yang terdapatnya alat ukur Digital Power Meter Mikro DPM 380 selama 2 (dua) hari kerja berturut-turut pada jam-jam tertentu. Sebagai perbandingan pengukuran dilakukan perbandingan dengan standar IEEE 519. 1992 sebagai evaluasi terhadap kualitas daya listrik pda Kampus Politeknik Enjinering Indorama. Hasil penelitian ini menunjukan bahwa kandungan harmonisa arus (% THDi) pada waktu rentang 2.4 % - 4.1% untuk standar 15 % masih berada diambang diizinkan dan harmonisa tegangan pada jam rentang (%THDv) 3.6 % - 26.6% untuk standar 5 %. Hal ini menunjukkan bahwa secara umum kandungan harmonisa tegangan pada Kampus Politeknik Enjinering Indorama berada diatas ambang batas yang di izinkan.

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31

Zhang, Yue, Qi Dong Li, Tai Li Sun, and Xi Chuan Zhang. "Design and Testing of the Copper Pipe and Aluminum Pipe Welding Control System." Applied Mechanics and Materials 33 (October 2010): 84–87. http://dx.doi.org/10.4028/www.scientific.net/amm.33.84.

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The copper - aluminum pipe has been widely used in the refrigeration industry. And the welding quality becomes the focus. A PLC control system was developed to accurately control the resistance welding process of the Cu-Al pipe. The welding voltage was adjusted by a couple of silicon controlled rectifiers (SCR). To restrain the effect of network voltage fluctuation on the welding heat generation, it was obtained that the experimental relationship of the angle of flow and the network voltage, and fitted to a quadratic polynomial equation. Therefore, the control system can calculate the exactly the angle of flow value according to the current network voltage. The experiment results show that the error of the welding heat generation is limited in 5% when the network voltage fluctuates in the range of 380V ±10%. And the SEM and EDS analyzing results suggests that the welding seam length is more than 5mm, and there is hardly eutectic composition.

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32

Fan, Sheng-Kai, Shen-Li Chen, Po-Lin Lin, and Hung-Wei Chen. "Layout Strengthening the ESD Performance for High-Voltage N-Channel Lateral Diffused MOSFETs." Electronics 9, no. 5 (April 27, 2020): 718. http://dx.doi.org/10.3390/electronics9050718.

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An electrostatic discharge (ESD) event can negatively affect the reliability of integrated circuits. Therefore, improving on ESD immunity in high-voltage (HV) n-channel (n) lateral diffused metal–oxide–semiconductor field-effect transistor (HV nLDMOS) components through drain-side layout engineering was studied. This involved adjusting the operating voltage, improving the non-uniform turned-on phenomenon, and examining the effects of embedded-device structures on ESD. All proposed architectures for improving ESD immunity in this work were measured and evaluated using a transmission-line pulse system. The corresponding trigger voltage (Vt1), holding voltage (Vh) and secondary breakdown current (It2) results of the tested devices were obtained. This paper first addresses the drift-region length modulation to design different operating voltages, which decreased as the drift region length and shallow trench isolation (STI) length shrunk. When an HV nLDMOS device decreased to the shortest drift region length, the Vt1 and Vh values were closest to 21.85, and 9.27 V, respectively. The It2 value of a low-voltage operated device could be increased to a maximum value of 3.25 A. For the channel width modulation, increasing the layout finger number of an HV LDMOS device did not really help the ESD immunity that because it may suffer the problem of non-uniform turned-on phenomenon. Therefore, adjusting the optimized channel width was the best one method of improvement. Furthermore, to improve the low ESD reliability problem of nLDMOS devices, two structures were used to improve the ESD capability. The first was a drain side—embedded silicon-controlled rectifier (SCR). Here, the SCR PNP-arranged type in the drain side had the best ESD capability because the SCR path was short and had been prior to triggering; however, it also has a latch-up risk and low Vh characteristic. By removing the entire heavily doped drain-side N+ region, the equivalent series resistance in the drain region was increased, so that the It2 performance could be increased from 2.29 A to 3.98 A in the structure of a fully embedded drain-side Schottky diode. This component still has sufficiently high Vh behaviour. Therefore, embedding a full Schottky-diode into an HV nLDMOS in the drain side was the best method and was efficient for improving the ESD/Latch-up abilities of the device. The figure of merit (FOM) of ESD, Latch-up, and cell area considerations improved to approximately 80.86%.

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33

Bubenheim, David L., Raman Sargis, and David Wilson. "SPECTRAL CHANGES IN METAL HALIDE AND HIGH PRESSURE SODIUM LAMPS EQUIPPED WITH ELECTRONIC DIMMING." HortScience 26, no. 6 (June 1991): 738A—738. http://dx.doi.org/10.21273/hortsci.26.6.738a.

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Electronic dimming of high intensity discharge lamps offers control of photosynthetic photon flux (PPF) but is often characterized as causing significant spectral changes. Growth chambers with 400 W metal halide (MH) and high pressure sodium (HPS) lamps were equipped with a dimmer system using silicon controlled rectifiers (SCR) as high speed switches. Phase control operation turned the line power off for some period of the AC cycle. At full power the electrical input to HPS and MH lamps was 480 W (RMS) and could be decreased to 267 W and 428 W, respectively, before the arc was extinguished. Concomitant with this decrease in input power, PPF decreased by 60% in HPS and 50% in MH. The HPS lamp has characteristic spectral peaks at 589 and 595 nm. As power to the HPS lamps was decreased the 589 nm peak remained constant while the 595 nm peak decreased, equalling the 589 nm peak at 345 W input, and was almost absent at 270 W input. The MH lamp has a broader spectral output but also has a peak at 589 nm and another, smaller peak, at 545 nm. As input power to the MH lamps decreased the 589 nm peak diminished to equal the 545 nm peak. As input power approached 428 W the 589 nm peak shifted to 570 nm. While a spectral change was observed as input power was decreased in both MH and HPS lamps, the phytochrome equilibrium ratio (Pfr/Ptot) remain unchanged for both lamp types.

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Bubenheim, David L., Raman Sargis, and David Wilson. "Spectral Changes in Metal Halide and High-pressure Sodium Lamps Equipped with Electronic Dimming." HortScience 30, no. 5 (August 1995): 1086–89. http://dx.doi.org/10.21273/hortsci.30.5.1086.

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Electronic dimming of high-intensity discharge lamps offers control of photosynthetic photon flux (PPF) but is often characterized as causing significant spectral changes. Growth chambers with 400-W metal halide (MH) and high-pressure sodium (HPS) lamps were equipped with a dimmer system using silicon-controlled rectifiers (SCR) as high-speed switches. Phase control operation turned the line power off for some period of the alternating current cycle. At full power, the electrical input to HPS and MH lamps was 480 W (root mean squared) and could be decreased to 267 W and 428 W, respectively, before the arc was extinguished. Concomitant with this decrease in input power, PPF decreased by 60% in HPS and 50% in MH. The HPS lamp has characteristic spectral peaks at 589 and 595 nm. As power to the HPS lamps was decreased, the 589-nm peak remained constant while the 595-nm peak decreased, equaling the 589-nm peak at 345-W input, and the 589-nm peak was almost absent at 270-W input. The MH lamp has a broader spectral output but also has a peak at 589 nm and another smaller peak at 545 nm. As input power to the MH lamps decreased, the peak at 589 diminished to equal the 545-nm peak. As input power approached 428 W, the 589-nm peak shifted to 570 nm. While the spectrum changed as input power was decreased in the MH and HPS lamps, the phytochrome equilibrium ratio (Pfr: Ptot) remains unchanged for both lamp types.

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35

Karunasiri, Gamani. "Spontaneous pulse generation using silicon controlled rectifier." Applied Physics Letters 89, no. 2 (July 10, 2006): 023501. http://dx.doi.org/10.1063/1.2220528.

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36

Andriyanov, A. M. "Silicon controlled rectifier for controlling “Bentec” slurry pumps." Automation, Telemechanization and Communication in Oil Industry, no. 11 (2020): 9–16. http://dx.doi.org/10.33285/0132-2222-2020-11(568)-9-16.

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37

Khairudin, M., N. Parwantiningsih, E. Panji, and R. Prayoga. "Water level control system using silicon controlled rectifier." Journal of Physics: Conference Series 1456 (January 2020): 012013. http://dx.doi.org/10.1088/1742-6596/1456/1/012013.

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38

Neacsu, A., E. I. Cole, and R. H. Propst. "Chaotic feedback schemes of the silicon controlled rectifier." Physica D: Nonlinear Phenomena 34, no. 3 (March 1989): 449–55. http://dx.doi.org/10.1016/0167-2789(89)90268-6.

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39

Dong, Shurong, Jian Wu, Meng Miao, Jie Zeng, Yan Han, and Juin J. Liou. "High-Holding-Voltage Silicon-Controlled Rectifier for ESD Applications." IEEE Electron Device Letters 33, no. 10 (October 2012): 1345–47. http://dx.doi.org/10.1109/led.2012.2208934.

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40

Du, Feibo, Fei Hou, Zhiwei Liu, Jizhi Liu, and Juin J. Liou. "Bidirectional silicon‐controlled rectifier for advanced ESD protection applications." Electronics Letters 55, no. 2 (January 2019): 112–14. http://dx.doi.org/10.1049/el.2018.6686.

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41

Yusran and A. D. Armanda. "Design and testing of 1 phase semi-controlled rectifier circuit (experiment scale): a part of green laboratory project." IOP Conference Series: Earth and Environmental Science 926, no. 1 (November 1, 2021): 012045. http://dx.doi.org/10.1088/1755-1315/926/1/012045.

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Abstract This paper discussed design and testing of one (1) phase semi-controlled full wave rectifier circuit (experiment scale) as a part of green laboratory project. The research method was divided by two stages: design and testing. The design stage included: component selection and calculation, conceptual design and circuit physical implementation. The three main components included 2 diodes, 2 thyristors (SCR), resistive (R) and inductive (L) load with varying values. The testing stage was physical rectifier circuit operation with R (220; 580; 1,500 ohm) and R-L (L=2.37 H) load. The voltage waveform, voltage and current were observed during this stage. The testing results (voltage and current) in rms value were compared with theoretical calculation for validation. The testing results showed that the rectifier circuit working optimally. The testing results were differed by small percentage with theoretical calculation. The output voltage was differed by 1.085%. The output current for R and R-L load were differed by 4.590% and 6.457%, respectively.

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42

Lu, Ya Ping, Tian Lin Song, and Hai Qing Liu. "Influence of Silicon Controlled Rectifier Voltage Regulation Device under DDC-Temperature Control." Advanced Materials Research 706-708 (June 2013): 826–29. http://dx.doi.org/10.4028/www.scientific.net/amr.706-708.826.

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In the boiler heating control device of combining DDC and the silicon controlled rectifier voltage regulation device, there are phase shift trigger, pulse width modulation (PWM) and cycle wave cross zero trigger (CYC). Under the different silicon controlled rectifier voltage regulation devices, there are different influences for DDC. It makes the best of the cycle characteristics of the alternating current (AC) for the cycle wave cross zero trigger (CYC). For DDC - temperature control system, there are advantages of high control accuracy, less interference and power source pollution.

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43

Hung, Chung‐Yu, Tzu‐Cheng Kao, Jian‐Hsing Lee, Jeng Gong, Tsung‐Yi Huang, Hung‐Der Su, Kuo‐Cheng Chang, Chih‐Fang Huang, and Kuo‐Hsuan Lo. "Simple scheme to increase hold voltage for silicon‐controlled rectifier." Electronics Letters 50, no. 3 (January 2014): 200–202. http://dx.doi.org/10.1049/el.2013.1853.

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44

Zhiwei Liu, Juin J. Liou, Shurong Dong, and Yan Han. "Silicon-Controlled Rectifier Stacking Structure for High-Voltage ESD Protection Applications." IEEE Electron Device Letters 31, no. 8 (August 2010): 845–47. http://dx.doi.org/10.1109/led.2010.2050575.

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45

Holonyak, N. "The silicon p-n-p-n switch and controlled rectifier (thyristor)." IEEE Transactions on Power Electronics 16, no. 1 (January 2001): 8–16. http://dx.doi.org/10.1109/63.903984.

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46

Zhong, Zeyu, Yang Wang, Xiangliang Jin, Yan Peng, Jun Luo, and Jun Yang. "Analysis of current aggregation in gate-control dual direction silicon controlled rectifier." IEICE Electronics Express 18, no. 13 (July 10, 2021): 20210214. http://dx.doi.org/10.1587/elex.18.20210214.

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47

Bindra, Ashok. "IEEE Declares General Electric's Silicon-Controlled Rectifier/Thyristor Invention a Milestone [Flyback]." IEEE Power Electronics Magazine 6, no. 3 (September 2019): 48–51. http://dx.doi.org/10.1109/mpel.2019.2926607.

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Du, Feibo, Fei Hou, Wenqiang Song, YiChen Xu, Jizhi Liu, Zhiwei Liu, and Juin J. Liou. "Vertical bipolar junction transistor triggered silicon‐controlled rectifier for nanoscale ESD engineering." Electronics Letters 56, no. 7 (March 2020): 350–51. http://dx.doi.org/10.1049/el.2019.3864.

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Li, Xiang, Shurong Dong, Zhihui Yu, Jie Zeng, and Weihuai Wang. "Transient voltage suppressor based on diode-triggered low-voltage silicon controlled rectifier." Facta universitatis - series: Electronics and Energetics 29, no. 4 (2016): 647–51. http://dx.doi.org/10.2298/fuee1604647l.

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Li, Rui. "Design of the Pulse Triggered by Three-Phrase Controlled Rectifier Circuit." Applied Mechanics and Materials 325-326 (June 2013): 944–47. http://dx.doi.org/10.4028/www.scientific.net/amm.325-326.944.

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Have designed the software and hardware formation of the six-pulse triggering device which is based on the all-controlled bridge type of Three-phase circuit of the single-chip microcomputer PIC16F877A . This new controllable silicon triggering system can show the triggering angle specifically and work steadily.

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