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1

Song, Mi Yeon. "Microfabrication of silicon tips for scanning probe microscopy." Thesis, University of Birmingham, 2009. http://etheses.bham.ac.uk//id/eprint/482/.

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This thesis investigates the microfabrication of silicon tips for Scanning Probe Microscopy. First, a microfabrication process was developed to produce silicon tips over 100 um height with a sharp apex of ~10–20 nm. To prevent inadvertent contact between the substrate bearing the tip and the sample being probed, the tip is elevated on a mesa structure. Atomic resolution STM images of graphite are successfully obtained using silicon tips. Subsequently, a co-axial tip was developed for SPELS. SPELS uses an STM tip in field emission mode and then analyses the energy of electrons backscattered. However, the electric field distorts the trajectories of the backscattered electrons. A screened co-axial tip was thus designed; the tip consists of a multilayer Si/Au/HfO\(-2\)/Au structure. The outermost Au layer is grounded. SPELS spectra of graphite were successfully obtained for the first time. Third, a multilayered tip was fabricated for the Scanning Probe Electron AnalyseR.. This approach is a combination of STM with an ultraviolet light source. The designed structure is a multilayered silicon tip consisting of Si/SiO\(_2\)/Au/SiO\(_2\)/Au; the three conducting layers act as an electron collector, retarding field analyser, and grounded shield layer, respectively.
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2

Wong, Chun Keung. "Realization of integrated photonic devices using silicon-based materials and microfabrication technology /." access full-text access abstract and table of contents, 2009. http://libweb.cityu.edu.hk/cgi-bin/ezdb/thesis.pl?phd-ee-b23750431f.pdf.

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Thesis (Ph.D.)--City University of Hong Kong, 2009.
"Submitted to Department of Electronic Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy." Includes bibliographical references.
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3

Pecholt, Benjamin Francis. "Laser microfabrication and testing of silicon carbide diaphragms for MEMS applications." [Ames, Iowa : Iowa State University], 2009.

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4

Choi, Dongwon 1973. "Silicon carbide process development for microengine applications : residual stress control and microfabrication." Thesis, Massachusetts Institute of Technology, 2004. http://hdl.handle.net/1721.1/28348.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2004.
Includes bibliographical references.
The high power densities expected for the MIT microengine (silicon MEMS-based micro-gas turbine generator) require the turbine and compressor spool to rotate at a very high speed at elevated temperatures (1300 to 1700 K). However, the thermal softening of silicon (Si) at temperatures above 900 K limits the highest achievable operating temperatures, which in turn significantly compromises the engine efficiency. Silicon carbide (SiC) offers great potential for improved microengine efficiency due to its high stiffness, strength, and resistance to oxidation at elevated temperatures. However, techniques for microfabricating SiC to the high level of precision needed for the microengine are not currently available. Given the limitations imposed by the SiC microfabrication difficulties, this thesis proposed Si-SiC hybrid turbine structures, explores key process steps, identified, and resolved critical problems in each of the processes along with a thorough characterization of the microstructures, mechanical properties, and composition of CVD SiC. Three key process steps for the Si-SiC hybrid structures are CVD SiC deposition on silicon wafers, wafer-level SiC planarization, and Si-to-SiC wafer bonding. Residual stress control in SiC coatings is of the most critical importance to the CVD process itself as well as to the subsequent wafer planarization, and bonding processes since residual stress-induced wafer bow increases the likelihood of wafer cracking significantly. Based on CVD parametric studies performed to determine the relationship between residual stresses in SiC and H2/MTS ratio, deposition temperature, and HCl/MTS ratio, very low residual stress (less than several tens of MPa) in thick CVD SiC coatings (up to -50 pm) was achieved.
(cont.) In the course of the residual stress study, a general method for stress quantification was developed to isolate the intrinsic stress from the thermal stress. In addition, qualitative explanations for the residual stress generation are also offered, which are in good agreement with experimental results. In the post-CVD processes, the feasibility of SiC wafer planarization and Si-to-SiC wafer bonding processes have successfully been demonstrated, where CVD oxide was used as an interlayer bonding material to overcome the roughness of SiC surface. Finally, the bonding interface of the Si-SiC hybrid structures with oxide interlayer was verified to retain its integrity at high temperatures through four-point flexural tests.
by Dongwon Choi.
Ph.D.
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5

Zhu, Likun. "Development and application of integrated silicon-in-plastic microfabrication in polymer microfluidic systems." College Park, Md. : University of Maryland, 2006. http://hdl.handle.net/1903/3861.

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Thesis (Ph. D.) -- University of Maryland, College Park, 2006.
Thesis research directed by: Mechanical Engineering. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
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6

Morris, Christopher J. "Capillary-force driven self-assembly of silicon microstructures /." Thesis, Connect to this title online; UW restricted, 2007. http://hdl.handle.net/1773/5963.

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7

Stahl, Brian C. "DESIGN, FABRICATION, MODELING AND CHARACTERIZATION OF ELECTROSTATICALLY-ACTUATED SILICON MEMBRANES." DigitalCommons@CalPoly, 2008. https://digitalcommons.calpoly.edu/theses/90.

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This thesis covers the design, fabrication, modeling and characterization of electrostatically actuated silicon membranes, with applications to microelectromechanical systems (MEMS). A microfabrication process was designed to realize thin membranes etched into a silicon wafer using a wet anisotropic etching process. These flexible membranes were bonded to a rigid counterelectrode using a photo-patterned gap layer. The membranes were actuated electrostatically by applying a voltage bias across the electrode gap formed by the membrane and the counterelectrode, causing the membrane to deflect towards the counterelectrode. This deflection was characterized for a range of actuating voltages and these results were compared to the deflections predicted by calculations and Finite Element Analysis (FEA). This thesis demonstrates the first electrostatically actuated MEMS device fabricated in the Cal Poly, San Luis Obispo Microfabrication Facility. Furthermore, this thesis should serve as groundwork for students who wish to improve upon the microfabrication processes presented herein, or who wish to fabricate thin silicon structures or electrostatically actuated MEMS structures of their own.
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8

Brooks, Elizabeth L. "THE DESIGN AND FABRICATION OF AN ELECTROSTATICALLY ACTUATED DIAPHRAGM WITH A SILICON-ON-INSULATOR WAFER." DigitalCommons@CalPoly, 2013. https://digitalcommons.calpoly.edu/theses/1084.

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Electrostatically actuated silicon membranes were designed, modeled, fabricated, and characterized. The intended application was for use in a microspeaker. Fabrication issues necessitated the use of thick diaphragms with a large gap between the electrodes. The devices did not function as speakers but did show actuation with a high DC voltage. Device dimensions were chosen by examining membrane mechanics, testing the processing steps required for device fabrication, and modeling with COMSOL. Several adhesives were researched to fabricate the device sidewalls, including BCB, PMMA, and TRA-Bond F112. A method for patterning PMMA through photolithography was found using a scanning electron microscope. Masks were designed in AutoCAD to create the electrostatically actuated devices and a microfabrication process was developed to produce diaphragms that could be characterized. Twenty micron thick diaphragms were fabricated by etching an SOI wafer in 25% TMAH and the etch depth was measured with a profilometer. Glass slides were coated with gold and patterned with positive photoresist to create counter-electrodes. The diaphragms were bonded to the glass slides using a forty micron thick layer of patterned SU-8 as sidewalls. Bonding was successful in the initial fabrication testing but not successful for the final devices. The final fabrication run resulted in eight devices that were partially bonded. Three devices were chosen to test the membrane actuation and the data analyzed for statistical significance. A DC voltage was applied to the electrodes with a MEMS driver and the change in force measured with a micro-force displacement system. Data analysis showed device actuation at high voltages (300V) for the medium and large devices.
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9

Diehl, Michael S. "Design and Fabrication of Out-of-Plane Silicon Microneedles with Integrated Hydrophobic Microchannels." Diss., CLICK HERE for online access, 2007. http://contentdm.lib.byu.edu/ETD/image/etd2074.pdf.

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10

Sun, Xida. "Structured Silicon Macropore as Anode in Lithium Ion Batteries." Wright State University / OhioLINK, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=wright1316470033.

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11

Hanif, Raza. "Microfabrication of Plasmonic Biosensors in CYTOP Integrating a Thin SiO2 Diffusion and Etch-barrier Layer." Thèse, Université d'Ottawa / University of Ottawa, 2011. http://hdl.handle.net/10393/19880.

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A novel process for the fabrication of Long Range Surface Plasmon Polariton (LRSPP) waveguide based biosensors is presented herein. The structure of the biosensor is comprised of Au stripe waveguide devices embedded in thick CYTOP claddings with a SiO2 solvent diffusion barrier and etch-stop layer. The SiO2 layer is introduced to improve the end quality of Au waveguide structures, which previously deformed during the deposit of the upper cladding process and to limit the over-etching of CYTOP to create micro-fluidic channels. The E-beam evaporation method is adapted to deposit a thin SiO2 on the bottom cladding of CYTOP. A new micro-fluidic design pattern is introduced. Micro-fluidic channels were created on selective Au waveguides through O2 plasma etching. The presented data and figures are refractive index measurements of different materials, thickness measurements, microscope images, and AFM images. Optical power cutback measurements were performed on fully CYTOP-cladded symmetric LRSPP waveguides. The end-fire coupling method was used to excite LRSPP modes with cleaved polarization maintaining (PM) fibre. The measured mode power attenuation (MPA) was 6.7 dB/mm after using index-matched liquid at input and output fibre-waveguide interfaces. The results were compared with the theoretical calculations and simulations. Poor coupling efficiency and scattering due to the SiO2 are suspected for off-target measurements.
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12

Goericke, Fabian Thomas. "Simulation, fabrication and characterization of piezoresistive bio-/chemical sensing microcantilevers." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/24624.

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13

Newby, Pascal. "Fabrication de semiconducteurs poreux pour am??liorer l'isolation thermique des MEMS." Thèse, Universit?? de Sherbrooke, 2014. http://savoirs.usherbrooke.ca/handle/11143/98.

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R??sum?? : L???isolation thermique est essentielle dans de nombreux types de MEMS (micro-syst??mes ??lectro-m??caniques). Elle permet de r??duire la consommation d?????nergie, am??liorer leurs performances, ou encore isoler la zone chaude du reste du dispositif, ce qui est essentiel dans les syst??mes sur puce. Il existe quelques mat??riaux et techniques d???isolation pour les MEMS, mais ils sont limit??s. En effet, soit ils ne proposent pas un niveau d???isolation suffisant, sont trop fragiles, ou imposent des contraintes trop importantes sur la conception du dispositif et sont difficiles ?? int??grer. Une approche int??ressante pour l???isolation, d??montr??e dans la litt??rature, est de fabriquer des pores de taille nanom??trique dans le silicium par gravure ??lectrochimique. En nanostructurant le silicium ainsi, on peut diviser sa conductivit?? thermique par un facteur de 100 ?? 1000, le transformant en isolant thermique. Cette solution est id??ale pour l???int??gration dans les proc??d??s de fabrication existants des MEMS, car on garde le silicium qui est d??j?? utilis?? pour leur fabrication, mais en le nanostructurant localement, on le rend isolant l?? o?? on en a besoin. Par contre sa porosit?? cause des probl??mes : mauvaise r??sistance chimique, structure instable au-del?? de 400??C, et tenue m??canique r??duite. La facilit?? d???int??gration des semiconducteurs poreux est un atout majeur, nous visons donc de r??duire les d??savantages de ces mat??riaux afin de favoriser leur int??gration dans des dispositifs en silicium. Nous avons identifi?? deux approches pour atteindre cet objectif : i) am??liorer le Si poreux ou ii) d??velopper un nouveau mat??riau. La premi??re approche consiste ?? amorphiser le Si poreux en l???irradiant avec des ions ?? haute ??nergie (uranium, 110 MeV). Nous avons montr?? que l???amorphisation, m??me partielle, du Si poreux entra??ne une diminution de sa conductivit?? thermique, sans endommager sa structure poreuse. Cette technique r??duit sa conductivit?? thermique jusqu????? un facteur de trois, et peut ??tre combin??e avec une pr??-oxydation afin d???atteindre une r??duction d???un facteur cinq. Donc cette m??thode permet de r??duire la porosit?? du Si poreux, et d???att??nuer ainsi les probl??mes de fragilit?? m??canique caus??s par la porosit?? ??lev??e, tout en gardant un niveau d???isolation ??gal. La seconde approche est de d??velopper un nouveau mat??riau. Nous avons choisi le SiC poreux : le SiC massif a des propri??t??s physiques sup??rieures ?? celles du Si, et donc ?? priori le SiC poreux devrait conserver cette sup??riorit??. La fabrication du SiC poreux a d??j?? ??t?? d??montr??e dans la litt??rature, mais avec peu d?????tudes d??taill??es du proc??d??. Sa conductivit?? thermique et tenue m??canique n???ont pas ??t?? caract??ris??es, et sa tenue en temp??rature que de fa??on incompl??te. Nous avons men?? une ??tude syst??matique de la porosification du SiC en fonction de la concentration en HF et le courant. Nous avons impl??ment?? un banc de mesure de la conductivit?? thermique par la m??thode ?? 3 om??ga ?? et l???avons utilis?? pour mesurer la conductivit?? thermique du SiC poreux. Nous avons montr?? qu???elle est environ deux ordres de grandeur plus faible que celle du SiC massif. Nous avons aussi montr?? que le SiC poreux est r??sistant ?? tous les produits chimiques typiquement utilis??s en microfabrication sur silicium. D???apr??s nos r??sultats il est stable jusqu????? au moins 1000??C et nous avons obtenu des r??sultats qualitatifs encourageants quant ?? sa tenue m??canique. Nos r??sultats signifient donc que le SiC poreux est compatible avec la microfabrication, et peut ??tre int??gr?? dans les MEMS comme isolant thermique. // Abstract : Thermal insulation is essential in several types of MEMS (micro electro-mechanical systems). It can help reduce power consumption, improve performance, and can also isolate the hot area from the rest of the device, which is essential in a system-on-chip. A few materials and techniques currently exist for thermal insulation in MEMS, but these are limited. Indeed, either they don???t have provide a sufficient level of insulation, are too fragile, or restrict design of the device and are difficult to integrate. A potentially interesting technique for thermal insulation, which has been demonstrated in the literature, is to make nanometer-scale pores in silicon by electrochemical etching. By nanostructuring silicon in this way, its thermal conductivity is reduced by a factor of 100 to 1000, transforming it into a thermal insulator. This solution is ideal for integration in existing MEMS fabrication processes, as it is based on the silicon substrates which are already used for their fabrication. By locally nanostructuring these substrates, silicon is made insulating wherever necessary. However the porosity also causes problems : poor chemical resistance, an unstable structure above 400???C, and reduced mechanical properties. The ease of integration of porous semiconductors is a major advantage, so we aim to reduce the disadvantages of these materials in order to encourage their integration in silicon-based devices. We have pursued two approaches in order to reach this goal : i) improve porous Si, or ii) develop a new material. The first approach uses irradiation with high energy ions (100 MeV uranium) to amorphise porous Si. We have shown that amorphisation, even partial, of porous Si leads to a reduction of its thermal conductivity, without damaging its porous structure. This technique can reduce the thermal conductivity of porous Si by up to a factor of three, and can be combined with a pre-oxidation to achieve a five-fold reduction of thermal conductivity. Therefore, by using this method we can use porous Si layers with lower porosity, thus reducing the problems caused by the fragility of high-porosity layers, whilst keeping an equal level of thermal insulation. The second approach is to develop a new material. We have chosen porous SiC: bulk SiC has exceptional physical properties and is superior to bulk Si, so porous SiC should be superior to porous Si. Fabrication of porous SiC has been demonstrated in the literature, but detailed studies of the process are lacking. Its thermal conductivity and mechanical properties have never been measured and its high-temperature behaviour has only been partially characterised. We have carried out a systematic study of the effects of HF concentration and current on the porosification process. We have implemented a thermal conductivity measurement setup using the ???3 omega??? method and used it to measure the thermal conductivity of porous SiC. We have shown that it is about two orders of magnitude lower than that of bulk SiC. We have also shown that porous SiC is chemically inert in the most commonly used solutions for microfabrication. Our results show that porous SiC is stable up to at least 1000???C and we have obtained encouraging qualitative results regarding its mechanical properties. This means that porous SiC is compatible with microfabrication processes, and can be integrated in MEMS as a thermal insulation material.
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14

Newby, Pascal. "Fabrication de semiconducteurs poreux pour améliorer l'isolation thermique des MEMS." Thèse, Université de Sherbrooke, 2014. http://savoirs.usherbrooke.ca/handle/11143/98.

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Résumé : L’isolation thermique est essentielle dans de nombreux types de MEMS (micro-systèmes électro-mécaniques). Elle permet de réduire la consommation d’énergie, améliorer leurs performances, ou encore isoler la zone chaude du reste du dispositif, ce qui est essentiel dans les systèmes sur puce. Il existe quelques matériaux et techniques d’isolation pour les MEMS, mais ils sont limités. En effet, soit ils ne proposent pas un niveau d’isolation suffisant, sont trop fragiles, ou imposent des contraintes trop importantes sur la conception du dispositif et sont difficiles à intégrer. Une approche intéressante pour l’isolation, démontrée dans la littérature, est de fabriquer des pores de taille nanométrique dans le silicium par gravure électrochimique. En nanostructurant le silicium ainsi, on peut diviser sa conductivité thermique par un facteur de 100 à 1000, le transformant en isolant thermique. Cette solution est idéale pour l’intégration dans les procédés de fabrication existants des MEMS, car on garde le silicium qui est déjà utilisé pour leur fabrication, mais en le nanostructurant localement, on le rend isolant là où on en a besoin. Par contre sa porosité cause des problèmes : mauvaise résistance chimique, structure instable au-delà de 400°C, et tenue mécanique réduite. La facilité d’intégration des semiconducteurs poreux est un atout majeur, nous visons donc de réduire les désavantages de ces matériaux afin de favoriser leur intégration dans des dispositifs en silicium. Nous avons identifié deux approches pour atteindre cet objectif : i) améliorer le Si poreux ou ii) développer un nouveau matériau. La première approche consiste à amorphiser le Si poreux en l’irradiant avec des ions à haute énergie (uranium, 110 MeV). Nous avons montré que l’amorphisation, même partielle, du Si poreux entraîne une diminution de sa conductivité thermique, sans endommager sa structure poreuse. Cette technique réduit sa conductivité thermique jusqu’à un facteur de trois, et peut être combinée avec une pré-oxydation afin d’atteindre une réduction d’un facteur cinq. Donc cette méthode permet de réduire la porosité du Si poreux, et d’atténuer ainsi les problèmes de fragilité mécanique causés par la porosité élevée, tout en gardant un niveau d’isolation égal. La seconde approche est de développer un nouveau matériau. Nous avons choisi le SiC poreux : le SiC massif a des propriétés physiques supérieures à celles du Si, et donc à priori le SiC poreux devrait conserver cette supériorité. La fabrication du SiC poreux a déjà été démontrée dans la littérature, mais avec peu d’études détaillées du procédé. Sa conductivité thermique et tenue mécanique n’ont pas été caractérisées, et sa tenue en température que de façon incomplète. Nous avons mené une étude systématique de la porosification du SiC en fonction de la concentration en HF et le courant. Nous avons implémenté un banc de mesure de la conductivité thermique par la méthode « 3 oméga » et l’avons utilisé pour mesurer la conductivité thermique du SiC poreux. Nous avons montré qu’elle est environ deux ordres de grandeur plus faible que celle du SiC massif. Nous avons aussi montré que le SiC poreux est résistant à tous les produits chimiques typiquement utilisés en microfabrication sur silicium. D’après nos résultats il est stable jusqu’à au moins 1000°C et nous avons obtenu des résultats qualitatifs encourageants quant à sa tenue mécanique. Nos résultats signifient donc que le SiC poreux est compatible avec la microfabrication, et peut être intégré dans les MEMS comme isolant thermique. // Abstract : Thermal insulation is essential in several types of MEMS (micro electro-mechanical systems). It can help reduce power consumption, improve performance, and can also isolate the hot area from the rest of the device, which is essential in a system-on-chip. A few materials and techniques currently exist for thermal insulation in MEMS, but these are limited. Indeed, either they don’t have provide a sufficient level of insulation, are too fragile, or restrict design of the device and are difficult to integrate. A potentially interesting technique for thermal insulation, which has been demonstrated in the literature, is to make nanometer-scale pores in silicon by electrochemical etching. By nanostructuring silicon in this way, its thermal conductivity is reduced by a factor of 100 to 1000, transforming it into a thermal insulator. This solution is ideal for integration in existing MEMS fabrication processes, as it is based on the silicon substrates which are already used for their fabrication. By locally nanostructuring these substrates, silicon is made insulating wherever necessary. However the porosity also causes problems : poor chemical resistance, an unstable structure above 400◦C, and reduced mechanical properties. The ease of integration of porous semiconductors is a major advantage, so we aim to reduce the disadvantages of these materials in order to encourage their integration in silicon-based devices. We have pursued two approaches in order to reach this goal : i) improve porous Si, or ii) develop a new material. The first approach uses irradiation with high energy ions (100 MeV uranium) to amorphise porous Si. We have shown that amorphisation, even partial, of porous Si leads to a reduction of its thermal conductivity, without damaging its porous structure. This technique can reduce the thermal conductivity of porous Si by up to a factor of three, and can be combined with a pre-oxidation to achieve a five-fold reduction of thermal conductivity. Therefore, by using this method we can use porous Si layers with lower porosity, thus reducing the problems caused by the fragility of high-porosity layers, whilst keeping an equal level of thermal insulation. The second approach is to develop a new material. We have chosen porous SiC: bulk SiC has exceptional physical properties and is superior to bulk Si, so porous SiC should be superior to porous Si. Fabrication of porous SiC has been demonstrated in the literature, but detailed studies of the process are lacking. Its thermal conductivity and mechanical properties have never been measured and its high-temperature behaviour has only been partially characterised. We have carried out a systematic study of the effects of HF concentration and current on the porosification process. We have implemented a thermal conductivity measurement setup using the “3 omega” method and used it to measure the thermal conductivity of porous SiC. We have shown that it is about two orders of magnitude lower than that of bulk SiC. We have also shown that porous SiC is chemically inert in the most commonly used solutions for microfabrication. Our results show that porous SiC is stable up to at least 1000◦C and we have obtained encouraging qualitative results regarding its mechanical properties. This means that porous SiC is compatible with microfabrication processes, and can be integrated in MEMS as a thermal insulation material.
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15

Maurais, Luc. "Conception d’un procédé de microfabrication pour l’assemblage 3D puce-à-puce de circuits intégrés hétérogènes à des fins de prototypage." Mémoire, Université de Sherbrooke, 2018. http://hdl.handle.net/11143/11911.

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L’utilisation de photodiodes avalanche monophotoniques (PAMP) pour une utilisation au sein d’imageur préclinique par tomographie d’émission par positrons est d’intérêt. En effet, l’utilisation de ces photodétecteurs intégrés au CMOS est poussée par leurs excellentes performances de résolution en temps ainsi que leur haute sensibilité. Cependant, l’utilisation de ces détecteurs nécessite également un circuit intégré de contrôle visant à protéger les photodiodes de courants trop élevés lors de déclenchement d’avalanches et de contrôler leurs temps mort. Ces circuits de plus en plus sophistiqués nécessitent un espace significatif diminuant ainsi la surface photosensible à la surface de la puce et diminuant leurs sensibilités. L’assemblage 3D puce-à-puce est donc nécessaire dans le but d’augmenter la surface photosensible et de ne pas limiter les fonctionnalités de contrôles électroniques individuelles à chaque PAMP. Ce document présente le développement d’un procédé d’assemblage 3D puce-à-puce visant l’intégration de matrices de PAMP. Les étapes de microfabrication nécessaires visent l’intégration d’interconnexions verticales au travers du substrat (TSV) permettant de transmettre les signaux d’une couche à l’autre et le collage 3D de ceux-ci. De plus, des mesures de caractéristiques de bruits ont été effectuées sur des puces ayant subi certaines étapes de microfabrication du procédé d’assemblage 3D. Ces mesures ont été effectuées dans le but de déterminer l’impact potentiel du procédé d’assemblage sur les performances des PAMP intégrés en 3D.
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16

Lu, Chi. "Micro-Fabricated Hydrogen Sensors Operating at Elevated Temperatures." UKnowledge, 2009. http://uknowledge.uky.edu/gradschool_diss/767.

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In this dissertation, three types of microfabricated solid-state sensors had been designed and developed on silicon wafers, aiming to detect hydrogen gas at elevated temperatures. Based on the material properties and sensing mechanisms, they were operated at 140°C, 500°C, and 300°C. The MOS-capacitor device working at 140°C utilized nickel instead of the widely-used expensive palladium, and the performance remained excellent. For very-high temperature sensing (500°C), the conductivity of the thermally oxidized TiO2 thin film based on the anodic aluminum oxide (AAO) substrate changed 25 times in response to 5 ppm H2 and the response transient times were just a few seconds. For medium-high temperatures (~300°C), very high sensitivity (over 100 times’ increment of current for H2 concentration at 10 ppm) was obtained through the reversible reduction of the Schottky barrier height between the Pt electrodes and the SnO2 nano-clusters. Fabrication approaches of these devices included standard silicon wafer processing, thin film deposition, and photolithography. Materials characterization methods, such as scanning electron microscopy (SEM), atomic force microscopy (AFM), surface profilometry, ellipsometry, and X-ray diffractometry (XRD), were involved in order to investigate the fabricated nano-sized structures. Selectivities of the sensors to gases other than H2 (CO and CH4) were also studied. The first chapter reviews and evaluates the detection methodologies and sensing materials in the current research area of H2 sensors and the devices presented this Ph.D. research were designed with regard to the evaluations.
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17

Stout, John Michael. "Nanofluidic Applications of Silica Membranes." BYU ScholarsArchive, 2018. https://scholarsarchive.byu.edu/etd/7040.

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This work presents membrane development applicable in nanofluidic devices. These membranes can also be termed suspended thin films, supported on two or more edges. I first discuss motivation and background for developing these structures. Then I derive the formative principles for nanofluidic systems. Following the derivation of the Navier-Stokes and Washburn equations, I discuss applying these theories to planar nanofluidic capillaries and finish the derivation by discussing the forces that drive liquid flow in nanochannels. I next discuss the membrane development process, starting with my work in static height traps, and develop the concept of analyzing nanoparticles using suspended membranes. After reviewing the lessons learned from the double-nanopore project I discuss developing an oxide layer tuned to the needs of a membrane and present the design of an adjustable membrane structure. Afterward, I discuss modeling and simulating the structure, and present a procedure for fabricating robust membranes. I then explain applying the membrane structure to form a nanofluidic pump and document the process for recording and analyzing the pumping characteristics for nanodevices. As part of the pump section I propose a theory and model for predicting the behavior of the pumps. I next present applying active membranes as nanoparticle traps. I document a quick-turn optical profilometry method for charicterizing the devices, then present experimental data involving trapping. Early results show that the device functions as a nanoparticle concentrator and may work well as a size-based trap for nanoparticles. I conclude by summarizing the main contributions made during my course of study and by providing supplemental material to guide future research.
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18

Almeida, Gustavo Foresto Brito de. "Estruturação de filmes de silício amorfo hidrogenado induzida por pulsos laser de femtossegundos." Universidade de São Paulo, 2014. http://www.teses.usp.br/teses/disponiveis/76/76132/tde-05052014-112028/.

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Neste trabalho investigamos as modificações na morfologia superficial e estrutura de filmes finos de silício amorfo hidrogenado, resultantes da irradiação com pulsos ultracurtos de femtossegundos (150 fs, 775 nm e 1 kHz). Os processos de microfabricação foram conduzidos varrendo, a velocidade constante, um feixe laser com diferentes fluências (1,8 a 6,2 MJ/m2) sobre a amostra. Os espectros de transmissão apresentaram queda para amostras irradiadas, cujas imagens de microscopia eletrônica de varredura mostraram estruturas superficiais condizentes com o fenômeno de LIPSS (Laser Induced Periodic Surface Structures). Uma análise estatística das imagens de microscopia de força atômica foi realizada com um programa que identifica e caracteriza os domínios (picos) produzidos pela microfabricação. O histograma de altura da amostra irradiada com uma fluência de 3,1 MJ/m2 mostrou que a altura média dos picos produzidos é de 15 nm, menor que o centro da distribuição de alturas para uma amostra não irradiada. Porém, para fluências acima de 3,7 MJ/m2 a morfologia é dominada pela formação de agregados. Medidas de espectroscopia Raman revelaram a formação de uma fração de silício cristalino, após a irradiação com pulsos de femtossegundos, de até 77% para 6,2 MJ/m2. Determinamos ainda uma diminuição da dimensão dos nanocristais produzidos com o aumento da fluência do laser de excitação. Portanto, nossos resultados mostram que há um compromisso entre as propriedades obtidas pela microfabricação (transmissão, distribuição de picos, fração de cristalização e tamanho dos nanocristais produzidos) que deve ser levado em conta ao aplicar a técnica de microestruturação com laser de femtossegundos.
In this work we investigated surface morphology and structural modification on hydrogenated amorphous silicon (a-Si:H) thin films, resulting from femtosecond laser irradiation (150 fs, 775 nm and 1 kHz). Microfabrication processes were carried out scanning sample´s surface, at constant speed, with distinct laser fluencies (from 1.8 to 6.2 MJ/m2). A decrease was observed in the transmission spectra of irradiated samples, whose scanning electron microscopy images revealed surface structures compatible with the Laser Induced Periodic Surface Structure (LIPSS) phenomenon. A statistical analyzes of Atomic Force Microcopy images was performed using a specially developed software, that identifies and characterizes the domains (spikes) produced by the laser irradiation. The height histogram for a sample irradiated with 3.1 MJ/m2 reveals that the average height of the produced spikes is at 15 nm, which is smaller than the center of height distribution for non-irradiated sample. For fluencies higher than 3.7 MJ/m2, however, aggregation of the produced spikes dominates the sample morphology. Raman spectroscopy revealed the formation of a crystalline fraction of 77% for laser fluence irradiation of 6.2 MJ/m2, as well as a decrease in size of the produced crystals as a function of fluence. Therefore, our results indicate that there is a compromise of the sample transmission, spikes distribution, crystallization fraction and size of nanocrystals obtained by fs-laser irradiation, which has to be taken into consideration when using this material processing method.
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19

Shi, Zhichao. "Micro-actionneurs numériques en silicium pour la réalisation d'un micro-convoyeur." Thesis, Université Paris-Saclay (ComUE), 2017. http://www.theses.fr/2017SACLS175/document.

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Les travaux de cette thèse portent sur le développement (modélisation, conception, réalisation et tests) d’une surface intelligente (smart surface) composée d’un réseau d'actionneurs numériques MEMS, capables de mouvoir des charges posées dessus. Pour la réalisation de ces smart-surfaces, deux voies ont été explorées : un actionnement par voie électromagnétique, constituée d’aimants fixes et mobiles, et un actionnement utilisant des éléments bistables couplés à des alliages à mémoire de forme. Dans le premier cas, la simulation de l’interaction magnétique entre un micro-actionneur et le champ créé par des pistes conductrices placées à proximité a été réalisée. Un réseau de 5x5 micro-actionneurs électromagnétiques quadristables a été ensuite conçu, réalisé et caractérisé. Ce démonstrateur est fonctionnel en convoyage d’objets légers en translation et en rotation. Dans le second cas, la conception et la réalisation d’un actionneur MEMS élémentaire ont été menées : des modèles analytiques ont été confrontés aux résultats obtenus par éléments finis, et enfin comparés aux résultats expérimentaux. Ces travaux ciblent la problématique de la commande des systèmes mécatroniques, à actionneurs multiples, aux échelles méso ou microscopique. La connectique associée est un problème récurrent dans les systèmes fortement miniaturisés, les structures présentées ici présentent un fort potentiel de réduction des connexions filaires, voire leur élimination complète
The work of this doctoral thesis involves in developing a smart surface (including modelling, design, fabrication and tests), composed of an array of MEMS digital actuators, capable of moving objects placed on it. In order to produce these smart surfaces, two actuation types were explored: electromagnetic actuation on fixed and mobile magnets and optothermal actuation of shape memory alloys on bistable elements. In the first case, simulation of the magnetic interaction between a micro-actuator and the magnetic field generated by nearby current wires was performed. Then, an array of 5x5 quadristable electromagnetic micro-actuators was designed, produced and characterized. This demo prototype is functional for small-weight object conveyance by translation and rotation. In the second case, design and fabrication of an elementary MEMS actuator were carried out: analytical models were confronted with the results from Finite Element Analysis, and at last compared to experimental ones. This work targets at the issue of controlling multiple-actuator mechatronics systems, at meso- or micrometric scale. Since the associated connectors are a recurring problem in highly miniaturized systems, the structures presented herein demonstrate important potential of cabling reduction, even towards complete wireless configurations
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Marinins, Aleksandrs. "Polymer Components for Photonic Integrated Circuits." Doctoral thesis, KTH, Skolan för teknikvetenskap (SCI), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-219556.

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Optical polymers are a subject of research and industry implementation for many decades. Optical polymers are inexpensive, easy to process and flexible enough to meet a broad range of application-specific requirements. These advantages allow a development of cost-efficient polymer photonic integrated circuits for on-chip optical communications. However, low refractive index contrast between core and cladding limits light confinement in a core and, consequently, integrated polymer device miniaturization. Also, polymers lack active functionality like light emission, amplification, modulation, etc. In this work, we improved a performance of integrated polymer waveguides and demonstrated active waveguide devices. Also, we present novel Si QD/polymer optical materials. In the integrated device part, we demonstrate optical waveguides with enhanced performance. Decreased radiation losses in air-suspended curved waveguides allow low-loss bending with radii of only 15 µm, which is far better than >100 µm for typical polymer waveguides. Another study shows a positive effect of thermal treatment on acrylate waveguides. By heating higher than polymer glass transition temperature, surface roughness is reflown, minimizing scattering losses. This treatment method enhances microring resonator Q factor more than 2 times. We also fabricated and evaluated all-optical intensity modulator based on PMMA waveguides doped with Si QDs. We developed novel hybrid optical materials. Si QDs are encapsulated into PMMA and OSTE polymers. Obtained materials show stable photoluminescence with high quantum yield. We achieved the highest up to date ~65% QY for solid-state Si QD composites. Demonstrated materials are a step towards Si light sources and active devices. Integrated devices and materials presented in this work enhance the performance and expand functionality of polymer PICs. The components described here can also serve as building blocks for on-chip sensing applications, microfluidics, etc.

QC 20171207

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21

Silva, de Vasconcellos Douglas. "Intégration monolithique de multiples membranes de silicium poreux pour laboratoires sur puce." Thesis, Toulouse 3, 2020. http://www.theses.fr/2020TOU30257.

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La principale cause de mortalité dans le monde est due à des maladies traitables non diagnostiquées. La raison sous-jacente est le coût et la complexité de la plupart des processus de diagnostic, car ils sont souvent réalisés dans des centres médicaux et nécessitent des équipements coûteux et compliqués. Pour résoudre ce problème, le développement d'une technologie au point de service utilisant des laboratoires sur puce miniaturisés et peu coûteux revêt une grande importance. L'analyse d'un échantillon comprend deux étapes principales : la préparation de l'échantillon (purification et pré concentration de l'échantillon) et son analyse (bio détection). Différentes technologies ont été développées avec succès pour implémenter ces étapes sur puce, cependant elles sont généralement intégrées de manière hybride, où le biocapteur et le module de préparation de l'échantillon sont réalisés séparément puis combinés, ce qui augmente la complexité du dispositif et éventuellement son coût final. L'objectif de ce travail est d'offrir une réponse technologique générique et unique pour la préparation et la détection d'échantillons sur puce au moyen d'éléments en silicium poreux, sous la forme de membranes latérales en silicium poreux et de couches verticales standard en silicium poreux fabriquées de manière monolithique sur une seule puce micro fluidique plane. Le silicium poreux est un matériau nanostructuré aux caractéristiques électriques et optiques intéressantes qui a déjà été utilisé pour la bio détection par interférométrie basée sur la réflectance lorsqu'il est correctement fonctionnalisé et pour la filtration basée sur la taille et la charge. En outre, c'est un bon candidat pour la concentration d'échantillons par polarisation de la concentration ionique, en raison de sa propriété de sélectivité ionique. Cependant, il faut être capable de fabriquer de multiples éléments en silicium poreux avec des morphologies spécifiques (taille des pores et porosité) sur la même puce, ce qui n'a pas encore été réalisé, afin d'utiliser le silicium poreux comme une brique technologique générique pour diverses fonctions. Le silicium poreux est généralement fabriqué par anodisation électrochimique et l'état de dopage du silicium est l'un des paramètres qui contrôle la morphologie de la couche poreuse. Nous avons donc développé un procédé de fabrication basé sur l'implantation ionique sélective de substrats SOI afin d'obtenir de nombreux éléments poreux de caractéristiques distinctes en utilisant une seule étape d'anodisation. Nous avons réussi à fabriquer des membranes latérales poreuses en silicium pontant des micro canaux planaires avec une augmentation de deux fois la taille des pores entre les régions non implantées et implantées sur une seule puce (de ~25 à ~50 nm), tandis que la porosité variait de ~80 à ~90%. En gravant la couche d'oxyde enterrée, nous avons également formé des couches de silicium poreuses verticales, avec une taille de pores de ~35 nm et une porosité de ~65%, au fond des micro canaux sur le même échantillon. En utilisant les procédés de fabrication développés, nous avons conçu et fabriqué un laboratoire sur puce monolithique intégrant des étapes de pré concentration et de filtration de l'échantillon, avec un potentiel de réalisation de bio détection par interférométrie optique
The leading cause of mortality worldwide is due to undiagnosed treatable diseases. The underlying reason is the cost and complexity of most diagnostic processes, as they are often carried out in medical centers and require expensive and complicated equipment. To tackle this issue, the development of point-of-care technology using miniaturized and low-cost lab-on-a-chip is of great importance. The analysis of a sample includes two main steps: sample preparation (sample purification and preconcentration) and sample analysis (biosensing). Different technologies have been successfully developed to implement these steps on chip, however they are usually integrated in a hybrid fashion, where the biosensor and the sample preparation module are realized separately and then combined, which increases the device complexity and possibly its final cost. The aim of this work is to offer a generic and single technological response for on chip sample preparation and sensing by means of porous silicon elements, in the form of lateral porous silicon membranes and standard vertical porous silicon layers monolithically fabricated onto a single planar microfluidic chip. Porous silicon is a nanostructured material with interesting electrical and optical characteristics that has already been used for biosensing via reflectance-based interferometry when properly functionalized and for size/charge-based filtration. Besides, it is a strong candidate for sample concentration using ion concentration polarization due to its ion-selectivity property. However, one must be able to fabricate multiple porous silicon elements with specific morphologies (pore size and porosity) on the same chip, which has not been achieved yet, in order to use porous silicon as a generic technological brick for various functions. Porous silicon is usually fabricated through electrochemical anodization and the doping condition of silicon is one of the parameters that controls the porous layer morphology. We have thus developed a fabrication process based on the selective ion implantation of SOI substrates in order to achieve numerous porous elements of distinct characteristics using a single anodization step. We have successfully fabricated lateral porous silicon membranes bridging planar microchannels with twofold increase in pore size from non-implanted to implanted regions onto a single chip (from ~25 to ~50 nm), while the porosity varied from ~80 to ~90%. By etching the buried oxide layer, we have also formed vertical porous silicon layers, with ~35 nm pore size and ~65% porosity, at the bottom of the microchannels on the same sample. Using the developed fabrication processes, we have designed and fabricated a monolithic lab-on-a-chip integrating sample preconcentration and filtration stages, with a potential to achieve biosensing through optical interferometry
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Maghribi, Mariam Nader. "Microfabrication of an implantable silicone microelectrode array for an epiretinal prosthesis /." For electronic version search Digital dissertations database. Restricted to UC campuses. Access is free to UC campus dissertations, 2003. http://uclibs.org/PID/11984.

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23

Maghribi, M. "Microfabrication of an Implantable silicone Microelectrode array for an epiretinal prosthesis." Washington, D.C : Oak Ridge, Tenn. : United States. Dept. of Energy ; distributed by the Office of Scientific and Technical Information, U.S. Dept. of Energy, 2003. http://www.osti.gov/servlets/purl/15005780-5uYpbJ/native/.

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Thesis (Ph.D.); Submitted to the Univ. of California, Davis, CA (US); 10 Jun 2003.
Published through the Information Bridge: DOE Scientific and Technical Information. "UCRL-LR-153347" Maghribi, M. 06/10/2003. Report is also available in paper and microfiche from NTIS.
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24

Syme, Derric Benjamin. "Microfabrication and Characterization of Freestanding and Integrated Carbon Nanotube Thin Films." BYU ScholarsArchive, 2019. https://scholarsarchive.byu.edu/etd/7376.

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This work chronicles the fabrication of two unique thin films using carbon nanotubes. The first is a carbon film made primarily from vertically grown carbon nanotubes (CNTs) and rolled into lateral alignment. The second is an insulating film created by CNTs as a scaffolding to create a porous silica layer. Each topic represents a different method of utilizing CNTs for thin-film fabrication.Investigation of an entirely carbon thin film, comprised of aligned and laterally oriented carbon nanotubes was performed. The thin film was strengthened by deposition of amorphous carbon for a total thickness of <<> 5 µm. This thickness is thinner than many previous films fabricated entirely out of carbon. Vertically aligned CNT arrays were manually rolled into a thin sheet and released from the growth substrate. Infiltration with amorphous carbon (as carbon coating) on the rolled CNTs was used to improve adhesion between neighboring CNTs after lateral alignment and to improve the mechanical integrity of the film. Mechanical property characterization indicated the ability to sustain a pressure differential across the film of up to 82.7 kPa for a suspended film of 4 mm in diameter. Peak stress, Young<'>s modulus and biaxial modulus were obtained as a characterization of the strength of the thin film.Fabrication and examination of a porous silica thin film, potentially for use as an insulating thermal barrier, was investigated. A vertically aligned CNT forest, created by chemical vapor deposition (CVD), was used as a scaffolding for the porous film. Silicon was deposited on the CNT forest using low pressure CVD (LPCVD), then oxidized to remove the CNTs and convert the silicon to silica <&hyphen>“ a material often used for electrical or thermal passivation. This fabrication method introduces hollow pores where the CNTs once occupied, further increasing the material<'>s insulating properties. Thermal testing was performed by equating radiative and conductive heat transfer in a vacuum chamber and comparing the temperature difference between the film and a reference sample of comparable thermal resistance. For films approximately 50 µm thick, the thermal conductivity was found to be 0.054 - 0.071 W/mK.
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25

Struss, Quentin. "Chambres à vapeur ultra-minces en silicium embarquées pour l’atténuation de points chauds sur les dispositifs de la microélectronique." Thesis, Lyon, 2020. http://www.theses.fr/2020LYSEI131.

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La gestion thermique et plus particulièrement l’atténuation des points chauds est devenue l’un des aspects les plus critiques dans la conception de circuits microélectroniques, notamment dans le cas d’applications nomades compactes. Le travail présenté dans ce manuscrit concerne la conception, la fabrication et la caractérisation d’une chambre à vapeur ultramince en silicium composée d’un réseau capillaire à base de micropiliers. Cette dernière est conçue pour être directement embarquée en face arrière d’une puce CMOS dans le but de réduire l’intensité des points chauds. Une chambre à vapeur est un dispositif de refroidissement passif à changement de phase, dont les cycles d’évaporation et de condensation permettent un transfert de chaleur beaucoup plus performant que les répartiteurs de chaleur traditionnels. Le potentiel de miniaturisation d’un tel dispositif a été étudié à l’aide de modèles analytiques et numériques et permet d’envisager des épaisseurs inférieures à 600 µm dans le cas de puces de 1 x 1 cm2 dissipant des puissances jusqu’à 10 W. Un procédé de fabrication compatible avec la présence d’un circuit CMOS sur la face avant a été développé et permet la fabrication de dispositifs à partir de deux plaques de silicium structurés et assemblés à l’aide d’un procédé de collage direct à basse température. Le fonctionnement du dispositif est vérifié expérimentalement et une estimation des performances optimales, réalisée à l’aide d’un modèle numérique, montre des performances supérieures à celles d’un répartiteur de chaleur en cuivre de même dimensions. Une approche innovante de remplissage et de scellement collective à l’échelle d’un wafer par collage direct Au-Au à température ambiante a également été développée et permet, pour la première fois, la fabrication de chambre à vapeur en silicium sans avoir recours à un trou de remplissage
Thermal management, and more precisely hotspots attenuation, have nowadays become one of the most critical aspect in the design of microelectronic components, especially in the case of compact mobile applications. The work presented in this manuscript deals with the design, the fabrication and the characterization of an ultra-thin silicon vapor chamber integrating a micropillars capillary wick. It is designed to be directly embedded on the backside of a CMOS component in order to reduce hotspots intensity. A vapor chamber is a passive phase-change cooling device, which evaporation and condensation cycles leads to significantly higher heat transfer performances compared to classical heat spreading solution. The miniaturization of such devices has been studied using analytical and numerical models and lets consider total thicknesses lower than 600 µm in the case of 1x1 cm2 chips dissipating until 10 W. A microfabrication process flow, compatible with the presence of a CMOS component on the front side, has been developed and allows the fabrication of devices from two microstructured silicon wafer, assembled by a low temperature direct bonding process. The device operating is experimentally verified and an estimation of the optimal performances, realized using a numerical model, exhibits significantly higher performances compared to a copper heat spreader with the same dimensions. An innovative collective wafer level filling and sealing approach has also been developed using Au-Au direct bonding at room temperature and allows, for the first time, the fabrication of a silicon vapor chamber with no filling hole
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26

Butler, Randall Thomas. "Microfabrication and Silicification: the control of In Vitro and In Vivo Silica deposition and potential applications." The Ohio State University, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=osu1406642409.

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27

Khan, Muneeb Ullah. "Contribution to the design and fabrication of an integrated micro-positioning system." Thesis, Compiègne, 2014. http://www.theses.fr/2014COMP1671/document.

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L’objectif de la thèse est de développer un dispositif de micro positionnement intégrant à la fois les actionneurs et les capteurs. Un dispositif a été conçu afin de réaliser des déplacements dans les plans sur une course millimétrique. Le dispositif compact ne nécessite pas de système de guidage additionnel et selon le mode d’utilisation de ces moteurs, il est capable de réaliser des translations dans le plan ou des rotations autour d’un axe perpendiculaire au plan. Le dispositif comprend quatre moteurs électromagnétiques linéaires fixés orthogonalement sur une structure en forme de croix. Chaque moteur consiste en une paire de bobines planes entrelacées fixe et une barre ’aimants mobile. Un capteur de déplacement intégré dans la structure en croix permettant de mesurer le déplacement de celle-ci a été conçu et fabriqué. Ce capteur est constitué d’une tête de mesure à fibres optiques placé face à un réseau en silicium réalisé par des techniques de microfabrication. Afin de minimiser les erreurs d’assemblage, la structure en croix a également été micro fabriquée. Le dispositif est capable de réaliser un déplacement de 10 mm et une rotation de ±11° autour de l’axe perpendiculaire au plan du dispositif. La résolution de déplacement du dispositif est de 1,4 µm avec une précision de 31 nm en boucle fermée. Le dispositif peut également atteindre une vitesse de déplacement de 12 mm/s
The objective of thesis is to develop an integrated micro positioning system for micro applications. A unique micro positioning system design capable to deliver millimeter level strokes with pre-embedded auto guidance feature in micro application has been realized. The design integrates, a stack of orthogonally arranged four electromagnetic linear motors. Each linear motor consists of a fixed planar electric drive coil and mobile permanent magnet array. The optimal design of the system delivers a small footprint size. In addition, to measure and control the displacement, a high resolution compact optical displacement measurement sensor has been designed and fabricated in silicon material using microfabrication technology. Furthermore, a light weight silicon cross structure was fabricated using dry etching technology to reduce components assembly errors. The device is capable to deliver 10 mm displacement stroke with a rotation of ±11° about an axis perpendicular to the plane of the device. The displacement resolution of the device is 1.4 µm with a precision of 31 nm in closed loop control. The device can realize displacement with a speed of 12 mm/s
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Diallo, Alpha Dassimou. "Contribution à la conception et à la réalisation d'une micro-machine thermique à cycle de Stirling." Thesis, Bourgogne Franche-Comté, 2019. http://www.theses.fr/2019UBFCD035.

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En France, on estime que plus de 27 TWh de chaleur à une température comprise entre 100 et 200°C sont perdus chaque année. La récupération de cette chaleur perdue est donc un enjeu important pour réduire la consommation globale d'énergie. La récupération de la chaleur peut se faire à l'aide de machines de Stirling, qui sont des machines thermodynamiques réversibles convertissant la chaleur en mouvement mécanique - lequel pourrait ensuite être converti en électricité - à partir de deux sources de température suffisamment différentes. La récupération de la chaleur produite par les systèmes électroniques pourrait être faite avec une machine de Stirling miniaturisée capable de produire de l'électricité à partir de n'importe quelle source de chaleur. Une telle micro-machine peut aussi fonctionner en mode "réfrigérateur" (transport de la chaleur d'une source chaude vers une source froide grâce à un travail mécanique) et pourrait être utilisée pour refroidir des composants électroniques. Le rendement énergétique des machines Stirling peut atteindre 38% (avec une source chaude à 200°C) et leur entretien est réputé être minimal. Cependant, aucune machine Stirling n'a encore été démontrée avec un volume inférieur à un centimètre cube. En 2015, une architecture de micromachine Stirling triphasée pouvant être miniaturisée grâce aux technologies MEMS a été proposée et testée avec succès en macro-volume (avec une taille d'une vingtaine de centimètres). Le présent travail de thèse a été consacré à la miniaturisation de ce nouveau concept de micromachine Stirling pour la récupération de chaleur entre 50 et 200°C, en utilisant les technologies MEMS. Cette approche permettrait la production simultanée de grandes quantités de micro-machines et donc la création éventuelle de réseaux de micromachines à faible coût par watt d'électricité produite. Les micromachines sont constituées d'un empilement de tranches de silicium et de verre. Leurs défis de conception ont été étudiés en détail et leur puissance mécanique de sortie attendue a été estimée. Les procédés de fabrication nécessaires ont été développés et la caractérisation de chaque élément a été effectuée avant l'assemblage. Elles comportent notamment des membranes hybrides de 5 mm de diamètre et de 200 microns d'épaisseur qui jouent le rôle des pistons en micro-volumes et sont des éléments clés de la micro-machine. Ces membranes sont constituées de pièces en silicium (spirales et disques) noyées dans une membrane souple en élastomère de silicone dont les propriétés mécaniques ont donc été étudiées en détail. Des simulations numériques du comportement mécanique et dynamique de ces membranes hybrides ont été présentées. L'accord entre les simulations numériques et les caractérisations a été considéré comme très satisfaisant. Ces membranes se sont révélées très robustes et le déplacement de leur centre peut atteindre 1 à 2 mm sans dommage. Leurs fréquences de résonance vont de 850 Hz à 2800 Hz et il a été montré qu'elles peuvent fonctionner à 200°C sans vieillissement. De plus, l'optimisation d'un procédé d'assemblage par thermocompression d'or (Au) a permis d’obtenir des contraintes de rupture en traction d'environ 20 à 30 MPa, parmi les meilleures rapportées dans la littérature. Des prototypes de micromachines triphasées de 20x20x8mm ont été assemblés, mais leur fonctionnement en mode moteur n'a pas pu être observé, même pour une différence de température de 100 °C. Cependant, en insérant des aimants pour provoquer le déplacement des membranes par excitation électromagnétique, il a été possible d'observer un effet de refroidissement encourageant. Grâce aux travaux réalisés, les principaux éléments de base sont maintenant disponibles et devraient permettre des optimisations ultérieures dans des conditions beaucoup plus favorables
In France, it is estimated that more than 27 TWh of heat at a temperature between 100 and 200°C is lost each year. The recovery of this lost heat is therefore an important issue in reducing overall energy consumption. Heat recovery can be done using Stirling machines, which are reversible thermodynamic machines that convert heat into mechanical motion, which could then be converted into electricity from two sufficiently different temperature sources. The recovery of the heat produced by electronic systems could be done with a miniaturized Stirling machine capable of producing electricity from any heat source. Such a micro-machine can also operate in "refrigerator" mode (transporting heat from a hot source to a cold source through mechanical work) and could be used to cool electronic components. The energy efficiency of Stirling machines can reach 38% (with a hot source at 200°C) and their maintenance is considered minimal. However, no Stirling machine has yet been demonstrated with a volume of less than one cubic centimeter. In 2015, a three-phase Stirling micromachine architecture that can be miniaturized using MEMS technologies has been proposed and successfully tested in macro-volume (with a size of about twenty centimeters). The present thesis work was devoted to the miniaturization of this new Stirling micromachine concept for heat recovery between 50 and 200°C, using MEMS technologies. This approach would allow the simultaneous fabrication of large quantities of micro-machines and thus the possible creation of micromachine networks at low cost per watt of electricity produced. The studied micromachines are made up of a stack of silicon and glass wafers. Their design challenges have been studied in detail and their expected mechanical output power has been estimated. The necessary manufacturing processes were developed and the characterization of each element was carried out prior to assembly. In particular, they include hybrid membranes 5 mm in diameter and 200 microns thick that act as micro-volume pistons and are key elements of the machine. These membranes are made up of silicon parts (spirals and discs) embedded in a flexible silicone elastomer membrane whose mechanical properties have therefore been studied in detail. Numerical simulations of the mechanical and dynamic behavior of these hybrid membranes were presented. The agreement between the numerical simulations and the characterizations was considered to be very satisfactory. These membranes proved to be very robust and the displacement of their center can reach 1 to 2 mm without damage. Their resonance frequencies range from 850 Hz to 2800 Hz and it was shown that they can operate at 200°C without aging. In addition, the optimization of a gold thermocompression assembly process has resulted in tensile breaking stresses of about 20-30 MPa, among the best reported in the literature. Prototype of 20x20x8mm three-phase micromachines were assembled, but their operation in motor mode could not be observed, even for a temperature difference of 100°C. However, when magnets were inserted to induce the displacement of the membranes by electromagnetic excitation, it was possible to observe an encouraging cooling effect. As a result of the work carried out, the main basic elements are now available and should allow further optimization under much more favorable conditions
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Matějka, Milan. "Technologie přípravy hlubokých struktur v submikronovém rozlišení." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2017. http://www.nusl.cz/ntk/nusl-256584.

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The dissertation thesis is focused on research and development in the field of microfabrication by the technology of electron beam lithography. In the first part of this work, the extensive study is conducted in the field of technology of electron beam lithography in terms of physical principles, writing strategies and resist materials. This is followed with description of physical principles of etching for the transfer of relief structures into substrates. The thesis describes innovative techniques in modelling, simulation, data preparation and optimization of manufacturing technology. It brings new possibilities to record deep binary or multilevel microstructures using electron beam lithography, plasma and reactive ion etching technology. Experience and knowledge in the large area of microlithography, plasma and anisotropic wet-etching of silicon have been capitalized to the design process of manufacturing of nano-patterned membranes. It was followed with practical verification and optimization of the microfabrication process.
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30

Verneuil, Emilie. "Ecoulements et adhésion : rôle des microstructurations." Paris 6, 2005. http://www.theses.fr/2005PA066555.

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31

Kanyal, Supriya Singh. "Fabrication, Characterization, Optimization and Application Development of Novel Thin-layer Chromatography Plates." BYU ScholarsArchive, 2014. https://scholarsarchive.byu.edu/etd/5706.

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This dissertation describes advances in the microfabrication of thin layer chromatography (TLC) plates. These plates are prepared by the patterning of carbon nanotube (CNT) forests on substrates, followed by their infiltration with an inorganic material. This document is divided into ten sections or chapters. Chapter 1 reviews the basics of conventional TLC technology. This technology has not changed substantially in decades. This chapter also mentions some of the downsides of the conventional approach, which include unwanted interactions of the binder in the plates with the analytes, relatively slow development times, and only moderately high efficiencies. Chapter 2 focuses primarily on the tuning of the iron catalyst used to grow the CNTs, which directly influences the diameters of the CNTs grown that are produced. Chapter 3 focuses on the atomic layer deposition (ALD) of SiO2 from a silicon precursor and ozone onto carbon-nanotubes to obtain an aluminum free stationary phase. This approach allowed us to overcome the tailing issues associated with the earlier plates prepared in our laboratory. Chapter 4 is a study of the hydroxylation state of the silica in our TLC plates. A linear correlation was obtained between the SiOH+/Si+ time-of-flight secondary ion mass spectrometry (ToF-SIMS) peak ratio and the isolated silanol peak position at ca. 3740 cm-1 in the diffuse reflectance infrared spectroscopy (DRIFT) spectra. We also compared the hydroxylation efficiencies on our plates of ammonium hydroxide and HF. Chapter 5 reports a series of improvements in TLC plate preparation. The first is the low-pressure chemical vapor deposition (LPCVD) of silicon nitride onto CNTs, which can be used to make very robust TLC plates that have the necessary SiO2 surfaces. These TLC plates are the best we have prepared to date. We also describe here the ALD deposition of ZnO into these devices, which can make them fluorescent. Chapters 6 – 10 consist of contributions to Surface Science Spectra (SSS) of ToF-SIMS spectra of the materials used in our microfabrication process. SSS is a peer-reviewed database that has been useful to many in the surface community. The ToF-SIMS spectra archived include those of (i) Si/SiO2, (ii) Si/SiO2/Al2O3, (iii) Si/SiO2/Al2O3/Fe, (iv) Si/SiO2/Fe (annealed at 750 °C in H2), and (v) Si/SiO2/Al2O3/Fe(annealed)/CNTs. Both positive and negative ion spectra have been submitted. In summary, the present work is a description of advances in the development, thorough characterization, optimization, and application development of microfabricated thin layer chromatography plates that are superior to their commercial counterparts.
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32

Chien, Cheng-Ming, and 簡正明. "Microfabrication Processes on Silicon-Chip Microchannels." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/51749849127667110147.

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碩士
國立中山大學
機械與機電工程學系研究所
90
Abstract In this study, we use microfabrication processes on silicon to produce a rectangular microchannel. The fabrication technology includes exposing, dry etching, and anodic bounding technologies. After fabrication finished, we use AFM and alpha-step to secure surface roughness. It is found a relatively low surface roughness about 3.34% with dimension of 0.5μm×100μm×5000μm microchannel. A theoretical study and calculations, we also made with continuity equation and proper slip condition to analyze fluid behavior in microchannel. At present, several fluid informations in microchannel that incloud pressure drop, fluid velocity, and fluid mass flow rate were obtained.
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33

"Laser microfabrication and testing of silicon carbide diaphragms for MEMS applications." IOWA STATE UNIVERSITY, 2009. http://pqdtopen.proquest.com/#viewpdf?dispub=1462175.

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Choi, D., R. J. Shinavski, and S. Mark Spearing. "Process development of silicon-silicon carbide hybrid structures for micro-engines (January 2002)." 2002. http://hdl.handle.net/1721.1/3983.

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MEMS-based gas turbine engines are currently under development at MIT for use as a button-sized portable power generator or micro-aircraft propulsion sources. Power densities expected for the micro-engines require very high rotor peripheral speeds of 300-600m/s and high combustion gas temperatures of 1300-1700K. These harsh requirements for the engine operation induce very high stress levels in the engine structure, and thus call for qualified refractory materials with high strength. Silicon carbide (SiC) has been chosen as the most promising material for use due to its high strength and chemical inertness at elevated temperatures. However, the state-of-the art microfabrication techniques for single-crystal SiC are not yet mature enough to achieve the required level of high precision of micro-engine components. To circumvent this limitation and to take advantage of the well-established precise silicon microfabrication technologies, silicon-silicon carbide hybrid turbine structures are being developed using chemical vapor deposition (CVD) of thick SiC (up to ~70µm) on silicon wafers and wafer bonding processes. Residual stress control of thick SiC layers is of critical importance to all the silicon-silicon carbide hybrid structure fabrication steps since a high level of residual stresses causes wafer cracking during the planarization, as well as excessive wafer bow, which is detrimental to the subsequent planarization and bonding processes. The origins of the residual stress in CVD SiC layers have been studied. SiC layers (as thick as 30µm) with low residual stresses (on the order of several tens of MPa) have been produced by controlling CVD process parameters such as temperature and gas ratio. Wafer-level SiC planarization has been accomplished by mechanical polishing using diamond grit and bonding processes are currently under development using CVD silicon dioxide as an interlayer material. This paper reports on the work that has been done so far under the MIT micro-engine project.
Singapore-MIT Alliance (SMA)
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35

Mateen, Farrukh. "Micro-nano biosystems: silicon nanowire sensor and micromechanical wireless power receiver." Thesis, 2018. https://hdl.handle.net/2144/31956.

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Silicon Nanowire-based biosensors owe their sensitivity to the large surface area to volume ratio of the nanowires. However, presently they have only been shown to detect specific bio-markers in low-salt buffer environments. The first part of this thesis presents a pertinent next step in the evolution of these sensors by presenting the specific detection of a target analyte (NT-ProBNP) in a physiologically relevant solution such as serum. By fabrication of the nanowires down to widths of 60 nm, choosing appropriate design parameters, optimization of the silicon surface functionalization recipe and using a reduced gate oxide thickness of 5 nm; these sensors are shown to detect the NT-ProBNP bio-marker down to 2ng/ml in serum. The observed high background noise in the measured response of the sensor is discussed and removed experimentally by the addition of an extra microfabrication step to employ a differential measurement scheme. It is also shown how the modulation of the local charge density via external static electric fields (applied by on-chip patterned electrodes) pushes the sensitivity threshold by more than an order of magnitude. These demonstrations bring the silicon nanowire-based biosensor platform one step closer to being realized for point-of-care (POC) applications. In the second half of the thesis, it is demonstrated how silicon micromechanical piezoelectric resonators could be tasked to provide wireless power to such POC bio-systems. At present most sensing and actuation platforms, especially in the implantable format, are powered either via onboard battery packs which are large and need periodic replacement or are powered wirelessly through magnetic induction, which requires a proximately located external charging coil. Using energy harnessed from electric fields at distances over a meter; comprehensive distance, orientation, and power dependence for these first-generation devices is presented. The distance response is non-monotonic and anomalous due to multi-path interferences, reflections and low directivity of the power receiver. This issue is studied and evaluated using COMSOL Multiphysics simulations. It is shown that the efficiency of these devices initially evaluated at 3% may be enhanced up to 15% by accessing higher frequency modes.
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