Academic literature on the topic 'Silicon-on-insulator (SOI)'

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Journal articles on the topic "Silicon-on-insulator (SOI)"

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Tian, Li, Xiao Ying Li, Da Yong Qiao, and Bin Yan. "High-Surface-Quality and Wider-Modulation-Range Continuous Face-Sheet Micro Deformable Mirror Based on SOI." Advanced Materials Research 60-61 (January 2009): 185–88. http://dx.doi.org/10.4028/www.scientific.net/amr.60-61.185.

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A new type of continuous face-sheet micro deformable mirror was designed and fabricated based on SOI (Silicon-on-Insulator) technology for high optical efficiency applications in adaptive optics system. SOI provided a Silicon-Insulator-Silicon structure, and the insulator-layer of the three-layer structure was taken as etch-stop layer in deep silicon etching, which made the suspended bulk silicon membrane obtained easily. And the reflective face did not suffer etch-step due to the protection of insulator-layer. The mirror was composed of 5-um-thick and 10-mm-diameter flexible bulk silicon memb
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HADDAB, Y., V. MOSSER, M. LYSOWEC, et al. "LOW-NOISE SILICON-ON-INSULATOR HALL DEVICES." Fluctuation and Noise Letters 04, no. 02 (2004): L345—L354. http://dx.doi.org/10.1142/s021947750400194x.

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Hall sensors are used in a very wide range of applications. A very demanding one is electrical current measurement for metering purposes. In addition to high precision and stability, a sufficiently low noise level is required. Cost reduction through sensor integration with low-voltage/low-power electronics is also desirable. The purpose of this work is to investigate the possible use of SOI (Silicon On Insulator) technology for this integration. We have fabricated SOI Hall devices exploring the useful range of silicon layer thickness and doping level. We show that noise is influenced by the pr
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Colinge, Jean-Pierre. "Silicon-on-lnsulator Technology: Past Achievements and Future Prospects." MRS Bulletin 23, no. 12 (1998): 16–19. http://dx.doi.org/10.1557/s0883769400029778.

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In silicon-on-insulator (SOI) technology, devices are dielectrically insulated from one another—usually by silicon dioxide. Unlike in conventional silicon devices, there is no direct contact between a transistor and the silicon substrate. The advantages of this type of isolation are many: reduced parasitic capacitances and reduced crosstalk between devices, improved current drive, subthreshold characteristics, and current gain. Silicon-on-insulator devices have been and are being used in several niche-market applications such as hightemperature and radiation-hard integrated circuits. However m
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Colinge, J. P. "Transconductance of Silicon-on-insulator (SOI) MOSFET's." IEEE Electron Device Letters 6, no. 11 (1985): 573–74. http://dx.doi.org/10.1109/edl.1985.26234.

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Schmid, J. H., P. Cheben, S. Janz, et al. "Subwavelength Grating Structures in Silicon-on-Insulator Waveguides." Advances in Optical Technologies 2008 (July 13, 2008): 1–8. http://dx.doi.org/10.1155/2008/685489.

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First implementations of subwavelength gratings (SWGs) in silicon-on-insulator (SOI) waveguides are discussed and demonstrated by experiment and simulations. The subwavelength effect is exploited for making antireflective and highly reflective waveguide facets as well as efficient fiber-chip coupling structures. We demonstrate experimentally that by etching triangular SWGs into SOI waveguide facets, the facet power reflectivity can be reduced from 31% to <2.5%. Similar structures using square gratings can also be used to achieve high facet reflectivity. Finite difference time-domain simulat
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Placidi, Marcel, Marcin Zielinski, Gabriel Abadal, Josep Montserrat, and Phillippe Godignon. "SiC Freestanding Micromechanical Structures on Silicon-On-Insulator Substrates." Materials Science Forum 615-617 (March 2009): 617–20. http://dx.doi.org/10.4028/www.scientific.net/msf.615-617.617.

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The fabrication of freestanding SiC microstructures on Silicon-On-Insulator (SOI) and semi-insulating Silicon substrates is reported. SiC layers were grown on SOI and semi-insulating Si by chemical vapour deposition (CVD) and to avoid the instability currently obtained in SOI structures, the growth process parameters have been optimized. Isotropic wet chemical etching of the Si sacrificial layer released the electrostatic SiC microstructures patterned by dry etching. Moreover a new concept for reducing the gap between resonators and electrodes by the uses of bistable mobile electrodes is intro
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NASTAUSHEV, Yu V., T. A. GAVRILOVA, M. M. KACHANOVA, et al. "FIELD EFFECT NANOTRANSISTOR ON ULTRATHIN SILICON-ON-INSULATOR." International Journal of Nanoscience 03, no. 01n02 (2004): 155–60. http://dx.doi.org/10.1142/s0219581x04001936.

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Peculiarities of the fabrication of field effect transistor (FET) at nanoscaled size on ultrathin silicon-on-insulator (SOI) was studied in details. Two types of FET transistor were successfully realized: in-plane-gate FET (IPGFET) with 40 nm minimum channel size and multichannel top-gate MOSFET on silicon-on-insulator. The deep submicron top-gate of Ti/Au embraces each of the conductive oxidized silicon wires placed with 400 nm pitch. The type and concentration of carries in a conductive channel of the ultrathin SOI was controlled by a bottom gate. The fabricated transistors demonstrated high
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Du, Li Dong, Zhan Zhao, Li Xiao, Meng Ying Zhang, and Zhen Fang. "A SOI-MEMS Piezoresistive Atmosphere Pressure Sensor." Key Engineering Materials 562-565 (July 2013): 394–97. http://dx.doi.org/10.4028/www.scientific.net/kem.562-565.394.

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In this paper, a SOI-MEMS (silicon on insulator- micro electro mechanical system) pizeoresistive atmosphere pressure sensor is presented using anodic bonding. Differently from the prevailing fabrication process of silicon piezoresistive pressure sensor: the device layer monocrystalline of SOI silicon wafer is used as the strain gauge with a simple deep etching process; and the SiO2 layer of SOI silicon wafer as the insulator between strain gauge and substrate. The whole fabrication processes of the designed sensor are very simple, and can reduce the cost of sensor. The Pressure-Voltage charact
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Hishinuma, Shinsuke, Naoki Kimori, Yuichiro Kumai, et al. "Fabrication of Condenser Microphones on Silicon on Insulator Wafer." Advanced Materials Research 306-307 (August 2011): 193–200. http://dx.doi.org/10.4028/www.scientific.net/amr.306-307.193.

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A silicon condenser microphone on an SOI (silicon on insulator) substrate using only one photo mask was fabricated. This microphone consists of a diaphragm with the thickness of 20 μm and the diameter of 2 mm, a SiO2 insulative spacer (4-μm-thick buried oxide), and a 450-μm-thick silicon back plate with the meshed structures having extremely small (60 μm) hexagonal shaped acoustic holes. The gap between the 20-μm-thick silicon diaphragm and the back plate is 4 μm, which is determined by the thickness of the buried oxide in the SOI wafer. This microphone was confirmed to function as a static pr
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ZHANG, BO, JING CHEN, XI WANG, et al. "EPITAXIAL LATERAL OVERGROWTH OF GaN ON SILICON-ON-INSULATOR." Modern Physics Letters B 23, no. 15 (2009): 1881–87. http://dx.doi.org/10.1142/s0217984909020047.

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From a single process, GaN layers were laterally overgrown on maskless stripe-patterned (111) silicon-on-insulator (SOI) substrates by metalorganic chemical vapor deposition. The influence of stress on the behavior of dislocations at the coalescence during growth was observed using transmission electron microscopy (TEM). Improvement of the crystalline quality of the GaN layer was demonstrated by TEM and micro-Raman spectroscopy. Furthermore, the benefits of SOI substrates for GaN growth are also discussed.
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Dissertations / Theses on the topic "Silicon-on-insulator (SOI)"

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Su, Lisa T. (Lisa Tzu-Feng). "Extreme-submicrometer silicon-on-insulator (SOI) MOSFETs." Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/11618.

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De, Luca Andrea. "SOI smart multi-sensor platform for harsh environment applications." Thesis, University of Cambridge, 2016. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.709510.

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Wainwright, Simon Peter. "A study of silicon on insulator (SOI) : materials, devices and circuits." Thesis, University of Liverpool, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.338453.

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Sherony, Melanie J. (Melanie Jane). "Design, process, and reliability considerations in silicon-on-insulator (SOI) MOSFETs." Thesis, Massachusetts Institute of Technology, 1998. http://hdl.handle.net/1721.1/10049.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.<br>Includes bibliographical references (p. 111-119<br>by Melanie J. Sherony.<br>Ph.D.
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Zissis, Nikolaos. "Design and study of an electron beam system for silicon recrystallization." Thesis, University of Cambridge, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.241194.

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Ngwa, Chrisantus Soh. "Electrical characterisation of SIMOX SiO←2 for silicon-on-insulator technology." Thesis, University of Liverpool, 1996. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.263706.

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Md, Zain Ahmad Rifqi. "One-dimensional photonic crystal / photonic wire cavities based on silicon-on-insulator (SOI)." Thesis, University of Glasgow, 2009. http://theses.gla.ac.uk/996/.

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It has been of major interest in recent research to produce faster optical processing for many telecommunications applications, as well as other applications of high performance optoelectronics. The combination of one-dimensional photonic crystal structures (PhC) and narrow photonic wire (PhW) waveguides in high refractive-index contrast materials such as silicon-on-insulator (SOI) is one of the main contenders for provision of various compact devices on a single chip. This development is due to the ability of silicon technology to support monolithic integration of optical interconnects and fo
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Heinle, Ulrich. "Vertical High-Voltage Transistors on Thick Silicon-on-Insulator." Doctoral thesis, Uppsala universitet, Fasta tillståndets elektronik, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-3179.

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More and more electronic products, like battery chargers and power supplies, as well as applications in telecommunications and automotive electronics are based on System-on-Chip solutions, where signal processing and power devices are integrated on the same chip. The integration of different functional units offers many advantages in terms of reliability, reduced power consumption, weight and space reduction, leading to products with better performance at a hopefully lower price. This thesis focuses on the integration of vertical high-voltage double-diffused MOS transistors (DMOSFETs) on Silic
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Zheng, Qi. "Performance Characterization of Silicon-On-Insulator (SOI) Corner Turning and Multimode Interference Devices." Thèse, Université d'Ottawa / University of Ottawa, 2012. http://hdl.handle.net/10393/23234.

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Silicon-on-insulator (SOI) technology has become increasingly attractive because of the strong light confinement, which significantly reduces the footprint of the photonic components, and the possibility of monolithically integrating advanced photonic waveguide circuits with complex electronic circuits, which may reduce the cost of photonic integrated circuits by mass production. This thesis is dedicated to numerical simulation and experimental performance measurement of passive SOI waveguide devices. The thesis consists of two main parts. In the first part, SOI curved waveguide and corner tur
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Haneef, Ibraheem. "SOI CMOS MEMS flow sensors." Thesis, University of Cambridge, 2009. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.611843.

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Books on the topic "Silicon-on-insulator (SOI)"

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Kuo, James B. CMOS VLSI Engineering: Silicon-on-Insulator (SOI). Springer US, 1998.

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Kuo, James B. CMOS VLSI engineering: Silicon-on-insulator (SOI). Kluwer Academic Publishers, 1998.

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IEEE International SOI Conference (2002 Williamsburg, Va.). 2002 IEEE International SOI Conference: Proceedings : October 7-10, 2002 : the Williamsburg Lodge, Williamsburg, Virginia. IEEE, 2002.

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IEEE International SOI Conference (1993 Palm Springs, Calif.). 1993 IEEE International SOI Conference: Proceedings : October 5-7, 1993, the Autry Resort, Palm Springs, California. Institute of Electrical and Electronics Engineers, 1993.

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IEEE International SOI Conference (2004 Charleston, S.C.). 2004 IEEE International SOI Conference: Proceedings : October 4-7, 2004 : Francis Marion Hotel, Charleston, South Carolina. IEEE, 2004.

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IEEE International SOI Conference (2001 Durango, Colo.). 2001 IEEE International SOI Conference: Proceedings : October 1-4, 2001, The Sheraton Tamarron Resort, Durango, Colorado. IEEE, 2001.

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IEEE, International SOI Conference (23rd 1997 Yosemite Calif ). 1997 IEEE International SOI Conference: Proceedings, October 6-9, 1997, Tenaya Lodge at Yosemite Fish Camp, California. Institute of Electrical and Electronics Engineers, 1997.

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IEEE, International SOI Conference (24th 1998 Stuart Florida). 1998 IEEE International SOI Conference: Proceedings : October 5-8, 1998, Indian River Plantation Marriott Resort, Stuart, Florida. IEEE, 1998.

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IEEE International SOI Conference (25th 1999 Rohnert Park, Calif.). 1999 IEEE International SOI Conference: Proceedings : October 4-7, 1999, Doubletree Hotel Sonoma County, Rohnert Park, California. IEEE, 1999.

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IEEE, International SOI Conference (2000 Wakefield Mass ). 2000 IEEE International SOI Conference: Proceedings : October 2-5, 2000, The Sheraton Colonial Hotel & Golf Club, Wakefield, Massachusetts. IEEE, 2000.

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Book chapters on the topic "Silicon-on-insulator (SOI)"

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Colinge, Jean-Pierre. "SOI Materials." In Silicon-on-Insulator Technology. Springer US, 1991. http://dx.doi.org/10.1007/978-1-4757-2121-8_2.

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Colinge, Jean-Pierre. "SOI Circuits." In Silicon-on-Insulator Technology. Springer US, 1991. http://dx.doi.org/10.1007/978-1-4757-2121-8_8.

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Higuchi, K., S. Saitoh, and H. Okabayashi. "Strip Heater Recrystallized SOI Structures." In Silicon-on-Insulator. Springer Netherlands, 1985. http://dx.doi.org/10.1007/978-94-009-5311-6_11.

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Shibata, K., T. Inoue, K. Kato, and M. Kashiwagi. "Electron Beam Recrystallized SOI Structures." In Silicon-on-Insulator. Springer Netherlands, 1985. http://dx.doi.org/10.1007/978-94-009-5311-6_3.

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Colinge, Jean-Pierre. "SOI Materials Characterization." In Silicon-on-Insulator Technology. Springer US, 1991. http://dx.doi.org/10.1007/978-1-4757-2121-8_3.

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Colinge, Jean-Pierre. "SOI CMOS Technology." In Silicon-on-Insulator Technology. Springer US, 1991. http://dx.doi.org/10.1007/978-1-4757-2121-8_4.

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Colinge, Jean-Pierre. "The SOI MOSFET." In Silicon-on-Insulator Technology. Springer US, 1991. http://dx.doi.org/10.1007/978-1-4757-2121-8_5.

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Colinge, Jean-Pierre. "Other SOI Devices." In Silicon-on-Insulator Technology. Springer US, 1991. http://dx.doi.org/10.1007/978-1-4757-2121-8_6.

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Aizaki, N. "Recrystallization of SOI Structures by Split Laser Beam." In Silicon-on-Insulator. Springer Netherlands, 1985. http://dx.doi.org/10.1007/978-94-009-5311-6_4.

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Nishimura, T., Y. Akasaka, and H. Nakata. "High Speed SOI-CMOS devices by Laser Recrystallization Technique." In Silicon-on-Insulator. Springer Netherlands, 1985. http://dx.doi.org/10.1007/978-94-009-5311-6_18.

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Conference papers on the topic "Silicon-on-insulator (SOI)"

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Du, Jinyi, Xingjian Zhang, Arya Chowdhury, et al. "Ultra Bright Silicon-on-insulator (SOI) Polarization Entangled Photon Source." In Frontiers in Optics. Optica Publishing Group, 2024. https://doi.org/10.1364/fio.2024.fw7c.3.

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Polarization-entangled photon sources on silicon chips are useful for scalable quantum computing. By employing novel low-loss fiber-chip couplers and optimizing the entire system, we developed an ultra-bright polarization-entangled photon source with &gt; 97% (H/V) and &gt; 94% (D/A) two photon interference visibility at 200,000 observed raw coincidence rate.
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Zheng, Guiqiang, Qingyin Zhong, Jie Ma, et al. "High Sensitivity Lateral Hall Device in Silicon on Insulator (SOI) Platform." In 2024 IEEE SENSORS. IEEE, 2024. https://doi.org/10.1109/sensors60989.2024.10784572.

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Chung, Ya-Cin, Min-Hsiung Shih, Shu-Wei Chang, and Wan-Shao Tsai. "Silicon Waveguide Output Coupler Based on Nanohole Array." In JSAP-Optica Joint Symposia. Optica Publishing Group, 2024. https://doi.org/10.1364/jsapo.2024.19a_p08_2.

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Silicon waveguide output couplers based on nanohole array structures is presented around 1550 nm [1]. Compared with conventional grating couplers on silicon-on-insulator (SOI) platforms, the presented coupler shows less fabrication complexity since only one-step etching is required in both waveguide and coupler regions.
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Zhang, Shiqi, Tongxin Yang, Xiuli Fu, and Lei Zhang. "Demonstration of silicon on-chip spectrometer using a racetrack resonator and a Mach-Zehnder lattice filter." In CLEO: Applications and Technology. Optica Publishing Group, 2024. http://dx.doi.org/10.1364/cleo_at.2024.jth2a.164.

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We demonstrate an integrated spectrometer on silicon-on-insulator (SOI) using a tunable racetrack resonator with an FSR of 5 nm and an 8-ch Mach-Zehnder lattice filter. The device has a resolution of 0.2 nm over C-band.
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Bogaerts, W., S. K. Selvaraja, P. Dumon, P. Absil, D. Van Thourhout, and R. Baets. "Photonic integrated circuits in silicon-on-insulator." In 2010 IEEE International SOI Conference. IEEE, 2010. http://dx.doi.org/10.1109/soi.2010.5641404.

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Grenouillet, L., Y. Le Tiec, Q. B. Vu, et al. "Ellipsometry measurements on ultrathin silicon on insulator films." In 2011 IEEE International SOI Conference. IEEE, 2011. http://dx.doi.org/10.1109/soi.2011.6081709.

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de la Houssaye, Paul R., Stephen D. Russell, and Randy L. Shimabukuro. "Nanophotonic applications for silicon-on-insulator (SOI)." In Integrated Optoelectronic Devices 2004, edited by Manijeh Razeghi and Gail J. Brown. SPIE, 2004. http://dx.doi.org/10.1117/12.516218.

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Johari, Houri, and Farrokh Ayazi. "Silicon-On-Insulator Bulk Acoustic Wave Disk Resonators." In 2006 IEEE International SOI Conference. IEEE, 2006. http://dx.doi.org/10.1109/soi.2006.284482.

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Png, Ching Eng, Graham T. Reed, Ragheid M. Atta, Graham J. Ensell, and Alan G. R. Evans. "Development of small silicon modulators in silicon-on-insulator (SOI)." In Integrated Optoelectronics Devices, edited by Randy A. Heyler, David J. Robbins, and Ghassan E. Jabbour. SPIE, 2003. http://dx.doi.org/10.1117/12.476666.

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Asheghi, Mehdi. "Nanoscale Heat Conduction in the SOI, Strained-Si and Tri-Gate Transistors." In ASME 2004 3rd Integrated Nanosystems Conference. ASMEDC, 2004. http://dx.doi.org/10.1115/nano2004-46050.

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There have been many attempts in the recent years to improve the device performance by enhancing carrier mobility by using the strained-induced changes in silicon electronic bands [1–4] or reducing the junction capacitance in silicon-on-insulator (SOI) technology. Strained silicon on insulator (SSOI) is another promising technology, which is expected to show even higher performance, in terms of speed and power consumption, comparing to the regular strained-Si transistors. In this technology, the strained silicon is incorporated in the silicon on insulator (SOI) technology such that the straine
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Reports on the topic "Silicon-on-insulator (SOI)"

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Lagally, Max. Quantum Dots on Silicon-on-Insulator (QD/SOI): Nanoscale Strain and Band Structure Engineering. Office of Scientific and Technical Information (OSTI), 2023. http://dx.doi.org/10.2172/2004654.

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Hudson, Tracy D., and Michael S. Kranz. Operation of Silicon-on-Insulator (SOI) Micro-ElectroMechanical Systems (MEMS) Gyroscopic Sensor as a Two-Axis Accelerometer. Defense Technical Information Center, 2012. http://dx.doi.org/10.21236/ada559286.

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Ptasinski, Joanna. Electrode Placement for Active Tuning of Silicon-on-Insulator (SOI) Ring Resonator Structure Clad in Nematic Liquid Crystals. Defense Technical Information Center, 2014. http://dx.doi.org/10.21236/ada611752.

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Xu, Yang. A 94GHz Temperature Compensated Low Noise Amplifier in 45nm Silicon-on-Insulator Complementary Metal-Oxide Semiconductor (SOI CMOS). Defense Technical Information Center, 2014. http://dx.doi.org/10.21236/ada596171.

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