To see the other types of publications on this topic, follow the link: SOC APPLICATION.
Dissertations / Theses on the topic 'SOC APPLICATION'
Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles
Consult the top 50 dissertations / theses for your research on the topic 'SOC APPLICATION.'
Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.
You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.
Browse dissertations / theses on a wide variety of disciplines and organise your bibliography correctly.
1
Portero, Trujillo Antoni. "Design Space Exploration of heterogeneous SoC Platforms for a Data-Dominant Application." Doctoral thesis, Universitat Autònoma de Barcelona, 2009. http://hdl.handle.net/10803/5365.
Full textAbstract:
El objetivo principal de esta tesis es obtener un conjunto de implementaciones de un sistema especificado en alto nivel y bajarlo a diferentes plataformas arquitectónicas. Esto ha permitido realizar una comparación justa que incluye la cadena de diseño, metodología hacia las diversas plataformas de silicio. Esta comparación usa cuatro variables para su evaluación (el tiempo de ejecución, el área del chip, el consumo de energía y el tiempo de diseño) y produce un mapa de puntos de las diferentes implementaciones óptimas de acuerdo con un conjunto de requerimientos de operación. Se ha construido un completo IP un compresor MPEG-4 Main Profile. Este estándar de video codificación es un buen ejemplo de referencia, bastante popular en la literatura científica y es también un ejemplo adecuado de aplicación basada en flujo de datos. Por tanto, los resultados extraídos de esta tesis pueden ser extendidos a otras aplicaciones basadas en IPs con tratamiento de flujo de datos. He considerado necesario la computación de imágenes con restricciones de tiempo real. Y por tanto, se deseaba disponer del diseño más flexible posible para poder mapear las mismas especificaciones en las diferentes plataformas. <br/>Para este propósito, se ha elegido SystemC/C++ como lenguaje de descripción del sistema e idear los diferentes flujos de implementación para las diferentes arquitecturas y plataformas de silicio. Este poderoso marco de trabajo permite comparar implementaciones de una forma objetiva y razonada. Ya que nuestros resultados vienen de un αnico modelo y los diseños fueron mapeados en la misma tecnología de silicio (90nm CMOS). <br/>El resultado de este trabajo de investigación es un juego de criterios y un mapa de las soluciones disponibles sobre el espacio de funcionamiento más bien que una aserción que dice que una solución αnica es mejor que las otras. Mi intención ha sido desarrollar técnicas y formular los métodos que pueden permitir aumentar la productividad en el diseño. <br/>Este desarrollo puede ser extendido al nuevo paradigma de intercomunicación: Aquellos que usan técnicas DVFS y basadas en NoC para exploraciones e implementaciones MPSoC. <br/>Consideramos la contribución mas significativa es el desarrollo del modelo con el cual se han realizado los diversos experimentos: El compresor MPEG que se ha realizado en SystemC/C++. Se ha realizado de la forma que implementaciones mαltiples son posibles: que van desde una parte grande en HW hasta la que se carga en un VLIW. En el caso de la FPGA y el ASIC, se han realizado dos implementaciones. Hemos obtenido un conjunto de resultados para siete diferentes implementaciones con cuatro diferentes objetivos HW (FPGA, ASIC, DSP y ASIP) con diferentes arquitecturas internas, seleccionadas para obtener puntos óptimos. Esto nos da que un incremento en eficiencia del 56 % para velocidad versus 26 % en energía en la solución FSME (20% para velocidad y 57 % para energía en la solución FAST). En el caso de los ISPs, las mejoras en el código se han realizado de forma que se obtienen implementaciones mejores que las que se conseguirían con una implementación directa del código no solo mejoras en el código sino mejoras en las microarquitecturas de silicio que forman el VLIW en el caso del ASIP. Otra contribución ha sido la realización de una NoC a nivel funcional en SystemC.<br>The main goal of this thesis is to obtain a set of results for the implementation of a given system level application down to different architectural platforms. This allowed carrying out a fair comparison that includes to build the whole system and to complete the design chain to the diverse silicon targets. This comparison uses four variables for its evaluation (execution time, chip area, energy consumption and design time) and produces a map of different optimal implementation points according to a given set or operating requirements. I built a complete MPEG-4 MP. This standard is a well known reference example, pretty popular in the scientific literature and this compressor is also a fine example of data-flow application. Therefore, results extracted from this thesis can be extended to other data-flow applications. I considered necessary to compute image compression with real-time constraints. Hence, I would like to dispose of the most flexible design possible in order to map the same specification into the different platforms. <br/>For that purpose, I chose SystemC/C++ as description system level language and setup the different implementation flows for the different architectural and silicon platforms. This powerful framework allows comparing implementations in a reasonably objective way. Since our results come from a unique reference model and all designs were finally mapped in the same silicon technology (90nm CMOS). <br/>The result of this research work is a set of criteria and a map of the available solutions on the performance space rather than an assertion saying that a unique solution is better than others. My intention has been to develop techniques and formulate methods that increased design productivity. This development can be further applied to the new parading of implementations: those that use DVFS techniques and NoC-based MPSoc implementation explorations. <br/>We consider the most important contribution is the development of the model able to achieve the different experiments: the MPEG compressor that has been realized in SystemC/C ++. It is designed in a way that multiple implementations are possible, ranging from a large part in HW up to loaded in an accelerator as a VLIW. In case of the FPGA and ASIC, two implementations have been carried out. We obtained a set of values for seven different implementations targeting four different HW platforms (FPGA, ASIC, DSP and ASIP) with diverse internal architectures, selected to get optimal points. In the case of ASIC, we managed to end up with the layouts of the two solutions. This led to an increase in efficiency of 56 % for speed versus 26 % for energy (in FSME solution 20% for speed and 57% for energy in FAST solution). In case of the ISPs, code improvements have been accomplished to come up to more ideal solutions with regard to those who would be obtained by a direct implementation. In case of the ASIP the improvements have not only been realized in the code but also in the silicon micro architecture that form the VLIW. Other contribution is the accomplishment of a functional NoC in SystemC.
2
Rouxel, Samuel. "Modélisation et Caractérisation d'une Plate-Forme SOC Hétérogène : Application à la Radio Logicielle." Phd thesis, Université de Bretagne Sud, 2006. http://tel.archives-ouvertes.fr/tel-00124433.
Full textAbstract:
Les travaux de cette thèse, menés dans le cadre du projet RNRT A3S, intègrent la notion de composants au sein d'une méthodologie de conception de plates-formes SoC (System on Chip), basée sur le langage de modélisation UML (Unified Modeling Language). Cette méthodologie propose un environnement de conception haut-niveau, basé sur le profil UML A3S, développé pour apporter la sémantique du domaine des systèmes temps réel embarqués et en particulier celle relative aux applications Radio Logicielle. Elle repose sur une approche MDA ou l'architecture est dirigée par les modèles où chaque modèle correspond à un niveau d'abstraction, à un niveau de raffinement particulier.<br /><br />Une chaîne UMTS a permis la validation de l'outil réalisé, en confrontant les résultats estimés de l'outil, à ceux mesurés sur une plate-forme temps réel hétérogène (multi-DSP, multi-FPGA). Une partie du travail s'est concentré sur l'identification des composants utiles à la conception des systèmes SoC, et de leurs caractéristiques, en adéquation avec le niveau d'abstraction considéré. Une autre partie des travaux a porté sur la définition des modèles UML, et donc du profil, qui définissent la sémantique des différents composants identifiés en fonction de la configuration (PIM, PSM), ainsi que leurs relations. Une réflexion a été nécessaire afin d'élaborer les diverses règles de vérification et modèles d'exécution qui permettent d'informer le concepteur de ses erreurs et de la faisabilité du système modélisé. Un modèle de système d'exploitation a également été inclus, enrichissant la liste des éléments (composants) déjà définis et démontrant l'extensibilité du profil.
3
Rouxel, Samuel. "Modélisation et caractérisation de plates-formes SoC hétérogènes : application à la radio logicielle." Lorient, 2006. http://www.theses.fr/2006LORIS077.
Full textAbstract:
Les travaux de cette thèse, menés dans le cadre du projet RNRT A3S, intègrent la notion de composants au sein d'une méthodologie de conception de plates-formes SoC (System on Chip), basée sur le langage de modélisation UML (Unified Modeling Language). Cette méthodologie propose un environnement de conception haut-niveau, basé sur le profil UML A3S, développé pour apporter la sémantique du domaine des systèmes temps réel embarqués et en particulier celle relative aux applications Radio Logicielle. Elle repose sur une approche MDA ou l'architecture est dirigée par les modèles où chaque modèle correspond à un niveau d'abstraction, à un niveau de raffinement particulier. Une chaîne UMTS a permis la validation de l'outil réalisé, en confrontant les résultats estimés de l'outil, à ceux mesurés sur une plate-forme temps réel hétérogène (multi-DSP, multi-FPGA). Une partie du travail s'est concentré sur l'identification des composants utiles à la conception des systèmes SoC, et de leurs caractéristiques, en adéquation avec le niveau d'abstraction considéré. Une autre partie des travaux a porté sur la définition des modèles UML, et donc du profil, qui définissent la sémantique des différents composants identifiés en fonction de la configuration (PIM, PSM), ainsi que leurs relations. Une réflexion a été nécessaire afin d'élaborer les diverses règles de vérification et modèles d'exécution qui permettent d'informer le concepteur de ses erreurs et de la faisabilité du système modélisé. Un modèle de système d'exploitation a également été inclus, enrichissant la liste des éléments (composants) déjà définis et démontrant l'extensibilité (scalabilité) du profil<br>The work of this PhD has been carried out within the framework of the A3S project and relies on component aspects integrated within a SoC platform design methodology, which is based on the UML language. This methodology proposes a high-level design framework based on the A3S UML profile developed to provide real-time embedded system semantic especially in SDR domain. An MDA approach has been considered to deal with different abstraction levels when specifying systems. First part of the work focused on identifying the component required designing a SoC system, and their characteristics depending on the component abstraction levels. Several types of component (software and hardware) whose characteristics depend on their modelling (PIM or PSM models) have been considered. Second part of the work focused on the definition of UML metamodels, which are grouped to define the A3S UML profile that establish the semantic of identified components depending on their modelling and their relations. We have defined extensive verification rules and applied a model of computation to inform designers about errors that have been done and to ensure the feasibility of their systems. Finally an operating system model has been included to demonstrate the scalability and the extension mechanisms of the UML language and profile which improve the list of components that have been already integrated within our framework. An UMTS application has validated our approach by comparing the estimated results computed by the tool with measured results obtained on a heterogeneous real-time platform (with several DSP and FPGA)
4
Zedek, Sabeha Fettouma. "Intégration d'architectures mixtes reconfigurables : Application à la détection de défauts dans des structures hétérogènes." Thesis, Toulouse, INSA, 2015. http://www.theses.fr/2015ISAT0005/document.
Full textAbstract:
Les activités scientifiques que nous présentons dans ce manuscrit de thèse s’inscrivent dans la thématique de l’intelligence ambiante, axe stratégique ADREAM au sein du LAAS-CNRS. Depuis plusieurs années notre équipe de recherche N2IS fédère l’approche technologique de la SHM avec pour objectif la surveillance de santé structurelle. En effet, la maturité des matériaux innovants tels que les composites suscitent un intérêt certain auprès des constructeurs aéronautiques, ou bien encore l’utilisation des matériaux de type béton pour des ouvrages d’art, sont autant de structures hétérogènes qui nécessitent une surveillance périodique et/ou continue. Ceci, afin de détecter des cracks, des fissures, des corrosions surfaciques ou bien encore des délaminages. Pour ce faire, les solutions existantes s’appuient usuellement sur des technologies de contrôle non destructif (CND) qui intègrent le plus souvent des réseaux de capteurs à faible consommation interfacés avec des systèmes d’analyses des signaux. Ces approches CND présentent des limitations fonctionnelles majeures : elles ne sont pas versatiles et ne permettent pas d’assurer une continuité de service dans un mode « dégradé » lors d’un fonctionnement sur batterie avec un niveau d’énergie minimal. Notre travail de recherche se situe dans une perspective liée à la quantification d’un niveau de robustesse de structure hétérogène. Il a pour ambition le développement et l’intégration de systèmes matériels mixtes (analogiques/numériques) reconfigurables. Au terme d’une investigation sur les principales solutions technologiques matérielles reprogrammables et compte tenu de la problématique liée aux développements d’algorithmes d’analyse embarqués et de la minimisation de la consommation énergétique des capteurs, le choix s’est porté sur des technologies complémentaires FPAA et FPGA. Initialement nos études de recherche se sont focalisées sur l'étude de fonction analogique matérielle reconfigurable analogique. L'objectif est de démontrer une faisabilité conceptuelle en intégrant un système de conditionnement complexe (implémentation d'une technique de détection synchrone), ceci en considérant le compromis entre la prise de décision d’une reconfiguration à la volée vis-à-vis d’une gestion rationnelle de l'énergie du système. Dès lors, se pose la question de comment intégrer et stocker des données nécessaires au développement d’un traitement numérique performant ? Une solution repose sur une approche hybride avec une puce de type Zynq produite par Xilinx et embarquée sur une Zedboard. Cette solution, plus performante qu’une approche PSoC a permis le développement et l’implémentation de techniques de traitement de signal grâce à des outils d'optimisation et de génération de code de haut niveau. Au terme de ce travail de recherche, les résultats obtenus démontrent la validité des concepts mis en œuvre et permettent d'engager dès à présent le développement d’architectures intelligentes de nouvelle génération<br>Scientific activities described in this PhD thesis are part of the theme of smart environment, strategy axes of ADREAM with the LAAS-CNRS. Since several years, our research team (N2IS) had a field of interest in SHM (Structural Health Monitoring) with the objective of doing a smart diagnostic on different heterogeneous structures. Indeed, the maturity of innovative materials such as composites triggering interest among aircraft manufacturers, or even the use of materials like concrete structures of civil engineering, all those heterogeneous structures that require periodic monitoring and / or continuous one. This is to detect cracks, disbond, surface corrosion or even delamination. To do this, existing solutions usually rely on technologies of nondestructive testing (NDT) that incorporate mostly sensor networks low-power systems interfaced with analysis of signals. These approaches have significant functional limitations: they are not versatile and do not allow for continuity of service in a "degraded" when operating on battery power with a minimum level of energy mode. Our research is a view related to the quantization level of robustness of a heterogeneous structure. Its aim is the development and integration of hardware reconfigurable mixed (A / D ) systems. After an investigation of the main technological solutions reprogrammable hardware and given the problems associated with developments in analytical embedded and minimizing the energy consumption of sensor algorithms. The choice was based on technologies like FPAA and FPGA. Initially our research studies have focused on the study of reconfigurable analog hardware analog. The objective was to show a conceptual feasibility of integrating a complex conditioning system (implementation of a synchronous detection technique), considering the tradeoff between a decision on the fly reconfiguration and a rational energy management system. Therefore, the question of how to integrate and store data necessary for the development of an efficient digital processing. A solution based on a hybrid approach with a chip produced by Xilinx called Zynq and embedded on a Zedboard. This solution is more efficient than a PSoC approach and allowed the development and implementation of signal processing techniques with tools for optimization and provided a solution of self-generation code trough a graphic interface. Following this research, the results obtained demonstrate the validity of the concepts implemented and allow us to imagine the next smart generation architectures
5
Lacouture, Mayleen. "A chemical programming language for orchestrating services : Application to interoperability problems." Thesis, Nantes, Ecole des Mines, 2014. http://www.theses.fr/2014EMNA0011/document.
Full textAbstract:
Avec l’émergence du "Cloud-computing" et des applications mobiles, il est possible de trouver un service web répondant à presque tout besoin. De plus, les développeurs peuvent créer des applications complexes en combinant différents services indépendants, dont l’agencement et l’exécution peuvent être automatisés avec l’aide de langages d’orchestration. Cependant, la diversité des technologies et le manque de standardisation peuvent entraver la collaboration entre services. Un exemple de cette limitation est le cas de la gestion des photos avec des services tels que Flickr et Picasa, qui diffèrent non seulement sur la façon dont les photos sont organisées mais aussi sur les services qu’ils fournissent. L’hétérogénéité de ces deux services conduit à des problèmes d’interopérabilité, à savoir dans l’adaptation, l’intégration et la coordination. Nous proposons un framework pour aider à la résolution de ces problèmes, sous la forme d’une architecture qui intègre différents langages d’orchestration avec des fournisseurs de services hétérogènes autour d’un langage pivot. Comme langage pivot, nous proposons le langage d’orchestration Criojo qui implémente et étend le Heta-calcul, un calcul original associé à une machine chimique abstraite dédié à l’orchestration de services. En adoptant cette approche l’interopérabilité entre les services et les langages d’orchestration sera améliorée, facilitant ainsi le développement des services composites. Le haut niveau d’abstraction de Criojo pourrait permettre aux développeurs d’écrire des orchestrations très concises puisque les échanges de messages sont représentés d’une manière naturelle et intuitive<br>With the emergence of cloud computing and mobile applications, it is possible to find a web service for almost everything. Moreover, developers can create complex applications by combining several independent services, whose arrangement and execution can be automated with the aid of orchestration languages. Nevertheless, the diversity of technologies and the lack of standardization can hinder the collaboration between services. An example of this limitation is the case of photo management with services such as Flickr and Picasa,which not only differ on the way photos are organized, but also in the services they provide. The heterogeneity of the two services leads to interoperability problems, namely adaptation, integration and coordination problems. We propose a framework for helping at the resolution of these issues, in the form of an architecture that integrates different orchestration languages with heterogeneous service providers around a pivot language. As a pivot language we propose an orchestration language based on the chemical programming paradigm. Concretely, this dissertation presents the language Criojo that implements and extends the Heta-calculus, an original calculus associated to a chemical abstract machine dedicated to service-oriented computing. The consequence of adopting this approach would bean improvement in the interoperability of services and orchestration languages, thus easing the development of composite services. The high level of abstraction of Criojo could allow developers to write very concise orchestrations since message exchanges are represented in a natural and intuitive way
6
Nazer, Rouba Al. "Système de mesure d'impédance électrique embarqué, application aux batteries Li-ion." Thesis, Grenoble, 2014. http://www.theses.fr/2014GRENT007/document.
Full textAbstract:
La mesure d'impédance électrique en embarqué sur véhicule est un sujet clé pour améliorer les fonctions de diagnostic d'un pack batterie. On cherche en particulier à fournir ainsi des mesures supplémentaires à celles du courant pack et des tensions cellules, afin d'enrichir les indicateurs de vieillissement dans un premier temps, et d'état de santé et de charge dans un second temps. Une méthode classique de laboratoire pour obtenir des mesures d'impédance d'une batterie est la spectroscopie d'impédance électrochimique (ou EIS). Elle consiste à envoyer un signal sinusoïdal en courant (ou tension) de fréquence variable balayant une gamme de fréquences d'intérêt et mesurer ensuite la réponse en tension (ou courant) pour chaque fréquence. Une technique d'identification active basée sur l'utilisation des signaux large bande à motifs carrés est proposée. En particulier, des simulations ont permis de comparer les performances d'identification de différents signaux d'excitation fréquemment utilisés dans le domaine de l'identification et de vérifier les conditions correspondant à un comportement linéaire et invariant dans le temps de l'élément électrochimique. L'évaluation de la qualité d'estimation est effectuée en utilisant une grandeur spécifique : la cohérence. Cette grandeur statistique permet de déterminer un intervalle de confiance sur le module et la phase de l'impédance estimée. Elle permet de sélectionner la gamme de fréquence où la batterie respecte les hypothèses imposées par la méthode d'identification large bande. Afin de valider les résultats, une électronique de test a été conçue. Les résultats expérimentaux permettent de mettre en valeur l'intérêt de cette approche par motifs carrés. Un circuit de référence est utilisé afin d'évaluer les performances en métrologie des méthodes. L'étude expérimentale est ensuite poursuivie sur une batterie Li-ion soumise à un courant de polarisation et à différents états de charge. Des essais comparatifs avec l'EIS sont réalisés. Le cahier de charge établi à l'aide d'un simulateur de batterie Li-ion a permis d'évaluer les performances de la technique large bande proposée et de structurer son utilité pour l'estimation des états de vieillissement et de charge<br>Embedded electrical impedance measurement is a key issue to enhance battery monitoring and diagnostic in a vehicle. It provides additional measures to those of the pack's current and cell's voltage to enrich the aging's indicators in a first time, and the battery states in a second time. A classical method for battery impedance measurements is the electrochemical impedance spectroscopy (EIS). At each frequency, a sinusoidal signal current (or voltage) of a variable frequency sweeping a range of frequencies of interest is at the input of the battery and the output is the measured voltage response (or current). An active identification technique based on the use of wideband signals composed of square patterns is proposed. Particularly, simulations were used to compare the performance of different excitation signals commonly used for system identification in several domains and to verify the linear and time invariant behavior for the electrochemical element. The evaluation of the estimation performance is performed using a specific quantity: the spectral coherence. This statistical value is used to give a confidence interval for the module and the phase of the estimated impedance. It allows the selection of the frequency range where the battery respects the assumptions imposed by the non-parametric identification method. To experimentally validate the previous results, an electronic test bench was designed. Experimental results are used to evaluate the wideband frequency impedance identification. A reference circuit is first used to evaluate the performance of the used methodology. Experimentations are then done on a Li–ion battery. Comparative tests with EIS are realized. The specifications are established using a simulator of Li-ion battery. They are used to evaluate the performance of the proposed wide band identification method and fix its usefulness for the battery states estimation: the state of charge and the state of health
7
Lelong, Lionel. "Architecture SoC-FPGA pour la mesure temps réel par traitement d'image. Conception d'un système embarqué : imageur CMOS et Circuit Logique Programmable." Phd thesis, Université Jean Monnet - Saint-Etienne, 2004. http://tel.archives-ouvertes.fr/tel-00374865.
Full textAbstract:
La méthode de mesures par PIV (Particle Image Velocimetry) est une technique pour mesurer un champ de vitesse de manière non intrusive et multipoints. Cette technique utilise l'algorithme de corrélation entre deux images consécutives pour déterminer les vecteurs vitesse. La quantité de calcul requis par cette méthode limite son usage à des traitements en temps différé sur ordinateur. Les performances des ordinateurs demeurent insuffisantes pour ce type d'applications sous contrainte temps réel sur des cadences de données élevés. Au vu de ces besoins, la définition et la conception d'architectures dédiées semblent être une solution adéquate pour atteindre le temps réel. L'évolution des niveaux d'intégration permet le développement des structures dédiées au traitement d'images en temps réel à bas prix. Dans ce travail de thèse, nous nous sommes intéressés à la conception d'une architecture de type SoC (System on-Chip) dédiée aux mesures de paramètres physiques par traitement d'images en temps réel. C'est une architecture hiérarchique et modulaire dédiée à des applications de type flot de données d'entrée dominant. Cette description hiérarchique permet la modification du nombre et/ou de la nature de ces éléments sans modifier profondément l'architecture. Pour le calcul d'une mesure, il faut 267 s avec un FPGA à 50 MHz. Pour estimer les performances du système, un imageur CMOS a été connecté directement au FPGA. Les avantages de ce prototype sont de réduire au minimum le mouvement de grands ensembles de données ainsi que la latence en commençant à traiter des données avant leur complète acquisition.
8
Akgul, Bilge Ebru Saglam. "The System-on-a-Chip Lock Cache." Diss., Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/5253.
Full textAbstract:
In this dissertation, we implement efficient lock-based synchronization by
a novel, high performance, simple and scalable hardware technique and
associated software for a target shared-memory multiprocessor
System-on-a-Chip (SoC). The custom hardware part of our solution is
provided in the form of an intellectual property (IP) hardware unit which
we call the SoC Lock Cache (SoCLC). SoCLC provides effective lock hand-off
by reducing on-chip memory traffic and improving performance in terms of
lock latency, lock delay and bandwidth consumption. The proposed solution
is independent from the memory hierarchy, cache protocol and the processor
architectures used in the SoC, which enables easily applicable
implementations of the SoCLC (e.g., as a reconfigurable or partially/fully
custom logic), and which distinguishes SoCLC from previous approaches.
Furthermore, the SoCLC mechanism has been extended to support priority
inheritance with an immediate priority ceiling protocol (IPCP) implemented
in hardware, which enhances the hard real-time performance of the system.
Our experimental results in a four-processor SoC indicate that SoCLC can
achieve up to 37% overall speedup over spin-lock and up to 48% overall
speedup over MCS for a microbenchmark with false sharing. The priority
inheritance implemented as part of the SoCLC hardware, on the other hand,
achieves 1.43X speedup in overall execution time of a robot application
when compared to the priority inheritance implementation under the
Atalanta real-time operating system. Furthermore, it has been shown that
with the IPCP mechanism integrated into the SoCLC, all of the tasks of the
robot application could meet their deadlines (e.g., a high priority task
with 250us worst case response time could complete its execution in 93us
with SoCLC, however the same task missed its deadline by completing its
execution in 283us without SoCLC). Therefore, with IPCP support, our
solution can provide better real-time guarantees for real-time systems.
To automate SoCLC design, we have also developed an SoCLC-generator tool,
PARLAK, that generates user specified configurations of a custom SoCLC. We
used PARLAK to generate SoCLCs from a version for two processors with 32
lock variables occupying 2,520 gates up to a version for fourteen
processors with 256 lock variables occupying 78,240 gates.
9
Buitenga, John. "An embedded microcontroller core for SOC applications." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2000. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape4/PQDD_0032/MQ65868.pdf.
Full text
10
Buitenga, John. "An embedded microcontroller core for SOC applications." Ottawa : National Library of Canada = Bibliothèque nationale du Canada, 2002. http://www.nlc-bnc.ca/obj/s4/f2/dsk1/tape4/PQDD%5F0032/MQ65868.pdf.
Full text
11
Gopalakrishnan, Harish. "Energy Reduction for Asynchronous Circuits in SoC Applications." Wright State University / OhioLINK, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=wright1324264498.
Full text
12
Lee, Kyung-Min. "Nanoscale Materials Applications: Thermoelectrical, Biological, and Optical Applications with Nanomanipulation Technology." Thesis, University of North Texas, 2011. https://digital.library.unt.edu/ark:/67531/metadc84238/.
Full textAbstract:
In a sub-wavelength scale, even approaching to the atomic scale, nanoscale physics shows various novel phenomena. Since it has been named, nanoscience and nanotechnology has been employed to explore and exploit this small scale world. For example, with various functionalized features, nanowire (NW) has been making its leading position in the researches of physics, chemistry, biology, and engineering as a miniaturized building block. Its individual characteristic shows superior and unique features compared with its bulk counterpart. As one part of these research efforts and progresses, and with a part of the fulfillment of degree study, novel methodologies and device structures in nanoscale were devised and developed to show the abilities of high performing thermoelectrical, biological, and optical applications. A single β-SiC NW was characterized for its thermoelectric properties (thermal conductivity, Seebeck coefficient, and figure of merit) to compare with its bulk counterpart. The combined structure of Ag NW and ND was made to exhibit its ability of clear imaging of a fluorescent cell. And a plasmonic nanosture of silver (Ag) nanodot array and a β-SiC NW was fabricated to show a high efficient light harvesting device that allows us to make a better efficient solar cell. Novel nanomanipulation techniques were developed and employed in order to fabricate all of these measurement platforms. Additionally, one of these methodological approaches was used to successfully isolate a few layer graphene.
13
Javid, Gelareh. "Contribution à l’estimation de charge et à la gestion optimisée d’une batterie Lithium-ion : application au véhicule électrique." Thesis, Mulhouse, 2021. https://www.learning-center.uha.fr/.
Full textAbstract:
L'estimation de l'état de charge (SOC) est un point crucial pour la sécurité des performances et la durée de vie des batteries lithium-ion (Li-ion) utilisées pour alimenter les VE.Dans cette thèse, la précision de l'estimation de l'état de charge est étudiée à l'aide d'algorithmes de réseaux neuronaux récurrents profonds (DRNN). Pour ce faire, pour une cellule d’une batterie Li-ion, trois nouvelles méthodes sont proposées : une mémoire bidirectionnelle à long et court terme (BiLSTM), une mémoire robuste à long et court terme (RoLSTM) et une technique d'unités récurrentes à grille (GRU).En utilisant ces techniques, on ne dépend pas de modèles précis de la batterie et on peut éviter les méthodes mathématiques complexes, en particulier dans un bloc de batterie. En outre, ces modèles sont capables d'estimer précisément le SOC à des températures variables. En outre, contrairement au réseau de neurones récursif traditionnel dont le contenu est réécrit à chaque fois, ces réseaux peuvent décider de préserver la mémoire actuelle grâce aux passerelles proposées. Dans ce cas, il peut facilement transférer l'information sur de longs chemins pour recevoir et maintenir des dépendances à long terme.La comparaison des résultats indique que le réseau BiLSTM a de meilleures performances que les deux autres méthodes. De plus, le modèle BiLSTM peut travailler avec des séquences plus longues provenant de deux directions, le passé et le futur, sans problème de disparition du gradient. Cette caractéristique permet de sélectionner une longueur de séquence équivalente à une période de décharge dans un cycle de conduite, et d'obtenir une plus grande précision dans l'estimation. En outre, ce modèle s'est bien comporté face à une valeur initiale incorrecte du SOC.Enfin, une nouvelle méthode BiLSTM a été introduite pour estimer le SOC d'un pack de batteries dans un EV. Le logiciel IPG Carmaker a été utilisé pour collecter les données et tester le modèle en simulation. Les résultats ont montré que l'algorithme proposé peut fournir une bonne estimation du SOC sans utilisation de filtre dans le système de gestion de la batterie (BMS)<br>The State Of Charge (SOC) estimation is a significant issue for safe performance and the lifespan of Lithium-ion (Li-ion) batteries, which is used to power the Electric Vehicles (EVs). In this thesis, the accuracy of SOC estimation is investigated using Deep Recurrent Neural Network (DRNN) algorithms. To do this, for a one cell Li-ion battery, three new SOC estimator based on different DRNN algorithms are proposed: a Bidirectional LSTM (BiLSTM) method, Robust Long-Short Term Memory (RoLSTM) algorithm, and a Gated Recurrent Units (GRUs) technique. Using these, one is not dependent on precise battery models and can avoid complicated mathematical methods especially in a battery pack. In addition, these models are able to precisely estimate the SOC at varying temperature. Also, unlike the traditional recursive neural network where content is re-written at each time, these networks can decide on preserving the current memory through the proposed gateways. In such case, it can easily transfer the information over long paths to receive and maintain long-term dependencies. Comparing the results indicates the BiLSTM network has a better performance than the other two. Moreover, the BiLSTM model can work with longer sequences from two direction, the past and the future, without gradient vanishing problem. This feature helps to select a sequence length as much as a discharge period in one drive cycle, and to have more accuracy in the estimation. Also, this model well behaved against the incorrect initial value of SOC. Finally, a new BiLSTM method introduced to estimate the SOC of a pack of batteries in an Ev. IPG Carmaker software was used to collect data and test the model in the simulation. The results showed that the suggested algorithm can provide a good SOC estimation without using any filter in the Battery Management System (BMS)
14
Vesterlund, Elias. "Reporting application at SDC : A low bandwidth mobile application." Thesis, Mittuniversitetet, Avdelningen för informations- och kommunikationssystem, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:miun:diva-23402.
Full textAbstract:
The objective of the report is to investigate which kind of mobile appli-cation, native, hybrid or web, that is the best regarding cross-platform support compared to development cost. As there are little information regarding pure web applications for mobile devices a prototype will be constructed to give light in this technology. The prototype should an-swer the questions if it can save a year's usage in the cell phones memory, if it is possible to have support for 100 percent of Sweden area and generally if this approach would suffice. There are also some physi-cal restrictions on the web application. A login must be done in less than 5 second, fetch TOs( timber orders) within 10 seconds, report a row within 5 seconds. This in a 2G environment, in Telias network, which is mostly likely to be used in the forest. To easily test the application the CPN-tools(colored petri nets) are used to graphically model the applica-tion and simulations are thereafter done to get a scenes how the applica-tion would perform during many years of usage. To construct have been constructed with the aid of open web technologies as HTML5,CSS4, JavaScript, JQuery and JQuery mobile. The prototype used asynchronies communication to mask loss of coverage and long loading times. It also utilized HTML5 localStorage to save TOs and employer information so that minimize the need for fetching information many times. The proto-type application cannot be used in 100 percent of Sweden's area because the cellular coverage is not present in big areas in the north of Sweden. Therefore information is stored locally but after the pre fetched work orders are completed new work orders must be fetched where cellular coverage is present. The application still have a big usage area and as most wood products comes from the middle of Sweden this cannot be seen as a big problem. To save a year's usage of data on the other hand is not a problem at all. About 10 percent of the available 5 MB of storage in the HTML5 localStorage would be needed. It did also with ease handle the time limitations. As a conclusion the need for a web applica-tion, for SDC, is only present if both IVR and web reporting through a computer is if these services are liquidated in the long run. There are a bit more work with creating a hybrid native/web application using third-party applications but it in turns would give a better coverage area as that kind of application can pre download all TOs and employers ignoring any limitations in storage. This is not possible to do as a pure web application can't be run in the background on the phone.
15
Lemke, Laurent. "Modèles partagés et infrastructures ouverte pour l'internet des objets de la ville Intelligente." Thesis, Université Grenoble Alpes (ComUE), 2017. http://www.theses.fr/2017GREAM022/document.
Full textAbstract:
Les villes contemporaines font face à de nombreux enjeux : énergétiques,écologiques, démographiques ou encore économiques. Pour y répondre, des moyens technologiques sont mis en place dans les villes via l’utilisation de capteurs et d’actionneurs. Ces villes sont dites intelligentes.Actuellement, les villes intelligentes sont opérés des acteurs qui ne partagent ni leurs données de capteurs ni l’accès à leurs actionneurs.Cette situation est dite verticale : chaque opérateur déploie ses propres capteurs et actionneurs et possède sa propre infrastructure informatique hébergeant ses applications. Cela conduit à une redondance de l’infrastructure et à des applications ad-hoc pour superviser et contrôler un domaine de la ville.Une tendance est d’aller vers une situation dite horizontale via l’utilisation d’une plateforme de médiation ouverte et partagée. Les données de capteurs et les accès aux actionneurs sont mutualisés au sein de ce type de plateforme, permettant leur partage entre les différents acteurs. Les coûts d’infrastructure et de développement s’en trouvent alors réduits.Cette thèse s’inscrit dans ce contexte d’horizontalisation, au sein d’une plate- forme ouverte et partagée, dans laquelle nous proposons :1) une couche d’abstraction pour le contrôle et la supervision de la ville, 2) un mécanisme de contrôle de concurrence gérant les cas de conflits, 3) un mécanisme de coordination favorisant la réutilisation des actionneurs, 4) une implémentation de notre travail par une preuve de concept.L’abstraction que nous proposons se base sur des modèles issus des systèmes réactifs. Ils ont pour objectif d’être générique et représente l’invariant de la ville intelligente : les éléments physiques. Ils permettent aux applications de contrôler et superviser la ville.Pour faciliter le développement d’applications nous uniformisons l’interface de nos modèles. Ces applications pouvant avoir des contraintes temps réel, particulièrement celles qui ont des objectifs de contrôle, nous proposons de tirer parti de l’architecture distribuée de ce type de plateforme.Compte-tenu du partage des actionneurs, nous avons identifié que des conflits peuvent survenir entre les applications. Nous proposons un mécanisme de contrôle de concurrence pour traiter ces cas de conflits.Nous avons également identifié qu’un mécanisme de coordination doit être offert aux applications souhaitant effectuer atomiquement des opérations de contrôle. Un tel mécanisme favorise la réutilisation des actionneurs présents dans la ville.Enfin, nous avons implémenté nos propositions autour d’une preuve de concept, comprenant plusieurs cas d’usages, permettant de démontrer notre travail<br>Nowadays cities face several challenges and are concerned by ecological, energetic, economical, and demographical aspects. Smart cities, equipped with sensors, actuators, and digital infrastructures, are meant to tackle these issues.Current smart cities are operated by several actors without sharing sensor data or accesses to the actuators. This is a vertical organization, in which each actor deploys its own sensors and actuators, and manages its own digital infrastructure. Each actor may be interested in a different aspect of city management, for instance traffic management, air control, etc. The current trend is a transition towards a more horizontal organization, based on an open and shared mediation platform. In such a platform, sensor data and accesses to actuators can be shared among several actors. The costs related to nfrastructure deployment and management are therefore reduced for each individual actor. This PhD is a contribution to this volution towards horizontal organizations, with open and shared platforms. We propose: (1) an abstraction layer for the ontrol and supervision of the city; (2) a concurrency management mechanism; (3) a coordination mechanism that helps haring actuators; (4) a proof-of-concept implementation of these contributions. The abstraction layer we propose helps users control and supervise a city. It is based upon formal models inspired by the ones used in the programming of reactive systems. They represent the physical elements present in each smart city, with genericity principles. In order to ease application development, the interface of those models is made uniform. Since applications, especially control ones, may ave real-time constraints, we also list the constraints this poses on distributed infrastructures. As soon as actuators are shared, conflicts may occur between users. Our proposals include a concurrency management mechanism, based on eservation principles. We also provide a coordination mechanism for the users to be able to perform several actions in an tomic way.All these principles have been implemented as a proof of concept. We review several use cases, to demonstrate he potential benefits of our proposals
16
Carter, Geoffrey A. "Controlling precipitation of value added zirconia." Thesis, Curtin University, 2009. http://hdl.handle.net/20.500.11937/1356.
Full textAbstract:
Advanced zirconia-based materials have many important applications in electronics and medical applications, and of most interest to this research, solid oxide fuel cells (SOFC) which is a key technology for alternative and hydrogen-based energy generation. The SOFC in its most basic form is a device for converting hydrogen and oxygen into water with a resulting generation of power. Most SOFC manufacturers/developers are using zirconia doped with yttria as the electrolyte with variations on the amount of yttria. The SOFC places high demands on the ceramic components, placing significant demands on powder processing technology to enable fabrication of reliable components. It has been shown that the process of co-precipitation of three initially mixed chlorides, aluminium chloride, yttrium chloride and zirconium oxychloride in aqueous solutions, can produce an oxide powder that can be used in SOFC manufacture. Zirconia powders synthesised from aqueous solution in this way have been found, however, to include hard agglomerates which are detrimental to further processing and applications.Industrial manufacture of zirconia and zirconia-yttria products can best be summarised as four step operation; (1) hydrolyse of zirconyl chloride and mixing of other solutions, (2) precipitation, (3) calcination (4) forward processing for particle size, surface area and handle-ability characteristics . The use of aqueous solutions allows for lower costs of production and reduced waste. However such production is hampered by limited understanding of the fundamental chemistry particularly during aqueous processing which limits the development of better powders for the widespread use of SOFC’s. The aim of this project was to develop an understanding of these problems based on an industrial process that is in use within Western Australia. The work has been broken up into five sections, with the first four dealing with predominately non-stabilized zirconia and tracks the process from aqueous chemistry through to final ceramic. The final section does the same for a 3 mole% yttrium partially stabilised zirconia.The influence of concentration and added chloride salts on the solution speciation of zirconyl chloride solutions, and the precipitate formed upon addition of aqueous ammonia, has been investigated using a combination of techniques, such as SAXS, DLS, ICP-OES, TEM and SEM.To further investigate the precipitation process the effect of pH of precipitation, starting solution concentration, and agitation levels on the particle size of hydrous zirconia precipitates have been investigated. The pH of precipitation was also found to have a significant impact on the type of hydrous zirconia produced. TGA/DTA, micro combustion and TEM / EDS were used to investigate the difference in the powders produced at pH 3 and 12.The two hydrous zirconium manufactured at pH 3 and 12 have been studied as further processing consistent with industrial procedures was undertaken, including how the differences in structure due to the pH of precipitation, may effect the calcination, in situ and ex situ x-ray diffraction was used for this.With the knowledge developed thus far, two 3 mol% partially stabilised zirconia (P-SZ) samples suitable for the SOFC market were manufactured from solutions through to ceramics.The combination of SAXS, DLS, in situ XRD, TEM, ICP, TGA/DTA, micro combustion, and standard ceramic testing was found to be excellent for providing comprehensive information on changes through an industrial process and will allow optimisation to produce powders suitable for SOFC applications.
17
Duquesne, Loys. "Caractérisation thermique de structures composites SiCf/SiC tubulaires pour applications nucléaires." Thesis, Paris, ENSAM, 2015. http://www.theses.fr/2015ENAM0052/document.
Full textAbstract:
Les recherches portant sur le développement des composites réfractaires de type SiCf/SiC pour application gainage du combustible des réacteurs de géneration IV ont conduit le CEA à s’intéresser aucomportement thermique de ces matériaux. En particulier, la connaissance des propriétés thermiques représente un des points cles dans la conception des composants. Au regard du concept sandwichdont la complexité de structure et la géométrie cylindrique s'éloigne de celle d'éprouvettes planes classiquement utilisées, les méthodes de mesures usuelles ne conviennent pas.Ce travail de thèse s’intéresse à la caractérisation et à la modélisation du comportement thermiquede ces structures. Une première partie du travail concerne l'identification des paramètres thermiquesglobaux des différentes couches constitutives d'une gaine sandwich . Pour cela, une méthodeash est employée et un banc d’expériences adapte aux géométries tubulaires a pu être développe.L’écriture d'un nouveau modèle d'estimation, fonde sur le couplage des signaux recueillis à la fois enface avant et en face arrière, permet aujourd'hui d’accéder par la mesure a la diffusivité thermiquedes composites tubulaires via la thermographie infrarouge. Dans une seconde partie de la thèse,une démarche matériau virtuel a été mise en place pour décrire le comportement thermique d'unegaine sandwich à partir des propriétés des constituants élémentaires (bres et matrice). Cespropriétés, obtenues avec deux méthodes d'estimation différentes permettant d'exploiter les mesuresde deux expériences distinctes basées sur la thermographie infrarouge, sont utilisées comme donnéespour la modélisation du transfert thermique au sein de ces gaines. Les confrontations réalisées entrecampagnes de mesures et expériences numériques permettent normalement d’appréhender le poids desdifférents facteurs d'influence qui régissent les transferts thermiques<br>Researches on the development on SiCf/SiC refractory composites for generation IV nuclear fuel cladding led the CEA to focus on the thermal behavior of these materials. In particular, knowingthe thermal properties is essential for their components design. Regarding the development of the sandwich" concept, whose complexity and geometry differ from the conventionally used at tubes,usual measurement methods are unsuitable.This PhD reports on the characterization and modeling of the thermal behavior of these structures. The first part concerns the identification of the global thermal parameters of the diferent layers of a"sandwich" sheath. To do so, a ash method is used and an experimental bench suitable for tubular geometries was developed. A new estimation method based on the combination of both collectedsignals in front and rear faces allows the identification of the thermal diffusivity of tubular composites using infrared thermography. The second part focuses on a virtual material approach, established todescribe the thermal behavior of a "sandwich" cladding, starting from the properties of the elementary components (bers and matrix). These properties, obtained using two different estimation methods,allows exploiting the measurements of two separate experiments based on infrared thermography.They are then used as data for the heat transfer modeling in these ducts. Confrontations betweenexperimental measurements and numerical results finally allow gaining insight into the in uence ofthe different key parameters governing the heat transfer
18
Linewih, Handoko, and h. linewih@griffith edu au. "Design and Application of SiC Power MOSFET." Griffith University. School of Microelectronic Engineering, 2003. http://www4.gu.edu.au:8080/adt-root/public/adt-QGU20030506.013152.
Full textAbstract:
This thesis focuses on the design of high voltage MOSFET on SiC and its application in power electronic systems. Parameters extraction for 4H SiC MOS devices is the main focus of the first topic developed in this thesis. Calibration of two-dimensional (2-D) device and circuit simulators (MEDICI and SPICE) with state-of-the-art 4H SiC MOSFETs data are performed, which includes the mobility parameter extraction. The experimental data were obtained from lateral N-channel 4H SiC MOSFETs with nitrided oxide-semiconductor interfaces, exhibiting normal mobility behavior. The presence of increasing interface-trap density (Dit) toward the edge of the conduction band is included during the 2-D device simulation. Using measured distribution of interface-trap density for simulation of the transfer characteristics leads to good agreement with the experimental transfer characteristic. The results demonstrate that both MEDICI and SPICE simulators can be used for design and optimization of 4H SiC MOSFETs and the circuits utilizing these MOSFETs. Based on critical review of SiC power MOSFETs, a new structure of SiC accumulation-mode MOSFET (ACCUFET) designed to address most of the open issues related to MOS interface is proposed. Detailed analysis of the important design parameters of the novel structure is performed using MEDICI with the parameter set used in the calibration process. The novel structure was also compared to alternative ACCUFET approaches, specifically planar and trench-gate ACCUFETs. The comparison shows that the novel structure provides the highest figure of merit for power devices. The analysis of circuit advantages enabled by the novel SiC ACCUFET is given in the final part of this thesis. The results from circuit simulation show that by utilizing the novel SiC ACCUFET the operating frequency of the circuit can be increased 10 times for the same power efficiency of the system. This leads to dramatic improvements in size, weight, cost and thermal management of power electronic systems.
19
Linewih, Handoko. "Design and Application of SiC Power MOSFET." Thesis, Griffith University, 2003. http://hdl.handle.net/10072/367638.
Full textAbstract:
This thesis focuses on the design of high voltage MOSFET on SiC and its application in power electronic systems. Parameters extraction for 4H SiC MOS devices is the main focus of the first topic developed in this thesis. Calibration of two-dimensional (2-D) device and circuit simulators (MEDICI and SPICE) with state-of-the-art 4H SiC MOSFETs data are performed, which includes the mobility parameter extraction. The experimental data were obtained from lateral N-channel 4H SiC MOSFETs with nitrided oxide-semiconductor interfaces, exhibiting normal mobility behavior. The presence of increasing interface-trap density (Dit) toward the edge of the conduction band is included during the 2-D device simulation. Using measured distribution of interface-trap density for simulation of the transfer characteristics leads to good agreement with the experimental transfer characteristic. The results demonstrate that both MEDICI and SPICE simulators can be used for design and optimization of 4H SiC MOSFETs and the circuits utilizing these MOSFETs. Based on critical review of SiC power MOSFETs, a new structure of SiC accumulation-mode MOSFET (ACCUFET) designed to address most of the open issues related to MOS interface is proposed. Detailed analysis of the important design parameters of the novel structure is performed using MEDICI with the parameter set used in the calibration process. The novel structure was also compared to alternative ACCUFET approaches, specifically planar and trench-gate ACCUFETs. The comparison shows that the novel structure provides the highest figure of merit for power devices. The analysis of circuit advantages enabled by the novel SiC ACCUFET is given in the final part of this thesis. The results from circuit simulation show that by utilizing the novel SiC ACCUFET the operating frequency of the circuit can be increased 10 times for the same power efficiency of the system. This leads to dramatic improvements in size, weight, cost and thermal management of power electronic systems.<br>Thesis (PhD Doctorate)<br>Doctor of Philosophy (PhD)<br>School of Microelectronic Engineering<br>Full Text
20
Gustafsson, Johan. "Desktop Integration with a Web Based Application." Thesis, Linköpings universitet, Institutionen för datavetenskap, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-76913.
Full textAbstract:
This master thesis work was done at Ipendo Systems in Linköping, a company that makes an intellectual property management system called Ipendo Platform. The master thesis describes the design and development of an extension to a web based solution to work as desktop application and demonstrating the solution with an Outlook plugin. The goal was to improve the workflow for the user when handling documents received by mail and also find and evaluate a model for product integration that could be re-used for future projects. The result of the master thesis is an Outlook plugin and a web service that exposes part of Ipendo Platform functionality in a service layer. As a final test the solution was tested in a production environment to simulate real world usage. The report provides conclusions about the pros and cons of this kind solution and how the current design and implementation of Ipendo Platform has affected the outcome.
21
Berdoyes, Inès. "Interactions entre le silicium liquide et le carbure de silicium, application au composite SiC/SiC." Thesis, Bordeaux, 2018. http://www.theses.fr/2018BORD0113/document.
Full textAbstract:
Dans un contexte de développement du trafic aérien, et en vue de répondre aux nouvelles normes environnementales, il est désormais impératif de diminuer la consommation de carburant et les émissions de gaz des moteurs, ainsi que d’en améliorer le rendement. Pour ce faire, la conception des dispositifs, mais aussi leur fabrication et les matériaux employés sont repensés.Plus légers, inertes chimiquement et capables de conserver leurs propriétés mécaniques même à haute température, les matériaux composites à matrice céramique SiC/SiC sont des matériaux prometteurs pour remplacer certaines pièces métalliques des moteurs aéronautiques et atteindre cet objectif. Une des voies prometteuses d’élaboration de ces composites est l’imprégnation de silicium liquide (Melt Infiltration, dite MI) dans une préforme de fibres de carbure de silicium, revêtues de SiC (SiCCVI), préalablement imprégnée de poudre de SiC (SiCp).Le silicium doit remplir les pores de la préforme sans dégrader ses constituants. Néanmoins, des interactions locales entre le silicium liquide (SiL) et le revêtement en carbure de silicium (SiCCVI) des fibres de SiC ont été mises en évidence. Elles se traduisent par une dégradation du revêtement pouvant aller jusqu’à la destruction des fibres. Le premier objectif de cette thèse est donc de comprendre ces interactions SiL- SiCCVI et d’identifier les principaux facteurs. Par la suite, la modulation des interactions SiL- SiCCVI peut être envisagée par l’ajout de poudre de SiCp ainsi que par l’utilisation de l’alliage Si-B. L’objectif de ce second volet de la thèse sera de comprendre comment la (les) poudre(s) et l’alliage Si-B influent sur les interactions (paramètres et mécanismes)<br>Increase of the air traffic and recent environmental standards require the reduction of the energy consumption and gas emission of the new aircraft engines. For this purpose, new materials have been developed.Lighter, chemically inert and suitable for high temperature applications, the Ceramic Matrix Composites SiC/SiC are promising materials for replacing some of the metallic turbine engine pieces and improving energy efficiency.From now on, CMC matrix was mainly elaborated by Ceramic Chemical Vapor Infiltration (CVI). However, this process is slow and costly, and the residual porosity is high. Then, the infiltration of liquid silicon (Melt Infiltration) in a SiC fibrous preform, coated with SiC (SiCCVI), and densified by SiC powders (SiCp) is an alternative route to full CVI.Even if liquid silicon (SiL) should fill the pores of the preform without reacting with SiC, local interactions have been noticed between the liquid silicon and the Sic deposit, which is deleterious to the final material mechanical properties. Therefore, this thesis aims at understanding the interactions SiL- SiCCVI and identifying the main parameters. This requires beforehand to characterize deeply and precisely the microstructure of the SiCCVI. Thereafter, research will focus on the control of the SiL- SiCCVI interactions
22
Register, Joseph. "SiC For Advanced Biological Applications." Scholar Commons, 2014. https://scholarcommons.usf.edu/etd/5113.
Full textAbstract:
Silicon carbide (SiC) has been used for centuries as an industrial abrasive and has been
actively researched since the 1960's as a robust material for power electronic applications.
Despite being the first semiconductor to emit blue light in 1907, it has only recently been
discovered that the material has crucial properties ideal for long-term, implantable biomedical
devices. This is due to the fact that the material offers superior biocompatibility and
hemocompatibility while providing rigid mechanical and chemical stability. In addition, the material
is a wide-bandgap semiconductor that can be used for optoelectronics, light delivery, and optical
sensors, which is the focus of this dissertation research.
In this work, we build on past accomplishments of the USF-SiC Group to develop active
SiC-based Brain Machine Interfaces (BMIs) and develop techniques for coating other biomaterials
with amorphous SiC (a-SiC) to improve device longevity. The work is undertaken to move the
state of the art in in vivo biomedical devices towards long term functionality. In this document we
also explore the use of SiC in other bio photonics work, as demonstrated by the creation of the
first reported photosensitive capacitor in semi-insulating 4H-SiC, thus providing the mechanism
for a simple, biocompatible, UV sensor that may be used for biomedical applications.
Amorphous silicon carbide coatings are extremely useful in developing agile biomaterial
strategies. We show that by improving current a-SiC technology we provide a way that SiC
biomaterials can coexist with other materials as a biocompatible encapsulation strategy. We
present the development of a plasma enhanced chemical vapor deposition (PECVD) a-SIC
process and include material characterization analysis. The process has shown good adhesion
to a wide variety of substrates and cell viability tests confirm that it is a highly biocompatible
coating whereby it passed the strict ISO 10993 standard tests for biomaterials and biodevices.
In related work, we present a 64-channel microelectrode array (MEA) fabricated on a cubic
3C-SiC polytype substrate as a preliminary step in making more complex neurological devices.
The electrode-electrolyte system electrical impedance is studied, and the device is tested against
the model. The system is wire-bonded and packaged to provide a full neural test bed that will be
used in future work to compare substrate materials during long-term testing.
Expanding on this new MEA technology, we then use 3C-SiC to develop an active,
implantable, BMI interface. New processes were developed for the dry etching of SiC neural
probes. The developed 7 mm long implantable devices were designed to offer four channels of
single-unit electrical recording with concurrent optical stimulation, a combination of device
properties that is indeed at the state-of-the-art in neural probes at this time.
Finally, work in SiC photocapacitance is presented as it relates to radio-frequency tuning
circuits as well as bio photonics. A planar geometry UV tunable photocapacitor is fabricated to
demonstrate the effect of below-bandgap optical tuning. The device can be used in a number of
applications ranging from fluorescence sensing to the tuning of antennas for low-power
communications.
While technology exists for a wide variety of in vivo interfaces and sensors, few active
devices last in the implantable environment for more than a few months. If these devices are
going to reach a long-term implant capability, use of better materials and processing strategies
will need to be developed. Potential devices and strategies for harnessing the SiC materials family
for this very important application are reviewed and presented in this dissertation to serve as a
possible roadmap to the development of advanced SiC-based biomedical devices.
23
Osmík, Lukáš. "Integrace pomocí frameworku SwitchYard." Master's thesis, Vysoká škola ekonomická v Praze, 2013. http://www.nusl.cz/ntk/nusl-165085.
Full textAbstract:
The thesis deals with enterprise service bus (ESB). In theoretical part there are described ESB and other technologies relevant to this topic. Next there are described advantages and disadvantages of the deployment and mapped current market of ESB solutions. Last chap-ter briefly discusses other technologies recovered for the practical part. The second part deals with the design and implementation ESB using framework SwitchYard. I describe the systems to be integrated, further progress in the development such as preparation envi-ronment, server configuration and description of the most important parts of the developed system. The last chapter deals with the practical part of the evaluation framework. It in-cludes the description of the errors that I have encountered in the development and verbal evaluation on the basis of general ESB functionality described in the theoretical part.
24
Solanki, Jigar. "Approche générative conjointe logicielle-matérielle au développement du support protocolaire d’applications réseaux." Thesis, Bordeaux, 2014. http://www.theses.fr/2014BORD0301/document.
Full textAbstract:
Les communications entre les applications réseaux sont régies par un ensemble de règles regroupées sous forme de protocoles. Les messages protocolaires sont gérés par une couche de l’application réseau connue comme étant la couche de support protocolaire. Cette couche peut être de nature logicielle, matérielle ou conjointe. Cette couche se trouve à la frontière entre le coeur de l’application et le monde extérieur. A ce titre, elle représente un composant névralgique de l’application. Les performances globales de l’application sont ainsi directement liées aux performances de la couche de support protocolaire associée.Le processus de développement de ces couches consiste à traduire une spécification du protocole, écrite dans un langage de haut niveau tel que ABNF dans un langage bas niveau, logiciel ou matériel. Avec l’avènement des systèmes embarqués, de plus en plus de systèmes sur puce proposent l’utilisation de ressources matérielles afin d’accroître les performances des applicatifs. Néanmoins, peu de processus de développement de couches de support protocolaire tirent parti de ces ressources, en raison notamment de l’expertise nécessaire dans ce domaine.Cette thèse propose une approche générative conjointe logicielle-matérielle au développement du support protocolaire d’applications réseaux, pour améliorer leur performance tout en restant ergonomique pour le développeur de l’application. Notre approche est basée sur l’exploitation d’un langage dédié, appellé Zebra pour générer les différents composants logiciels et matériels formant la couche de support. L’expertise nécessaire est déportée dans l’utilisation du langage Zebra et les composants matériels générés permettent d’accroître les performances de l’application.Les contributions de cette thèse sont les suivantes : Nous avons effectué une analyse des protocoles et applications réseaux. Cette analyse nous a permis d’identifier les composants pour lesquels il est possible d’obtenir des gains de performances.Nous avons conçu et exploité un langage dédié, Zebra, permettant de décrire les différentes entités de la couche de support protocolaire et générant les éléments logiciels et matériels la composant. Nous avons construit un système sur puce exécutant un système d’exploitation Linux afin d’étayer notre approche. Nous avons conçu des accélérateurs matériels déployables pour différents protocoles réseaux sur ce système et pilotables par les applicatifs. Afin de rendre l’accès aux accélérateurs matériels transparent pour les applications réseaux, nous avons développé un intergiciel gérant l’ensemble de ces accès. Cet intergiciel permet à plusieurs applications et/ou à plusieurs clients d’une même application d’utiliser les accélérateurs pour le traitement des messages protocolaires. Nous avons évalué les performances de notre approche dans des conditions réelles. Nous avons comparé ces performances à celles de couches de supports faisant référence dans le domaine. Nous avons constaté un gain de performance conséquent pour l’approche que nous proposons<br>Communications between network applications is achieved by using rulesets known as protocols. Protocol messages are managed by the application layer known as the protocol parsing layer or protocol handling layer. Protocol parsers are coded in software, in hardware or based on a co-design approach. They represent the interface between the application logic and the outside world. Thus, they are critical components of network applications. Global performances of network applications are directly linked to the performances of their protocol parser layers.Developping protocol parsers consists of translating protocol specifications, written in a high level language such as ABNF towards low level software or hardware code. As the use of embedded systems is growing, hardware ressources become more and more available to applications on systems on chip (SoC). Nonetheless, developping a network application that uses hardware ressources is challenging, requiring not only expertise in hardware design, but also a knowledge of the protocols involved and an understanding of low-level network programming.This thesis proposes a generative hardware-software co-design based approach to the developpement of network protocol message parsers, to improve their performances without increasing the expertise the developper may need. Our approach is based on a dedicated language, called Zebra, that generates both hardware and software elements that compose protocol parsers. The necessary expertise is deported in the use of the Zebra language and the generated hardware components permit to improve global performances.The contributions of this thesis are as follows : We provide an analysis of network protocols and applications. This analysis allows us to detect the elements which performances can be improved using hardware ressources. We present the domain specific language Zebra to describe protocol handling layers. Software and hardware components are then generated according to Zebra specifications. We have built a SoC running a Linux operating system to assess our approach.We have designed hardware accelerators for different network protocols that are deployed and driven by applications. To increase sharing of parsing units between several tasks, we have developped a middleware that seamlessly manages all the accesses to the hardware components. The Zebra middleware allows several clients to access the ressources of a hardware accelerator. We have conducted several set of experiments in real conditions. We have compared the performances of our approach with the performances of well-knownprotocol handling layers. We observe that protocol handling layers baded on our approach are more efficient that existing approaches
25
Phan, Hoang-Phuong. "The Piezoresistive Effect of p-type Single Crystalline 3C-SiC for Mechanical Sensors." Thesis, Griffith University, 2016. http://hdl.handle.net/10072/366955.
Full textAbstract:
Silicon carbide (SiC) is a promising material for electronic devices operating at high temperatures, thanks to its large energy band gap, superior mechanical prop- erties and excellent chemical inertness. Among various poly types of SiC, cubic single crystalline silicon carbide (3C-SiC) is considered to be the most suitable poly type for MEMS applications, as it can be grown on a Si substrate which is com- patible with the conventional MEMS process and reduces the cost of SiC wafers. Studies on the piezoresistive effect of 3C-SiC are of great interest for developing mechanical sensors such as pressure sensors and strain sensors used for controlling combustion and deep well drilling. This research aims to experimentally charac- terize and theoretically analyze the piezoresistive effect of p-type single crystalline 3C-SiC grown on a large scale Si substrate. The gauge factor, the piezoresistive coefficients in two-terminal and four-terminal resistors, the comparison between single crystalline and nano crystalline SiC, as well as the temperature dependence of the piezoresistive effect in p-type 3C-SiC are also addressed. The large gauge factors of the p-type 3C-SiC at both room temperature and high temperatures found in this study indicated that this poly type is feasible for the development of mechanical sensing transducers used in harsh environments with high temperatures.<br>Thesis (PhD Doctorate)<br>Doctor of Philosophy (PhD)<br>Griffith School of Engineering<br>Science, Environment, Engineering and Technology<br>Full Text
26
Kuszewski, Maciej. "Performance Analysis And Comparison Of Soa Servers In Different Applications." Master's thesis, METU, 2010. http://etd.lib.metu.edu.tr/upload/12612193/index.pdf.
Full textAbstract:
One of the most crucial decisions when developing a system based on Service Oriented Architecture is to select an appropriate server which will be the ground for building the application. Similar to databases, an application server has
significant influence on efficiency, stability, and security of entire system. During the preparation of architecture for system development one has to decide which available application server would be optimal for hosting and maintaining
v Web Services in the given case. There are multiple significant criteria that lead to the proper choice. The impact on a decision among other things is type of the physical machine on which the application server is installed, estimated number of simultaneous clients, and sizes of requests and responses between clients and server. The goal for this thesis is to conduct the comparative analysis of the most commonly used application servers using Service Oriented Architecture and to
determine which server should be applied in which particular cases. Performance and load tests will be conducted using SoapUI application.
27
Dias, Junior José Jorge Lima. "A software architecture process for SOA-based enterprise applications." Universidade Federal de Pernambuco, 2008. https://repositorio.ufpe.br/handle/123456789/1665.
Full textAbstract:
Made available in DSpace on 2014-06-12T15:51:46Z (GMT). No. of bitstreams: 1
license.txt: 1748 bytes, checksum: 8a4605be74aa9ea9d79846c1fba20a33 (MD5)
Previous issue date: 2008<br>O crescimento do tamanho, complexidade e demanda por qualidade dos
sistemas de software são alguns dos motivos que tem aumentado o interesse na
área de arquitetura de software. Consequentemente, processos de arquitetura de
software surgiram a fim de auxiliar os arquitetos na construção dessas
arquiteturas. Arquitetura Orientada a Serviços (SOA) surgiu como um tipo de
arquitetura de software para construir sistemas através da composição de
serviços. Assim como o paradigma de orientação a objetos, o paradigma de
orientação a serviços tem trazido uma abordagem de projeto distinta que
introduz princípios que governam o posicionamento e o projeto dos
componentes arquiteturais. Além disso, SOA é um paradigma para organização
e utilização de capacidades distribuídas que podem estar sob o controle de
diferentes domínios. No contexto empresarial, SOA permite que organizações,
que tenham uma infra-estrutura de aplicações fragmentadas sob a
administração de diferentes áreas de negócio, possam integrar estas aplicações
no nível de serviço. Por um lado, os processos de arquitetura tradicionais não
abrangem estes aspectos de SOA. Por outro lado, as abordagens de SOA
disponíveis não satisfazem todos os fundamentos da arquitetura de software.
Neste sentido, esta dissertação propõe um processo sistemático de arquitetura
de software baseado em SOA que compreende os principais fundamentos da
arquitetura de software e características inerentes a SOA a fim de guiar os
arquitetos na construção de uma descrição arquitetural para SOA.
Adicionalmente, um estudo experimental foi definido, planejado, executado e
analisado a fim de avaliar o processo proposto
28
Hu, Yang. "Study of GdBaCo2-xMxO5+δ (M=Ni, Fe; x = 0, 0.1, 0.2,...) as new cathode materials for IT-SOFC application". Phd thesis, Ecole Centrale Paris, 2011. http://tel.archives-ouvertes.fr/tel-00619609.
Full textAbstract:
GdBaCo2O5+δ a été présenté récemment comme un matériau de cathode potentiel pour pile à combustible à oxyde solide. Cependant, sa réactivité chimique avec la zircone yttriée et son fort coefficient de dilatation constituent une limite importante à son utilisation. L'objet de ce travail est l'étude des composés GdBaCo2 xMxO5+δ (M = Ni, Fe, x = 0, 0.1, 0.2...) i.e. substitués au fer et au nickel pour objectif d'améliorer les propriétés du composé original pour l'application pile à combustible. Tout d'abord, différentes méthodes de synthèse ont été essayées et comparées, les méthodes par voie chimique montrant un net avantage pour l'obtention de taux de substitution élevés. Les propriétés physico-chimiques des matériaux synthétisés ont été caractérisées. Si la structure des composés évolue avec la nature et le taux du substituant, les propriétés de ces composés en termes de conduction électronique ou d'évolution du contenu en oxygène sont relativement constantes. Finalement, les performances électrochimiques de plusieurs compositions sous forme d'électrodes poreuses ont été testées avec différents types d'électrolytes. Les résultats montrent que la substitution n'apporte rien pour ce qui concerne la dilatation des composés et par ailleurs ne semble pas améliorer significativement les performances électrochimiques.
29
Camelin, Christian. "Oxydation du silicium monocristallin sous haute pression d'oxygène sec." Bordeaux 1, 1985. http://www.theses.fr/1985BOR10583.
Full textAbstract:
L'oxydation du silicium monocristallin est une etape importante de la technologie m. O. S. (metal-oxide-semiconductor). Les temperatures (!000c) et les durees d'oxydation relativement elevees creent des defauts structuraux notamment prejudiciables a toute miniaturisation. Afin de palier a cet inconvenient, l'utilisation de pressions d'oxygene elevees, du fait de l'accroissement de la reactivite, s'averait une voie interessante pour abaisser la temperature. Des etudes d'oxydation ont ete menees en oxygene sec dans un domaine inexplore (14p000 bar) (600t80c). Sur la base du modele de deal et grove les constantes de vitesse ont ete definies ainsi que leur dependance vis-a-vis du parametre pression. Les couches d'oxyde elaborees dans de telles conditions ont ete caracterisees tant au niveau des proprietes physico-chimiques qu'electriques. Ces travaux tout en apportant des resultats fondamentaux originaux constituent une ouverture pour la micro-electronique dans la mesure ou l'abaissement des temperatures d'oxydation sous pression peut conduire a des applications industrielles
30
Md, Foisal AR. "Optoelectronic effects in 3C-SiC/Si heterostructure and applications." Thesis, Griffith University, 2019. http://hdl.handle.net/10072/385880.
Full textAbstract:
Silicon carbide (SiC) is emerging as a potential material for harsh environment applications
owing to its superior electrical and mechanical properties, as well as excellent
chemical inertness. Among more than 200 polytypes, single crystalline cubic
silicon carbide (3C-SiC) is attracting signi cant research interest due to its higher
channel mobility and lower energy bandgap that make it the most suitable polytype
for developing electronic and optoelectronic devices. The 3C-SiC lms are usually
grown on 4H-SiC, 6H-SiC, and Si-substrates due to the lack of 3C-SiC-substrate.
Unlike other 3C-SiC heterostructures, 3C-SiC/Si is the preferable heterojunction for
Micro/Nano-Electro-Mechanical Systems (M/NEMS) applications as it can be grown
on commercially available large Si-wafers, and hence the cost of wafers reduces significantly.
However, most of the 3C-SiC/Si-based devices have utilized only the 3C-SiC
layer as a functioning layer. This research aims to theoretically and experimentally
investigate the optical and optoelectronic e ects on 3C-SiC/Si heterojunctions and
explores the potential of enhancing the sensitivity of 3C-SiC/Si-based devices via the
optomechanical coupling e ect. The rst purpose of this study is to examine the
e ect of optical illumination on the 3C-SiC thin lm and evaluates the possibility to
use it as a thermoresistive sensor for monitoring cell temperature during an optical
investigation. Furthermore, this research intends to investigate the photoconductive
behaviors of the 3C-SiC/Si heterojunction under UV and visible illuminations. The
characteristics of the heterojunction are also evaluated under broad spectral illuminations
(UV-NIR) to prove its potential to perform as a self-powered photodetector.
In addition, the possibility of enhancing the sensitivity of a 3C-SiC/Si heterostructure
based piezoresistive sensor by employing the optomechanical coupling e ect is
also examined. The results from this study imply the feasibility of using 3C-SiC/Si
heterostructure for various M/NEMS applications (such as photodetectors, thermoresistive
sensors, and piezoresistive sensors) in optical environments. Moreover, the
in-depth discussion about the carrier generation and transport mechanisms will provide
vital information for the development of 3C-SiC/Si optoelectronic devices. This
thesis is prepared in a \thesis by publications" format. The published journal articles
are presented in chapters 3 (partially), 4, 5, and 6.<br>Thesis (PhD Doctorate)<br>Doctor of Philosophy (PhD)<br>School of Eng & Built Env<br>Science, Environment, Engineering and Technology<br>Full Text
31
Bah, Abdramane. "Interopérabilité et sécurité des systèmes d'information : application aux systèmes de gestion de l'éducation." Thesis, Nantes, 2020. http://www.theses.fr/2020NANT4028.
Full textAbstract:
Le contrôle d’accès des services partagés est une exigence essentielle pour une fédération de services de différents domaines. Dans cette thèse, nous nous sommes attaqués à deux problèmes de contrôle d’accès : l’autorisation des utilisateurs et la délégation de l’authentification des utilisateurs à leurs propres domaines. Pour répondre à ces problèmes, nous avons proposé une méthode d’autorisation des utilisateurs basée sur la technique de mapping d’attributs et un mécanisme de contrôle d’accès fédéré pour mettre en oeuvre cette méthode d’autorisation. Nous avons proposé une méthode de fédération services pour déléguer l’authentification des utilisateurs à leurs propres domaines. Le principal objectif est de permettre à divers domaines de collaborer malgré l’hétérogénéité de leurs modèles de sécurité<br>Access control for shared services is an essential requirement for a federation of services from different domains. In this thesis, we tackled two access control problems : authorizing users and delegating user authentication to their own domains. To address these problems, we have proposed a method of authorizing users based on the attribute mapping technique and a federated access control mechanism to implement this authorization method. We have proposed a service federation method to delegate user authentication to their domains. The main objective is to allow various domains to collaborate despite the heterogeneity of their security models
32
Hinoki, Tatsuya. "Investigation of Mechanical Properties and Microstructure of SiC/SiC Composites for Nuclear Application." Kyoto University, 2001. http://hdl.handle.net/2433/150496.
Full textAbstract:
Kyoto University (京都大学)<br>0048<br>新制・課程博士<br>博士(エネルギー科学)<br>甲第9050号<br>エネ博第37号<br>新制||エネ||10(附属図書館)<br>UT51-2001-F380<br>京都大学大学院エネルギー科学研究科エネルギー応用科学専攻<br>(主査)教授 香山 晃, 教授 塩津 正博, 教授 木村 晃彦<br>学位規則第4条第1項該当
33
Pham, Tuan Anh. "Multifunctional silicon carbide nanowires for sensing applications in harsh environments." Thesis, Griffith University, 2022. http://hdl.handle.net/10072/414588.
Full textAbstract:
Wide bandgap semiconductors are currently considered as the building blocks which revolutionized many areas of nanoscience and nanotechnologies. Among them, silicon carbide has been quickly emerging as one of the most interesting materials due to its remarkable physical, chemical, mechanical, electrical properties along with its biocompatibility and its feasibility for a wafer-scale production using standard MEMS processes. Inspired by these advantages, considerable number of studies have been devoted to the development of various SiC-based electronic devices over the past years. Despite these great achievements, however, it is realized that existing sensing devices usually rely on SiC in the forms of bulk or thin film, which still exhibit relatively poor sensitivity and unstable operation due to the limitation of their surface-to-volume ratios. Another key bottleneck of these existing sensing devices lies in the impossibility to integrate SiC onto soft and stretchable substrates due to its rigid and brittle nature, which significantly hamper the broader applications of SiC in the fast-emerging field of bioelectronics. Therefore, the research activities in the framework of my Ph.D. candidature aimed to establish reliable and sustainable protocols to overcome these two critical challenges. The focuses of my research work are placed on the fabrication of SiC nanowires on SiO2 insulators and stretchable SiC microstructures integrated onto polymeric substrates with a high level of structural perfection. Towards these goals, I have successfully fabricated Si NWs on insulator by using a combination of electron beam lithography and thermal wet oxidation techniques. The temperature sensing devices based on SiC NWs exhibit a high TCR compared to their bulk counterparts. On the other hand, I successfully established an effective protocol to transfer rigid SiC microstructures onto polymeric substrates and subsequently, enhanced their stretchability by taking advantages of structural design approaches.<br>Thesis (PhD Doctorate)<br>Doctor of Philosophy (PhD)<br>School of Environment and Sc<br>Science, Environment, Engineering and Technology<br>Full Text
34
Rich, David. "On-site application of self-compacting concrete (SCC)." Thesis, Loughborough University, 2014. https://dspace.lboro.ac.uk/2134/17229.
Full textAbstract:
Self-Compacting Concrete (SCC) is a material which under its own self-weight flows to form and fill any shape, attains full compaction, without external energy input, to create a dense homogenous mass (based on Holton, 2003; The Concrete Society and BRE, 2005; Damtoft et al, 2008). It is, in respect to the history of concrete, a relatively new development, with its first UK application occurring in the late 1990s. Since then a significant amount of research has sought to understand its physical and structural properties, but there is a lack of a knowledge base on its practical application and performance in construction projects. Where it does exist, such research lacks robust and transparent data, particularly relating to the claimed attributes of the material (such as better surface finish, faster construction and lower overall costs). Using a combination of qualitative and quantitative research methods, this research investigates the construction practices employed when pouring SCC and presents new data on its practical applications. Interviews with a range of building contractors, ranging from multinationals to small UK businesses (SMEs), show that current perceptions of SCC limit its use to specific applications because practitioners see SCC as just another type of concrete . A critical examination of these attitudes led to the identification of three distinct scenarios for the use of SCC: 1. Reactive selection: in which a particular attribute of SCC provokes its use to solve a particular problem, often as a last minute substitution for conventional concrete the most common scenario. 2. Strategic change: in which the material is chosen on the basis of a balanced assessment of all its benefits and on the understanding that such benefits can only be attained if the contractor appreciates that there may be implications for the construction process a rarely experienced scenario. 3. Specification: in which there is complete acceptance of SCC as a method, not just as a material; a significant amount of early project involvement with knowledge holders, such as contractors and material suppliers, optimises the construction process. A rigorous work measurement study of live construction projects has made it possible to quantify the as-built costs of SCC for selected UK residential slab and multi-storey flat slab applications and compare this with the equivalent conventional concrete slab construction. On-site use of self-compacting concrete vi The results indicate that SCC can reduce construction times of structural topping layers of residential slabs by up to 73%, and has shown that SCC can also match, if not reduce, total as-built concrete placement costs in multi-storey applications. This new data will enable contractors, designers and specifiers to better understand the practical implications of using SCC for on-site applications, thereby leading to more potential instances of its early and planned specification, hence resulting in more of its full benefits being realised.
35
Wahid, Mohamad H. B. A. "Application of SOA-NOLM in all-optical processing." Thesis, Aston University, 2009. http://publications.aston.ac.uk/15403/.
Full textAbstract:
This thesis presents experimental investigations of the use of semiconductor optical amplifiers in a nonlinear loop mirror (SOA-NOLM) and its application in all-optical processing. The techniques used are mainly experimental and are divided into three major applications. Initially the semiconductor optical amplifier, SOA, is experimentally characterised and the optimum operating condition is identified. An interferometric switch based on a Sagnac loop with the SOA as the nonlinear element is employed to realise all-optical switching. All-optical switching is a very attractive alternative to optoelectronic conversion because it avoids the conversion from the optical to the electronic domain and back again. The first major investigation involves a carrier suppressed return to zero, CSRZ, format conversion and transmission. This study is divided into single channel and four channel WDM respectively. The optical bandwidth which limits the conversion is investigated. The improvement of the nonlinear tolerance in the CSRZ transmission is shown which shows the suitability of this format for enhancing system performance. Second, a symmetrical switching window is studied in the SOA-NOLM where two similar control pulses are injected into the SOA from opposite directions. The switching window is symmetric when these two control pulses have the same power and arrive at the same time in the SOA. Finally, I study an all-optical circulating shift register with an inverter. The detailed behaviour of the blocks of zeros and ones has been analysed in terms of their transient measurement. Good agreement with a simple model of the shift register is obtained. The transient can be reduced but it will affect the extinction ratio of the pulses.
36
Udroiu, Sorina-Nicoleta. "Développement de piles à combustible de type SOFC en technologie planaire couches épaisses. Application à l'étude de dispositifs en configuration monochambre." Phd thesis, Ecole Nationale Supérieure des Mines de Saint-Etienne, 2009. http://tel.archives-ouvertes.fr/tel-00392071.
Full textAbstract:
Cette étude est dédiée au développement de piles à combustible de type SOFC en configuration monochambre. L'originalité de ce type de pile SOFC est l'absence de séparation physique entre les compartiments anodique et cathodique. Un mélange d'hydrocarbure et d'air est injecté sur l'ensemble du dispositif comportant l'électrolyte et les deux électrodes de la pile SOFC. Le principe de fonctionnement de ce type de pile repose sur la différence d'activité catalytique entre les deux électrodes. L'anode doit être sélective pour l'oxydation des hydrocarbures et la cathode pour la réduction de l'oxygène. Cette configuration originale permet de s'affranchir des problèmes d'étanchéité des configurations conventionnelles deux atmosphères, ainsi que d'éviter les contraintes sur l'épaisseur de l'électrolyte suivant la disposition des électrodes (coplanaires ou de part et d'autre de l'électrolyte). Cette configuration conduit à des dispositifs simplifiés du point de vue technologique, et donc moins coûteux.<br />Dans cette étude, les électrodes ont été déposées en couches épaisses par la technologie de sérigraphie sur des pastilles support d'électrolyte. Au niveau matériaux, des électrolytes à base de cérine (en particulier GDC et SDC) ont été utilisés afin de diminuer la température de fonctionnement des piles de type SOFC (par rapport à celles avec un électrolyte YSZ). Des électrodes à propriétés catalytiques bien spécifiques vis à vis du mélange gazeux, ont été aussi étudiés : cermets Ni - GDC ou Ni - SDC pour l'anode, cathodes à base de LSM, BSCF ou SSC. Les poudres initiales ainsi que les couches sérigraphiées ont été caractérisées (analyse de phase, microstructure, stabilité chimique, conductivité électrique...) par diverses méthodes physico-chimiques. Différentes piles ont été élaborées et testées dans un réacteur monochambre sous des mélanges air-propane. L'influence des conditions gazeuses (débit, composition) ainsi que de la température de fonctionnement sur les performances des piles a été étudiée. Compte tenu de nos conditions de test, les performances se sont avérées relativement modestes (densité de puissance maximale de l'ordre de 12 mW.cm-2). Néanmoins, cette étude confirme la validité du concept des piles SOFC monochambres, et a aussi permis de développer un savoir-faire au niveau du laboratoire pour poursuivre les études sur cette thématique.
37
Jons, Mattias. "Doped 3C-SiC Towards Solar Cell Applications." Thesis, Linköpings universitet, Halvledarmaterial, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-148595.
Full textAbstract:
The market for renewable energy sources, and solar cells in particular is growing year by year, as a result there is a large interest in research on new materials and new technologies for solar power applications. In this thesis the photovoltaic properties of cubic silicon carbide (3C-SiC) has been investigated. The research includes material growth using the sublimation epitaxy method, both n-type and p-type SiC have been investigated. 3C-SiC pn junctions have been produced and their electrical properties have been characterized, this is the first time 3C-SiC pn junctions have been studied in the research group. Photoresponse has been demonstrated from a 3C-SiC pn junction with Al and N used as p- and ntype dopants. This is the first demonstrated solar cell performance using 3C-SiC, to our knowledge.
38
Singh, Sherjang. "SiC-C Composite Microelectrode for Biomedical Applications." University of Cincinnati / OhioLINK, 2007. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1170556512.
Full text
39
Štúň, Jaroslav. "Návrh a implementace podnikového intranetového systému." Master's thesis, Vysoké učení technické v Brně. Fakulta podnikatelská, 2008. http://www.nusl.cz/ntk/nusl-221815.
Full textAbstract:
The design and implementation of business intranet system for Hestego s.r.o. company in attempt to enhance the quality and efficiency of internal communication, business culture and awareness of empolyees is the main focus of this thesis. Current status, limited to use of narrow-profiled information system is described as a part of analysis. Furthermore, commonly used practices in implementing business intranet, together with broadly acknowledged advantages for companies are provided. Based on the gained knowledge, a solution relying on implementing an independent intranet system utilizing database system and .NET web application is proposed. Within the practical section, company’s requirements with regards to functionality and design, conforming with provided logo guidelines are presented. As a final part of this thesis, proposed solution is implemented, documented and deployed in corporate enviroment. Moreover, the advantages of proposed solution for the company are evaluated.
40
Stackler, Caroline. "Transformateurs électroniques pour applications ferroviaires." Thesis, Toulouse, INPT, 2019. http://www.theses.fr/2019INPT0015.
Full textAbstract:
Actuellement, la majorité des convertisseurs embarqués dans des trains circulant sous une caténaire alternative est composée d’un transformateur basse fréquence, puis de redresseurs,alimentant des moteurs de traction via des onduleurs de traction. Les inconvénients majeurs de ces structures sont un volume et une masse embarqués importants, dus au transformateur fonctionnant en basse fréquence. Le rendement est également mauvais, à cause des contraintes de volume et de masse. Grâce aux développements des semiconducteurs haute tension et forte puissance et des transformateurs moyenne fréquence, i.e. de l’ordre de quelques kilohertz, de nouvelles topologies de convertisseurs embarqués, appelées transformateurs électroniques, sont à l’étude. Si plusieurs topologies ont déjà été étudiées dans la littérature, elles n’ont jamais été comparées. L’objectif principal de cette thèse est donc de proposer une méthodologie de dimensionnement des différentes topologies de transformateurs électroniques, afin de pouvoir les comparer. Un état de l’art des différentes structures proposées dans la littérature est présenté dans le premier chapitre de ce mémoire. Le chapitre 2 est consacré à la comparaison de structures indirectes. Pour cela, une méthodologie, permettant d’optimiser le dimensionnement de chaque structure afin de maximiser son rendement sous des contraintes de masse et de volume, a été développée. Elle est ensuite appliquée sur des topologies utilisant des MOSFET SiC, contrairement aux structures à IGBT Si développées dans la littérature. L’inductance magnétisante est considérée afin d’assurer un fonctionnement en commutation douce, et ainsi limiter les pertes. Un troisième chapitre propose un filtre actif innovant, intégré aux DC-DC du convertisseur. Celui-ci a pour but de réduire le volume du condensateur de filtrage des bus intermédiaires, et ainsi le volume total du convertisseur, sans dégrader la fiabilité intrinsèque de celui-ci. Son fonctionnement et son impact sur les pertes du DC-DC y sont étudiés. Enfin, le dernier chapitre est dédié à l’étude des interactions entre le convertisseur embarqué et l’infrastructure ferroviaire. Pour cela, des modèles d’infrastructure 25 kV-50 Hz ont été réalisés. Ceux ci comportent notamment un circuit original modélisant l’effet de peau dans la caténaire. Des résonances à certaines fréquences, caractéristiques de la géométrie du réseau et de la position du train sur celui-ci, ont été mises en évidence dans l’impédance vue par le train. Ces modèles ont aussi été implémentés dans un simulateur numérique, pour alimenter une maquette petite échelle de convertisseur. Ce type de test n’a, a priori, jamais été réalisé sur un transformateur électronique. Une conclusion générale et des perspectives sur les travaux présentés concluent ce mémoire<br>Current on-board converters, running on AC catenaries, are mainly composed by a low frequency transformer, then rectifiers, supplying traction motors through three-phase inverters. Due to volume and mass constraints on the converter, the efficiency of the transformer is limited. Moreover, this transformer is quite bulky and heavy. Thanks to the development of high voltage and high power semiconductors, such as Si IGBTs or SiC MOSFETs, and of medium frequency transformer, i.e. operating at a few kilohertz, new topologies of on-board converters, named Power Electronic Traction Transformer (PETT), are studied. Though several structures have been studied in the literature, they have never been compared. The main objective of this thesis is, thus, to develop a methodology to size PETT topologies, in order to compare them. In the first chapter, a state of the art of the PETT structures proposed in literature is presented. The second chapter is dedicated to the comparison of indirect topologies. A methodology, optimising the sizing of each structure to maximise its efficiency under mass and volume constraints, is developed. It is applied on topologies using SiC MOSFETs, contrary to Si IGBT structures developed in the literature. The magnetizing inductance is also considered to insure soft switching and reduce the losses. In the third chapter, an novel active filter, included in the DC-DCs of the converter, is proposed. The aim is to reduce the volume of the filtering capacitors on the intermediate buses, and thus, of the entire converter, without impacting the intrinsic reliability of the converter. Its impact on the losses of the DC-DC is studied. The last chapter deals with the interactions between the on-board converter and the infrastructure. Thus, the 25 kV-50 Hz railway network is modeled. It includes a novel circuit, modelling the skin effect in the catenary. Some resonances, dependant on the sector geometry and the train position, are highlighted in the impedance seen by a train. Moreover, the models are implemented in a numerical simulator to supply a small scale mock-up of a PETT. PHIL tests have, a priori, never been carried on a PETT. A conclusion and some perspectives of future work close thisdissertation
41
Preißler, Steffen. "Skalierbare Ausführung von Prozessanwendungen in dienstorientierten Umgebungen." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2012. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-99727.
Full textAbstract:
Die Strukturierung und Nutzung von unternehmensinternen IT-Infrastrukturen auf Grundlage dienstorientierter Architekturen (SOA) und etablierter XML-Technologien ist in den vergangenen Jahren stetig gewachsen. Lag der Fokus anfänglicher SOA-Realisierungen auf der flexiblen Ausführung klassischer, unternehmensrelevanter Geschäftsprozesse, so bilden heutzutage zeitnahe Datenanalysen sowie die Überwachung von geschäftsrelevanten Ereignissen weitere wichtige Anwendungsklassen, um sowohl kurzfristig Probleme des Geschäftsablaufes zu identifizieren als auch um mittel- und langfristige Veränderungen im Markt zu erkennen und die Geschäftsprozesse des Unternehmens flexibel darauf anzupassen. Aufgrund der geschichtlich bedingten, voneinander unabhängigen Entwicklung der drei Anwendungsklassen, werden die jeweiligen Anwendungsprozesse gegenwärtig in eigenständigen Systemen modelliert und ausgeführt. Daraus resultiert jedoch eine Reihe von Nachteilen, welche diese Arbeit aufzeigt und ausführlich diskutiert. Vor diesem Hintergrund beschäftigte sich die vorliegende Arbeit mit der Ableitung einer konsolidierten Ausführungsplattform, die es ermöglicht, Prozesse aller drei Anwendungsklassen gemeinsam zu modellieren und in einer SOA-basierten Infrastruktur effizient auszuführen. Die vorliegende Arbeit adressiert die Probleme einer solchen konsolidierten Ausführungsplattform auf den drei Ebenen der Dienstkommunikation, der Prozessausführung und der optimalen Verteilung von SOA-Komponenten in einer Infrastruktur.
42
VanSant, April Nelson. "Studies on Hydrogen-Pinch Analysis and Application of COSMO-SAC to Electrolytes." Thesis, Virginia Tech, 2008. http://hdl.handle.net/10919/34828.
Full textAbstract:
This thesis describes the results of two process system engineering studies: (1) hydrogen pinch analysis; and (2) application of COSMO-SAC (conductor-like screening model â segment activity coefficient) to electrolytes. Part (1) presents an automated spreadsheet method that can quickly help minimize fresh hydrogen consumption and maximize hydrogen recovery and reuse in petroleum refineries and petrochemical complexes. Part (1) has appeared as a featured article on engineering practice in the Chemical Engineering Magazine, volume 115, pp. 56-61, June 2008. We present an automated spreadsheet on our research group website (www.design.che.vt.edu) and describe procedures for using the spreadsheet in this thesis. Part (2) discusses the application of the conductor-like screening model â segment activity coefficient (COSMO-SAC), a liquid-phase activity-coefficient model, to electrolytes. We offer detailed procedure for obtaining sigma profiles for electrolytes. A sigma profile is a molecular-specific probability distribution of the surface-charge density, which enables the application of solvation-thermodynamic models to predict vapor-liquid and solid-liquid equilibria, and other properties. We propose to add an additional term to the exchange energy to account for ion-ion attractive and repulsive forces. We also look at the resulting exchange energy behavior. Although accurate numerical results are not achieved, we are able to produce results that match literature data by adding an adjustment factor.<br>Master of Science
43
Liu, Chih-Feng, and 劉智. "Programmable Arbiter Design for SoC Application." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/31696095258507373392.
Full textAbstract:
碩士<br>義守大學<br>電子工程學系<br>92<br>In order to obtain high bandwidth utilization and low latency for on-chip bus communication, a hybrid arbitration algorithm and a programmable arbiter architecture are described in this thesis. The hybrid arbitration algorithm contains static fixed priority algorithm in conjunction with dynamic algorithm to gain low latency in system performance is explained. The implementation of a programmable arbiter to increase the bandwidth utilization is proposed. The analysis of various combinations of the arbitration algorithms indicates a better performance can be achieved as compared with the traditional arbitration assignment scheme. The simulation results of the programmable arbiter are shown on Altera Max Plus II design environment and implementation in Altera EPF10K100ARC240-1 FPGA and verified in ARM AMBA University Kit (AUK) environment.
44
Yang, Yu-Chun, and 楊寓鈞. "FPGA Implementation of Biomedical Application SoC." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/39493766290766325590.
Full textAbstract:
碩士<br>國立交通大學<br>電機與控制工程系所<br>97<br>In the study of biomedical electronics nowadays, processing and analyzing masses of physiological signals in time is a critical issue in real world. In the past, electronic treatment and analysis instruments are very expansive and large. Therefore, the requirement of portable and embedded biomedical electronic product is growing rapidly. Based on these two reasons, this thesis presents a system-on-chip (SoC) design for biomedical applications to provide the integration of systematic resources.
In this thesis, the SOC design for biomedical signal processing is presented. It has the following features. (1) The ability of programmable monitoring and analyzing biomedical signals. (2) The flexibility for further hardware extension. The SoC design is composed of a programmable CPU, biomedical signal processing (BSP) units, system bus, communication, and display interface. The programmable CPU manages the process schedule and I/O control. The BSP unit is treated as digital signal processing (DSP) cores which can separate and analyze physiological signals. The system bus makes it flexible to add or to remove DSP IPs.
By experimental results, the proposed design implemented on FPGA can achieve real-time analysis and waveform displays under at 100 MHz. Comparison with other high-speed DSP processors, the system presents some optimization such as less execution cycles, lower power consumption, use of fewer PCB area. Finally, the SoC design is demonstrated in this thesis with the Altera DE2 development board. The whole design is consisted of 29,640 logic elements.
45
Yu-kuang, Lien. "Application-Aware On-Chip Networking System Design for SoC Applications." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2606200617213900.
Full text
46
Lien, Yu-kuang, and 連育廣. "Application-Aware On-Chip Networking System Design for SoC Applications." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/48854309733743991887.
Full textAbstract:
碩士<br>國立臺灣大學<br>電子工程學研究所<br>94<br>As the complexity of SoC systems is increasing, it is hard to interconnect a variety of IPs. OCN (On-Chip Networking) system is a new method to solve the chip communication problems. Based upon pre-defined components and architecture, we can build a high performance and reliable communication environment. Currently, OCN system adopts simple or fixed architectures, such as star and mesh. However, these architectures may cause inefficient bandwidth usage and high hardware cost. Therefore, analytical decision and performance evaluation for OCN system are important issues before implementation.
The goal of this thesis is to map SoC to OCN and optimize the hardware cost. We propose an application-aware design flow and approaches, called AMAP. Due to the differences between SoC Applications, we analyze the requirements of SoC applications. In view of that deciding the location of each IP on OCN system is very important, we propose binomial mapping algorithm to get a fast and efficient 2D-mesh topology. According to the traffic load after mapping, we propose several approaches to optimize the hardware cost and improve the OCN utilization. By using the proposed binomial mapping algorithm, we can save 37% traffic load and 46% Hop. Moreover, we can save 75~87.5% hardware cost by the optimization approaches under bandwidth constraints. Furthermore, the OCN architecture is successfully verified on established infrastructure, CoWare ConvergenSC and FPGA platform.
47
MITTAL, PULKIT. "BUS CONTROLLED AMBA 2.0 AHB2APB BRIDGE FOR SOC APPLICATION." Thesis, 2022. http://dspace.dtu.ac.in:8080/jspui/handle/repository/19122.
Full textAbstract:
The AMBA (Advanced Microcontroller Bus Architecture) is an open SOC (System-on-Chip) bus
protocol to strengthen the reusability of IP core, for high-performance buses to communicate with
low-power devices by communication through the connection of different functional blocks (or
IP), and using multiple controllers and peripherals, we can develop multiprocessor unit. This
Research paper explains the implementation of AHB to APB Bridge. The bridge provides a
communication interface between AMBA AHB v2.0 Masters and APB v2.0 slaves and
parameterized data bus for AHB master and APB slaves. It supports transfers even when AHB
transfer size and APB data bus width is not equal and AHB and APB interfaces work in separate
independent clock domains. It has inbuilt cross-domain synchronization with parameterized
number of synchronization stages. The design supports multi master and multi slave configuration.
To perform functional and timing simulation, we are using System Verilog on Xilinx VIVADO
Tool.
48
Der-WeiYang and 楊得煒. "Advanced Architecture and Application Development of Video SoC." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/qt8b76.
Full text
49
Chang, Shao-Pin, and 張紹斌. "Design of LCD Driver IP for SOC Application." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/42397719932832050845.
Full textAbstract:
碩士<br>義守大學<br>電子工程學系<br>92<br>In this thesis, we proposed a Memory Map LCD driver IP design based on the conventional B-type driving method. In the proposed LCD driver IP architecture, the display data RAM is improved as memory array composed of 4 banks which allows the central processor can access the other memory banks even the display is progressing, then the use of bus become more flexible. The methodology to integrate the proposed LCD driver IP in System-On-Chip (SOC) as an AMBA AHB slave component is also described. In order to communicate with the Example AMBA System (EASY) which is based on ARM922T processor, an AMBA AHB slave wrapper is designed for the proposed LCD driver. The stand alone LCD driver IP is simulated and verified in ISE environment. The embedded LCD driver IP is also simulated by running the ARM922T Design Sign-off Model (DSM) in EASY system. The results indicate that the proposed LCD driver IP is capable for SOC applications as in AMBA system.
50
Chiu, Tzu-Yao, and 邱子耀. "Image Enhancement Application Implemented on an All Programmable SoC Platform." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/ctu6pk.
Full textAbstract:
碩士<br>國立臺灣科技大學<br>電子工程系<br>106<br>There are many kinds of image/vision devices surrounding us, includes environment / crowd surveillance and monitoring, real-time imaging record of personal mobile devices, or around-view system of vehicles, etc... How to perform vision display, video data storage, subject recognition and video processing functions? This is the design concept of smart vision systems.
For the hardware architecture design of smart vision system, we need optical devices such as video cameras, light sensors and optical transceivers/receivers. We also need a high-performance processor platform for image format transformation, data analysis and calculation. It requests algorithms for such tasks.
Xilinx Zynq SoC (System on Chip) platform is suitable for high-performance requests of smart vision systems. It contains ARM Cortex A9 dual-core processor, 29K to 85K LUTs (Look-Up-Table) logic units, support high-performance processing ability and many kinds of video/data interfaces. And we can implement embedded design blocks or control units in FPGA (Field Programmable Gate Array) to achieve high-flexibility design requirements.
We discussed how to migirate the image enhancement application program to all programmable SoC platform in this paper. I selected SVDK (Smart Vision Development Kit) for hardware development platform and Xilinx Vivado tool for software developing environment. First, we integrated the image enhancement IP into Zynq platform, and then go to capture image data from the high-resolution camera. Then we can do image pre-processing progress in Zynq platform. We learned how to get different performances through different image processing progresses/algorithms. In the end, we summarized the user experience and the conclusion.