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Journal articles on the topic 'Software co-design'

Author: Grafiati

Published: 4 June 2021

Last updated: 25 July 2025

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1

Mills, Mike, and Greg Peterson. "Hardware/software co-design." ACM SIGAda Ada Letters XVIII, no. 6 (1998): 18–27. http://dx.doi.org/10.1145/301687.289528.

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2

De Michell, G., and R. K. Gupta. "Hardware/software co-design." Proceedings of the IEEE 85, no. 3 (1997): 349–65. http://dx.doi.org/10.1109/5.558708.

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3

Aronsson, Markus, and Mary Sheeran. "Hardware software co-design in Haskell." ACM SIGPLAN Notices 52, no. 10 (2017): 162–73. http://dx.doi.org/10.1145/3156695.3122970.

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4

Edwards, M. D., J. Forrest, and A. E. Whelan. "Acceleration of software algorithms using hardware/software co-design techniques." Journal of Systems Architecture 42, no. 9-10 (1997): 697–707. http://dx.doi.org/10.1016/s1383-7621(96)00071-9.

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5

Mian, Riaz-ul-haque, Michihiro Shintani, and Michiko Inoue. "Hardware–Software Co-Design for Decimal Multiplication." Computers 10, no. 2 (2021): 17. http://dx.doi.org/10.3390/computers10020017.

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Decimal arithmetic using software is slow for very large-scale applications. On the other hand, when hardware is employed, extra area overhead is required. A balanced strategy can overcome both issues. Our proposed methods are compliant with the IEEE 754-2008 standard for decimal floating-point arithmetic and combinations of software and hardware. In our methods, software with some area-efficient decimal component (hardware) is used to design the multiplication process. Analysis in a RISC-V-based integrated co-design evaluation framework reveals that the proposed methods provide several Pareto

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6

Chen, Andrew, Rohaan Gupta, Anton Borzenko, Kevin Wang, and Morteza Biglari-Abhari. "Accelerating SuperBE with Hardware/Software Co-Design." Journal of Imaging 4, no. 10 (2018): 122. http://dx.doi.org/10.3390/jimaging4100122.

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Background Estimation is a common computer vision task, used for segmenting moving objects in video streams. This can be useful as a pre-processing step, isolating regions of interest for more complicated algorithms performing detection, recognition, and identification tasks, in order to reduce overall computation time. This is especially important in the context of embedded systems like smart cameras, which may need to process images with constrained computational resources. This work focuses on accelerating SuperBE, a superpixel-based background estimation algorithm that was designed for sim

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7

Kent, K. B., M. Serra, and N. Horspool. "Hardware/software co-design for virtual machines." IEE Proceedings - Computers and Digital Techniques 152, no. 5 (2005): 537. http://dx.doi.org/10.1049/ip-cdt:20041264.

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8

Gómez-Pulido, Juan A. "Recent advances in Hardware/Software co-design." Journal of Systems Architecture 56, no. 8 (2010): 303–4. http://dx.doi.org/10.1016/j.sysarc.2010.06.008.

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9

Wirth, Niklaus. "Hardware/software co-design then and now." Information Processing Letters 88, no. 1-2 (2003): 83–87. http://dx.doi.org/10.1016/s0020-0190(03)00385-5.

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10

Wolf, W. H. "Hardware-software co-design of embedded systems." Proceedings of the IEEE 82, no. 7 (1994): 967–89. http://dx.doi.org/10.1109/5.293155.

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11

Barua, Anomadarshi, and Mohammad Abdullah Al Faruque. "Hardware/Software Co-Design for Sensor Security." Computer 56, no. 5 (2023): 122–25. http://dx.doi.org/10.1109/mc.2023.3248779.

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12

Alecsa, Bogdan, and Alexandru Onea. "Hardware-Software Co-Design for BLDC Motor Speed Controller Design." Advanced Materials Research 463-464 (February 2012): 1256–59. http://dx.doi.org/10.4028/www.scientific.net/amr.463-464.1256.

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This paper proposes a combined hardware-software approach for a controller design. The case of a brushless DC (BLDC) motor speed controller is studied. A hardware controller is implemented inside a field programmable gate array (FPGA) device, together with soft core processors that implement by software non-critical tasks, like liquid crystal display (LCD) interface and serial data communication to a host computer. This way, the control algorithm is executed in hardware, as fast as possible, while the monitoring tasks are performed by the software. Experimental results are provided, showing th

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13

Abid, M., T. Ben Ismail, A. Changuel, et al. "Hardware/Software Co-Design Methodology for Design of Embedded Systems." Integrated Computer-Aided Engineering 5, no. 1 (1998): 69–84. http://dx.doi.org/10.3233/ica-1998-5106.

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14

Xiaoying Liang. "Information System Security Design Using Hardware/Software Co-design Technology." International Journal of Digital Content Technology and its Applications 6, no. 8 (2012): 351–60. http://dx.doi.org/10.4156/jdcta.vol6.issue8.41.

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15

Yang, Shufan, and Zheqi Yu. "A Highly Integrated Hardware/Software Co-Design and Co-Verification Platform." IEEE Design & Test 36, no. 1 (2019): 23–30. http://dx.doi.org/10.1109/mdat.2018.2841029.

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16

Phanomchoeng, Gridsada, Muhammad Saadi, Pruk Sasithong, Jedsada Tangmongkhonsuk, Sanika K. Wijayasekara, and Lunchakorn Wuttisittikulkij. "Hardware Software Co-Design of a Farming Robot." Engineering Journal 24, no. 1 (2020): 199–208. http://dx.doi.org/10.4186/ej.2020.24.1.199.

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17

Bolsens, I., H. J. De Man, B. Lin, K. Van Rompaey, S. Vercauteren, and D. Verkest. "Hardware/software co-design of digital telecommunication systems." Proceedings of the IEEE 85, no. 3 (1997): 391–418. http://dx.doi.org/10.1109/5.558713.

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18

Krawczyk, Kamil, Paweł Tomaszewicz, and Mariusz Rawski. "Whirlpool SoPC Implementation - Hardware/Software Co-Design Example." International Journal of Electronics and Telecommunications 58, no. 1 (2012): 21–26. http://dx.doi.org/10.2478/v10177-012-0003-9.

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Whirlpool SoPC Implementation - Hardware/Software Co-Design Example The aim of this work was to design a System on Programmable Chip (SoPC), that implements the Whirlpool Hash Function (WHF) algorithm. An assumption of the project was to use an embedded soft-processor NIOS II controlling the whole system, which functionality was extended by a custom logic in order to improve the used algorithm efficiency. This paper presents the Whirlpool Hash Function realized in several SoPC configurations, which differ in implementation complexity and performance.

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19

Sheliga, Michael, and Edwin Hsing-Mean Sha. "Hardware/Software co-design with the HMS framework." Journal of VLSI signal processing systems for signal, image and video technology 13, no. 1 (1996): 37–56. http://dx.doi.org/10.1007/bf00930666.

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20

Hatano, Takahiro, Koji Yamazaki, and Akihiko Miyazaki. "Hardware/Software Co-design Technology for Network Virtualization." NTT Technical Review 14, no. 1 (2016): 52–57. http://dx.doi.org/10.53829/ntr201601fa7.

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21

Baldwin, Brian, Raveen R. Goundar, Mark Hamilton, and William P. Marnane. "Co- $$Z$$ ECC scalar multiplications for hardware, software and hardware–software co-design on embedded systems." Journal of Cryptographic Engineering 2, no. 4 (2012): 221–40. http://dx.doi.org/10.1007/s13389-012-0042-2.

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22

Yong Zhang, Kai Kuang Ma, and Qindong Yao. "A software/hardware co-design methodology for embedded microprocessor core design." IEEE Transactions on Consumer Electronics 45, no. 4 (1999): 1241–46. http://dx.doi.org/10.1109/30.809214.

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23

Bonilla Oliva, Delcy Carolina, István Koren, and Ralf Klamma. "Infrastructuring for Crowdsourced Co-Design." Interaction Design and Architecture(s), no. 42 (September 20, 2019): 183–201. http://dx.doi.org/10.55612/s-5002-042-009.

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User satisfaction determines the quality of a product idea. Yet it is hard to accomplish when designers are isolated from their users, creating a gap in the design practices. Co-design seeks to meet the needs of users by giving them a voice in the design process. Technology-enhanced learning provides an ideal testbed, as co-design practices on learning content are well-established between instructors, e.g. in instructional design. The challenges are first to convene geographically distributed users to collaborate on design of software applications and second to scale up to a high number of use

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24

Xiaoying Liang. "Hardware Software Co-Design for JPEG Encoder Test Bench." INTERNATIONAL JOURNAL ON Advances in Information Sciences and Service Sciences 4, no. 2 (2012): 258–66. http://dx.doi.org/10.4156/aiss.vol4.issue2.32.

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25

Heinrich, M., D. Ofelt, M. A. Horowitz, and J. Hennessy. "Hardware/software co-design of the Stanford FLASH multiprocessor." Proceedings of the IEEE 85, no. 3 (1997): 455–66. http://dx.doi.org/10.1109/5.558720.

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26

Kotra, Jagadish B., Narges Shahidi, Zeshan A. Chishti, and Mahmut T. Kandemir. "Hardware-Software Co-design to Mitigate DRAM Refresh Overheads." ACM SIGOPS Operating Systems Review 51, no. 2 (2017): 723–36. http://dx.doi.org/10.1145/3093315.3037724.

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27

Kotra, Jagadish B., Narges Shahidi, Zeshan A. Chishti, and Mahmut T. Kandemir. "Hardware-Software Co-design to Mitigate DRAM Refresh Overheads." ACM SIGPLAN Notices 52, no. 4 (2017): 723–36. http://dx.doi.org/10.1145/3093336.3037724.

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28

Kotra, Jagadish B., Narges Shahidi, Zeshan A. Chishti, and Mahmut T. Kandemir. "Hardware-Software Co-design to Mitigate DRAM Refresh Overheads." ACM SIGARCH Computer Architecture News 45, no. 1 (2017): 723–36. http://dx.doi.org/10.1145/3093337.3037724.

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29

López, M., J. Daugman, and E. Cantó. "Hardware–software co-design of an iris recognition algorithm." IET Information Security 5, no. 1 (2011): 60. http://dx.doi.org/10.1049/iet-ifs.2009.0267.

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30

Keen, Diana, and Frederic T. Chong. "Hardware-software co-design of embedded sensor-actuator networks." ACM SIGARCH Computer Architecture News 30, no. 3 (2002): 5–6. http://dx.doi.org/10.1145/571666.571669.

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31

Li, Shih-An, Chen-Chien Hsu, Ching-Chang Wong, and Chia-Jun Yu. "Hardware/software co-design for particle swarm optimization algorithm." Information Sciences 181, no. 20 (2011): 4582–96. http://dx.doi.org/10.1016/j.ins.2010.07.017.

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32

Tsai, Tsung-Han, Ya-Chau Yang, and Chun-Nan Liu. "A Hardware/Software Co-Design of MP3 Audio Decoder." Journal of VLSI signal processing systems for signal, image and video technology 41, no. 1 (2005): 111–27. http://dx.doi.org/10.1007/s11265-005-6254-2.

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33

YAMAMOTO, Setsuo. "The Trend of Mechanism/Electronics/Software Co-design Technologies." Journal of the Japan Society for Precision Engineering 72, no. 12 (2006): 1461–64. http://dx.doi.org/10.2493/jjspe.72.1461.

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34

Al-Somani, Turki F., Esam A. Khan, Ahmad M. Qamar-ul-I, and Hilal Houssain. "Hardware/Software Co-Design Implementations of Elliptic Curve Cryptosystems." Information Technology Journal 8, no. 4 (2009): 403–10. http://dx.doi.org/10.3923/itj.2009.403.410.

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35

Imani, Mohsen, Ricardo Garcia, Saransh Gupta, and Tajana Rosing. "Hardware-Software Co-design to Accelerate Neural Network Applications." ACM Journal on Emerging Technologies in Computing Systems 15, no. 2 (2019): 1–18. http://dx.doi.org/10.1145/3304086.

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36

Kaiser, Benjamin, and Alexander Verl. "Software Defined Manufacturing und Co-Design für den Holzbau." atp magazin 65, no. 10 (2023): 48–55. http://dx.doi.org/10.17560/atp.v65i10.2695.

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Die Bauwirtschaft steht aufgrund des hohen Ressourcenbedarfs, des Fachkräftemangels sowie des steigenden Bedarfs an bezahlbarem Wohnraum vor großen Herausforderungen. Im Vergleich zum Maschinenbau und zur Automobilindustrie weist die Bauindustrie einen geringen Automatisierungsgrad auf. Computergestützte Planung und robotergestützte Vorfertigung bieten jedoch ein großes Potenzial zur Lösung dieser Probleme im Bauwesen. Für den Holzbau gilt dies aufgrund des nachwachsenden Rohstoffs Holz und der Möglichkeit der Vorfertigung in besonderem Maße. Das Exzellenzcluster IntCDC - ”Integratives Compute

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37

Abid, Mohamed, and Rached Tourki. "Design of telecommunication electronic systems using a hardware/software co-design methodology." International Journal of Electronics 88, no. 3 (2001): 255–70. http://dx.doi.org/10.1080/00207210010006074.

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38

Muttillo, Vittoriano, Luigi Pomante, Marco Santic, and Giacomo Valente. "System C-based Co-Simulation/Analysis for System-Level Hardware/Software Co-Design." Computers and Electrical Engineering 110 (September 2023): 108803. http://dx.doi.org/10.1016/j.compeleceng.2023.108803.

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39

Contreras, Luis, Sérgio Cruz, J. M. S. T. Motta, and Carlos H. Llanos. "Hardware and Software Co-design for the EKF Applied to the Mobile Robotics Localization Problem." International Journal of Machine Learning and Computing 5, no. 2 (2015): 101–5. http://dx.doi.org/10.7763/ijmlc.2015.v5.491.

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40

Priya, S. Sathiya, and J. G. R. Sathiaseelan. "Real Time Glaucoma Prediction Using Y-UNet Classifier via Hardware Software Co-Design SMART System." Indian Journal of Science and Technology 15, no. 3 (2022): 115–26. http://dx.doi.org/10.17485/ijst/v15i3.2174.

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41

Yin, Hang, Yong Ming Gao, Chao Wang, and Xin Xing Li. "The Design and Implementation of Spacecraft Co-Simulation Platform." Advanced Materials Research 591-593 (November 2012): 174–78. http://dx.doi.org/10.4028/www.scientific.net/amr.591-593.174.

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With the continuous improvement of complexity in the space simulation system and the enhancement of multi-technology integration, the co-simulation technology is an important way to solve complex simulation problems in the big system. After analysis of relative theories and main methods of co-simulation, collaboration data interfaces among multiple software are improved and matched with a number of simulation software system. The co-simulation framework is designed and a set of spacecraft dynamics co-simulation analysis system is established on the frame of HLA / RTI and on the principle of co

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42

S, Hemalatha, Yalini R, Arun Prasath M.M., and Sunil Kumar Yadav. "DESIGN AND OPTIMIZATION OF HARDWARE-SOFTWARE CO-DESIGN FOR REAL-TIME EMBEDDED SYSTEMS." ICTACT Journal on Microelectronics 9, no. 2 (2023): 1545–50. https://doi.org/10.21917/ijme.2023.0269.

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In recent years, quantum cell automata (QCA) has emerged as a promising optimization technique for real-time embedded systems design. QCA leverages quantum computing principles to perform parallel and coherent computations, enabling efficient exploration of vast solution spaces. This paper explores the application of QCA in the hardware-software co-design of real-time embedded systems, aiming to achieve enhanced performance, reduced power consumption, and improved reliability. The study investigates the partitioning of tasks between hardware and software, the design of hardware accelerators, a

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43

Wang, Tao, Li Wen Wang, and Qing Jian Liu. "Research on Software-Hardware Co-Design of Reconfigurable CNC System." Advanced Materials Research 204-210 (February 2011): 458–63. http://dx.doi.org/10.4028/www.scientific.net/amr.204-210.458.

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The reconfiguration technology of CNC system is divided into two interactive levels: hardware system reconfiguration and software system reconfiguration. The hardware system reconfiguration is based on a rapid field programming of Field which is performed with different FPGA configuration files. Meanwhile, software system reconfiguration is conducted through design, modification, selection and configuration of different databases on a guiding software reconfiguration development platform. Then, the software-hardware co-design of the system reconfiguration is discussed. Finally, an application

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44

Jolak, Rodi, Maxime Savary-Leblanc, Manuela Dalibor, et al. "Software engineering whispers: The effect of textual vs. graphical software design descriptions on software design communication." Empirical Software Engineering 25, no. 6 (2020): 4427–71. http://dx.doi.org/10.1007/s10664-020-09835-6.

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Abstract Context Software engineering is a social and collaborative activity. Communicating and sharing knowledge between software developers requires much effort. Hence, the quality of communication plays an important role in influencing project success. To better understand the effect of communication on project success, more in-depth empirical studies investigating this phenomenon are needed. Objective We investigate the effect of using a graphical versus textual design description on co-located software design communication. Method Therefore, we conducted a family of experiments involving

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45

Feng, Xiao Jing, Xi Li, Wang Chao, Xue Hai Zhou, and Jun Neng Zhang. "A Hardware/Software Co-Design Flow for Dynamic Partial Reconfiguration." Advanced Materials Research 433-440 (January 2012): 5172–77. http://dx.doi.org/10.4028/www.scientific.net/amr.433-440.5172.

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The strict requirements on both performance and flexibility lead us to apply Dynamic Partial Reconfiguration (DPR) technology in embedded systems. However, existing DPR design flows are still immature, since previous works mainly focus on hardware designs while ignore software designs for DPR. To remedy this weakness, this paper proposes a hardware/software (HW/SW) co-design flow for DPR. The co-design flow aims at accelerating the process of DPR designs, and it merges software and hardware design flows to make them operate in parallel. Besides, in order to validate the effectiveness of our co

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46

Nedjah, Nadia, and Luiza Mourelle. "Software/Hardware Co-Design of Efficient and Secure Cryptographic Hardware." JUCS - Journal of Universal Computer Science 11, no. (1) (2005): 66–82. https://doi.org/10.3217/jucs-011-01-0066.

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Most cryptography systems are based on the modular exponentiation to perform the non-linear scrambling operation of data. It is performed using successive modular multiplications, which are time consuming for large operands. Accelerating cryptography needs optimising the time consumed by a single modular multiplication and/or reducing the total number of modular multiplications performed. Using a genetic algorithm, we first yield the minimal sequence of powers, generally called addition chain, that need to be computed to finally obtain the modular exponentiation result. Then, we exploit the co

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47

Zhou, Zhen, Debiao He, Zhe Liu, Min Luo, and Kim-Kwang Raymond Choo. "A Software/Hardware Co-Design of Crystals-Dilithium Signature Scheme." ACM Transactions on Reconfigurable Technology and Systems 14, no. 2 (2021): 1–21. http://dx.doi.org/10.1145/3447812.

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As quantum computers become more affordable and commonplace, existing security systems that are based on classical cryptographic primitives, such as RSA and Elliptic Curve Cryptography ( ECC ), will no longer be secure. Hence, there has been interest in designing post-quantum cryptographic ( PQC ) schemes, such as those based on lattice-based cryptography ( LBC ). The potential of LBC schemes is evidenced by the number of such schemes passing the selection of NIST PQC Standardization Process Round-3. One such scheme is the Crystals-Dilithium signature scheme, which is based on the hard module-

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48

Yantır, Hasan Erdem, Ahmed M. Eltawil, and Khaled N. Salama. "A hardware/software co-design methodology for in-memory processors." Journal of Parallel and Distributed Computing 161 (March 2022): 63–71. http://dx.doi.org/10.1016/j.jpdc.2021.10.009.

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49

Lin, Shun-Chieh, Jia-Ching Wang, Hsueh-Wei Yang, and Jhing-Fa Wang. "Hardware-software co-design of a speech translation embedded system." Journal of Embedded Computing 3, no. 2 (2009): 119–29. http://dx.doi.org/10.3233/jec-2009-0085.

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50

Yan, Wei, Wenxian Wu, Yan Shao, and Jing An. "Achievement of Virtual Reality System by Hardware/Software Co-Design." Sensor Letters 12, no. 2 (2014): 260–63. http://dx.doi.org/10.1166/sl.2014.3263.

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