Journal articles on the topic 'Solder and soldering Thermal fatigue'
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1
Wu, Y. P., P. L. Tu, and Yan C. Chan. "The Effect of Solder Paste Volume and Reflow Ambient Atmosphere on Reliability of CBGA Assemblies." Journal of Electronic Packaging 123, no. 3 (July 7, 1999): 284–89. http://dx.doi.org/10.1115/1.1371782.
Abstract:
To investigate the effect of stencil thickness and reflow ambient atmosphere on the reliability of ceramic ball grid array (CBGA) assemblies, three levels of stencil thickness, 0.10, 0.15, and 0.20 mm, were used to print solder paste on printed circuit board (PCB). After the CBGA modules were placed on PCBs, the specimens were divided into two groups, and reflowed in nitrogen and compressed air separately. Properties of the six groups of assemblies, such as shear strength, bending fatigue life, thermal shock cycles, and vibration fatigue life, were tested to find out the optimum assembling process. The results show that assemblies prepared with a stencil 0.15 mm thick yield maximized performance. And the nitrogen ambient atmosphere demonstrates a remarkable effect on improving the fatigue life. Theoretical models are given to qualitatively explain the relationship between the solder joint volume and performance. This work provides a guideline on how to determine the soldering process parameters of CBGA assemblies.
2
Min, Seung Jae, and Hyoung Seok Lee. "Modeling and Analysis of Lead Frame Structure in Electronic Packaging Using Java and ANSYS." Key Engineering Materials 306-308 (March 2006): 1055–60. http://dx.doi.org/10.4028/www.scientific.net/kem.306-308.1055.
Abstract:
As the larger capacity and smaller packaging size are required in the design of a semiconductor, areas and pitches of solder joints have been miniaturized. Therefore the importance of bondability and reliability in soldering technique for the printed circuit board design has been increased since the fatigue failure has been observed at the place between the lead frame and solder joints. To evaluate thermal reliability of SMD type electronic packaging such as SOIC, PLCC and BGA, an exclusive module for modeling a lead frame structure is developed using JavaScript and the thermal stress analysis is performed using ANSYS. A modeling program with GUI can define geometric dimensions of an electronic packaging, assign material properties of a lead frame and a solder and apply boundary conditions. A seamless integration between modeling and analysis is achieved by implementing an interface program to generate an analysis model of a lead frame structure directly from the model information. Heat transfer analysis and stress analysis considering thermal loading are carried out in ANSYS and the results are exploited to estimate the fatigue life of a lead frame based on the S-N curve. The effect of different lead frame materials is examined to identify the mechanical characteristics and the different shapes of the lead frame with same SMD type are investigated to distinguish the reliability.
3
NISHIURA, Masataka. "Comparison between Soldering Property and Mechanical-Thermal Fatigue Property of Pb Contained Solder and Sn-Ag-Cu Series Solder Alloy." Journal of Japan Institute of Electronics Packaging 3, no. 6 (2000): 509–14. http://dx.doi.org/10.5104/jiep.3.509.
4
Lei, Thomas G., Jesus Calata, Shu Fang Luo, Guo Quan Lu, and Xu Chen. "Low-Temperature Sintering of Nanoscale Silver Paste for Large-Area Joints in Power Electronics Modules." Key Engineering Materials 353-358 (September 2007): 2948–53. http://dx.doi.org/10.4028/www.scientific.net/kem.353-358.2948.
Abstract:
Today, reflow soldering is a commonly used technique to establish large-area joints in power electronics modules. These joints are needed to attach large-area (>1 cm2) power semiconductor chips to the substrate, e.g., a direct-bond copper substrate, and the multichip module substrate to a copper base plate for heat spreading. Thermal performance, specifically thermal conductivity and thermomechanical reliability, of these large-area joints are critical to the electrical performance and lifetime of the power modules. Soft solder alloys, including the lead-tin eutectic and lead-free alternatives, have low thermal conductivities and are highly susceptible to fatigue failure. As demands mount for higher power density, higher junction temperature, and longer lifetime out of the power modules, reliance on solder-based joining is becoming a barrier for further advancement in power electronics systems. Recently, we successfully demonstrated lowtemperature sintering of nanoscale silver paste as a lead-free solution for achieving highperformance, high-reliability, and high-temperature interconnection of small devices (<0.09 cm2). In this paper, we report the results of our study to extend the low-temperature sintering technique to large-area joints. The study involved redesigning the organic and inorganic components of the nanoscale silver paste, analyzing the burnout kinetics of the various organic species sandwiched between large-area plates, and developing desirable temperature-time profile to improve sintering and bonding strength of the joints.
5
Micol, Alexandre, Adrien Zéanh, Olivier Dalverny, and Moussa Karama. "Identification of the Sn96.5Ag3.5 Law Behavior with the Scatter of the Parameters - Study of Aeronautical Application in Power Module." Advanced Materials Research 112 (May 2010): 83–92. http://dx.doi.org/10.4028/www.scientific.net/amr.112.83.
Abstract:
This work studies the reliability of power electronic component in aeronautical environment to the ageing eect of the thermal cycling. The structure fatigue is sensitive to the process assembly conditions especially of the soldering process. To correclty evaluate the reliability of the power module, the identication of the solder behavior is one of the rst steps. Anand Model is here identied. Experimental test have to be established to evaluate the parameters of the law. A srt study is made to evaluate the indetiability of the law according to the dierent experimantal test. Then, the scatter of the parameters is evaluated in a context of time series. In the end, the scatter of the parameters is included in a nite element model to understand the inuence of this scatter on the evaluation of the number of cycle before failure.
6
SHI, JIANWEI, PENG HE, and XIAOCHUN LV. "CONTROLLING AND OPTIMIZATION OF THERMAL PROFILE IN REFLOW SOLDERING." International Journal of Modern Physics B 23, no. 06n07 (March 20, 2009): 1949–55. http://dx.doi.org/10.1142/s0217979209061883.
Abstract:
Heating factor, Q is a quantitative parameter describing a process of reflow soldering. It can be used to evaluate a reflow soldering process and the reliability of solder joints. The value of Q is directly related to the energy absorbed by solder joint during heating and the morphology of Intermetallic Compound formed at the interface between solder and pad. Electronic product manufacturers use heating factor as a technical evaluation parameter to guide the adjustment of reflow soldering process and the optimization of reflow soldering curve, to ensure the best reliability of the circuit board. Solder paste manufacturers use heating factor to represent characteristics of their reflow soldering products, and to customize products according to consumer's requests. Equipment manufacturers for reflow soldering use heating factor as an important controlling parameter to establish automatic system for managing solder joint reliability. A reliable soldering result can be achieved using the automatic reflow management system, to control and optimize thermal profile, which leads to the adjustment of the heating factor.
7
Dziurdzia, Barbara, and Janusz Mikolajek. "X-ray inspection and Six-Sigma in analysis of LED thermal pad coverage." Soldering & Surface Mount Technology 29, no. 1 (February 6, 2017): 28–33. http://dx.doi.org/10.1108/ssmt-10-2016-0028.
Abstract:
Purpose The purpose of this paper is to evaluate selected methods of reduction voidings in lead-free solder joints underneath thermal pads of light-emitting diodes (LEDs), using X-ray inspection and Six Sigma methodology. Design/methodology/approach On the basis of cause and effect diagram for solder voiding, the potential causes of voids and influence of process variables on void formation were found. Three process variables were chosen: the type of reflow soldering, vacuum incorporation and the type of solder paste. Samples of LEDs were mounted with convection and vapour phase reflow soldering. Vacuum was incorporated into vapour phase soldering. Two types of solder pastes OM338PT and LFS-216LT were used. Algorithm incorporated into X-ray inspection system enabled to calculate the statistical distribution of LED thermal pad coverage and to find the process capability index (Cpk) of applied soldering techniques. Findings The evaluation of selected soldering processes of LEDs in respect of their thermal pad coverage and statistical Cpk indices is presented. Vapour-phase soldering with vacuum is capable (Cpk > 1) for OM338PT and LFS-216LT paste. Convection reflow without vacuum with LFS-216LT paste is also capable (Cpk = 1.1). Other technological soldering processes require improvements. Vacuum improves radically the capability of a reflow soldering for an LED assembly. When vacuum is not accessible, some improvement of capability to a lower extent is possible by an application of void-free solder pastes. Originality/value Six Sigma statistical methodology combined with X-ray diagnosis was used to check whether applied methods of void reduction underneath LED thermal pads are capable processes.
8
Hanss, Alexander, and Gordon Elger. "Residual free solder process for fluxless solder pastes." Soldering & Surface Mount Technology 30, no. 2 (April 3, 2018): 118–28. http://dx.doi.org/10.1108/ssmt-10-2017-0030.
Abstract:
Purpose For soldering, flux is essential because it enables the wetting of the molten solder. Fluxless soldering, i.e. residue-free soldering with the aid of gaseous activators, has been known for many years, but is only well established in the field of opto- and microwave electronics where the solder is applied as preform. In high-volume SMD applications where solder paste is printed, this technology is rarely used until now. The reducing effect of a gaseous activator like formic acid vapor on certain solder alloys is known in practice. However, the corresponding reactions which occur under soldering conditions in nitrogen atmosphere have so far not been systematically investigated for different solder alloys. This study aims to analyze the different chemical reaction channels which occur on the surface of different solders, i.e. catalytical dissociation of formic acid on the pure or oxidized metal surface and the formation and evaporation of metal formates. Based on this analysis, a residue-free solder process under formic acid is developed for solder paste applications. Design/methodology/approach In this paper, different solder alloys (SnAgCu, SnPb, BiSn, In) were analyzed with thermal gravimetric analysis (TGA) under formic acid flow. Details on mass change depending on the soldering temperature are presented. Activation temperatures are estimated and correlated to the soldering processes. Based on the analysis, fluxless solder pastes and suitable soldering processes are developed and presented. Major paste properties such as printability are compared to a commercial flux solder paste. High-power flip chip LEDs which can be assembled directly on a printed circuit board are used to demonstrate the fluxless soldering. Likewise, the soldering results of standard paste and fluxless paste systems after a reflow process are evaluated and compared. Findings The experimental results show that TGA is an efficient way to gain deeper understanding of the redox processes which occur under formic acid activation, i.e. the formation of metal formates and their evaporation and dissociation. It is possible to solder residue-free not only with preforms but also with a fluxless solder paste. The resulting solder joints have the same quality as those for standard solder paste in terms of voids detected by X-ray and mechanical shear strength. Originality/value In the fluxless soldering process, the reduction of oxide layers, and therefore the wetting of the solder spheres, is enabled by gaseous formic acid. After the soldering process, no cleaning process is necessary because no corrosive residues are left on the circuit boards and components. Therefore, soldering using solder paste without aggressive chemical ingredients has a high market potential. Expensive preforms could be replaced by paste dispensing or paste printing.
9
Sitek, Janusz, Marek Koscielski, Janusz Borecki, and Tomasz Serzysko. "The dependence of reliability and mechanical strength of the solder joints in 3D PoP structures from sizes of solder powders applied in soldering materials." Soldering & Surface Mount Technology 29, no. 1 (February 6, 2017): 23–27. http://dx.doi.org/10.1108/ssmt-10-2016-0024.
Abstract:
Purpose The purpose of this paper is to evaluate the influence of solder powders sizes applied in soldering materials used for Package-on-Package (PoP) system manufacture as well as other factors on reliability and mechanical strength of created solder joints in three-dimensional (3D) PoP structures. Design/methodology/approach The design of experiments based on the Genichi Taguchi method were used in the investigation. The main factors covered different printed circuit board (PCB) coatings, soldering materials with solder powders sizes from Types 3 to 7 and soldering profiles. The reliability of 3D PoP structures was determined by measurements of resistance of daisy-chain solder joints systems during thermal shocks (TS) cycles. The mechanical strength of solder joints in 3D PoP structures was determined by measurements of a shear force of “Top” layer of 3D structures at T0 and after 1,500 TS. The ANOVA was used for results assessment. Findings The size of solder powders applied in soldering materials had small (10 per cent) influence on mechanical strength of solder joints in 3D PoP structures. Small size of solder powder had positive effect on solder joints reliability in 3D PoP structures. Especially important was the selection of solder paste for “Bottom” layer of 3D PoP system (influence 17 per cent). Incorrect soldering profile (influence 46 per cent) or wrong selected PCB coating (influence 35 per cent) can very easily reduce the positive impact of soldering materials on solder joints reliability. It was stated that as low as possible soldering profile and organic solderability preservative (OSP) coating in the case of single-sided PCB are the best for 3D PoP structures due to their reliability. Originality/value This paper explains how different sizes of solder powders used nowadays in solder pastes influence on reliability and mechanical strength of the solder joints in 3D PoP structures. The contribution, in numerical values, of soldering materials, soldering profile and PCB coating on 3D PoP structures solder joints reliability as well as recommendations improving reliability of 3D PoP structures solder joints were presented.
10
Solomon, H. D. "Low Cycle Fatigue of Sn96 Solder With Reference to Eutectic Solder and a High Pb Solder." Journal of Electronic Packaging 113, no. 2 (June 1, 1991): 102–8. http://dx.doi.org/10.1115/1.2905374.
Abstract:
This paper describes the 35°C and 150°C low cycle fatigue behavior of Sn96 solder (96.5 Sn/3.5 AG), the tin silver eutectic. There is a considerable amount of anecdotal information which says that this solder is superior to eutectic solder in its fatigue resistance. This study generally supports this assertion, but not for all plastic strain ranges. This solder has an excellent balance of strength, ductility and fatigue life under strain cycling. Furthermore, it is also shown that this solder is superior to a high Pb solder (92.5 Pb/2.5 Ag/5.0 Sn). The only drawback of the tin silver eutectic is that it has a higher melting point than the melting point for the Sn/Pb eutectic (221°C versus 183°C), and this requires a higher soldering temperature. This higher temperature necessitates some process alterations in order to use this solder.
11
Avery, William F. "Low Temperature Direct Aluminum Soldering Paste." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2012, DPC (January 1, 2012): 001597–626. http://dx.doi.org/10.4071/2012dpc-wa31.
Abstract:
For economic and weight considerations using aluminum to make connections to copper has been important in electronic components and making these connections via soldering provides an excellent thermal and electrical pathway. Soldering aluminum to copper in many applications involves the use of low temperature solder bonding to prevent damage to heat sensitive parts such as sealed copper heat pipes and sensitive electronic components. Typically, aluminum soldering is accomplished by plating over the aluminum to make that surface solderable, which is an expensive extra step in this processing. The development of a low temperature direct aluminum soldering paste eliminates the costly plating operation needed to make certain aluminum alloys solderable. The low temperature direct aluminum soldering paste, performing below 200 °C, provides for a soldering option that will work via induction, oven reflow, hot plate, or soldering iron techniques. The paste consists of a special flux medium and a proprietary low temperature lead-free solder alloy. Evaluation of the solderpaste was by several methods. Solderability testing compared the paste on a variety of aluminum alloys. Soldering joint cross-sectioning followed by scanning electron analysis proves the viability of the solder joints. Tensile strength testing of the solder joints measured the strength of the copper to aluminum and aluminum to aluminum solder joints.
12
Pietruszka, Adrian, Paweł Górecki, Sebastian Wroński, Balázs Illés, and Agata Skwarek. "The Influence of Soldering Profile on the Thermal Parameters of Insulated Gate Bipolar Transistors (IGBTs)." Applied Sciences 11, no. 12 (June 16, 2021): 5583. http://dx.doi.org/10.3390/app11125583.
Abstract:
The effect of solder joint fabrication on the thermal properties of IGBTs soldered onto glass-epoxy substrate (FR4) was investigated. Glass-epoxy substrates with a thickness of 1.50 mm, covered with a 35 μm thick Cu layer, were used. A surface finish was prepared from a hot air leveling (HAL) Sn99Cu0.7Ag0.3 layer with a thickness of 1 ÷ 40 μm. IGBT transistors NGB8207BN were soldered with SACX0307 (Sn99Ag0.3Cu0.7) paste. The samples were soldered in different soldering ovens and at different temperature profiles. The thermal impedance Zth(t) and thermal resistance Rth of the samples were measured. Microstructural and voids analyses were performed. It was found that the differences for different samples reached 15% and 20% for Zth(t) and Rth, respectively. Although the ratio of the gas voids in the solder joints varied between 3% and 30%, no correlation between the void ratios and Rth increase was found. In the case of the different soldering technologies, the microstructure of the solder joint showed significant differences in the thickness of the intermetallic compounds (IMC) layer; these differences correlated well with the time above liquidus during the soldering process. The thermal parameters of IGBTs could be changed due to the increased thermal conductivity of the IMC layer as compared to the thermal conductivity of the solder bulk. Our research highlighted the importance of the soldering technology used and the thermal profile in the case of the assembly of IGBT components.
13
Kawai, Michifumi, and Ryoohei Sato. "Solder Fatigue Mechanism and Thermal Fatigue Life." Journal of SHM 10, no. 3 (1994): 2–8. http://dx.doi.org/10.5104/jiep1993.10.3_2.
14
Frear, D. R., Dennis Grivas, and J. W. Morris. "Thermal Fatigue in Solder Joints." JOM 40, no. 6 (June 1988): 18–22. http://dx.doi.org/10.1007/bf03258168.
15
Liu, Yang, Fenglian Sun, Cadmus A. Yuan, and Guoqi Zhang. "Thermal analysis of chip-on-flexible LED packages with Cu heat sinks by SnBi soldering." Microelectronics International 33, no. 1 (January 4, 2016): 42–46. http://dx.doi.org/10.1108/mi-04-2015-0034.
Abstract:
Purpose – The purpose of this paper is to discuss the possibility of using soldering process for the bonding of chip-on-flexible (COF) light-emitting diode (LED) packages to heat sinks. The common bonding materials are thermal conductive adhesives. For thermal performance and reliability concerns, Tin-Bismuth (SnBi) lead-free solder paste was used for the connection of the COF packages and the Cu heat sinks by a soldering process in this study. Meanwhile, the geometrical effect of the SnBi solder layer on the thermal performance was also investigated. Design/methodology/approach – The effects of the bonding materials and the area of the solder layers on the thermal performance of the LED modules were investigated by finite element simulation and experimental tests. Findings – The SnBi soldered modules show much lower thermal resistance at the bonding layers than the adhesive-bonded LED module. Vertical heat transfer from the LED chips to the heat sinks is the primary heat dissipation mode for the SnBi soldered modules. Thus, the LED module with local solder layer shows similar LED thermal performance with the full-area soldered module. Meanwhile, the local soldering process decreases the possibility to form randomly distributed defects such as the large area voids and residue flux in the solder layers. Research limitations/implications – The research is still in progress. Further studies mainly focus on the reliability of the samples with different bonding materials. Practical implications – COF package is a new structure for LED packages. This study provides a comparison between SnBi solder and adhesive material on the thermal performance of the LED. Meanwhile, the authors optimized the geometrical design for the solder layer. The study provides a feasible bonding process for COF packages onto heat sinks. Originality/value – This study provides a soldering process for the COF LED packages. The thermal performance of the LED light source was improved significantly by the new process.
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Sharizal Abdul Aziz, Mohd, Mohd Zulkifly Abdullah, and Chu Yee Khor. "Influence of PTH offset angle in wave soldering with thermal-coupling method." Soldering & Surface Mount Technology 26, no. 3 (May 27, 2014): 97–109. http://dx.doi.org/10.1108/ssmt-08-2013-0021.
Abstract:
Purpose – The aim of this study is to investigate the effects of offset angle in wave soldering by using thermal fluid structure interaction modeling with experimental validation. Design/methodology/approach – The authors used a thermal coupling approach that adopted mesh-based parallel code coupling interface between finite volume-and finite element-based software (ABAQUS). A 3D single pin-through-hole (PTH) connector with five offset angles (0 to 20°) on a printed circuit board (PCB) was built and meshed by using computational fluid dynamics preprocessing software called GAMBIT. An implicit volume of fluid technique with a second-order upwind scheme was also applied to track the flow front of solder material (Sn63Pb37) when passing through the solder pot during wave soldering. The structural solver and ABAQUS analyzed the temperature distribution, displacement and von Mises stress of the PTH connector. The predicted results were validated by the experimental solder profile. Findings – The simulation revealed that the PTH offset angle had a significant effect on the filling of molten solder through the PCB. The 0° angle yielded the best filling profile, filling time, lowest displacement and thermal stress. The simulation result was similar to the experimental result. Practical implications – This study provides a better understanding of the process control in wave soldering for PCB assembly. Originality/value – This study provides fundamental guidelines and references for the thermal coupling method to address reliability issues during wave soldering. It also enhances understanding of capillary flow and PTH joint issues to achieve high reliability in PCB assembly industries.
17
Sobolewski, Maciej, and Barbara Dziurdzia. "Experimental approach to thermal conductivity of macro solder joints with voids." Soldering & Surface Mount Technology 31, no. 3 (June 3, 2019): 181–91. http://dx.doi.org/10.1108/ssmt-11-2018-0050.
Abstract:
Purpose The purpose of the paper is to experimentally evaluate the impact of voids on thermal conductivity of a macro solder joint formed between a copper cylinder and a copper plate by using reflow soldering. Design/methodology/approach A model of a surface mount device (SMD) was developed in the shape of a cylinder. A copper plate works as a printed circuit board (PCB). The resistor was connected to a power supply and the plate was cooled by a heat sink and a powerful fan. A macro solder joint was formed between a copper cylinder and a copper plate using reflow soldering and a lead-free solder paste SAC305. The solder paste was printed on a plate through stencils of various apertures. It was expected that various apertures of stencils will moderate the various void contents in solder joints. K-type thermocouples mounted inside cylinders and at the bottom of a plate underneath the cylinders measured the temperature gradient on both sides of the solder joint. After finishing the temperature measurements, the cylinders were thinned by milling to thickness of about 2 mm and then X-ray images were taken to evaluate the void contents. Finally the tablets were cross-sectioned to enable scanning electron microscopy (SEM) observations. Findings There was no clear dependence between thermal conductivity of solder joints and void contents. The authors state that other factors such as intermetallic layers, microcracks, crystal grain morfologyof the interface between the solder and the substrate influence on thermal conductivity. To support this observation, further investigations using metallographic methods are required. Originality/value Results allow us to assume that the use of SAC305 alloy for soldering of components with high thermal loads is risky. The common method for thermal balance calculation is based on the sum of serial thermal resistances of mechanical compounds. For these calculations, solder joints are represented with bulk SAC305 thermal conductivity parameters. Thermal conductivity of solder joints for high density of thermal energy is much lower than expected. Solder joints’ structure is not fully comparable with bulk SAC305 alloy. In experiments, the average value of the solder joint conductivity was found to be 8.1 W/m·K, which is about 14 per cent of the nominal value of SAC305 thermal conductivity.
18
Dziurdzia, Barbara, Maciej Sobolewski, and Janusz Mikolajek. "Convection vs vapour phase reflow in LED and BGA assembly." Soldering & Surface Mount Technology 30, no. 2 (April 3, 2018): 87–99. http://dx.doi.org/10.1108/ssmt-10-2017-0031.
Abstract:
Purpose The aim of this paper is to evaluate using statistical methods how two soldering techniques – the convection reflow and vapour phase reflow with vacuum – influence reduction of voids in lead-free solder joints under Light Emitted Diodes (LEDs) and Ball Grid Arrays (BGAs). Design/methodology/approach Distribution of voids in solder joints under thermal and electrical pads of LEDs and in solder balls of BGAs assembled with convection reflow and vapour phase reflow with vacuum has been investigated in terms of coverage or void contents, void diameters and number of voids. For each soldering technology, 80 LEDs and 32 solder balls in BGAs were examined. Soldering processes were carried out in the industrial or semi-industrial environment. The OM340 solder paste of Innolot type was used for LED soldering. Voidings in solder joints were inspected with a 2D X-ray transmission system. OriginLab was used for statistical analysis. Findings Investigations supported by statistical analysis showed that the vapour phase reflow with vacuum decreases significantly void contents and number and diameters of voids in solder joints under LED and BGA packages when compared to convection reflow. Originality/value Voiding distribution data were collected on the basis of 2D X-ray images for test samples manufactured during the mass production processes. Statistical analysis enabled to appraise soldering technologies used in these processes in respect of void formation.
19
Chiang, Kuo-Ning, and Chang-Ming Liu. "A Comparison of Thermal Stress/Strain Behavior of Elliptical/Round Solder Pads." Journal of Electronic Packaging 123, no. 2 (August 19, 1999): 127–31. http://dx.doi.org/10.1115/1.1339196.
Abstract:
As electronic packaging technology moving to the CSP, wafer level packaging, fine pitch BGA (ball grid array) and high density interconnections, the wireability of the PCB/substrate and soldering technology are as important as reliability issues. In this work, a comparison of elliptical/round pads of area array type packages has been studied for soldering, reliability, and wireability requirements. The objective of this research is to develop numerical models for predicting reflow shapes of solder joint under elliptical/round pad boundary conditions and to study the reliability issue of the solder joint. In addition, a three-dimensional solder liquid formation model is developed for predicting the geometry, the restoring force, the wireability, and the reliability of solder joints in an area array type interconnections (e.g., ball grid array, flip chip) under elliptical and round pad configurations. In general, the reliability of the solder joints is highly dependent on the thermal-mechanical behaviors of the solder and the geometry configuration of the solder ball. These reliability factors include standoff height/contact angle of the solder joint, and the geometry layout/material properties of the package. An optimized solder pad design cannot only lead to a good reliability life of the solder joint but also can achieve a better wireability of the substrate. Furthermore, the solder reflow simulation used in this study is based on an energy minimization engine called Surface Evolver and the finite element software ABAQUS is used for thermal stress/strain nonlinear analysis.
20
Frear, D. R., and F. G. Yost. "Reliability of Solder Joints." MRS Bulletin 18, no. 12 (December 1993): 49–54. http://dx.doi.org/10.1557/s0883769400039087.
Abstract:
In early electronic technologies, circuit components were attached to circuit boards by mechanical means. The electrical leads were either twisted together or mechanically interlocked to a board prior to soldering. The possibility of an unreliable solder joint causing any kind of circuit failure was remote. Interconnections were made intrinsic to the board by applying solder to increase electrical and thermal conductance. Technological advances and the need for high-density electronics have since eliminated the luxury of mechanical interlocks. Soldering in advanced applications, like surface mount technology (SMT), provides electrical, thermal, and mechanical interconnections between the board and its electrical components. In SMT, solder joints are the only mechanical features on the board and must hold components in place in a wide range of environments. The solder joints themselves are decreasing in size as increased chip functionality and clock frequencies become available. The failure of a single solder joint can render a device, or an entire electrical system, inoperable. Therefore, as insignificant and innocuous as they may seem, solder joints have become a critical aspect of electronic circuit reliability.
21
Sitek, Janusz, Wojciech Stęplewski, Kamil Janeczek, Marek Kościelski, Krzysztof Lipiec, Piotr Ciszewski, and Tomasz Krzaczek. "Influence of assembly parameters on lead-free solder joints reliability in Package-on-Package (PoP) technology." Soldering & Surface Mount Technology 27, no. 3 (June 1, 2015): 98–102. http://dx.doi.org/10.1108/ssmt-03-2015-0011.
Abstract:
Purpose – The purpose of this paper is to evaluate the influence of assembly parameters on lead-free solder joints reliability in Package-on-Package (PoP) Technology and demonstrate factors important for this issue. Design/methodology/approach – Two types of soldering materials and three different assembly procedures were used for assembly of PoP system. The reliability properties of assembled PoP systems were investigated using accelerated aging and periodic resistance measurements of daisy-chain solder joints systems. The purpose of such approach was to determine which soldering material (flux or solder paste) as well as which assembly process parameter (dipping depth of upper component in soldering material), would provide better reliability properties of the solder joints in the PoP system. Findings – It was stated that both selected flux and solder paste dedicated to assembly of PoP systems can be utilized in soldering of PoP applications. More reliable PoP systems applications require larger attention regarding materials selection and assembly parameters. It is recommended 50 per cent dipping depth of ball’s height into soldering material during upper PoP component assembly for more reliable applications. For less demanding PoP systems, the process window from 30 up to 70 per cent is acceptable. All observed failures after thermal shocks occurred in upper PoP components. Originality/value – This paper explains how materials and assembly parameters have influence on lead-free solder joints reliability in PoP systems. Especially, influence of process window for dipping procedure of upper components balls into soldering material was presented.
22
Piotrowska, Kamila, Morten Stendahl Jellesen, and Rajan Ambat. "Thermal decomposition of solder flux activators under simulated wave soldering conditions." Soldering & Surface Mount Technology 29, no. 3 (June 5, 2017): 133–43. http://dx.doi.org/10.1108/ssmt-01-2017-0003.
Abstract:
Purpose The aim of this work is to investigate the decomposition behaviour of the activator species commonly used in the wave solder no-clean flux systems and to estimate the residue amount left after subjecting the samples to simulated wave soldering conditions. Design/methodology/approach Changes in the chemical structure of the activators were studied using Fourier transform infrared spectroscopy technique and were correlated to the exposure temperatures within the range of wave soldering process. The amount of residue left on the surface was estimated using standardized acid-base titration method as a function of temperature, time of exposure and the substrate material used. Findings The study shows that there is a possibility of anhydride-like species formation during the thermal treatment of fluxes containing weak organic acids (WOAs) as activators (succinic and DL-malic). The decomposition patterns of solder flux activators depend on their chemical nature, time of heat exposure and substrate materials. Evaporation of the residue from the surface of different materials (laminate with solder mask, copper surface or glass surface) was found to be more pronounced for succinic-based solutions at highest test temperatures than for adipic acid. Less left residue was found on the laminate surface with solder mask (∼5-20 per cent of initial amount at 350°C) and poorest acid evaporation was noted for glass substrates (∼15-90 per cent). Practical implications The findings are attributed to the chemistry of WOAs typically used as solder flux activators. The results show the importance WOA type in relation to its melting/boiling points and the impact on the residual amount of contamination left after soldering process. Originality/value The results show that the evaporation of the flux residues takes place only at significantly high temperatures and longer exposure times are needed compared to the temperature range used for the wave soldering process. The extended time of thermal treatment and careful choice of fluxing technology would ensure obtaining more climatically reliable product.
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Dasgupta, Arnab, Elaina Zito, and Ning-Cheng Lee. "Voiding Control at Preform Soldering." International Symposium on Microelectronics 2016, no. 1 (October 1, 2016): 000630–37. http://dx.doi.org/10.4071/isom-2016-thp43.
Abstract:
Abstract Assembly of components with large pads such as high brightness LEDs or high power dies often is soldered with preform, mainly due to a lower voiding and lower flux fume generated when compared with solder paste, and also because of its better thermal and electrical conductivity compared with Ag epoxy. This is particularly true when the joints are to be formed within a cavity. Although lower than solder paste, the voiding in the solder joint is still a concern for high reliability and high performance devices. In this study, voiding at high power die attach reflow soldering using preform was simulated with the use of Cu coupons to mimic both die and substrate. The voiding behavior was studied by varying solder alloy type, flux quantity coated on preform, oxidation extent of Cu coupon, reflow peak temperature, and weight applied on the top of simulated die. For SAC305, with increasing weight, the bondline thickness (BLT) maintained constant initially due to solder surface tension, then reduced rapidly at weight higher than 50 g. The voiding area % increased with decreasing BLT first, then levelled off at lower BLT, although the voiding volume decreased with decreasing BLT due to constrained lamellar solder flow. Voiding was the highest for SAC305, followed by 57Bi42Sn1Ag, with 63Sn37Pb being the lowest, and increased with increasing oxidation of Cu coupon. With increasing flux quantity, voiding increased for SAC305 and 63Sn37Pb, but decreased for 57Bi42Sn1Ag, mainly due to the different temperature range at reflow. Voiding increased with increasing reflow temperature up to 170°C due to increasing vaporization, decreased with further increase in reflow temperature up to 210°C due to increasing flux activity, and increased again at temperature beyond 210°C due to rapid flux outgassing.
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LIN, KEH-MOH, YANG-HSIEN LEE, LI-KUO WANG, LI-WEI CHEN, SIAN-YI YANG, YI-CHIA CHEN, DE-CHIH LIU, MING-YUAN HUANG, ZHEN-CHENG WU, and CHIEN-PIN CHEN. "ELECTROLUMINESCENCE OBSERVATION OF MICROCRACK GROWTH BEHAVIOR OF CRYSTALLINE SILICON SOLAR MODULES FABRICATED BY HOT-AIR SOLDERING TECHNOLOGY." International Journal of Modern Physics: Conference Series 06 (January 2012): 43–48. http://dx.doi.org/10.1142/s2010194512002917.
Abstract:
In this study, the quality degradation of Si -based photovoltaic (PV) modules during the aging process was observed by using electroluminescent (EL) technology and was verified by the IV curve measurements in order to find out the occurring timing of damages on solar cells. Furthermore, the influences of solder materials and soldering temperatures on the performance of the PV modules were also studied. Experiment results show that, high soldering temperatures which induce high thermal stress can easily lead to the power loss of the PV modules. Besides, the mechanical properties of the solar cells itself can also affect the degradation rate of the PV modules. On PV modules soldered with SnPb (SP) solder, more than 80% of cell damages occurred during the soldering and encapsulation processes. When SnAgPb (SAP) solder was used, a small part of the cell damages didn't emerge until the initial stage of the thermal cycling test (TC.) This phenomenon is attributed to the reduction of residual stress between the ribbon and the silver paste because of the good wettability of SAP solder.
25
Holz, Matthias, Jochen Hilsenbeck, Ralf Otremba, Alexander Heinrich, Peter Türkes, and Roland Rupp. "SiC Power Devices: Product Improvement Using Diffusion Soldering." Materials Science Forum 615-617 (March 2009): 613–16. http://dx.doi.org/10.4028/www.scientific.net/msf.615-617.613.
Abstract:
SiC power devices have reached a high market penetration, especially for high-voltage applications like switch mode power supplies. In the past, however, the superior material properties like, e.g., good thermal conductivity, have often not been put to full use due to the limitations of current packaging techniques. Especially the inferior thermal conductivity of current die attach materials have been an obstacle to realise the full potential of SiC technologies. In this paper, we describe in detail the use of diffusion solder for the die attach of SiC chips. Replacing the conventional solder layer by a thin metal stack for diffusion soldering, the thermal conductivity of the device is significantly improved. In addition, we show the positive impact of diffusion soldering on the assembly process and on the device reliability. These results are interesting for, both, SiC diodes and switches.
26
Aziz, M. S. Abdul, M. Z. Abdullah, C. Y. Khor, Z. M. Fairuz, A. M. Iqbal, M. Mazlan, and Mohd Sukhairi Mat Rasat. "Thermal Fluid-Structure Interaction in the Effects of Pin-Through-Hole Diameter during Wave Soldering." Advances in Mechanical Engineering 6 (January 1, 2014): 275735. http://dx.doi.org/10.1155/2014/275735.
Abstract:
An effective simulation approach is introduced in this paper to study the thermal fluid-structure interaction (thermal FSI) on the effect of pin-through-hole (PTH) diameter on the wave soldering zone. A 3D single PTH connector and a printed circuit board model were constructed to investigate the capillary flow behavior when passing through molten solder (63SnPb37). In the analysis, the fluid solver FLUENT was used to solve and track the molten solder advancement using the volume of fluid technique. The structural solver ABAQUS was used to examine the von Mises stress and displacement of the PTH connector in the wave soldering process. Both solvers were coupled by MpCCI software. The effects of six different diameter ratios (0.1 < d/ D < 0.97) were studied through a simulation modeling. The use of ratio d/ D = 0.2 yielded a balanced filling profile and low thermal stress. Results revealed that filling level, temperature, and displacement exhibited polynomial behavior to d/ D. Stress of pin varied quadratically with the d/ D. The predicted molten solder profile was validated by experimental results. The simulation results are expected to provide better visualization and understanding of the wave soldering process by considering the aspects of thermal FSI.
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Shin, Hyunseong, Ekyu Han, Nochang Park, and Donghwan Kim. "Thermal Residual Stress Analysis of Soldering and Lamination Processes for Fabrication of Crystalline Silicon Photovoltaic Modules." Energies 11, no. 12 (November 22, 2018): 3256. http://dx.doi.org/10.3390/en11123256.
Abstract:
In this study, we developed a finite element model to assess the residual stress in the soldering and lamination processes during the fabrication of crystalline silicon (Si) photovoltaic (PV) modules. We found that Si wafers experience maximum thermo-mechanical stress during the soldering process. Then, the Si solar cells experience pressure during the process of lamination of each layer of the PV module. Thus, it is important to decrease the residual stress during soldering of thin Si wafers. The residual stress is affected by the number of busbars, Si wafer thickness, and solder type. Firstly, as the number of busbars increases from two to twelve, the maximum principal stress increases by almost a factor of three (~100 MPa). Such a high first principal stress can cause mechanical failure in some Si wafers. Secondly, thermal warpage increases immediately after the soldering process when the thickness of the Si wafers decreases. Therefore, the number and width of the busbars should be considered in order to avoid mechanical failure. Finally, the residual stress can be reduced by using low melting point solder. The results obtained in this study can be applied to avoid mechanical failure in PV modules employing thin Si wafers.
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Matteau, Jacques. "NanoBond® Assembly – A Rapid, Room Temperature Soldering Process." International Symposium on Microelectronics 2011, no. 1 (January 1, 2011): 000521–26. http://dx.doi.org/10.4071/isom-2011-wa2-paper5.
Abstract:
Indium Corporation of America has commercialized a new technology that will revolutionize how manufacturers join components using solder materials. (See Figure 1) The joining process is based on the use of reactive multilayer foils as local heat sources. The foils are a new class of nano-engineered materials, in which self-propagating exothermic reactions can be ignited at room temperature through an ignition process. By inserting a multilayer foil between two solder layers and two components, heat generated by the reaction in the foil melts the solder and consequently bonds are completed at room temperature in air, argon or vacuum in approximately one second. The resulting metallic joints exhibit thermal conductivities two orders of magnitude higher, and thermal resistivity’s an order of magnitude lower, than current commercial TIMs. The use of reactive foils as a local heat source eliminates the need for torches, furnaces, or lasers, speeds the soldering processes, and dramatically reduces the total heat that is needed. Thus, temperature-sensitive or small components can be joined without thermal damage or excessive heating. In addition, mismatches in thermal contraction on cooling can be avoided because components see very small increases in temperature. This is particularly beneficial for joining metals to ceramics. The fabrication and characterization of the reactive foils is described, and the value proposition for NanoBonding is presented. This presentation also shows the applicability of this platform technology to many areas of packaging including Thermal Interface Materials, microelectronics, optoelectronics, and Light Emitting Diodes (LEDs)
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Gerashchenko, Vladislav, Lev Oborin, Nikolay Testoyedov, and Igor Kovalev. "Minimization of Internal Shrinkage Defects in Cast Parts Using 5VA Powder Solder Application." Materials Science Forum 1031 (May 2021): 184–89. http://dx.doi.org/10.4028/www.scientific.net/msf.1031.184.
Abstract:
The article presents a method for eliminating the crystallization of thermal nodes and shrinkage defects in the form of micro-friable cavities. The method of soldering on castings from steel grades VNL-1 and VNL-6 using 5VA powder solder has been investigated. Also, the optimal soldering modes were determined, the effects of soldering modes on the properties of the base material and the soldered joint were studied, the corrosion resistance was investigated, the corrosion resistance of the soldered joints in corrosive environments. The conducted studies of sealing by soldering cast parts with microdefects lead to the following results: increased corrosion resistance; ensuring increased tightness; improving the presentation; elimination of surface microdefects.
30
Syed-Khaja, Aarief, and Jörg Franke. "Design and Solder Process Optimization in MID Technology for High Power Applications." Advanced Materials Research 1038 (September 2014): 107–12. http://dx.doi.org/10.4028/www.scientific.net/amr.1038.107.
Abstract:
Molded interconnect device (MID) technology is a key enabling technology with growing markets in automotive, communications, consumer electronics through integration with lighting and sensor technologies. The MID technology is yet to be explored for high temperature applications in automotive or consumer lighting. One of the hindering factors for such implementation in the serial production and time to market is the improper electronic and thermal packaging of the light emitting diodes (LEDs) on the MID substrates. This paper addresses the optimization of mold design, surface metallization and soldering process for the effective thermal management of the high-power LED systems. By using a simulation model, the thermal distribution and the resultant decrease in temperatures for varying forward electrical currents in high-power LEDs by design optimization is demonstrated. In addition, the optimization of solder process with respect to solder profile in context of vacuum vapor-phase soldering for void-free solder connections is discussed.
31
Borecki, Janusz, and Tomasz Serzysko. "Mechanical reliability of solder joints in PCBs assembled in surface mount technology." Soldering & Surface Mount Technology 28, no. 1 (February 1, 2016): 18–26. http://dx.doi.org/10.1108/ssmt-10-2015-0037.
Abstract:
Purpose – The purpose of this paper is to determine the dependence of mechanical strength of solder joints on printed circuit boards from the soldering process parameters and operating conditions of the electronic device. Design/methodology/approach – The research was performed using the Taguchi method of planning of experiments. Evaluation of the quality of solder joints was made on the basis of microscopic observations, X-ray analysis and measurements of shear force of solder joints. Findings – The carried out research has shown the influence of the individual parameters of the soldering process on the mechanical strength of solder joints and the mechanism of damage of solder joints under the influence of shear force. Originality/value – The authors present results of their research using advanced techniques of experimental design and analysis of results. In this study, original approach was used to simulate the operational conditions of electronic devices including thermal imaging technology.
32
Wong, T. E., L. A. Kachatorian, and H. M. Cohen. "J-Lead Solder Joint Thermal Fatigue Life Model." Journal of Electronic Packaging 121, no. 3 (September 1, 1999): 186–90. http://dx.doi.org/10.1115/1.2792682.
Abstract:
A thermal fatigue life prediction model of J-lead solder joint assembly has been developed. This model is evolved from an empirically derived formula based on modified Manson-Coffin fatigue life Prediction theory. To estimate solder joint fatigue life, nonlinear finite element analysis (FEA) was conducted using the ABAQUS™ computer code. The analysis results show that cracks are initiated and propagated from both the heel and the toe of the solder joint toward the center portion of the joint. This condition results in the solder joint fatigue life degradation and is included in the model development. The fatigue life prediction model is then calibrated to life cycling test results, which were provided by Jet Propulsion Laboratory (JPL/NASA). The developed life prediction model, combined with the nonelastic strains derived from FEA and Miner’s cumulative damage law, was used to predict the cumulative damage index of the solder joint under NASA’s thermal cycling environment (between −55°C and 100°C). The analysis results indicate that this solder joint has a 50 percent failure probability when the solder joint is exposed up to 5206 thermal cycles. To shorten the test time, a modified thermal cycling profile was proposed. This profile is the same as the NASA thermal cycling environment except using the high end of the dwell temperature at 125°C. The analysis results show that a 50 percent failure probability of the solder joint would occur after the solder joint is exposed to 3500 cycles of the NASA thermal environment and followed by 1063 cycles of the modified thermal profile. In conclusion, the developed life prediction model is recommended to serve as an effective tool to integrate the process of design selection, quality inspection, and qualification testing in a concurrent engineering process. It is also recommended to conduct a micro-section in the solder joint to verify the solder crack paths and further validate the life prediction model. When additional thermal cycles have been added into the test specimens, recalibrating this model by test is also recommended.
33
Lin, Keh Moh, Yang Hsien Lee, Wen Yeong Huang, Yi Wen Kuo, Li Kuo Wang, and Sian Yi Yang. "Long Term Reliability and Power Degradation Analysis of Multicrystalline Silicon Solar Modules Using Electroluminescence Technique." Advanced Materials Research 562-564 (August 2012): 90–93. http://dx.doi.org/10.4028/www.scientific.net/amr.562-564.90.
Abstract:
In this study, the quality degradation of multi-crystalline silicon photovoltaic (PV) modules during the aging process was observed by using electroluminescence (EL) technology and IV curve measurements in order to find out the occurring timing of damages on solar cells. The influences of soldering materials and temperatures on the performance of the PV modules were also studied. Experimental data show that, high soldering temperatures which induce high thermal stress can easily lead to the power loss of the PV modules. On PV modules soldered with SnAgPb (SAP) solder, ca. 40% of module damages occurred after 25 cycles during the thermal cycling (TC) test. In contrast, there were 61.5% of damaged SnPb (SP) modules after the 25 TC. Most module damages which are attributed to the crack growth and the floating solder emerged during the soldering and encapsulation processes. In our experiment, the average power degradation of all modules was less than 10%.
34
Gowans, Carol, Seth Homer, and Ronald Lasky. "APPLICATIONS OF SOLDER PREFORMS TO IMPROVE RELIABILITY." International Symposium on Microelectronics 2011, no. 1 (January 1, 2011): 000258–63. http://dx.doi.org/10.4071/isom-2011-tp2-paper5.
Abstract:
As early as the 1990s people were predicting the end of through-hole components, but they are alive and well with the numbers of dual in-line packages (DIPs) and connectors still measured in the 10s of billions per year. Many of these components are assembled by wave soldering, however in mixed technology (SMT and through-hole on the same board) where the through-hole count is low, it is often advantageous to consider selective soldering or the pin-in-paste process (PIP). PIP is a process in which solder paste is printed over or near the PWB through-holes. The through-hole components are then placed and the solder joint is formed during the reflow process. PIP has the advantage of eliminating the wave soldering process step. In many cases it is difficult to print enough solder paste to make an acceptable through-hole solder joint. Solder preforms were developed to meet this need. These solder preforms are typically shaped in the form of 0402, 0603, or 0805 passive components. The preforms are placed on the appropriate printed solder paste deposit by a component placement machine. Preforms come in tape & reel packaging. Today solder preforms are also used in other “solder starved” applications such as radio frequency (RF) shields, connectors, and under QFN thermal pads. In all cases, the extra solder delivered by the preform is vital to the reliability of the assembled product. In this paper, process, design, and assembly methods for solder fortification using preforms will be discussed. Four successful solder fortification examples will be presented along with the associated defect reductions.
35
Shohji, Ikuo, Tomotake Tohei, Keisuke Yoshizawa, Masaharu Nishimoto, Yasushi Ogawa, and Takayuki Kawano. "Effect of Thermal Cycle Conditions on Thermal Fatigue Life of Chip Size Package Solder Joint." Key Engineering Materials 385-387 (July 2008): 433–36. http://dx.doi.org/10.4028/www.scientific.net/kem.385-387.433.
Abstract:
Accelerated thermal cycling (ATC) tests were conducted to investigate an effect of thermal cycle conditions on thermal fatigue life of a chip size package (CSP) lead-free solder joint. A ternary Sn-Ag-Cu alloy was used as a lead-free solder material. For frequency of thermal cycle (1~3 cycles/h) and maximum (388~423 K) and minimum (223~273 K) temperatures investigated, the effects of them on thermal fatigue life of the solder joint were slight. On the contrary, correlation was recognized between temperature amplitude and thermal fatigue life of the solder joint. The thermal fatigue life increased with decreasing temperature amplitude. The relationship obeyed the Coffin-Manson’s type equation.
36
Hong, Won Sik, Mi-Song Kim, Myeongin Kim, Sang-Hyuk Yun, and Yunhwi Park. "Laser Soldering Properties of MEMS Probe for Semiconductor Water Testing." Journal of Welding and Joining 39, no. 4 (August 30, 2021): 368–75. http://dx.doi.org/10.5781/jwj.2021.39.4.4.
Abstract:
In this study, the laser soldering process of microelectromechanical system (MEMS) probes and multilayer ceramic (MLC) substrates was optimized with Type 4 (T4) and Type 7 (T7) Sn-3.0Ag-0.5Cu (SAC305), Type 4 Sn-0.3Ag-0.7Cu (SAC0307), and Type 4 Sn-5.0Sb (SnSb) soldering, and the probe solder joint properties were compared. SAC0307 and SnSb were used to confirm the bonding property of the low-Ag solder and the high-temperature durability. We conducted a thermal cycling test (TCT) with 500 cycles at temperatures of -25 ℃ to 105 ℃ with a 10-min dwell time at each temperature. Before and after the TCT, the microstructure of solder joint as well as the shear strength between the probe and the MLC were examined. The results revealed that, after the TCT, the degradation rate of T7 SAC305 solder was lower than that of T4 SAC305, and the SnSb solder did not exhibit bonding strength degradation. The fracture mode of the SAC solder joint was ductile-brittle. In the case of the SnSb joint, brittle fracture was the major fracture mode because of the Sn-Sb intermetallic compounds. The SnSb solder had an excellent bonding strength and degradation property after the TCT, but the lack of toughness caused brittle fracture. These results confirm the applicability of T4 SnSb and T7 SAC305 solders for high-temperature response and fine pitch bonding.
37
Skwarek, Agata, Balázs Illés, Krzysztof Witek, Tamás Hurtony, Jacek Tarasiuk, Sebastian Wronski, and Beata Kinga Synkiewicz. "Reliability studies of InnoLot and SnBi joints soldered on DBC substrate." Soldering & Surface Mount Technology 30, no. 4 (September 3, 2018): 205–12. http://dx.doi.org/10.1108/ssmt-10-2017-0029.
Abstract:
Purpose This paper aims to investigate the quality and reliability of solder joints prepared from Pb-free alloys on direct bounded Cu (DBC) substrates. Two types of solder alloys were studied: Sn90.95Ag3.8Cu0.7Sb1.4Ni0.15Bi3.0, with a high melting point of 225°C, and Sn42Bi58, with low a melting point of 138°C. Design/methodology/approach Capacitor components of size 1806 were soldered on DBC substrates by using convection reflow soldering and vacuum vapor-phase soldering technologies. A part of the samples was subjected to the thermal shock test. The structure of the solder joints and the content of the voids were investigated using three-dimensional X-ray tomography. The mechanical strength of the joints was evaluated using the shear force test, and the microstructure of the joints was studied on metallographic cross sections by using scanning electron microscopy. Findings It was found that the number of voids is not related directly to the mechanical strength of the solder joints. The mechanical strength of the solder joints depends more on the amount of Ag3Sn precipitation, Au precipitation and the intermetallic layer in the solder joints. In some cases, the thermal shock test caused micro-cracks around the Au precipitation because of a mismatch of Au, AuSn4 and Sn in terms of coefficients of thermal expansion. Originality/value DBC substrates are usually used for power electronics, where the quality of the solder joints is even more important than in the case of commercial electronics.
38
Branzei, Mihai, and Ioan Plotog. "Thermophysical Properties in Assembling Process at Macro and Micro Level." Advanced Materials Research 1114 (July 2015): 172–79. http://dx.doi.org/10.4028/www.scientific.net/amr.1114.172.
Abstract:
The electronic modules are complex ensemble of electronic components having terminals (PIN) connected by solder joints on dedicated metallic surfaces (PAD) parts of conductive interconnection structure realized on rigid or flexible dielectric substrate having different core materials. The reliability of the electronic modules could be considered as expression of solder joints functionality (SJF) relating to working conditions and unique defined by their electrical, mechanical and thermal properties. These properties are in close connection with the solder joints microstructures, result of the soldering Process temperature gradient action over the trinomial solder alloy Paste, Pin and Pad. Consequently the solder joints quality can be correctly evaluated taking into consideration not only the severally intrinsic parameters of the trinomial elements Pin-Pad-Paste characterized by specific thermophysical properties (ThP), but also interrelate the complex reaction at the interface between them and interdependence with the soldering Process parameters.In the paper, will be analyzed the influencing factors of manufacturing processes, the most important assembling defects at macro and micro level, their causes relating to specific ThP and processes at interfaces Pin-solder joints-Pad, it will be identify the Key Process Input Variables (KPIV) and propose a structural model for assembling processes, 4P Soldering Model, as an useful tool in engineering of electronic product in order to assure the assumed goal for assembling stage.
39
Sauber, J., and J. Seyyedi. "Predicting Thermal Fatigue Lifetimes for SMT Solder Joints." Journal of Electronic Packaging 114, no. 4 (December 1, 1992): 472–76. http://dx.doi.org/10.1115/1.2905484.
Abstract:
A power-law type creep equation has been added to finite element models to calculate solder joint response to time, temperature, and stress level. The ability of the models to predict solder joint behavior was verified by running a series of creep tests. The models were then solved to determine the solder joint creep strains which occur during thermal cycling. These creep strains were used to predict the degradation of pull strength resulting from thermal cycling. More than 8,600 solder joints were thermally cycled and then individually pull tested to verify the accuracy of the method.
40
Huang, Lijuan, Zhenghu Zhu, Hiarui Wu, and Xu Long. "Board-level vapor phase soldering (VPS) with different temperature and vacuum conditions." Multidiscipline Modeling in Materials and Structures 15, no. 2 (February 21, 2019): 353–64. http://dx.doi.org/10.1108/mmms-04-2018-0082.
Abstract:
Purpose Vapor phase soldering (VPS), also known as condense soldering, is capable of improving the mechanical reliability of solder joints in electronic packaging structures. The paper aims to discuss this issue. Design/methodology/approach In the present study, VPS is utilized to assemble two typical packaging types (i.e. ceramic column grid array (CCGA) and BGA) for electronic devices with lead-containing and lead-free solders. By applying the peak soldering temperatures of 215°C and 235°C with and without vacuum condition, the void formation and intermetallic compound (IMC) thickness are compared for different packaging structures with lead-containing and lead-free solder alloys. Findings It is found that at the soldering temperature of 215°C, CCGA under a vacuum condition has fewer voids but BGA without vacuum environment has fewer voids despite of the existence of lead in solder alloy. In light of contradictory phenomenon about void formation at 215°C, a similar CCGA device is soldered via VPS at the temperature of 235°C. Compared with the size of voids formed at 215°C, no obvious void is found for CCGA with vacuum at the soldering temperature of 235°C. No matter what soldering temperature and vacuum condition are applied, the IMC thickness of CCGA and BGA can satisfy the requirement of 1.0–3.0 µm. Therefore, it can be concluded that the soldering temperature of 235°C in vacuum is the optimal VPS condition for void elimination. In addition, shear tests at the rate of 10 mm/min are performed to examine the load resistance and potential failure mode. In terms of failure mode observed in shear tests, interfacial shear failure occurs between PCB and bulk solder and also within bulk solder for CCGA soldered at temperatures of 215°C and 235°C. This means that an acceptable thicker IMC thickness between CCGA solder and device provides greater interfacial strength between CCGA and device. Originality/value Due to its high I/O capacity and satisfactory reliability in electrical and thermal performance, CCGA electronic devices have been widely adopted in the military and aerospace fields. In the present study, the authors utilized VPS to assemble a typical type of CCGA with the control package of conventional BGA to investigate the relation between essential condition (i.e. soldering temperature and vacuum) to void formation.
41
Yang, Xue Xia, Yu Zhang, and Xue Feng Shu. "Finite Element Analysis on the Ability of Solder Joints to Resist Thermal Fatigue." Advanced Materials Research 118-120 (June 2010): 738–42. http://dx.doi.org/10.4028/www.scientific.net/amr.118-120.738.
Abstract:
The purpose of this paper is to study the ability of solder joints to resist thermal fatigue. 2D simplified models of Plastic Ball Grid Array package (PBGA) structures with ten different solder joints obtained from surface mount experiment are established by finite element software, then stress-strain response of solder joints subjected to the thermal cycle load are calculated. And the effects of shape parameters of solder joints on the ability to resist thermal fatigue are discussed. Results indicate that for the same material and volume solders, the solder joints which have higher height, smaller diameter and contact angle have a stronger ability against thermal fatigue, and that the thermal fatigue characteristics are also greatly influenced by the solder outlines. Comparing with SP solder joints, LF solder joints have stronger ability against thermal fatigue.
42
Zhu, Jing, and Zhao Hua Wu. "Study on PLCC Lead Free Solder Joint's Thermal Reliability Based on Shape Prediction and Response Surface Methodology." Advanced Materials Research 706-708 (June 2013): 1697–700. http://dx.doi.org/10.4028/www.scientific.net/amr.706-708.1697.
Abstract:
In this paper, PLCC lead free solder joint’s thermal fatigue lifetime is analyzed by using the Response Surface Methodology, combined with solder joint’s shape prediction and finite element simulation. Three key solder joint’s process parameters, pad length, gap height and solder paste’s volume are chosen to build an orthogonal array , 25 PLCC lead free SAC305 solder joint’s models with different parameters combination are built in Surface Evolver to predict the solder joint’s shape. Then the PLCC device’s surface shape models in Surface Evolver are converted to three-dimensional finite element models by using a special method. Thermal analyses give the distribution and the change of thermal stress and strain, which show the dangerous solder joint in the whole PLCC device and position with weak thermal reliability in single solder joint. Furthermore, the PLCC solder joints’ thermal fatigue lifetime are calculated with the modified Coffin-Manson equation, and the series of thermal fatigue lifetime data are processed by the Response Surface Methodology. Regression equation between thermal fatigue lifetime and the three key factors is concluded. With the solder joint’s influencing rule on thermal fatigue lifetime and the solder joint’s process parameter combination belong to the highest thermal fatigue lifetime, assembly process of PLCC is improved and then enhance the PLCC solder joint’s reliability.
43
Tsepelev, Vladimir, Viktor Konashkov, Vladimir Vyukhin, Arkadi Povodator, and Ann Latipova. "Melt Time-Temperature Treatment Affecting the Amorphous Ribbons' Properties of the HTS-42 Solder." Advanced Materials Research 871 (December 2013): 147–51. http://dx.doi.org/10.4028/www.scientific.net/amr.871.147.
Abstract:
The HTS-42 (High Temperature Solder) properties in the liquid state have been studied. The optimal operating conditions for the solder melt time-temperature treatment, used for producing amorphous ribbons having the specified service properties, are recommended based on the analysis of the anomalies properties and temperature polytherms shape. The subsequent thermal treatment of soldered joints is not shown appropriate for soldering homogeneous melts not hardened by age (precipitation) hardening. The strength of such products can be improved by increasing the contact joint area. The HTS-42 solder amorphous ribbons enable, as compared to the powder semi-finished product, reducing its consumption by 2-3 times, improving the carrying capacity of soldered constructions by 20-40 %, which makes the soldering practice resource saving and significantly improves the product reliability.
44
Khazaka, Rabih, Donatien Martineau, Toni Youssef, Thanh Long Le, and Stéphane Azzopardi. "Rapid and Localized Soldering Using Reactive Films for Electronic Applications." Journal of Microelectronics and Electronic Packaging 16, no. 4 (October 1, 2019): 182–87. http://dx.doi.org/10.4071/imaps.955217.
Abstract:
Abstract The rapid and localized heating techniques allow the joining of temperature-sensitive materials and components without thermal induced damage commonly encountered when high-temperature solder reflow processes are used. This is also advantageous for making assemblies with materials having a large difference in the coefficient of thermal expansion without induced bowing or cracking. The use of exothermic reactive foil sandwiched between solder preforms is a promising local and rapid soldering process because it does not require any external heat source. The reactive foil is formed from alternatively stacked nanolayers of Ni and Al until it reaches the total film thickness. Once the film is activated by using an external power source, a reaction takes place and releases such an amount of energy that is transferred to the solder preforms. If this amount of energy is high enough, solder preforms melt and insure the adhesion between the materials of the assembly. The influences of the applied pressure, the reactive film (RF) thickness as well as the solder, and the attached materials chemical composition and thickness were investigated. It was shown that the applied pressure during the process has a strong effect on the joint initial quality with voids ratio decreases from 64% to 26% for pressure values between .5 and 100 kPa, respectively. This can be explained by the improvement of the solder flow under higher pressure leading to a better surface wettability and voids elimination. Otherwise, the joint quality was found to be improved once the solder melting duration is increased. This relationship was observed when the thickness of the reactive foil is increased (additional induced energy) or the thickness of solders, Cu, and/or Si is decreased (less energy consumption). The microstructure of the AuSn joint achieved using the RFs shows very fine phase distribution compared with the one obtained using conventional solder reflow process in the oven because of high cooling rate. The mechanical properties of the joint were evaluated using shear tests performed on 350-μm-thick silicon diodes assembled on active metal brazed substrates under a pressure of 100 kPa. The RFs were 60 μm thick and sandwiched between two 25-μm-thick 96.5Sn3Ag.5Cu (SAC) preforms. The voids ratio was about 37% for the tested samples and shear strength values above 9.5 MPa were achieved which remains largely higher than MIL-STD-883H requirements. Finally, the process impact on the electrical properties of the assembled diodes was compared with a commonly used solder reflow assembly and the results show a negligible variation.
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Xie, D. J., Y. C. Chan, J. K. L. Lai, and I. K. Hui. "Fatigue life studies on defect-free solder joints fabricated from modified reflow soldering." IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B 19, no. 3 (1996): 679–84. http://dx.doi.org/10.1109/96.533911.
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Gerlach, Rolf, Roland Rupp, Peter Türkes, and Ralf Otremba. "Thermal Management versus Full Isolation: Trade Off in Packaging Technologies of Modern SiC Diodes." Materials Science Forum 679-680 (March 2011): 742–45. http://dx.doi.org/10.4028/www.scientific.net/msf.679-680.742.
Abstract:
In this paper we compare the thermal behavior of identical SiC Schottky diodes mounted in i) a standard TO220 package (TO220) with non-isolated backside applying standard soft solder and diffusion solder die attach with ii) a so called FULLPAK TO220 package (TO220FP, only diffusion soldering). Depending on the solder technique the heat transport from the junction area of the SiC Schottky diode to the heat sink or to the package backside is improved for the diodes mounted via diffusion solder. For small chips this holds even for TO220FP in comparison to TO220 with standard solder. Simulations of the vertical temperature distribution after electrically heating with a half sine wave for 10ms up to 190W show a decrease of the maximal junction temperature of the SiC Schottky diode from TJ=260 °C to TJ=180 °C if the diffusion solder is used independent from the package type.
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Lee, Ouk Sub, No Hoon Myoung, and Dong Hyeok Kim. "Reliability Estimation of Solder Joint Utilizing Thermal Fatigue Models." Key Engineering Materials 297-300 (November 2005): 1816–21. http://dx.doi.org/10.4028/www.scientific.net/kem.297-300.1816.
Abstract:
The differences of coefficient of thermal expansion (CTE) of component and FR-4 board connected by solder joint generally cause the dissimilarity in shear strain and failure in solder joint when they are heated. The first order Taylor series expansion of the limit state function (LSF) incorporating with thermal fatigue models is used in order to estimate the failure probability of solder joints under heated condition. Various thermal fatigue models, classified into five categories: categories four such as plastic strain-based, creep strain-based, energy-based, and damage-based except stress-based, are utilized in this study. The effects of random variables such as CTE, distance of the solder joint from neutral point (DNP), temperature variation and height of solder on the failure probability of the solder joint are systematically investigated by using a failure probability model with the first order reliability method (FORM) and thermal fatigue models.
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Eftychiou, M. A., T. L. Bergman, and G. Y. Masada. "A Detailed Thermal Model of the Infrared Reflow Soldering Process." Journal of Electronic Packaging 115, no. 1 (March 1, 1993): 55–62. http://dx.doi.org/10.1115/1.2909302.
Abstract:
A thermal model of the infrared reflow soldering process is developed and sample predictions are reported. The model, which accounts for coupled radiation, mixed convection and conduction heat transfer, is capable of predicting relevant thermal effects ranging from the convection characteristics within the IR oven to the detailed thermal response, including solid-liquid phase change, of individual solder connections. Although the heat transfer here is radiatively dominated, mixed convection and conduction effects are important in determining the thermal response of the card assembly.
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Briggs, Ed. "Minimizing Voiding in Bottom Terminated Components by Optimizing the Solder Paste Flux." International Symposium on Microelectronics 2016, no. 1 (October 1, 2016): 000505–10. http://dx.doi.org/10.4071/isom-2016-tha53.
Abstract:
Abstract Perhaps the single biggest challenge in PCB assembly today is voiding under bottom terminated components (BTCs) such as QFNs (quad-flat-pack, no-leads), D-Paks, and LGAs (land grid arrays). Many bottom terminated components, such as QFNs, have a large thermal pad on the bottom side which provides excellent thermal and electrical grounding properties. However, effectively soldering these components to minimize thermal pad voiding can be a challenge. Many automotive electronics assemblers are increasing this challenge by requiring less than 10% voids to improve reliability. The large deposit of printed solder paste required to solder the thermal pad typically induces flux entrapment and subsequent voiding during the reflow process. Large voids and/or a high number of voids cause decreased thermal conductivity and lower the mechanical strength of the resulting solder joints. The large solder paste deposit required may also cause the component to float and open up the electrical connections around the perimeter of the component. Another factor affecting voiding has been the transition to lead-free solder, which has been marked by the use of various SAC alloys. Most applications for surface mount assembly use SAC305 (96.5Sn/3.0Ag/0.5Cu) with a melting temperature range of 217–220°C. The higher temperatures required for lead-free soldering and the increased surface tension of the SAC alloy exacerbate the voiding issue. This paper will focus on the techniques for optimizing the assembly process for QFN components, with a focus on minimizing voiding. Best practices for lead-free reflow profiling, stencil aperture design, solder paste volume control, and the importance of flux chemistry to minimize void formation will be discussed.
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Lin, Yong Cheng, and Yu Chi Xia. "Application of Finite Element Method in Optimal Design of Flip-Chip Package." Advanced Materials Research 264-265 (June 2011): 1660–65. http://dx.doi.org/10.4028/www.scientific.net/amr.264-265.1660.
Abstract:
More and more solder joints in circuit boards and electronic products are changing to lead free solder, placing an emphasis on lead free solder joint reliability. Solder joint fatigue failure is a serious reliability concern in area array technologies. In this study, the effects of substrate materials on the solder joint thermal fatigue life were investigated by finite element model. Accelerated temperature cycling loading was imposed to evaluate the reliability of solder joints. The thermal strain/stress in solder joints of flip chip assemblies with different substrates was compared, and the fatigue life of solder joints were evaluated by Darveaux’s crack initiation and growth model. The results show the mechanisms of substrate flexibility on improving solder joint thermal fatigue.