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Relevant bibliographies by topics / Stencil printing

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Academic literature on the topic 'Stencil printing'

Author: Grafiati

Published: 4 June 2021

Last updated: 6 February 2022

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Journal articles on the topic "Stencil printing"

1

Lee, Yong‐Won, Keun‐Soo Kim, and Katsuaki Suganuma. "The behaviour of solder pastes in stencil printing with electropolishing process." Soldering & Surface Mount Technology 25, no. 3 (June 21, 2013): 164–74. http://dx.doi.org/10.1108/ssmt-12-2012-0027.

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PurposeThe purpose of this paper is to study the effect of the electropolishing time of stencil manufacturing parameters and solder‐mask definition methods of PCB pad design parameters on the performance of solder paste stencil printing process for the assembly of 01005 chip components.Design/methodology/approachDuring the study, two types of stencils were manufactured for the evaluations: electroformed stencils and electropolished laser‐cut stencils. The electroformed stencils were manufactured using the standard electroforming process and their use in the paste printing process was compared

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Vallabhajosyula, Phani. "Stencil Print solutions for Advance Packaging Applications." International Symposium on Microelectronics 2017, no. 1 (October 1, 2017): 000646–51. http://dx.doi.org/10.4071/isom-2017-poster1_124.

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Abstract This paper address two significant applications of stencils in advance packaging field: 1. Ultra-Thin stencils for miniature component (0201m) assembly; 2. Deep Cavity stencils for embedded (open cavity) packaging. As the world of electronics continues to evolve with focus on smaller, lighter, faster, and feature-enhanced high-performing electronic products, so are the requirement for complex stencils to assemble such components. These stencil thicknesses start from less than 25um with apertures as small as 60um (or less). Step stencils are used when varying stencil thicknesses are re

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Wickström, Henrika, Rajesh Koppolu, Ermei Mäkilä, Martti Toivakka, and Niklas Sandler. "Stencil Printing—A Novel Manufacturing Platform for Orodispersible Discs." Pharmaceutics 12, no. 1 (January 1, 2020): 33. http://dx.doi.org/10.3390/pharmaceutics12010033.

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Stencil printing is a commonly used printing method, but it has not previously been used for production of pharmaceuticals. The aim of this study was to explore whether stencil printing of drug containing polymer inks could be used to manufacture flexible dosage forms with acceptable mass and content uniformity. Formulation development was supported by physicochemical characterization of the inks and final dosage forms. The printing of haloperidol (HAL) discs was performed using a prototype stencil printer. Ink development comprised of investigations of ink rheology in combination with printab

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YAMADA, Hiromichi. "Stencil Printing Ink." Journal of the Japan Society of Colour Material 70, no. 11 (1997): 751–56. http://dx.doi.org/10.4011/shikizai1937.70.751.

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Yu, JiangYou, Le Cao, Hao Fu, and Jun Guo. "A method for optimizing stencil cleaning time in solder paste printing process." Soldering & Surface Mount Technology 31, no. 4 (September 2, 2019): 233–39. http://dx.doi.org/10.1108/ssmt-10-2018-0037.

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PurposeStencil cleaning is an important operation in solder paste printing process. Frequent cleaning may interrupt printing process and increase idle time, as well as loss for performing cleaning. This paper aims to propose a method to optimize the stencil cleaning time and reduce unnecessary cleaning operations and losses.Design/methodology/approachThis paper uses a discrete-time, discrete-state homogeneous Markov chain to model the stencil printing performance degradation process, and the quality loss during the stencil printing process is estimated based on this degradation model. A stenci

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Pei-Lim, Sze, Kenneth Thum, and Andy Mackie. "Challenges in Fine Feature Solder Paste Printing for SiP Applications." International Symposium on Microelectronics 2016, no. 1 (October 1, 2016): 000245–49. http://dx.doi.org/10.4071/isom-2016-wp12.

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Abstract The rapid development in the Internet of Things (IoT) has seen a surge in demand for System-in-Package (SiP), which is capable of packing more functionality into a single package with a small form factor. This continues to push miniaturization to an even greater level, therefore creating assemblies with smaller components and greater density. 01005 passive components are being used in most of the current SiP technology and the industry is looking at utilizing 008004 passive components for the next generation SiP. The stencil aperture design for 008004 will likely be about half of 0100

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Sriperumbudur, Sai Srinivas, Michael Meilunas, and Martin Anselm. "Solder paste volume effects on assembly yield and reliability for bottom terminated components." Soldering & Surface Mount Technology 29, no. 2 (April 3, 2017): 99–109. http://dx.doi.org/10.1108/ssmt-05-2016-0010.

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Purpose Solder paste printing is the most common method for attaching surface mount devices to printed circuit boards (PCB), and it has been reported that a majority of all assembly defects occur during the stencil printing process. It is also recognized that the solder paste printing process is wholly responsible for the solder joint formation of leadless package technologies such as land grid array (LGA) and quad-flat no-lead (QFN) components and therefore is a determining factor in the long-term reliability of said devices. The aim of this experiment is to determine the acceptable lower lim

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W. Kay, Robert, Gerard Cummins, Thomas Krebs, Richard Lathrop, Eitan Abraham, and Marc Desmulliez. "Statistical analysis of stencil technology for wafer-level bumping." Soldering & Surface Mount Technology 26, no. 2 (April 1, 2014): 71–78. http://dx.doi.org/10.1108/ssmt-07-2013-0017.

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Purpose – Wafer-level stencil printing of a type-6 Pb-free SAC solder paste was statistically evaluated at 200 and 150 μm pitch using three different stencil manufacturing technologies: laser cutting, DC electroforming and micro-engineered electroforming. This investigation looks at stencil differences in printability, pitch resolution, maximum achievable bump height, print co-planarity, paste release efficiency, and cleaning frequency. The paper aims to discuss these issues. Design/methodology/approach – In this paper, the authors present a statistical evaluation of the impact of stencil tech

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Whitmore, Mark, and Clive Ashmore. "Developments in Stencil Printing Technology for 0.3mm Pitch CSP Assembly." International Symposium on Microelectronics 2011, no. 1 (January 1, 2011): 000502–8. http://dx.doi.org/10.4071/isom-2011-wa2-paper2.

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As electronics assemblies continue to shrink in form factor, forcing designers towards smaller components with decreasing pitches, the Surface Mount assembly process is becoming increasingly challenged. A new “active” squeegee printing process has been developed to assist in the stencil printing of solder pastes for next generation ultra fine pitch components such as 0.3mm pitch CSP’s. Results indicate that today’s accepted stencil area ratio rules, which govern solder paste transfer efficiency can be significantly pushed to extend stencil printing process capabilities to stencil apertures hav

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Vallabhajosyula, Phani. "Ultra-Thin, Fine-Pitch Step Stencils For Miniature Component Assembly." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2017, DPC (January 1, 2017): 1–18. http://dx.doi.org/10.4071/2017dpc-poster_vallabhajosyula.

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Mixed technology applications for Flip-Chip (FC) / SMT require special step stencil designs where flux is printed first for the FC and SMD paste printed next with a second stencil that has a relief pocket etched or formed in the FC area. Step stencils are used when varying stencil thicknesses are required to print into cavities or on elevated surfaces or to provide relief for certain features on a board. In the early days of SMT assembly, Step Stencils were used to reduce the stencil thickness for 25 mil pitch leaded device apertures. Thick metal stencils that have both relief-etch pockets and

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Dissertations / Theses on the topic "Stencil printing"

1

Braunstein, Daniel J. (Daniel Judah). "Real time process monitoring of solder paste stencil printing." Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/35374.

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Rodriguez, German Dario. "Analysis of the solder paste release in fine pitch stencil printing processes." Thesis, Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/18867.

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Ismail, Ismarani. "Stencil printing of solder paste for reflow soldering of surface mount technology assembly." Thesis, University of Salford, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.426875.

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Edwards, Matthew Bruce ARC Centre of Excellence in Advanced Silicon Photovoltaics &amp Photonics Faculty of Engineering UNSW. "Screen and stencil print technologies for industrial N-type silicon solar cells." Publisher:University of New South Wales. ARC Centre of Excellence in Advanced Silicon Photovoltaics & Photonics, 2008. http://handle.unsw.edu.au/1959.4/41372.

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To ensure that photovoltaics contributes significantly to future world energy production, the cost per watt of producing solar cells needs to be drastically reduced. The use of n-type silicon wafers in conjunction with industrial print technology has the potential to lower the cost per watt of solar cells. The use of n-type silicon is expected to allow the use of cheaper Cz substrates, without a corresponding loss in device efficiency. Printed metallisation is well utilised by the PV industry due to its low cost, yet there are few examples of its application to n-type solar cells. This thesis

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Marks, Antony Edward. "Characterisation of lead-free solder pastes and their correlation with the stencil printing process performance." Thesis, University of Greenwich, 2012. http://gala.gre.ac.uk/9456/.

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Solder pastes are complex materials whose properties are governed by many factors. Variations exhibited in solder paste characteristics make it increasingly difficult to understand the correlations between solder paste properties and their printing process performance. The recent EU directives on RoHS (Restriction of Hazardous Substances – enacted by UK regulations) and WEEE (Waste from Electrical and Electronic Equipment) has led to the use of lead-free soldering in the SMA (surface mount assembly) process, and an urgent need for better understanding of the characteristics and printing perfor

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He, D. "Modelling and computer simulation of the behaviour of solder paste in stencil printing for surface mount assembly." Thesis, University of Salford, 1998. http://usir.salford.ac.uk/14676/.

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One of the main challenges facing the electronics manufacturing industry in solder paste printing for ultra-fine pitch surface mount and flip-chip assembly is the difficulty in achieving consistent paste deposit volumes from pad-to-pad. At the very small aperture geometries required for ultra-fine pitch and flip chip assembly, flow properties of the paste becomes one of the dominant factors in the printing process. It is widely accepted that over 60% of assembly defects originate from the solder paste printing stage, and hence the urgent need for a better understanding of solder paste rheology

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Jemai, Norchene. "Développement de la technique de sérigraphie pour la formation de billes de connexions inférieures a 100µm pour l'assemblage 3D : optimisation et étude de fiabilité." Thesis, Toulouse, INSA, 2010. http://www.theses.fr/2010ISAT0010/document.

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L’assemblage et le conditionnement en électronique représentent un enjeu de création de nouveaux systèmes électroniques hybrides rassemblant sur un même substrat des éléments électroniques, optiques, mécaniques… La technologie Flip-chip , introduite par IBM et baptisée C4 (Control Collapse Chip Connection), garantit une plus grande densité d’intégration tout en gardant les mêmes dimensions de puce. Au coeur de cette technologie, le « Bumping » est un procédé qui consiste en l’introduction d’une microbille conductrice entre deux plots de connexion des puces afin de réaliser une liaison électriq

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Jakub, Miroslav. "Technologické postupy pájení pouzder QFN." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2015. http://www.nusl.cz/ntk/nusl-221072.

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This master´s thesis deals with QFN packages soldering and technology procedures optimization. The aim of theoretical part is description of QFN packages, their assembly and reflow soldering on PCB in HONEYWELL. The aim of the practical part is to propose a method of measuring temperature and optimizing the thermal profiles of selected PCB with QFN packages by using convection (HONEYWELL) and infrared (BUT) reflow ovens. Comparison and evaluation of thermal profiles for 3 production PCBś with QFN packages using solder paste AIM NC257-2 were realised. The main part of master´s thesis are appear

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Barajas, Leandro G. "Process Control in High-Noise Environments Using A Limited Number Of Measurements." Diss., Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/7741.

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The topic of this dissertation is the derivation, development, and evaluation of novel hybrid algorithms for process control that use a limited number of measurements and that are suitable to operate in the presence of large amounts of process noise. As an initial step, affine and neural network statistical process models are developed in order to simulate the steady-state system behavior. Such models are vitally important in the evaluation, testing, and improvement of all other process controllers referred to in this work. Afterwards, fuzzy logic controller rules are assimilated into a mathe

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Lin, Chen-Yu, and 林珍猷. "Discovering Stencil Printing Quality Defects." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/16229399228224883494.

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碩士<br>樹德科技大學<br>經營管理研究所<br>98<br>台灣經濟的增長已經嚴重依賴於高科技廠商在製造集成電路和3C產品。計算機和電信產品的主要類別，通過建立電子裝配過程。表面貼裝技術（SMT ）是一個主要手段，生產各種電子產品。提升整體素質和能力的SMT組裝線為主體，以降低生產成本，提高質量保證水平，並成為台灣主要的挑戰保持住在競爭edge.SMT製成品的主要方法是產生各種電子產品。噴花是一個最重要的SMT裝配過程。根據行業報告，平均60 ％的焊接缺陷是由於噴花進程。在本研究中，數據挖掘方法挖掘潛在的印刷缺陷模式。通過實驗設計（ DOE）的結構進行了數據收集利用決策樹算法（ C5.0 ），方差分析（方差）算法。此外，根據分類的缺陷，開發預測缺陷印刷parameters.The根據調查結果，可進一步提供電子製造商能夠加快行安裝程序，提高焊接質量。

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Books on the topic "Stencil printing"

1

Kelly, Jo'Anne. Terrific stencils & stamps. New York: Sterling Pub. Co., 1996.

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Hambleton, Laura. Pop out stencil art: Bugs. London: QED Publishing, 2015.

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Pop-out stencil art: Safari animals. London: QED Publishing, 2015.

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Stencil craft: Techniques for fashion, art & home. Cincinnati, Ohio: North Light Books, 2015.

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Stencils, prints and special effects. New York: Mondo Pub., 2007.

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Robins, Deri. Stencils, prints and special effects. London: QED, 2007.

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Printing by hand: A modern guide to printing with handmade stamps, stencils, and silk screens. New York: Stewart, Tabori & Chang, 2008.

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8

Bijutsukan, Tōkyō Kokuritsu Kindai. Gendai no katazome, kurikaesu patān: Contemporary stencil dyeing and printing, the repetition of patterns. [Tokyo]: Tōkyō Kokuritsu Kindai Bijutsukan Kōgeikan, 1994.

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9

ill, Mukhida Zul, ed. Stencils and screens. New York: Thomson Learning, 1993.

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Terrific stencils & stamps. New York: Sterling, 1996.

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Book chapters on the topic "Stencil printing"

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Chen, Fang, Kaikai Han, Kangwei Chang, Shixun Luan, Wenbo Dou, Li Ma, and Yingjie Ding. "Brief Design Requirements of Screen Printing Stencil." In Advances in Intelligent Systems and Computing, 13–19. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-16-1843-7_2.

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Morris, John R., and Thaddeus Wojcik. "Screen and Stencil Printing Technology for Fine-Pitch Assembly." In Handbook of Fine Pitch Surface Mount Technology, 194–232. Boston, MA: Springer US, 1994. http://dx.doi.org/10.1007/978-1-4684-1437-0_6.

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Niu, Shilin, Zhengjun Bo, Le Cao, Lieqiang Li, Piao Wan, Hao Fu, and Jiangyou Yu. "Decision-Making of Stencil Cleaning for Solder Paste Printing Machine Based on Variable Threshold Sequence." In Communications in Computer and Information Science, 325–31. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-13-2396-6_31.

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"EFFECT OF STENCIL APERTURE WALL FINISH AND SHAPE ON SOLDER PASTE PRINTING IN SMT." In Advances In Manufacturing Technology VIII, 784–89. CRC Press, 1994. http://dx.doi.org/10.1201/9781482272604-122.

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Conference papers on the topic "Stencil printing"

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Krammer, Oliver, Laszlo-Milan Molnar, Laszlo Jakab, and Christian Klein. "Stencil deformation during stencil printing." In 2009 15th International Symposium for Design and Technology of Electronics Packages (SIITME 2009). IEEE, 2009. http://dx.doi.org/10.1109/siitme.2009.5407378.

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Cabahug, Elsie A., and Marlon D. Bartolo. "Solder Stencil Printing On Deep Cavity." In 2008 10th Electronics Packaging Technology Conference (EPTC). IEEE, 2008. http://dx.doi.org/10.1109/eptc.2008.4763512.

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Krammer, Oliver. "Finite volume modelling of stencil printing process." In 2014 IEEE 20th International Symposium for Design and Technology in Electronic Packaging (SIITME). IEEE, 2014. http://dx.doi.org/10.1109/siitme.2014.6966998.

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Oliveira, Ricardo F., Nelson Rodrigues, José Carlos Teixeira, Duarte Santos, Delfim Soares, Maria F. Cerqueira, and Senhorinha F. C. F. Teixeira. "A Numerical Study of Solder Paste Rolling Process for PCB Printing." In ASME 2018 International Mechanical Engineering Congress and Exposition. American Society of Mechanical Engineers, 2018. http://dx.doi.org/10.1115/imece2018-88035.

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The increasing demand for electronic devices associated with the increasing competitiveness between enterprises, pushes towards process automation to decrease production costs. The reflow soldering has proven to be effective in this regard. This is composed by a series of steps or processes, such as: (a) stencil printing, (b) component placement and (c) reflow oven soldering. Each process has its specific traits that contribute to the overall process efficiency. The present study is directed towards process (a), which includes the rolling of the solder paste over the stencil surface, followed

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Whitmore, Mark, and Jeff Schake. "Screen and stencil printing processes for wafer backside coating." In 2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT). IEEE, 2008. http://dx.doi.org/10.1109/iemt.2008.5507863.

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Kaneko, Tsukasa, Kazuki Iwata, and Makiko Kobayashi. "Sol-gel composite film fabrication by paint stencil printing." In 2014 IEEE International Ultrasonics Symposium (IUS). IEEE, 2014. http://dx.doi.org/10.1109/ultsym.2014.0239.

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Zhao, Fei, and Yuan-Lan Dang. "A study of screen/stencil printing on LTCC substrate." In 2015 International Workshop on Materials, Manufacturing Technology, Electronics and Information Science. WORLD SCIENTIFIC, 2016. http://dx.doi.org/10.1142/9789813109384_0002.

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He, Xi, Ziyu Liu, Jian Cai, Yu Chen, Lin Tan, and Qian Wang. "Characterization of stencil printing parameters for fine pitch wafer bumping." In 2014 15th International Conference on Electronic Packaging Technology (ICEPT). IEEE, 2014. http://dx.doi.org/10.1109/icept.2014.6922601.

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Yang, Jimmy, Jay Cy Huang, Vincent Lee, Jojo Tsai, J. L. Ku, K. C. Li, Ander Hsieh, and Cheng Yu Chen. "Stencil evaluation of ultra fine pitch solder paste printing process." In 2010 5th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT). IEEE, 2010. http://dx.doi.org/10.1109/impact.2010.5699642.

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Mu-Chun Wang, Zhen-Ying Hsieh, Kuo-Shu Huang, Chiao-Hao Tu, Shuang-Yuan Chen, and Heng-Sheng Huang. "A study to stencil printing technology for solder bump assembly." In 2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT). IEEE, 2009. http://dx.doi.org/10.1109/impact.2009.5382134.

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Reports on the topic "Stencil printing"

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Martens, Niles. The paper stencil method of silk screen printing. Portland State University Library, January 2000. http://dx.doi.org/10.15760/etd.701.

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