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Journal articles on the topic 'Superjunction MOSFET'

Author: Grafiati

Published: 28 July 2021

Last updated: 25 July 2025

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1

Liu, Jun, Li Li, Yue Yang Liu, Wen Yu Gao, Rui Jin, and Kun Shan Yu. "Simulation Research of Tapered Sidewall Trench Superjunction MOSFETs." Applied Mechanics and Materials 568-570 (June 2014): 1196–200. http://dx.doi.org/10.4028/www.scientific.net/amm.568-570.1196.

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This paper studied the relationship of breakdown voltage and charge imbalance of 600V tapered sidewall trench superjunction MOSFETs. Simulation structures including three types of structures: 600V vertical sidewall trench superjunction MOSFET (Type1) and 600V tapered sidewall trench superjunction MOSFET (Type2 and Type3). Under the condition of P-column and N-column uniform doping, Type1 structure has the highest peak breakdown voltage. Type2 structure has the lowest peak breakdown voltage under the condition of P-column doping concentration slightly lower than N-column doping concentration. T

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2

Prado, Edemar O., Pedro C. Bolsi, Hamiltom C. Sartori, and José R. Pinheiro. "An Overview about Si, Superjunction, SiC and GaN Power MOSFET Technologies in Power Electronics Applications." Energies 15, no. 14 (2022): 5244. http://dx.doi.org/10.3390/en15145244.

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This work presents a comparative analysis among four power MOSFET technologies: conventional Silicon (Si), Superjunction (SJ), Silicon Carbide (SiC) and Gallium Nitride (GaN), indicating the voltage, current and frequency ranges of the best performance for each technology. For this, a database with 91 power MOSFETs from different manufacturers was built. MOSFET losses are related to individual characteristics of the technology: drain-source on-state resistance, input capacitance, Miller capacitance and internal gate resistance. The total losses are evaluated considering a drain-source voltage

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3

Zhang, Meng, Baikui Li, and Jin Wei. "New Power MOSFET with Beyond-1D-Limit RSP-BV Trade-Off and Superior Reverse Recovery Characteristics." Materials 13, no. 11 (2020): 2581. http://dx.doi.org/10.3390/ma13112581.

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The application of conventional power metal-oxide-semiconductor field-effect transistor (MOSFET) is limited by the famous one-dimensional “silicon limit” (1D-limit) in the trade-off relationship between specific on-resistance (RSP) and breakdown voltage (BV). In this paper, a new power MOSFET architecture is proposed to achieve a beyond-1D-limit RSP-BV trade-off. Numerical TCAD (technology computer-aided design) simulations were carried out to comparatively study the proposed MOSFET, the conventional power MOSFET, and the superjunction MOSFET. All the devices were designed with the same breakd

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4

Kong, Moufu, Zewei Hu, Ronghe Yan, Bo Yi, Bingke Zhang, and Hongqiang Yang. "A novel SiC high-k superjunction power MOSFET integrated Schottky barrier diode with improved forward and reverse performance." Journal of Semiconductors 44, no. 5 (2023): 052801. http://dx.doi.org/10.1088/1674-4926/44/5/052801.

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Abstract A new SiC superjunction power MOSFET device using high-k insulator and p-type pillar with an integrated Schottky barrier diode (Hk-SJ-SBD MOSFET) is proposed, and has been compared with the SiC high-k MOSFET (Hk MOSFET), SiC superjuction MOSFET (SJ MOSFET) and the conventional SiC MOSFET in this article. In the proposed SiC Hk-SJ-SBD MOSFET, under the combined action of the p-type region and the Hk dielectric layer in the drift region, the concentration of the N-drift region and the current spreading layer can be increased to achieve an ultra-low specific on-resistance (R on,sp). The

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5

Saito, W., I. Omura, S. Aida, et al. "High Breakdown Voltage ($≫$1000 V) Semi-Superjunction MOSFETs Using 600-V Class Superjunction MOSFET Process." IEEE Transactions on Electron Devices 52, no. 10 (2005): 2317–22. http://dx.doi.org/10.1109/ted.2005.856804.

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6

Rizzo, Santi Agatino, Nunzio Salerno, Cristina Ventura, Alfio Scuto, and Giuseppe Sorrentino. "A Critical Analysis and Comparison of the Effect of Source Inductance on 3- and 4-Lead SuperJunction MOSFETs Turn-Off." Electronics 13, no. 20 (2024): 4051. http://dx.doi.org/10.3390/electronics13204051.

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This paper critically compares the turn-off performance of two package solutions, 3-lead (3L) vs. 4-lead (4L), in SuperJunction MOSFETs. It is commonly assumed that the better performance (lower switching losses) of the 4L MOSFET is obtained thanks to the decoupling of the power and driving loops. On the contrary, in this work, the experimental results, circuit models and Kirchhoff laws show that the turn-off improvement (lower turn-off losses) obtained by adopting the Kelvin source is due to the lower inductance of the driver loop of the 4L MOSFET, instead of the decoupling between the driver

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7

Kang, H., and F. Udrea. "Theory of 3-D Superjunction MOSFET." IEEE Transactions on Electron Devices 66, no. 12 (2019): 5254–59. http://dx.doi.org/10.1109/ted.2019.2947332.

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8

Xia, Yun, Wanjun Chen, Chao Liu, Ruize Sun, Zhaoji Li, and Bo Zhang. "Enhanced Reverse Recovery Performance in Superjunction MOSFET with Reduced Hole-Barrier." ECS Journal of Solid State Science and Technology 11, no. 1 (2022): 015002. http://dx.doi.org/10.1149/2162-8777/ac4a7c.

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High reverse recovery charge (QRR) and resultant high switching losses have become the main factors that constrain the performance and application area of superjunction MOSFET (SJ-MOSFET). To reduce QRR, an SJ-MOSFET with reduced hole-barrier is proposed and demonstrated. By introducing a Schottky contact on the bottom of the n-pillar at the drain side, the barrier for the hole carrier is dramatically reduced in the reverse conduction state. As a result, the hole carrier in the drift region is significantly reduced, which results in a low QRR and enhanced reverse recovery performance. Compared

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9

Chowdhury, Sauvik, Zachary Stum, Zhong Da Li, Katsunori Ueno, and T. Paul Chow. "Comparison of 600V Si, SiC and GaN Power Devices." Materials Science Forum 778-780 (February 2014): 971–74. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.971.

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In this paper the DC and switching performance of 600V Si, SiC and GaN power devices using device simulation. The devices compared are Si superjunction MOSFET, Si field stop IGBT, SiC UMOSFET and GaN HEMT.

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10

Chen, Jian, Weifeng Sun, Long Zhang, Jing Zhu, and Yanzhang Lin. "A Review of Superjunction Vertical Diffused MOSFET." IETE Technical Review 29, no. 1 (2012): 44. http://dx.doi.org/10.4103/0256-4602.93137.

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11

Srikanth, S., and Shreepad Karmalkar. "On the Charge Sheet Superjunction (CSSJ) MOSFET." IEEE Transactions on Electron Devices 55, no. 12 (2008): 3562–68. http://dx.doi.org/10.1109/ted.2008.2006545.

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12

Chen, Yu, Yung C. Liang, Ganesh S. Samudra, Xin Yang, Kavitha D. Buddharaju, and Hanhua Feng. "Progressive Development of Superjunction Power MOSFET Devices." IEEE Transactions on Electron Devices 55, no. 1 (2008): 211–19. http://dx.doi.org/10.1109/ted.2007.911344.

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13

Parmar, Onika, Prateek Baghel, and Alok Naugarhiya. "Novel strained superjunction vertical single diffused MOSFET." AEU - International Journal of Electronics and Communications 113 (January 2020): 152929. http://dx.doi.org/10.1016/j.aeue.2019.152929.

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14

Gao, Rongyu, Hongyu Cheng, Wenmao Li, et al. "A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC Pillars." Crystals 12, no. 7 (2022): 916. http://dx.doi.org/10.3390/cryst12070916.

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In the traditional SJ MOSFET structure, n/p pillars with the same doping concentrations in the drift region are introduced to decrease the on-resistance. However, SJ MOSFET will turn on the parasitic diodes due to fast reverse recovery, further inducing severe oscillation in the reverse recovery of the device and the corresponding adverse effect on the circuit. In this study, a fast recovery vertical superjunction (SJ) MOSFET with n-Si and p-3C-SiC pillars was studied. Unlike other structures, such as the 4H-SiC superjunction UMOSFET with a heterojunction diode or the ultra-low recovery charge

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15

Yamashiro, Yusuke, Masakazu Okada, Masakazu Baba, et al. "Behavior of Shockley-Type Stacking Faults in SiC Superjunction MOSFET under Body Diode Current Stress." Materials Science Forum 1062 (May 31, 2022): 676–82. http://dx.doi.org/10.4028/p-794hb3.

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We evaluated stacking faults expanding by body diode current stress in the SiC Semi-SJ MOSFET for the first time. It was found that body diode degradation of the SJ MOSFETs tends to be smaller than that of conventional Non-SJ MOSFETs. Detailed crystal evaluations revealed that the stacking faults did not expand into the SJ structure. It is assumed that the expansion stops due to low carrier densities. The result suggests that the SJ device has a high potential as a device for suppressing the body diode degradation.

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16

Chen, Chia-Yuan, Yun-Kai Lai, Kung-Yen Lee, Chih-Fang Huang, and Shin-Yi Huang. "Investigation of 3.3 kV 4H-SiC DC-FSJ MOSFET Structures." Micromachines 12, no. 7 (2021): 756. http://dx.doi.org/10.3390/mi12070756.

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This research proposes a novel 4H-SiC power device structure—different concentration floating superjunction MOSFET (DC-FSJ MOSFET). Through simulation via Synopsys Technology Computer Aided Design (TCAD) software, compared with the structural and static characteristics of the traditional vertical MOSFET, DC-FSJ MOSFET has a higher breakdown voltage (BV) and lower forward specific on-resistance (Ron,sp). The DC-FSJ MOSFET is formed by multiple epitaxial technology to create a floating P-type structure in the epitaxial layer. Then, a current spreading layer (CSL) is added to reduce the Ron,sp. T

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17

Na, Jaeyeop, Jinhee Cheon, and Kwangsoo Kim. "High performance 4H-SiC MOSFET with deep source trench." Semiconductor Science and Technology 37, no. 4 (2022): 045004. http://dx.doi.org/10.1088/1361-6641/ac5103.

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Abstract In this study, we investigated a 4H-SiC deep source trench metal-oxide semiconductor field-effect transistor (DST-MOSFET) using technology computer-aided design numerical simulations. The proposed DST-MOSFET comprises a P-pillar formed along with the DST and a side P+ shielding region (SPR), which replaces the gate trench bottom SPR. Owing to the superjunction generated by the P-pillar and N-drift region, the static characteristics of the DST-MOSFET were superior to those of the trench gate MOSFET (UMOSFET) and double-trench MOSFET (DT-MOSFET). The specific on-resistance and Baliga’s

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18

Tamaki, Tomohiro, Shinya Ishida, Yoshikazu Tomizawa, et al. "On-State and Switching Performance Comparison of A 600 V-Class Hybrid SiC JFET and Si Superjunction MOSFETs." Materials Science Forum 740-742 (January 2013): 950–53. http://dx.doi.org/10.4028/www.scientific.net/msf.740-742.950.

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We compare the on-state and switching performance of a 600 V-class Hybrid SiC junction field effect transistor (HJT) and Si superjunction MOSFETs (SJ-MOSs), both of which are packaged in TO-3P full-mold package, as a function of operating frequency. The maximum load current is limited by the package power dissipation rating determined by the maximum junction temperature. Since the HJT is composed of a SiC JFET and a low voltage Si MOSFET, the allowable maximum junction temperature of the HJT is the same as that of SJ-MOSFETs, namely 150 °C. The experimental results show that the maximum operat

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19

Liu, Ke, Chunjian Tan, Shizhen Li, et al. "Reverse Recovery Optimization of Multiepi Superjunction MOSFET Based on Tunable Doping Profile." Electronics 12, no. 13 (2023): 2977. http://dx.doi.org/10.3390/electronics12132977.

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This paper proposes and simulates research on the reverse recovery characteristics of two novel superjunction (SJ) MOSFETs by adjusting the doping profile. In the manufacturing process of the SJ MOSFET using multilayer epitaxial deposition (MED), the position and concentration of each Boron bubble can be adjusted by designing different doping profiles to adjust the resistance of the upper half P-pillar. A higher P-pillar resistance can slow down the sweep out speed of hole carriers when the body diode is turned off, thus resulting in a smoother reverse recovery current and reducing the current

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20

Cao, Zhen, Baoxing Duan, Tongtong Shi, Song Yuan, and Yintang Yang. "A Superjunction U-MOSFET With SIPOS Pillar Breaking Superjunction Silicon Limit by TCAD Simulation Study." IEEE Electron Device Letters 38, no. 6 (2017): 794–97. http://dx.doi.org/10.1109/led.2017.2694842.

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21

Boccarossa, Marco, Kyrylo Melnyk, Arne Benjamin Renz, et al. "A 3.3 kV SiC Semi-Superjunction MOSFET with Trench Sidewall Implantations." Micromachines 16, no. 2 (2025): 188. https://doi.org/10.3390/mi16020188.

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Superjunction (SJ) technology offers a promising solution to the challenges faced by silicon carbide (SiC) Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs) operating at high voltages (>3 kV). However, the fabrication of SJ devices presents significant challenges due to fabrication complexity. This paper presents a comprehensive analysis of a feasible and easy-to-fabricate semi-superjunction (SSJ) design for 3.3 kV SiC MOSFETs. The proposed approach utilizes trench etching and sidewall implantation, with a tilted trench to facilitate the implantation process. Through Technology C

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22

Chen, Yu, Yung C. Liang, and Ganesh S. Samudra. "Design of Gradient Oxide-Bypassed Superjunction Power MOSFET Devices." IEEE Transactions on Power Electronics 22, no. 4 (2007): 1303–10. http://dx.doi.org/10.1109/tpel.2007.900559.

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23

Ye, Hua, and Pradeep Haldar. "Optimization of the Porous-Silicon-Based Superjunction Power MOSFET." IEEE Transactions on Electron Devices 55, no. 8 (2008): 2246–51. http://dx.doi.org/10.1109/ted.2008.926280.

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24

He, Qingyuan, Xiaorong Luo, Tian Liao, et al. "4H-SiC superjunction trench MOSFET with reduced saturation current." Superlattices and Microstructures 125 (January 2019): 58–65. http://dx.doi.org/10.1016/j.spmi.2018.10.016.

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25

Ren, Min, Meng Pi, Rongyao Ma, et al. "Theoretical and experimental study on the vertical-variable-doping superjunction MOSFET with optimized process window." Journal of Semiconductors 46, no. 6 (2025): 062302. https://doi.org/10.1088/1674-4926/24070029.

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Abstract As a type of charge-balanced power device, the performance of super-junction MOSFETs (SJ-MOS) is significantly influenced by fluctuations in the fabrication process. To overcome the relatively narrow process window of conventional SJ-MOS, an optimized structure "vertical variable doping super-junction MOSFET (VVD-SJ)" is proposed. Based on the analysis using the charge superposition principle, it is observed that the VVD-SJ, in which the impurity concentration of the P-pillar gradually decreases while that of the N-pillar increases from top to bottom, improves the electric field distr

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26

Lee, Gyeongyeop, and Jungsik Kim. "Effect of Radiation Displacement Defect on Superjunction MOSFET using TCAD Simulation." Journal of the Institute of Electronics and Information Engineers 58, no. 8 (2021): 49–55. http://dx.doi.org/10.5573/ieie.2021.58.8.49.

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27

Lee, Gyeongyeop, and Jungsik Kim. "Effect of Radiation Displacement Defect on Superjunction MOSFET using TCAD Simulation." Journal of the Institute of Electronics and Information Engineers 58, no. 8 (2021): 49–55. http://dx.doi.org/10.5573/ieie.2021.58.8.49.

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28

Yoon, Jongwoon, and Kwangsoo Kim. "A Novel MOS-Channel Diode Embedded in a SiC Superjunction MOSFET for Enhanced Switching Performance and Superior Short Circuit Ruggedness." Electronics 10, no. 21 (2021): 2619. http://dx.doi.org/10.3390/electronics10212619.

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In this study, a novel MOS-channel diode embedded in a SiC superjunction MOSFET (MCD SJ-MOSFET) is proposed and analyzed by means of numerical TCAD simulations. Owing to the electric field shielding effect of the P+ body and the P-pillar, the channel diode oxide thickness (tco) of MCD can be set to very thin while achieving a low maximum oxide electric field (EMOX) under 3 MV/cm. Therefore, the turn-on voltage (VF) of the proposed structure was 1.43 V, deactivating the parasitic PIN body diode. Compared with the SJ-MOSFET, the reverse recovery time (trr) and the reverse recovery charge (Qrr) w

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29

Parmar, Onika, and Alok Naugarhiya. "High temperature analysis of strained superjunction vertical single diffused MOSFET." International Journal of Modern Physics B 35, no. 19 (2021): 2150196. http://dx.doi.org/10.1142/s0217979221501964.

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This paper focuses on testing the reliability of a Strained Superjunction Vertical Single diffused MOS (s-SJVSDMOS) at high-temperature. It provides an in-depth study of the device behavior at high-temperatures specifically at 300, 350 and 400 K. The s-SJVSDMOS is simulated in 2D T-CAD simulator and the outcomes are extracted. The variation of the extracted parameters with temperature is explored. The electrical and channel characteristics of the device are analyzed here. From the discussion, it was deduced that at high-temperature the device exhibits analogous characteristics as at room-tempe

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30

Kamoshida, Naoki, Ryuji Iijima, Takanori Isobe, and Hiroshi Tadano. "Loss Analysis of Quasi Z-source Inverter with Superjunction-MOSFET." IEEJ Transactions on Industry Applications 138, no. 5 (2018): 463–70. http://dx.doi.org/10.1541/ieejias.138.463.

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31

Zhong, Hanmei, Yung C. Liang, Ganesh S. Samudra, and Xin Yang. "Practical superjunction MOSFET device performance under given process thermal cycles." Semiconductor Science and Technology 19, no. 8 (2004): 987–96. http://dx.doi.org/10.1088/0268-1242/19/8/007.

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32

Nautiyal, Payal, Alok Naugarhiya, and Shrish Verma. "Strained superjunction U-MOSFET with insulating layer between alternate pillars." Materials Research Express 6, no. 4 (2019): 046424. http://dx.doi.org/10.1088/2053-1591/aaff1d.

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33

Wang, Ying, Hai-fan Hu, and Chao Cheng. "Simulation study of semi-superjunction power MOSFET with SiGe pillar." Superlattices and Microstructures 47, no. 2 (2010): 314–24. http://dx.doi.org/10.1016/j.spmi.2009.12.005.

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34

Chen, Weizhong, Wei Wang, Yong Liu, Bo Zhang, and Chao Ma. "A semi-superjunction MOSFET with P-type Bottom Assist Layer." Superlattices and Microstructures 83 (July 2015): 745–54. http://dx.doi.org/10.1016/j.spmi.2015.03.065.

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35

Kamoshida, Naoki, Ryuji Iijima, Takanori Isobe, and Hiroshi Tadano. "Loss analysis of quasi Z-source inverter with Superjunction-MOSFET." Electrical Engineering in Japan 205, no. 2 (2018): 54–61. http://dx.doi.org/10.1002/eej.23145.

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36

Lee, Gyeongyeop, Jonghyun Ha, and Jungsik Kim. "The Study on Machine Learning Approach for Optimization of Superjunction MOSFET." Transactions of The Korean Institute of Electrical Engineers 70, no. 10 (2021): 1475–80. http://dx.doi.org/10.5370/kiee.2021.70.10.1475.

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37

Xue, Peng, Luca Maresca, Michele Riccio, Giovanni Breglio, and Andrea Irace. "Investigation on the Self-Sustained Oscillation of Superjunction MOSFET Intrinsic Diode." IEEE Transactions on Electron Devices 66, no. 1 (2019): 605–12. http://dx.doi.org/10.1109/ted.2018.2881670.

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38

Bauer, Friedhelm, Iulian Nistor, Andrei Mihaila, Marina Antoniou, and Florin Udrea. "Superjunction IGBT Filling the Gap Between SJ MOSFET and Ultrafast IGBT." IEEE Electron Device Letters 33, no. 9 (2012): 1288–90. http://dx.doi.org/10.1109/led.2012.2203092.

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39

Xue, Peng, and Guicui Fu. "Analysis of the reverse recovery oscillation of superjunction MOSFET body diode." Solid-State Electronics 129 (March 2017): 81–87. http://dx.doi.org/10.1016/j.sse.2016.12.014.

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40

Ren, Min, Ze-Hong Li, Guang-Min Deng, et al. "A novel superjunction MOSFET with improved ruggedness under unclamped inductive switching." Chinese Physics B 21, no. 4 (2012): 048502. http://dx.doi.org/10.1088/1674-1056/21/4/048502.

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41

Roig, J., E. Stefanov, and F. Morancho. "Thermal behavior of a superjunction MOSFET in a high-current conduction." IEEE Transactions on Electron Devices 53, no. 7 (2006): 1712–20. http://dx.doi.org/10.1109/ted.2006.876277.

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42

Xin Yang, Y. C. Liang, G. S. Samudra, and Yong Liu. "Tunable oxide-bypassed trench gate MOSFET: breaking the ideal superjunction MOSFET performance line at equal column width." IEEE Electron Device Letters 24, no. 11 (2003): 704–6. http://dx.doi.org/10.1109/led.2003.819268.

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43

Mrvić, Jovan, and Vladimir Vukić. "Comparative analysis of the switching energy losses in GaN HEMT and silicon MOSFET power transistors." Zbornik radova Elektrotehnicki institut Nikola Tesla 30, no. 30 (2020): 93–109. http://dx.doi.org/10.5937/zeint30-29318.

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The subject of this paper is the mutual comparison of switching energy losses in cascode gallium nitride HEMT and silicon "superjunction" MOSFET transistor, both designed for a maximum operating voltage of 650 V. For the purpose of analysis the transistor switching characteristics, the double pulse test method was implemented. Detailed computer simulation models developed in programs of the SPICE family were used. Data on transient turn -on and turn-off processes were generated by LTspice simulation tool, in a wide range of drain currents, using two different gate resistance values for driving

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44

Jovan, Mrvić, and Dj. Vukić Vladimir. "Comparative analysis of the switching energy losses in GaN HEMT and silicon MOSFET power transistors." Proceedings, Electrical Engineering Institute "Nikola Tesla" / Zbornik radova, Elektrotehnički institut "Nikola Tesla" 30, no. 1 (2020): 93–109. https://doi.org/10.5937/zeint30-29318.

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The subject of this paper is the mutual comparison of switching energy losses in cascode gallium nitride HEMT and silicon "superjunction" MOSFET transistor, both designed for a maximum operating voltage of 650 V. For the purpose of analysis the transistor switching characteristics, the double pulse test method was implemented. Detailed computer simulation models developed in programs of the SPICE family were used. Data on transient turn-on and turn-off processes were generated by LTspice simulation tool, in a wide range of drain currents, using two different gate resistance values fo

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45

Kang, Hyemin, and Florin Udrea. "True Material Limit of Power Devices—Applied to 2-D Superjunction MOSFET." IEEE Transactions on Electron Devices 65, no. 4 (2018): 1432–39. http://dx.doi.org/10.1109/ted.2018.2808181.

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46

Kang, H., and F. Udrea. "Material Limit of Power Devices—Applied to Asymmetric 2-D Superjunction MOSFET." IEEE Transactions on Electron Devices 65, no. 8 (2018): 3326–32. http://dx.doi.org/10.1109/ted.2018.2839180.

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47

Huang, Mingmin, Youqi Deng, Li Lai, Zhimei Yang, Bo Gao, and Min Gong. "A Vertical Superjunction MOSFET With n-Si and p-3C-SiC Pillars." IEEE Transactions on Electron Devices 66, no. 9 (2019): 3922–28. http://dx.doi.org/10.1109/ted.2019.2929831.

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48

Li, Ping, Jingwei Guo, Shengdong Hu, Zhi Lin, and Fang Tang. "A Low Reverse Recovery Charge Superjunction MOSFET With an Integrated Tunneling Diode." IEEE Transactions on Electron Devices 66, no. 10 (2019): 4309–13. http://dx.doi.org/10.1109/ted.2019.2936584.

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49

Kang, Hyemin, Jaegil Lee, Kwangwon Lee, and Youngchul Choi. "Trench angle: a key design factor for a deep trench superjunction MOSFET." Semiconductor Science and Technology 30, no. 12 (2015): 125008. http://dx.doi.org/10.1088/0268-1242/30/12/125008.

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50

Takenaka, Kensuke, Takeshi Tawara, Syunki Narita, and Shinsuke Harada. "Double-implanted 4H-SiC superjunction UMOSFET without bipolar degradation." Japanese Journal of Applied Physics 64, no. 2 (2025): 02SP43. https://doi.org/10.35848/1347-4065/adacf2.

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Abstract We demonstrated trench-gate 4H-SiC superjunction MOSFET (SJUMOS) without bipolar degradation using a double implantation process with a multi-epitaxial method. A conventional SJUMOS with a single implantation of aluminum ions can suppress bipolar degradation at the current stress below 1000 A cm−2 because the carrier lifetime of the 4H-SiC epitaxial film is shortened by the damage generated during aluminum ions implantation for p-column formation. To further suppress the bipolar degradation at above 1500 A cm−2, this study developed SJUMOS with the double implantation process. The n-c

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