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Journal articles on the topic 'Switched Capacitor Filter'

Author: Grafiati

Published: 4 June 2021

Last updated: 6 September 2023

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1

PALUSINSKI, O. A., D. M. GETTMAN, D. ANDERSON, H. ANDERSON, and C. MARCJAN. "FILTERING APPLICATIONS OF FIELD PROGRAMMABLE ANALOG ARRAYS." Journal of Circuits, Systems and Computers 08, no. 03 (June 1998): 337–53. http://dx.doi.org/10.1142/s021812669800016x.

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A Field Programmable Analog Array (FPAA), built in CMOS technology, contains uncommitted operational amplifiers, switches, and capacitors. A FPAA containing banks of programmable switched capacitors (SC) can be used to build filters for analog signals as well as a large number of diverse analog applications. The parameters of a given application, such as a filter, are functions of the capacitor values. Manufacturing and quantization errors may result in capacitor values in the FPAA other than those required by the application. For an FPAA to be a viable substitute for dedicated devices we must examine the error performance of the implementation. Such performance analysis can be built into the software to provide circuit designers with additional information. A methodology is described for determining a bound for the filter error as a function of capacitor errors and capacitor sizes. An example of detailed analysis for a low pass filter is included. Measurements of a low-pass filter implemented using Motorola's prototype FPAA compared favorably with the model predictions.

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2

Abdul-jabbar K. Hummady. "SWITCHED CAPACITOR FILTER DESIGN SIMULATION." Diyala Journal of Engineering Sciences 2, no. 1 (June 1, 2009): 49–65. http://dx.doi.org/10.24237/djes.2009.01104.

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The filter is very important tool in electrical circuits, it is the maen part at communication devices. The design operation of any filter depends upon the frequency, bandwidth and gain. In this paper we will introduce a filter has specialist in design, easy in change frequency and bandwidth, without need to change the elements of electrical circuit. It is "SC" filters which essentially depend upon the fabrication of (OP AMP) integrated circuit. Here we used (MALAB R2006b) software code to simulate the process of design

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3

AXELROD, B., Y. BERKOVICH, and A. IOINOVICI. "TRANSFORMERLESS DC–DC CONVERTERS WITH A VERY HIGH DC LINE-TO-LOAD VOLTAGE RATIO." Journal of Circuits, Systems and Computers 13, no. 03 (June 2004): 467–75. http://dx.doi.org/10.1142/s0218126604001556.

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By splitting the output capacitor of a basic boost converter, and combining the resulting capacitors with the main switch in the form of a switched-capacitor circuit, a new step-up structure is realized. Without using a transformer, a high line-to-load DC voltage ratio is obtained. An output filter is added, as usual, in boost converters for getting a free-ripple output. The circuit compares favorably with a quadratic boost converter regarding the count of devices and efficiency, even if it presents a lower DC gain. A DC analysis of the novel converter is presented. Experimental and simulation results confirm the theoretical expectations. By increasing the number of capacitors in the switched-capacitor circuit, higher gains can be obtained. Versatility, high voltage gain and good transient response are the features of the proposed converter.

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4

D’Amico, Stefano, Stefano Marinaci, Peter Pridnig, and Marco Bresciani. "Open-Loop Switched-Capacitor Integrator for Low Voltage Applications." Electronics 9, no. 5 (May 6, 2020): 762. http://dx.doi.org/10.3390/electronics9050762.

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An architecture of a switched-capacitor integrator that includes a charge buffer operating in an open-loop is hereby proposed. As for the switched-capacitor filters, the gain of the proposed integrator, which is given by the input/output capacitor ratio, ensures desensitization to process, voltage, and temperature variations. The proposed circuit is suitable for low voltage supplies. It enables a significant power saving compared to a traditional switched-capacitor integrator. This was demonstrated through an analytical comparison between the proposed integrator and a traditional switched-capacitor integrator. The mathematical results were supported and verified by simulations performed on a circuit prototype designed in 16 nm finFET technology with 0.95 V supply. The proposed switched-capacitor integrator consumes 76 µW, resulting in more than twice the efficiency for the traditional closed-loop switched-capacitor filter as an input voltage equal to 31.25 mV at 7 ns clock period is considered. The comparison of architectures was led among the proposed integrator and the state-of-the-art technology in terms of the figure of merit.

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5

Ananda Mohan, P. V., V. Ramachandran, and M. N. S. Swamy. "New programmable switched-capacitor filter." Electronics Letters 22, no. 5 (1986): 280. http://dx.doi.org/10.1049/el:19860193.

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6

Jain, L. C., and D. Hyland. "A switched capacitor biquad filter." Microelectronics Journal 19, no. 5 (September 1988): 35–38. http://dx.doi.org/10.1016/s0026-2692(88)80137-x.

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7

Mishra, Brijendra, Vivek Singh Kushwah, and Rishi Sharma. "MODELING OF HYBRID MOS FOR THE IMPLEMENTATION OF SWITCHED CAPACITOR FILTER USING SINGLE ELECTRON TRANSISTOR." International Journal of Engineering Technologies and Management Research 5, no. 2 (May 4, 2020): 294–300. http://dx.doi.org/10.29121/ijetmr.v5.i2.2018.659.

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In digital integrated circuit architectures, transistors serve as circuit switches to charge and discharge capacitors to the required logic voltage levels. A transistor is a three terminal semiconductor device used to amplify and switch electronic signals and electrical power. It has been observed that the Scaling down of electronic device sizes has been the fundamental strategy for improving the performance of ultra-large-scale integrated circuits (ULSIs). Metaloxide-semiconductor field-effect transistors (MOSFETs) have been the most prevalent electron devices for ULSI applications. A better device will be formed with the help of new technology, with high operating speed low and power consumption, which can be the future of electronics industry. A methodology for the electric simulation of MOS/SET hybrid circuits will be developed. As a result of this, a functional model for the single-electron transistor will obtain and Implement Switched Capacitor Filter with the help of designed hybrid MOS. The SET model can be easily coded in any hardware description language.

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8

Dehran, Meeti, Indu Prabha Singh, Kalyan Singh, and Rabindra Kumar Singh. "Switched Capacitor Biquad Filter Using CDTA." Circuits and Systems 04, no. 06 (2013): 438–42. http://dx.doi.org/10.4236/cs.2013.46057.

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9

YONEDA, SHOJIRO, IKUO NAKAMURA, ITSUO SASAKI, and TAMOTSU KASAI. "Switched-capacitor non-recursive lowpass filter." International Journal of Electronics 60, no. 3 (March 1986): 395–401. http://dx.doi.org/10.1080/00207218608920795.

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10

WU, JIE. "New switched-capacitor universal biquadratic filter." International Journal of Electronics 70, no. 1 (January 1991): 135–38. http://dx.doi.org/10.1080/00207219108921263.

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11

Assael, J., P. Senn, and M. S. Tawfik. "A switched-capacitor filter silicon compiler." IEEE Journal of Solid-State Circuits 23, no. 1 (February 1988): 166–74. http://dx.doi.org/10.1109/4.274.

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12

RASHTIAN, MOHAMMAD, OMID HASHEMIPOUR, KEIVAN NAVI, and ALI JALALI. "A NEW SWITCHED OPAMP APPROACH FOR IMPROVING THE OPERATION OF AUTO-RESET SWITCHED-CAPACITOR FILTERS." Journal of Circuits, Systems and Computers 20, no. 05 (August 2011): 835–48. http://dx.doi.org/10.1142/s0218126611007633.

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In this paper, a new switched opamp is presented in order to improve the operation of auto-zeroed switched capacitor circuit. This approach results in a considerable reduction in power consumption and a moderate speed improvement. Based on the above improvement, a second-order band-pass filter with a center frequency of 833 kHz and quality factor of 8 is realized and compared with previous works. The proposed switched opamp is also utilized in the structure of a novel z to -z2 block for the design of pseudo two-path band-pass filters. A second-order pseudo two-path band-pass filter with the same specification of the previous work is designed, simulated, and compared.

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13

Radev, Nikolay, Kantcho Ivanov, and Kalin Stanchev. "Right-direct (BI) type wide bandpass SC ladder filter with compensation for finite amplifier gain and offset voltage." Facta universitatis - series: Electronics and Energetics 21, no. 2 (2008): 233–41. http://dx.doi.org/10.2298/fuee0802233r.

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In this paper gain- and offset-compensated (GOC) modification of a sixth-order right-direct (BI) type wide bandpass switched-capacitor (SC) ladder filter is proposed. It is based on the use of simple and fast operational amplifiers (op amps) with low but precisely known and stable dc gain A. At first, the conventional integrators in the filter are replaced with GOC integrators and the unswitched capacitors in the capacitive loops are split into two capacitors. Subsequently, the nominal op amps gain value A0 is taking into account in the capacitance sizing of some appropriately chosen capacitors. .

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14

Nahlik, Jiri, Jiri Hospodka, Pavel Sovka, Brendan Mullane, and Ondrej Subrt. "Performance optimization methods for switched-capacitor biquadratic filters." Journal of Electrical Engineering 69, no. 5 (September 1, 2018): 345–51. http://dx.doi.org/10.2478/jee-2018-0050.

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Abstract A class of computer-aided optimization methods based on Differential Evolution (DE), Particle Swarm Optimization (PSO) and Nelder Mead algorithms applied to a switched-capacitor (SC) filter circuit design are investigated. Comparisons of these algorithms applied to a 4th order biquadratic two-channel filter bank CMOS design on 0.35 µm technology are made. The frequency responses of the biquadratic filters must match ideal responses in a finite number of iterations with a limited number of “particles”. The original and derived methods are evaluated on the base of their convergence progress and their reliability over different starting populations. An optimal design approach based on combining algorithms is derived as a more suitable and more reliable method for SC circuit optimization.

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15

Liu, Ying, Jiang Hua Song, Jia Ning Cui, Ying Wang, and Tie Liu Wang. "Design and Implementation of a Single Clock Dual-Band Switched-Capacitor Filter." Applied Mechanics and Materials 705 (December 2014): 195–98. http://dx.doi.org/10.4028/www.scientific.net/amm.705.195.

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This paper introduces two bands switched capacitor filters which are realized by using a single clock. The chip is LTC1068 that contains four 2 order band-pass filter. By reasonable selection of working mode and clever collocation of resistances to realize two 4 order band-pass filter which used in acoustic receiving amplifier circuit. Amplitude-frequency characteristic curves are tested in paper by frequency sweeper.

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16

Roberts, G. W., and A. S. Sedra. "Synthesizing switched-current filters by transposing the SFG of switched-capacitor filter circuits." IEEE Transactions on Circuits and Systems 38, no. 3 (March 1991): 337–40. http://dx.doi.org/10.1109/31.101330.

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17

Liu, Xiao Wei, Jian Yang, Song Chen, Liang Liu, Rui Zhang, and Wei Ping Chen. "Design and Simulation of Switched Capacitor Filter for Speed Change Parameter Converter." Key Engineering Materials 562-565 (July 2013): 1132–36. http://dx.doi.org/10.4028/www.scientific.net/kem.562-565.1132.

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In this paper, we design a high-order switched capacitor filter for rapid change parameter converter. This design uses a structure which consists of three biquads filter sub-units. The design is a 6th-order SC elliptic low-pass filter, and the sample frequency is 250 kHz. By the MATLAB Simulink simulation, the system can meet the design requirements in the time domain. In this paper, the 6th-order switched capacitor elliptic low-pass filter was implemented under 0.5 um CMOS process and simulated in Cadence. The final simulation results show that the pass-band cutoff frequency is 10 kHz, and the maximum pass-band ripple is about 0.106 dB. The stop-band cutoff frequency is 20 kHz, and the minimum stop-band attenuation is 74.78 dB.

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18

Chorng-Kuang Wang, R. Castello, and P. Gray. "A scalable high-performance switched-capacitor filter." IEEE Transactions on Circuits and Systems 33, no. 2 (February 1986): 167–74. http://dx.doi.org/10.1109/tcs.1986.1085890.

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19

Lee, K. L., and R. G. Mayer. "Low-distortion switched-capacitor filter design techniques." IEEE Journal of Solid-State Circuits 20, no. 6 (December 1985): 1103–13. http://dx.doi.org/10.1109/jssc.1985.1052447.

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20

Castello, R., and P. R. Gray. "A high-performance micropower switched-capacitor filter." IEEE Journal of Solid-State Circuits 20, no. 6 (December 1985): 1122–32. http://dx.doi.org/10.1109/jssc.1985.1052449.

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21

Wang, C. K., R. Castello, and P. R. Gray. "A scalable high-performance switched-capacitor filter." IEEE Journal of Solid-State Circuits 21, no. 1 (February 1986): 57–64. http://dx.doi.org/10.1109/jssc.1986.1052482.

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22

Baschirotto, A., G. Bollati, A. Fassina, F. Montecchi, and F. Stefani. "A high-selectivity switched-capacitor bandpass filter." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 48, no. 4 (April 2001): 351–58. http://dx.doi.org/10.1109/82.933793.

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23

Song, B. S. "A 10.7-MHz switched-capacitor bandpass filter." IEEE Journal of Solid-State Circuits 24, no. 2 (April 1989): 320–24. http://dx.doi.org/10.1109/4.18591.

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24

Psychalinos, C., G. Tsirimokou, and A. S. Elwakil. "Switched-Capacitor Fractional-Step Butterworth Filter Design." Circuits, Systems, and Signal Processing 35, no. 4 (July 2, 2015): 1377–93. http://dx.doi.org/10.1007/s00034-015-0110-9.

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25

Tian, F. Y., and X. N. Jiang. "Novel switched-capacitor pseudo-N-path filter." Electronics Letters 29, no. 11 (May 27, 1993): 1018–19. http://dx.doi.org/10.1049/el:19930679.

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26

Yan, Gao, Wang Wenxuan, and Gu Qunshan. "Novel linear transformation switched-capacitor filter design." Journal of Electronics (China) 6, no. 1 (January 1989): 19–33. http://dx.doi.org/10.1007/bf02893169.

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27

Jian, Yao Jia, You Tong Zhang, and Jian Guo Fei. "Filter Design of Power Battery Resistance Measuring for New Energy Vehicle." Applied Mechanics and Materials 551 (May 2014): 143–49. http://dx.doi.org/10.4028/www.scientific.net/amm.551.143.

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In order to measure the internal resistance of new energy vehicle power battery precisely, the high quality factor analog band-pass filter circuit and switched-capacitor circuit was studied. And the circuit was redesigned by using a switched capacitor circuit for digital control. Combined with the requirements of vehicle battery internal resistance measurement, the resistance measurement system architecture which is based on microcontroller and programmable logic devices is proposed. Finally, the system is validated via error calculation and the actual experiments.

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28

EL OUALKADI, A., J. M. PAILLOT, and D. FLANDRE. "CLOCK JITTER EFFECT ON SWITCHED-CAPACITOR FILTER DESIGN." Fluctuation and Noise Letters 06, no. 01 (March 2006): L29—L33. http://dx.doi.org/10.1142/s0219477506003112.

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This paper proposes the study of clock jitter effect on high-Q switched-capacitor filter behavior. A command circuit made up by a ring voltage controlled oscillator (VCO) with XOR gates is used to generate the command signals. According to the correlation of these signals the jitter effect on the signal constellation has been studied. A good agreement between measured and simulation results has been achieved which validate our design methodology.

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29

Li Ping and J. I. Sewell. "The LUD approach to switched-capacitor filter design." IEEE Transactions on Circuits and Systems 34, no. 12 (December 1987): 1611–14. http://dx.doi.org/10.1109/tcs.1987.1086073.

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30

Toumazou, C., D. G. Haigh, S. J. Harrold, K. Steptoe, J. I. Sewell, and R. Bayruns. "400 MHz switching rate GaAs switched capacitor filter." Electronics Letters 26, no. 7 (1990): 460. http://dx.doi.org/10.1049/el:19900298.

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31

Martins, R. P., J. E. Franca, and F. Maloberti. "An optimum CMOS switched-capacitor antialiasing decimating filter." IEEE Journal of Solid-State Circuits 28, no. 9 (1993): 962–70. http://dx.doi.org/10.1109/4.236176.

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32

Cheung, V. S. L., H. C. Luong, and Wing-Hung Ki. "A 1-V CMOS switched-opamp switched-capacitor pseudo-2-path filter." IEEE Journal of Solid-State Circuits 36, no. 1 (2001): 14–22. http://dx.doi.org/10.1109/4.896224.

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33

Zhao, Ying Kai, Liang Yin, Zhao Tong Liu, Wei Ping Chen, and Xiao Wei Liu. "A 16 Bits 500 kHz Sigma-Delta DAC for Silicon Micro Gyroscope." Key Engineering Materials 645-646 (May 2015): 605–9. http://dx.doi.org/10.4028/www.scientific.net/kem.645-646.605.

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In this paper, a 16 Bits 500 kHz Sigma-Delta DAC for Silicon Micro Gyroscope is proposedin order to enhance the precision of the digital to analog converter level.The interpolation filterhas achieved 64 times interpolation function,using three cascaded manner, it employs three level cascaded of FIR filterstructure. It achieves a 64 times oversampling feature. The signalbandwidth of the designs interpolation filter is 100 kHz, SNR reach 106dB. Fifth-order single-loop structure CIFB achieve noise shaping modulator function to verify the stability of the system, after the completion of CSD coefficient coding, signal to noise ratio reached 119.7dB, effective bits reached 19.59. The switched capacitor technology actualize analog reconstruction filter module, and using a typically switched capacitor DAC achieved high jump "0, 1" digital signal is converted into an analog signal, the digital-analog conversion achieved.

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34

de la Plaza, A. "High-frequency switched-capacitor filter using unity-gain buffers." IEEE Journal of Solid-State Circuits 21, no. 3 (June 1986): 470–77. http://dx.doi.org/10.1109/jssc.1986.1052553.

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35

Alpaydın, G., G. Erten, S. Balkır, and G. Dündar. "Multi-level optimisation approach to switched capacitor filter synthesis." IEE Proceedings - Circuits, Devices and Systems 147, no. 4 (2000): 243. http://dx.doi.org/10.1049/ip-cds:20000395.

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36

Ping, L., and J. I. Sewell. "The TWINTOR in bandstop switched-capacitor ladder filter realization." IEEE Transactions on Circuits and Systems 36, no. 7 (July 1989): 1041–44. http://dx.doi.org/10.1109/31.31346.

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37

Mohan, P. V. A., V. Ramachandran, and M. N. S. Swamy. "A novel two-amplifier universal active switched-capacitor filter." Proceedings of the IEEE 73, no. 8 (1985): 1330–31. http://dx.doi.org/10.1109/proc.1985.13283.

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38

Harrold, S. J., I. A. W. Vance, and D. G. Haigh. "Second-order switched-capacitor bandpass filter implemented in GaAs." Electronics Letters 21, no. 11 (May 23, 1985): 494–96. http://dx.doi.org/10.1049/el:19850350.

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39

Şen, Selçuk. "Switched-capacitor filter design using the composite discrete integrator." Microelectronics Journal 24, no. 7 (November 1993): 737–46. http://dx.doi.org/10.1016/0026-2692(93)90019-b.

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40

Qunshan, Gu, and Wang Wenxuan. "Novel realization of unit element wave switched capacitor filter." Journal of Electronics (China) 3, no. 1 (January 1986): 40–47. http://dx.doi.org/10.1007/bf02778893.

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41

Cheong, P. N. "Modelling of Multirate Switched Capacitor Filter Using Nonlinear Programming." International Journal of Modelling and Simulation 28, no. 2 (January 2008): 215–18. http://dx.doi.org/10.1080/02286203.2008.11442471.

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42

Ndjountche, Tertulien, and A. Avebe Zibi. "Adaptive switched capacitor biquadratic filter with high-frequency applications." International Journal of Circuit Theory and Applications 24, no. 5 (September 1996): 529–39. http://dx.doi.org/10.1002/(sici)1097-007x(199609/10)24:5<529::aid-cta932>3.0.co;2-8.

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43

Luck, J. L., J. T. Taylor, J. G. Swanson, and D. G. Haigh. "High frequency GaAs switched capacitor filter implemented with GaAs insulated gate FET switches." Electronics Letters 27, no. 18 (1991): 1619. http://dx.doi.org/10.1049/el:19911012.

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44

CHEONG, NGAI. "ANALYSIS OF MULTI-STAGE AND MULTI-RATE IIR SC DECIMATORS USING ISCMRATE." Journal of Circuits, Systems and Computers 23, no. 07 (June 2, 2014): 1450093. http://dx.doi.org/10.1142/s0218126614500935.

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This paper describes an analysis of multi-stage and multi-rate IIR switched capacitor (SC) decimators using an interactive switched capacitor multi-rate compiler (ISCMRATE). Motivated by the experimental observations, the purpose of this paper is to explore a portion of characteristics for the multi-stage IIR SC decimators, with their implications in the context of a complete IIR SC filter. To overcome the limitations of conventional multi-stage IIR SC decimators, a novel solution has been introduced for the implementation of a multi-stage IIR SC circuit. Based on the statistical approach of the compiler, we provide the comparative analysis for different IIR SC decimators, including total capacitor area, capacitance spread and arbitrary anti-aliasing amplitude responses with a decimating factor in single and multi-stage building blocks. Examples are given to illustrate the practical feasibility of this compiler.

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45

Chang, Yuen-Haw, and Yu-Kai Lin. "Design and Analysis of High-Gain Switched-Capacitor-Inductor-Based Inverter for Step-Up DC-AC Conversion." Journal of Circuits, Systems and Computers 27, no. 02 (September 11, 2017): 1850030. http://dx.doi.org/10.1142/s0218126618500305.

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This paper presents the analysis, design and implementation of a closed-loop high-gain switched-capacitor-inductor-based inverter (SCII) by combining a sinusoidal pulse-width-modulation (SPWM) controller and phase generator for realizing the step-up inversion and regulation. The power part is composed of two cascaded sub-circuits from source [Formula: see text] to output voltage [Formula: see text]: (i) SCI booster (one resonant inductor, 4 pumping capacitors and 7 switches regulated by phase generator) and (ii) DC-link inverter (one filter capacitor and 4 switches controlled by SPWM), in order to provide a wide step-up output range of [Formula: see text] as: [Formula: see text] for DC-AC conversion, where [Formula: see text] ([Formula: see text]) is the ratio cycle of charging the inductor (e.g., the maximum of [Formula: see text] reaches 13.8 times voltage of [Formula: see text] while [Formula: see text]). Here, by using the phase generator, the maximum of step-up gain can be regulated for fitting the need of AC load. Further, the SPWM controller is employed to enhance regulation capability for the different amplitude and frequency of output, as well as robustness to loading variation. Some theoretical analysis and design are included: formulation, steady-state analysis, conversion ratio, power efficiency, inductance and capacitance selection, circuit stability and control design. Finally, the performance of SCII is simulated, and verified experimentally on the implemented prototype circuit, and the results are illustrated to show the efficacy of this scheme.

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46

Ndjountche, T., and R. Unbehauen. "Improved structures for programmable filters: application in a switched-capacitor adaptive filter design." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 46, no. 9 (1999): 1137–47. http://dx.doi.org/10.1109/82.793704.

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47

Luck, J., and J. G. Swanson. "First-order, switched-capacitor, low-pass filter implemented with GaAs insulated-gate FET switches." Electronics Letters 26, no. 22 (1990): 1843. http://dx.doi.org/10.1049/el:19901186.

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48

da Franca, J. "A single-path frequency-translated switched- capacitor bandpass filter system." IEEE Transactions on Circuits and Systems 32, no. 9 (September 1985): 938–44. http://dx.doi.org/10.1109/tcs.1985.1085799.

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49

Halonen, K. A. I., W. M. C. Sansen, and M. Steyaert. "A micropower fourth-order elliptical switched-capacitor low-pass filter." IEEE Journal of Solid-State Circuits 22, no. 2 (April 1987): 164–73. http://dx.doi.org/10.1109/jssc.1987.1052698.

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50

Lin, J. C., and J. H. Nevin. "Fully differential stray-insensitive bilinear-z switched-capacitor highpass filter." Electronics Letters 22, no. 7 (1986): 378. http://dx.doi.org/10.1049/el:19860257.

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