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Dissertations / Theses on the topic 'Switched Capacitor Multilevel Inverter'

Author: Grafiati

Published: 5 June 2025

Last updated: 1 August 2025

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1

Scott, Mark John. "Applications, Benefits, and Challenges of Wide Bandgap Based Power Inversion." The Ohio State University, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=osu1437721612.

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2

Jefry, Nur Atiqah Binti. "A New Topology of Cross-Switched Multilevel Inverter." Thesis, Curtin University, 2022. http://hdl.handle.net/20.500.11937/89691.

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This study proposed a Multilevel Inverter (MLI) topology that generates a high number of output voltage levels with a reduced number of components. The proposed topology was configured with symmetrical, asymmetrical, and hybrid configurations. Each configuration generates a different level of output voltage. In parallel to the increased output level, the output voltage has a better output quality (i.e., a lower percentage of total harmonic distortion), simple design and less demanding operation.

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3

Hansmann, Chirstine Henriette. "Active capacitor voltage stabilisation in a medium-voltage flying-capacitor multilevel active filter." Thesis, Stellenbosch : University of Stellenbosch, 2005. http://hdl.handle.net/10019.1/1762.

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Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2005.<br>A switching state substitution must be developed that will make use of both single-phase redundancies and three-phase redundancies in the flying-capacitor topology. Losses should be taken into consideration and the algorithm must be designed for implementation on the existing PEC33 system, with on-board DSP (TMS320VC33) and FPGA (EP1K50QC208). The specific power-electronics application is a medium-voltage active filter. Existing capacitor voltage stabilisation schemes are investigated and a capac

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4

Bin, Mohd Rozlan Mohd Helmy Hakimie. "DC/AC inverter based switched capacitor circuit topology with reduced number of components for low power applications." Thesis, Brunel University, 2017. http://bura.brunel.ac.uk/handle/2438/16009.

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This thesis presents a new DC/AC inverter circuit which is based on a switched-capacitor circuit topology with reduced components (power switch and capacitor) count for low power applications. The proposed circuit has distinct features of both voltage boost-up and near sinusoidal (multi-level/staircase) AC output voltage. The main idea is to utilise a simple circuit technique called resonant-based Double Switch Single Capacitor Switched-Capacitor (DSSC SCC) with variable duty cycle Pulse Width Modulation (PWM) control technique in such a way that multi-level voltage can be realised across a ca

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5

Alsolami, Mohammed Faham. "Wide Bandgap (WBG) Devices Based Switched Capacitor Multiport Multilevel SinglePhase AC/DC/AC Converter for UPS Applications." The Ohio State University, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=osu1461327268.

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6

Krug, Dietmar. "Vergleichende Untersuchungen von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für Mittelspannungsanwendungen." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2017. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-216245.

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Die vorliegende Arbeit befasst sich mit einem detaillierten Vergleich von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für den Einsatz in Mittelspannungsanwendungen. Im Rahmen dieser Untersuchungen wird die 3-Level Neutral Point Clamped Spannungswechselrichter Schaltungstopologie (3L-NPC VSC) sowohl mit Multilevel Flying Capacitor (FLC) als auch mit Multilevel Stacked Multicell (SMC) Schaltungstopologien verglichen, wobei unter Verwendung von aktuell verfügbaren IGBT-Modulen Stromrichterausgangsspannungen von 2.3 kV, 4.16 kV und 6.6 kV betrachtet werden. Neben der

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7

Nami, Alireza. "A new multilevel converter configuration for high power and high quality applications." Thesis, Queensland University of Technology, 2010. https://eprints.qut.edu.au/33216/1/Alireza_Nami_Thesis.pdf.

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The Queensland University of Technology (QUT) allows the presentation of theses for the Degree of Doctor of Philosophy in the format of published or submitted papers, where such papers have been published, accepted or submitted during the period of candidature. This thesis is composed of ten published /submitted papers and book chapters of which nine have been published and one is under review. This project is financially supported by an Australian Research Council (ARC) Discovery Grant with the aim of investigating multilevel topologies for high quality and high power applications, with speci

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8

Kshirsagar, Abhijit. "Reduced Switch Count Multilevel Inverter Topologies for Open End Induction Motor Drives." Thesis, 2016. http://etd.iisc.ac.in/handle/2005/2722.

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MU LT I L E V E L inverters are becoming the preferred choice for medium voltage high power applications. Multilevel inverters have a number of inherent advantages over conventional two level inverters. The output voltage has multiple steps or levels, resulting in reduced dV/dt, which leads to lower electromagnetic interference, making it easier to meet electromagnetic compatibility (EMC) regulations. Multilevel inverters have a much lower effective switching frequency, which leads to a reduction in switching losses. The output voltage of multilevel inverters has a much lower harmonic conte

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9

Kshirsagar, Abhijit. "Reduced Switch Count Multilevel Inverter Topologies for Open End Induction Motor Drives." Thesis, 2016. http://etd.iisc.ernet.in/handle/2005/2722.

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MU LT I L E V E L inverters are becoming the preferred choice for medium voltage high power applications. Multilevel inverters have a number of inherent advantages over conventional two level inverters. The output voltage has multiple steps or levels, resulting in reduced dV/dt, which leads to lower electromagnetic interference, making it easier to meet electromagnetic compatibility (EMC) regulations. Multilevel inverters have a much lower effective switching frequency, which leads to a reduction in switching losses. The output voltage of multilevel inverters has a much lower harmonic conte

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10

Gulpinar, Feyzullah. "A non-conventional multilevel flying-capacitor converter topology." Thesis, 2014. http://hdl.handle.net/1805/6299.

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Indiana University-Purdue University Indianapolis (IUPUI)<br>This research proposes state-of-the-art multilevel converter topologies and their modulation strategies, the implementation of a conventional flying-capacitor converter topology up to four-level, and a new four-level flying-capacitor H-Bridge converter confi guration. The three phase version of this proposed four-level flying-capacitor H-Bridge converter is given as well in this study. The highlighted advantages of the proposed converter are as following: (1) the same blocking voltage for all switches employed in the con fig

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11

Yi-ChunLin and 林怡均. "Seven-Level Inverter Using Coupled Inductor and Switched Capacitor." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/74120921227167655812.

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碩士<br>國立成功大學<br>電機工程學系碩博士班<br>101<br>This thesis proposes a novel single-phase seven-level inverter. The topology of the proposed structure is composed of a DC source, a switched-capacitor circuit, and a coupled inductor. Compared to traditional seven-level inverter structure, the numbers of switches and diodes are reduced. The novel single-phase seven-level inverter reduces the number of capacitor by one, increasing the stability and life cycle of the circuit. The voltages of capacitors are self-balanced by switched-capacitor circuit and coupled inductor without complex control method. Theref

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12

Chia-HuaYeh and 葉佳樺. "A Novel Electrolytic Capacitor-Less Multilevel Inverter with Coupled Inductor." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/37221899383670942408.

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碩士<br>國立成功大學<br>電機工程學系<br>102<br>In this thesis, a novel multilevel electrolytic capacitor-less inverter is proposed. With the three-winding coupled inductor, input voltage can be divided without electrolytic capacitors. Hence, no voltage-balancing circuit is needed. Less power switches are required for the proposed circuit compared to the existing topologies. Only ten switches are required to generate seven-level output. The operating principle, mode analysis and modulation method are introduced. The control scheme is implemented by TMS320F28035. Finally, a laboratory prototype of seven-level

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13

Ke-SinSu and 蘇可欣. "Electrolytic Capacitor-Less Multilevel Inverter with AC-DC Energy Conversion." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/kv4sw4.

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14

Liao, Jia-Jie, and 廖佳傑. "Design and Implementation of Reconfigurable Switched-Capacitor Boost DC-AC Inverter." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/60830533904346658574.

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碩士<br>朝陽科技大學<br>資訊工程系碩士班<br>100<br>A closed-loop reconfigurable 4×/3×/2×/1× switched-capacitor (SC) boost DC-AC inverter is proposed by combining a sinusoidal pulse-width-modulation (SPWM) controller for low-power step-up inversion and regulation. In this SC inverter, there are three pumping capacitors and 13 bidirectional switches between supply source and output terminal not only to boost the maximum gain up to 4, but also to invert the output voltage for DC-AC conversion. Here, this SC inverter is a reconfigurable structure to select the boosting gain of 4×, 3×, 2×, or 1× according to the d

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15

Pappu, Roshan Kumar. "Studies on Single DC Link Fed Multilevel Inverter Topologies by Cascading Flying Capacitor and Floating Capacitor Fed H-Bridges." Thesis, 2014. http://etd.iisc.ac.in/handle/2005/3189.

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Use of multilevel inverters are inevitable in medium and high voltage drives. This is due to the fact that the multilevel inverters can produce voltages in smaller steps which will reduce the harmonic content and result in more sinusoidal voltages and currents as compared to voltages and currents from two-level inverters. Due to the device limitations, use of two-level inverters is not possible in medium and high voltage drive applications. Though multiple devices can be connected both in series and parallel to achieve two-level operation, the output voltages still suﬀer from high harmonic con

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16

Pappu, Roshan Kumar. "Studies on Single DC Link Fed Multilevel Inverter Topologies by Cascading Flying Capacitor and Floating Capacitor Fed H-Bridges." Thesis, 2014. http://hdl.handle.net/2005/3189.

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Use of multilevel inverters are inevitable in medium and high voltage drives. This is due to the fact that the multilevel inverters can produce voltages in smaller steps which will reduce the harmonic content and result in more sinusoidal voltages and currents as compared to voltages and currents from two-level inverters. Due to the device limitations, use of two-level inverters is not possible in medium and high voltage drive applications. Though multiple devices can be connected both in series and parallel to achieve two-level operation, the output voltages still suﬀer from high harmonic con

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17

LI, ZHENG-BIN, and 李政彬. "Design and Implementation of Serial-Parallel-Switched-Capacitor Coupled-Inductor Boost DC-AC Inverter." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/zdpdm3.

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碩士<br>朝陽科技大學<br>資訊工程系<br>105<br>A closed-loop scheme of serial-parallel-switched-capacitor coupled-inductor boost DC-AC inverter is proposed by combining a phase generator and sinusoidal pulse-width-modulation (SPWM) controller for the step-up inversion and regulation. The power part is composed of two cascaded sub-circuits, including (i) a SPSCCI booster with 4 pumping capacitors, and 5 switches controlled by phase generator, it raises the the voltage up to [4(n+1)+(1+nD)/(1-D)] and (ii) a Half-bridge DC-link inverter with 2 capacitors, and 2 switches controlled by SPWM, so as to obtain a ste

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18

Kang-HungKuo and 郭剛宏. "Design and Implementation of an Eleven-Level Inverter Using Coupled Inductor and Switched Capacitor." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/76359296652986501148.

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碩士<br>國立成功大學<br>電機工程學系<br>104<br>A novel eleven-level inverter with coupling inductor is proposed in this thesis. The circuit structure includes a direct current voltage source, a circuit composed of switching capacitors and a coupling inductor. Eleven levels of voltage are generated by combining the technique of cascading switching capacitor with coupling inductor. The total harmonic distortion produced by the proposed topology is also relatively low compared with traditional topologies. The new topology produces a significant reduction in the number of diodes and power switching devices in o

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19

Chen, Shin-Cheng, and 陳信呈. "Design and Implementation of Active-Harmonic-Elimination-Based Switched-Capacitor Boost DC-AC Inverter." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/55912086072067457646.

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碩士<br>朝陽科技大學<br>資訊工程系碩士班<br>99<br>A closed-loop scheme of 9-level switched-capacitor (SC) boost dc-ac inverter is proposed by combining active-harmonic-elimination (AHE) approach for a staircase dc-ac conversion and regulation. In this 9-level SC inverter, there are 3 pumping capacitors between supply source and output terminals in order to realize the maximum boosting gain of 4 at most, and also to obtain the inverted gain of 4 with the help of bidirectional switches employed here. For achieving a staircase ac output, these bidirectional switches are controlled with the driver signals from th

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20

HSU, KAI-LIN, and 許鎧麟. "Design and Implementation of Coupled-Inductor Cockcroft-Walton-Switched-Capacitor Boost DC-AC Inverter." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/4rtbrf.

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碩士<br>朝陽科技大學<br>資訊工程系<br>106<br>A coupled-inductor Cockcroft-Walton-switched- capacitor (CICWSC) inverter is proposed by combining a non- overlapping circuit and sinusoidal pulse-width-modulation (SPWM) controller for boost DC-AC conversion and closed- loop regulation. The power part is composed of three sub- circuits, including: (i) coupled-inductor booster (CI booster), (ii) Cockcroft-Walton- switched-capacitor doubler (CWSC doubler), and (iii) half-bridge DC-link, so as to obtain an AC output range:+[(n+1)/(1-D)]VS～-[(n+1)/(1-D)]VS,where D is the duty cycle and n is the turn ratio of couple

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21

Viju, Nair R. "Investigations on Stacked Multilevel Inverter Topologies Using Flying Capacitor and H-Bridge Cells for Induction Motor Drives." Thesis, 2018. http://etd.iisc.ac.in/handle/2005/4026.

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Conventional 2-level inverters have been quite popular in industry for drives applications. It used pulse width modulation techniques to generate a voltage waveform with high quality. For achieving this, it had to switch at high frequencies and also the switching is between 0 and Vdc. Also additional LC filters are required before feeding to a motor. 3-phase IM is the work horse of the industry. Several speed control techniques have been established namely the V/f control technique and for high performance, vector control is adopted. An electric drive system comprises of a rectifier, inverter

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22

Viju, Nair R. "Investigations on Stacked Multilevel Inverter Topologies Using Flying Capacitor and H-Bridge Cells for Induction Motor Drives." Thesis, 2018. http://etd.iisc.ernet.in/2005/4005.

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Conventional 2-level inverters have been quite popular in industry for drives applications. It used pulse width modulation techniques to generate a voltage waveform with high quality. For achieving this, it had to switch at high frequencies and also the switching is between 0 and Vdc. Also additional LC filters are required before feeding to a motor. 3-phase IM is the work horse of the industry. Several speed control techniques have been established namely the V/f control technique and for high performance, vector control is adopted. An electric drive system comprises of a rectifier, inverter

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23

Liao, Jyun-Jia, and 廖俊嘉. "Design and Implementation of A Novel High-Gain Coupled-Inductor Switched-Capacitor Boost DC-AC Inverter." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/25847421904008417824.

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碩士<br>朝陽科技大學<br>資訊工程系<br>104<br>A closed-loop scheme of a high-gain coupled-inductor switched- capacitor inverter-based (CISCI-based) boost DC-AC inverter is proposed by combining a phase generator and sinusoidal pulse- width-modulation (SPWM) controller for the step-up inversion and regulation. The power part is composed of two cascaded sub-circuits, including (i) a CISCI booster with one coupled-inductor, and 4 pumping capacitors, and 1 switches controlled by phase generator, and (ii) a Half-bridge DC-link inverter with 2 switches controlled by SPWM, so as to obtain a steady-state voltage ra

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24

Wu, Ming-zong, and 吳明宗. "Design and Implementation of High-Conversion-Ratio Switched-Capacitor Boost DC-AC Inverter by SPWM Control." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/91520278826971193307.

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碩士<br>朝陽科技大學<br>資訊工程系碩士班<br>98<br>A closed-loop high-conversion-ratio switched-capacitor (HCRSC) boost DC-AC inverter is proposed based on sinusoidal-pulse-width-modulation (SPWM) control to achieve step-up DC/AC inversion and regulation. The power stage of the inverter is composed of HCRSC DC/DC booster and H-bridge DC/AC inverter connected in series between source Vs and output Vo. In the HCRSC booster, there are 4 Switched-Capacitor (SC) cells with the interleaved and complementary operations in order to provide the 3x3 voltage gain at most. In the H-bridge, there are 4 power switches inclu

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25

Lin, Yu-Kai, and 林郁凱. "Design and Implementation of a Closed-Loop High-Gain Switched-Capacitor-Inductor-Based Boost DC-AC Inverter." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/ybg2uh.

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碩士<br>朝陽科技大學<br>資訊工程系<br>103<br>A closed-loop scheme of a high-gain switched- capacitor-inductor-based (SCI-based) boost DC-AC inverter is proposed by combining a phase generator and sinusoidal pulse- width-modulation (SPWM) controller for the step-up inversion and regulation. The power part is composed of two cascaded sub-circuits, including (i) a SCI booster with one inductor, and 4 pumping capacitors, and 7 switches controlled by phase generator, and (ii) a H-bridge DC-link inverter with 4 switches controlled by SPWM, so as to obtain a steady-state voltage range: +4Vs/(1-D0)~ -4Vs/(1-D0) fo

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26

Huang, Yun-jie, and 黃運杰. "Design and Implementation of Closed-Loop 7-Level Switched-Capacitor Boost DC-AC Inverter with Sinusoidal PFM Control." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/24918187992531437623.

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碩士<br>朝陽科技大學<br>資訊工程系碩士班<br>101<br>A closed-loop 7-level switched-capacitor (SC) boost DC-AC inverter is proposed by using a sinusoidal pulse-frequency-modulation (SPFM) controller for low-power step-up inversion and regulation. In this SC inverter, there are three pumping capacitors and ten switches between supply source and output terminal not only to boost the maximum gain up to three, but also to invert the output voltage for the goal of 7-level DC-AC conversion. Here, the SPFM control is adopted in order to enhance output regulation capability for the various outputs (output peak value or

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27

Lo, Po-Chien, and 羅博謙. "Design and Implementation of 2-Stage 4-Phase Switched-Capacitor Boost DC-AC Inverter with Sinusoidal PFM Control." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/17046454070000112350.

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碩士<br>朝陽科技大學<br>資訊工程系<br>102<br>A new closed-loop scheme of 2-stage 4-phase switched-capacitor (SC) boost DC-AC inverter is proposed by combining 4-phase phase generator and sinusoidal pulse-frequency-modulation (SPFM) controller for low-power step-up inversion and regulation. In this SC inverter, the power part of the inverter is composed of 2-stage 4-phase SC booster and DC-link inverter. This SC booster contains 2 pumping capacitors and 4 switches operation for boosting the step-up gain up to 22 = 4 at most. For improving total harmonic distortion (THD), a 4x/3x/2x/1x selector is presented

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28

LU, YU-MING, and 盧鈺明. "Design and Implementation of Cockcroft-Walton-Doubler/Greinacher-Quadrupler- Based Switched-Capacitor Coupled-Inductor Boost DC-DC Converter/DC-AC Inverter." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/92hj2k.

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碩士<br>朝陽科技大學<br>資訊工程系<br>107<br>A closed-loop high-gain Cockcroft-Waltondoubler-based switched-coupled- inductor (CWSCI) converter and a simple Greinacher-Doubler-Based Switched-Coupled-Inductor Boost DC-AC Inverter (GSCII) are proposed by combining a sawtooth wave generator and pulse-width-modulation-based (PWM-based) compensator for step-up DC-DC conversion and regulation. In CWSCI, power part between source VS and output VO contains two sub-circuits: (i) a switched-coupled-inductor (SCI) booster, and (ii) a twostage Cockcroft-Walton-doubler (CWD) circuit. With the help of these circuits ope

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29

Yadav, Apurv Kumar. "Investigations on Multilevel Voltage Space Vectors Generated by Stacked and Cascaded Basic Inverter Cells with Capacitor Voltage Control for Induction Motor Drives." Thesis, 2018. https://etd.iisc.ac.in/handle/2005/5451.

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Induction motor drives (IMD) require a DC-AC inverter system to obtain variable frequency operation. Generally, IMD uses conventional 2-level inverters. The conventional 2-level inverter has its pole switching between zero and DC bus voltage. Thus, the switching in 2-level inverter results in high dv/dt in the inverter pole voltage. Also, the switches in the inverter need to block a full DC link voltage which increases the switching losses. These issues with drive scheme using 2-level inverter can be addressed by using multilevel inverters (MLI). Some of the frequently used MLI topologies incl

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30

Banavath, Satish Naik. "A New Class of Single DC-link Fed Multilevel Inverter Topologies for Grid Connected Photovoltaic Systems with Reduced Component Count and Inherent Capacitor Balancing." Thesis, 2017. http://etd.iisc.ac.in/handle/2005/4203.

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Grid integration of photovoltaic (PV) energy sources has been mostly governed by conventional two-level voltage source inverters. These topologies have significant switching power losses, dV/dt stress and THD level at lower switching frequencies. The above issues can be solved by introducing more voltage levels through multilevel converters. Conventional multilevel converters have many issues like neutral point voltage drift in neutral point clamped (NPC) topology, floating capacitor charge balance in flying capacitor (FC) topology and large number of isolated DC sources in cascaded half bridg

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31

Krug, Dietmar. "Vergleichende Untersuchungen von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für Mittelspannungsanwendungen." Doctoral thesis, 2015. https://tud.qucosa.de/id/qucosa%3A30069.

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Die vorliegende Arbeit befasst sich mit einem detaillierten Vergleich von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für den Einsatz in Mittelspannungsanwendungen. Im Rahmen dieser Untersuchungen wird die 3-Level Neutral Point Clamped Spannungswechselrichter Schaltungstopologie (3L-NPC VSC) sowohl mit Multilevel Flying Capacitor (FLC) als auch mit Multilevel Stacked Multicell (SMC) Schaltungstopologien verglichen, wobei unter Verwendung von aktuell verfügbaren IGBT-Modulen Stromrichterausgangsspannungen von 2.3 kV, 4.16 kV und 6.6 kV betrachtet werden. Neben de

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32

"High Gain DC-DC and Active Power Decoupling Techniques for Photovoltaic Inverters." Doctoral diss., 2017. http://hdl.handle.net/2286/R.I.46225.

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abstract: The dissertation encompasses the transformer-less single phase PV inverters for both the string and microinverter applications. Two of the major challenge with such inverters include the presence of high-frequency common mode leakage current and double line frequency power decoupling with reliable capacitors without compromising converter power density. Two solutions are presented in this dissertation: half-bridge voltage swing (HBVS) and dynamic dc link (DDCL) inverters both of which completely eliminates the ground current through topological improvement. In addition, through activ

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33

Mathew, Jaison. "Investigation On Dodecagonal Multilevel Voltage Space Vector Structures By Cascading Flying Capacitor And Floating H-Bridge Cells For Medium Voltage IM Drives." Thesis, 2013. https://etd.iisc.ac.in/handle/2005/2600.

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In high-power electric drives, multilevel inverters are generally deployed to address issues such as electromagnetic interference, switch voltage stress and harmonic distortion. The switching frequency of the inverter is always kept low, of the order of 1KHz or even less to reduce switching losses and synchronous pulse width modulation (PWM) is used to avoid the problem of sub-harmonics and beat frequencies. This is particularly important if the switching frequency is very low. The synchronous PWM is getting popularity as its realization is very easy with digital controllers compared to analog

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Mathew, Jaison. "Investigation On Dodecagonal Multilevel Voltage Space Vector Structures By Cascading Flying Capacitor And Floating H-Bridge Cells For Medium Voltage IM Drives." Thesis, 2013. http://hdl.handle.net/2005/2600.

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In high-power electric drives, multilevel inverters are generally deployed to address issues such as electromagnetic interference, switch voltage stress and harmonic distortion. The switching frequency of the inverter is always kept low, of the order of 1KHz or even less to reduce switching losses and synchronous pulse width modulation (PWM) is used to avoid the problem of sub-harmonics and beat frequencies. This is particularly important if the switching frequency is very low. The synchronous PWM is getting popularity as its realization is very easy with digital controllers compared to analog

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35

Macedo, Rui Jorge Matos. "Desenvolvimento de um inversor multinível monofásico para aplicações de qualidade de energia elétrica." Master's thesis, 2015. http://hdl.handle.net/1822/51285.

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Dissertação de mestrado integrado em Engenharia Eletrónica e de Computadores<br>A exigência na qualidade da forma de onda sintetizada pelos inversores de eletrónica de potência é cada vez maior, estando esta qualidade associada a um melhor funcionamento e a um maior tempo de vida por parte das cargas e sistemas associados aos inversores. A melhoria na qualidade das formas de onda geradas pelos inversores tem sido conseguida maioritariamente através do aumento da frequência de comutação dos semicondutores. Esta estratégia provoca perdas de comutação mais elevadas, maior stress aplicado ao

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