Dissertations / Theses on the topic 'Switched Mode Power Converters'

Switched-mode power converters are some of the most widely used power electronics circuits due to their advantages of high conversion efficiency, flexible output voltage, light weight. A variety of control methods have been developed for the switched-mode power converters. However, in many practical situation, additional constraints need to be considered, e.g., safety measurement, current limiting or soft-starting, gross changes of operation point with guaranteed system stability, which has not been fully addressed in the available research works. On the other hand, the majority of the control design for power converters are based on the state-space averaged approach which involves considerable approximation in analysis and synthesis. Hence, advanced control techniques are in demand, which should be more constraints friendly and based on more precise models. In this thesis, much attention has been spent on designing controllers for both DC-DC converters and DC-AC inverters based on hybrid modelling and Lyapunov stability theory. Due to the existence of the power switches, switched-mode power converters are hybrid systems with both continuous dynamics and discrete transition events. Instead of linearizing the converter model around a specific operating point, hybrid modelling captures both dynamics, which results in more accurate models. Firstly, a novel sampled-data control approach is proposed for DC-DC converters. DC-DC converters are modeled as sampled-data switched affine systems according to the status of the power switch. In order to avoid the delay of the switching signal, an on-line prediction method is adopted to estimate the system state at the next switching instant. Based on the switched affine model and the predicted system state, a novel switching control algorithm is synthesized by using the switched Lyapunov theory. The proposed approach is able to not only drive the output to a prescribed set point from any initial condition, but also track a varying reference signal, and the switching frequency can be adjusted online with guaranteed stability. In addition, with this approach, Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM) operations can be treated in a unified way. Experimental verification has been carried out to test the effectiveness and merits of the proposed method. Furthermore, to compensate the information loss due to limited access to the state, a multiple sampling scheme is employed to derive a discrete-time switched affine model with an augmented measurement output for DC-DC converters. Based on the model, an output-feedback switching control law, which drives the system state to a set of attainable switched equilibria, is synthesized by using a quadratic state-space partition. The multiple sampling scheme not only facilitates the controller synthesis, but also improves the energy efficiency of the converter by allowing a lower switching frequency. In addition, hybrid modelling techniques have been extended to more complicated cases – DC-AC inverters as the increasing number of power switches and the time-variant nature of the references. A current controller based on the hybrid model of the three-phase two-level inverter has been developed, which can drive the inverter currents tracking the desired power references in realtime and keep a unity power factor at the same time. This method has been extended to three-phase NPC inverters later on. However, in order to solve the neutral point balancing issue, a capacitor voltages prediction algorithm, modified from model predictive control, has been adopted. It should also be mentioned that a novel hybrid model for a grid-connected single-phase NPC inverter also has been presented, which models not only the dynamic of the inverter but also the dynamic of the current reference. An experimental test platform including a three-phase NPC inverter and a FPGA control board has been designed to demonstrate the implementation of the proposed control scheme in practice.

Measurement-based behavioral electromagnetic interference (EMI) models have been shown earlier to accurately capture the EMI behavior of switched power converters. These models are compact, linear, and run in frequency domain, enabling faster and more stable simulations compared to the detailed lumped circuit models. So far, the behavioral EMI modeling techniques are developed and applied to the converter's input side only. The resulting models are therefore referred to as "terminated EMI models". Under the condition that the output side of the converter remains fixed, these models can predict the input side EMI for any change in the impedance of the input side network. However, any change at the output side would require re-extraction of the behavioral model. Thus the terminated EMI models are incapable of predicting the change in the input side EMI due to changes at the output side of the converter or vice versa. The above mentioned limitation has been overcome by an "un-terminated EMI model" proposed in this dissertation. Un-terminated EMI models are developed here to predict both the common-mode (CM) and the differential (DM) noise currents at the input and the output sides of a motor-drive system. The modeling procedure itself has been simplified and now requires fewer measurements and results in less noise in the identified model parameters. Both CM and DM models are then combined to predict the total noise in the motor drive system. All models are validated by experiments and their limitations identified. A significant portion of this dissertation is then devoted to the application of behavioral EMI models in the design of EMI filters. Comprehensive design procedures are developed for both DM and CM filters in a motor-drive system. The filters designed using the proposed methods are experimentally shown to satisfy the DO-160 conducted emissions standards. The dissertation ends with a summary of contributions, limitations, and some future research directions.<br>Ph. D.

This thesis details novel control schemes and design techniques with the aim of improving the performance of several switched-mode power converter topologies. These improvements include higher steady-state and transient efficiencies for hard-switching converters and the automatic current limiting provision for LLC resonant converters. The thesis initially attempts to use linear closed-loop controllers to improve the transient response of synchronous buck converters, enabling them to be designed with a lower open-loop bandwidth so that the system can achieve higher efficiency. Three types of controllers were investigated viz: the PID, the state-feedback and the predictive controller. All three controllers exhibit similar step responses, which are the maximum transient responses achievable by the linear controllers with the given requirements. The thesis then examines the parallel converter (i.e. a converter with two parallel connected power modules (PMs)) in detail with a view to improve the efficiency and to minimise the current ripple experienced by the output capacitor. Two control schemes and a design technique for the parallel converter are proposed, to simultaneously improve its efficiency and power density. The parallel converter in this research consists of two non-identical rated PMs (termed main PM and auxiliary PM), with the transient response requirement allocated to the auxiliary PM, thereby allowing the main PM to operate at a lower frequency for higher steady-state efficiency. The first control scheme activates the auxiliary PM only when a pre-determined deviation in load/output voltage is exceeded under a load step. Thus, eliminating the losses contributed by the low efficiency auxiliary PM for small load step changes. The second control scheme shapes the auxiliary PM inductor current to be equal and opposite to the main PM current ripple, which when combined reduce the current ripple as experienced by the output filter capacitor, thereby allowing a lower value (and hence physically smaller) capacitor to be selected for higher power density. In order to improve the converter's steady-state efficiency further, the minimum load condition is allocated to the auxiliary PM in the new design technique. These allow both the main PM inductance and its switching frequency to be lower for higher efficiency. In recent years, the LLC has received much attention owing to its favourable operating characteristics including high efficiency and high power density. Usually one chooses to operate at or very close to the load independent point (LIP) since very little control effort is required to regulate the converter's output voltage in response to changes in the load. However under fault conditions where the load tends towards a short circuit, excessive currents can flow and thus control action need to be taken to protect both the converter and the load. The final topic of the thesis hence studies the characteristics of an LLC resonant converter with current-limiting capacitor-diode clamp and develops a new equivalent circuit model to predict the behaviour under overload conditions. A detailed analysis of the converter is presented using the proposed model, from which a design methodology is derived allowing the optimum circuit components to be selected to achieve the required current limiting/protection characteristics.

In recent years, high brightness light emitting diodes (HBLEDs) have increasingly attracted the interest of both industrial manufacturers and academic research community. Among the several aspects that make LED technology so attractive, the most appreciated characteristics are related to their robustness, high efficiency, small size, easy dimming capability, long lifetime, very short switch-on/switch-off times and mercury free manufacturing. Even if all such qualities would seem to give to solid state lighting a clear advantage over all the other kinds of competing technologies, the issues deriving from the need of LED technology improvement, on one hand, and of the development of suitable electronic ballasts to properly drive such solid state light sources, on the other, have so far hindered the expected practical applications. The latter problem, in particular, is nowadays considered the main bottleneck in view of a widespread diffusion of solid state technology in the general lighting market, as a suitable replacement of the still dominant solutions, namely halogen and fluorescent lamps. In fact, if it is true that some aspects of the devices’ technology (e.g. temperature dependent performance, light quality, efficiency droop, high price per lumen, etc…) still need further improvements, it is now generally recognized that one of the key requirements, for a large scale spread of solid state lighting, is the optimization of the driver. In particular, the most important specifications for a LED lamp ballast are: high reliability and efficiency, high power factor, output current regulation, dimming capability, low cost and volume minimization (especially in domestic general lighting applications). From this standpoint, the main goal is, therefore, to find out simple switched mode power converter topologies, characterized by reduced component count and low current/voltage stresses, that avoid the use of short lifetime devices like electrolytic capacitors. Moreover, if compactness is a major issue, also soft switching capability becomes mandatory, in order to enable volume minimization of the reactive components by increasing the switching frequency in the range of the hundreds of kHz without significantly affecting converter’s efficiency. It is worth mentioning that, in order to optimize HBLED operation, also other matters, like the lamp thermal management concern, should be properly addressed in order to minimize the stress suffered by the light emitting devices and, consequently, the deterioration of the light quality and of the expected lamp lifetime. However, being this work focused on the issues related to the research of innovative driving solutions, the aforementioned thermal management problems, as also all the topics related to the improvement of solid state devices’ technology, will be left aside. The main goal of the work presented in this thesis is, indeed, to find out, analyze and optimize new suitable topologies, capable of matching the previously described specifications and also of successfully facing the many challenges dictated by the future of general lighting. First of all, a general overview of solid state lighting features, of the state of the art of lighting market and of the main LED driving issues will be provided. After this first introduction, the offline driving concern will be extensively discussed and different ways of approaching the problem, depending on the specific application considered, will be described. The first kind of approach investigated is based on the use of a simple structure relying on a single power conversion stage, capable of concurrently ensuring: compliance with the standards limiting the input current harmonics, regulation of the load current and also galvanic isolation. The constraints deriving from the need to fulfil the EN 61000-3-2 harmonics standard requirements, when using such kind of solution for low power (<15W) LED driving purposes, will be extensively discussed. A low cost, low component count, high switching frequency converter, based on the asymmetrical half bridge flyback topology, has been studied, developed and optimized. The simplicity and high compactness, characterizing this solution, make it a very good option for CFL and bulb replacement applications, in which volume minimization is mandatory in order to reach the goal of placing the whole driving circuitry in the standard E27 sockets. The analysis performed will be presented, together with the design procedure, the simulation outcomes and the different control and optimization techniques that were studied, implemented and tested on the converter's laboratory prototype. Another interesting approach, that will be considered, is based on the use of integrated topologies in which two different power conversion stages are merged by sharing the same power switch and control circuitry. In the resulting converter, power factor correction and LED current regulation are thus performed by two combined semi-stages in which both the input power and the output current have to be managed by the same shared switch. Compared with a conventional two-stages configuration, lower circuit complexity and cost, reduced component count and higher compactness can be achieved through integration, at cost of increased stress levels on the power switch and of losing a degree of freedom in converter design. Galvanic isolation can be provided or not depending on the topologies selected for integration. If non-isolated topologies are considered for both semi-stages, the user safety has to be guaranteed by assuring mechanical isolation throughout the LED lamp case. The issue, deriving from the need of smoothing the pulsating power absorbed from the line while avoiding the use of short lifetime electrolytic capacitors, will be addressed. A set of integrated topologies, used as HBLED lamp power supplies, will be investigated and a generalized analysis will be presented. Their input line voltage ripple attenuation capability will be examined and a general design procedure will be described. Moreover, a novel integrated solution, based on the use of a double buck converter, for an about 15W rated down-lighting application will be presented. The analysis performed, together with converter design and power factor correction concerns will be carefully discussed and the main outcomes of the tests performed at simulation level will be provided. The last kind of approach to be discussed is based on a multi-stage structure that results to be a suitable option for medium power applications, like street lighting, in which compactness is not a major concern. By adopting such kind of solution it is, indeed, possible to optimize converter’s behavior both on line and on load side, thereby guaranteeing both an effective power factor correction at the input and proper current regulation and dimming capability at the output. Galvanic isolation can be provided either by the input or the output stage, resulting in a standard two stage configuration, or by an additional intermediate isolated DC-DC stage (operating in open loop with a constant input/output voltage conversion ratio) that namely turns the AC/DC converter topology into a three stage configuration. The efficiency issue, deriving from the need of multiple energy processing along the path between the utility grid and the LED load, can be effectively addressed thanks to the high flexibility guaranteed by this structure that, relaxing the design constraint, allows to easily optimize each stage. A 150W nominal power rated ballast for street solid state lighting applications, based on the latter (three stage) topology, has been investigated. The analysis performed, the design procedure and the simulations outcomes will be carefully described, as well as the experimental results of the tests made on the implemented laboratory prototype.<br>Negli ultimi anni i dispositivi LED di potenza ad elevata luminosità (HBLED) hanno attirato in misura sempre crescente l'interesse della comunità scientifica, sia all'interno del mondo accademico che di quello industriale. Tra le varie caratteristiche, che rendono questo tipo di tecnologia interessante, le qualità più apprezzate sono certamente: la robustezza, l'elevata efficienza, le piccole dimensioni, la facilità di modulazione dell'intensità luminosa, il lungo tempo di vita, l'estrema rapidità di accensione e spegnimento e l'assenza di mercurio. Nonostante tutti questi aspetti sembrino dare alla tecnologia a stato solido un netto vantaggio rispetto alle tecnologie concorrenti, l'utilizzo dei LED di potenza nel campo dell'illuminazione rimane a tutt'oggi abbastanza limitato. La necessità di ulteriori progressi nella tecnologia dei dispositivi, da un lato, e dello sviluppo di soluzioni in grado di garantirne il corretto ed efficiente pilotaggio, dall'altro, ne hanno, infatti, fino ad ora frenato la diffusione rispetto alle attese. Quest'ultimo aspetto, in particolare, è al giorno d'oggi considerata il vero "collo di bottiglia" in vista dell'impiego su larga scala della tecnologia a stato solido, in sostituzione delle soluzioni, tutt'ora dominanti nel mercato dell'illuminazione, basate sull'utilizzo di lampade alogene e a fluorescenza. Se, da un lato, infatti, è vero che alcuni aspetti della tecnologia dei dispositivi (e.g. variabilità delle prestazioni con la temperatura, qualità della luce, calo dell'efficienza luminosa con l'aumentare della corrente, elevato costo per lumen, ecc...) necessitano di essere ulteriormente perfezionati, dall'altro è ormai universalmente riconosciuto che l'elemento chiave per l'ampia diffusione dell'illuminazione a stato solido è proprio l'ottimizzazione dello stadio di alimentazione. In particolare, le specifiche più importati che un ballast per lampade a LED è tenuto a soddisfare sono: elevata affidabilità ed efficienza, elevato fattore di potenza, capacità di regolazione della corrente di uscita e di modulazione del flusso luminoso, basso costo e minimo ingombro (soprattutto nell'illuminazione domestica). L'obiettivo principale è, quindi, riuscire ad ideare soluzioni basate sull'utilizzo di topologie semplici, caratterizzate da ridotto numero di componenti e limitati livelli di stress di corrente e tensione, che non prevedano l'impiego di componenti con breve tempo di vita come i condensatori elettrolitici. Inoltre, nelle applicazioni in cui la compattezza è considerata uno degli aspetti di maggior rilievo, anche la capacità di operare in soft-switching diviene una specifica indispensabile. Ciò è infatti necessario al fine di permettere la minimizzazione del volume delle componenti reattive, tramite l'aumento della frequenza di commutazione nel range delle centinaia di kHz, senza compromettere l'efficienza del convertitore. Per completezza, vale la pena di ricordare che, per ottimizzare il funzionamento dei LED ad elevata luminosità, andrebbero presi in considerazione anche altri aspetti, come ad esempio le problematiche legate alla gestione del calore dissipato dalla lampada, importanti al fine di limitare gli stress termici subiti dai dispositivi e, di conseguenza, migliorare la qualità della luce emessa e massimizzare il tempo di vita della lampada. Tuttavia, essendo il lavoro presentato in questa tesi centrato sulle questioni relative allo stadio di alimentazione, i suddetti problemi di gestione termica, come anche gli aspetti relativi allo sviluppo della tecnologia dei dispositivi non verranno esaminati. L'obiettivo principale del lavoro che verrà descritto nel corso dei prossimi capitoli, è, infatti, la ricerca di soluzioni innovative per il pilotaggio da rete elettrica di lampade basate su tecnologia a stato solido. Verranno pertanto approfonditamente trattate le tematiche relative ad analisi, ottimizzazione e sviluppo di topologie che siano in grado di soddisfare i requisiti precedentemente enunciati e di affrontare con successo le sfide proposte dalla continua evoluzione dello scenario del "general lighting". Per prima cosa, sarà fornita una visione di insieme riguardante lo stato dell'arte del mercato dell'illuminazione, le caratteristiche dei dispositivi di illuminazione a stato solido ed i principali aspetti relativi al loro pilotaggio. Dopo questa prima sezione introduttiva, la tematica relativa all'alimentazione da rete elettrica di tali dispositivi verrà approfonditamente discussa. Differenti modi di approcciare il problema, a seconda della specifica applicazione considerata, verranno discussi. Il primo tipo di approccio che verrà esaminato si basa sull'uso di una semplice struttura, formata da un singolo stadio di conversione di potenza. Essa è in grado di fornire al contempo il rispetto degli standard che limitano il contenuto armonico della corrente di ingresso, l'isolamento galvanico e la regolazione della corrente e dell'intensità luminosa in uscita. I vincoli, dettati dall'esigenza di garantire il rispetto della normativa EN 61000-3-2, in applicazioni di bassa potenza (<15W) prive di uno stadio dedicato alla correzione del fattore di potenza, verranno approfonditamente trattati. Saranno, poi, illustrati i risultati dello studio, sviluppo ed ottimizzazione di un convertitore a singolo stadio, operante ad elevata frequenza di commutazione, basato sulla topologia flyback a mezzo ponte asimmetrico. La semplicità, il ridotto numero di componenti ed il basso costo, che caratterizzano tale tipo di soluzione, la rendono adatta all'alimentazione di lampade per il settore residenziale, in cui la compattezza dello stadio di alimentazione è di fondamentale importanza al fine di consentirne l'alloggiamento nei classici socket E27. L'analisi effettuata, la procedura di progetto ed risultati ottenuti in simulazione ed a livello sperimentale durante lo studio di tale topologia verranno accuratamente descritti e discussi. Un altro interessante tipo di approccio che verrà considerato si basa sull'utilizzo di topologie integrate, nelle quali due diversi stadi di conversione vengono uniti tramite la condivisione dello stesso interruttore di potenza e della relativa circuiteria di comando. Nel convertitore che ne risulta, la correzione del fattore di potenza e la regolazione della corrente nei LED saranno dunque garantite dalla combinazione dei due semi-stadi, il cui interruttore comune dovrà essere in grado di gestire sia la potenza di ingresso che la corrente di uscita. Rispetto alla configurazione a due stadi convenzionale, la soluzione ottenuta tramite l'integrazione consente una minore complessità circuitale, un ridotto numero di componenti e, di conseguenza, una maggiore compattezza ed un minor costo. Tutto ciò viene guadagnato a scapito di un maggiore livello di stress nei componenti e della perdita di un grado di libertà nel progetto del convertitore. L'isolamento galvanico può essere garantito o meno a seconda del tipo di topologie che vengono selezionate per l'integrazione. Se la scelta ricade su topologie non isolate, la sicurezza dell'utente andrà comunque garantita isolando meccanicamente l'involucro della lampada. I problemi legati alla necessità di smorzare la componente alternata della potenza assorbita dalla rete, evitando al contempo l'utilizzo di componenti con basso tempo di vita, come i condensatori elettrolitici, verranno discussi. A tal proposito si studieranno le caratteristiche di un insieme di topologie integrate, al fine di fornirne un'analisi ed una procedura di design generalizzate. Se ne esaminerà, inoltre, la capacità di attenuare la componente ondulatoria della tensione di ingresso che viene trasferita al carico, dove si traduce in un'oscillazione della corrente di alimentazione fornita ai LED. Verrà proposta, poi, una soluzione basata su una topologia derivante dall'integrazione di due convertitori di tipo step-down (abbassatori di tensione), per applicazioni di "down-lighting", dimensionata per una potenza di circa 15W. Se ne discuteranno, in particolare, i dettagli di maggiore interesse relativi all'analisi effettuata, alla procedura di progetto ed ai risultati dei test effettuati in ambiente di simulazione. L'ultimo tipo di approccio considerato prevede, infine, l'utilizzo di una topologia multi-stadio, ritenuta una scelta appropriata soprattutto per applicazioni lighting di potenza elevata (>60W), come l'illuminazione stradale, in cui la compattezza dell'alimentatore non è ritenuta un aspetto di primaria importanza. Tramite questo tipo di soluzione è, infatti, possibile ottimizzare le prestazioni del convertitore sia dal lato della rete che dal lato del carico. Si riescono a garantire, in tal modo, un'efficace correzione del fattore di potenza, un adeguato controllo della corrente di uscita ed un'appropriata modulazione del flusso luminoso emesso dalla lampada. L'isolamento galvanico può essere fornito dallo stadio di ingresso o da quello di uscita o da un aggiuntivo stadio DC-DC intermedio, operante a catena aperta con rapporto di conversione di tensione costante. In quest'ultimo caso la struttura del convertitore, si trasforma, dalla classica configurazione a due stadi, in una topologia a triplo stadio. Il problema che nasce dalla necessità di assicurare un elevato livello di efficienza del sistema, nonostante l'interposizione di ripetuti stadi di conversione dell'energia tra la rete ed il carico a LED, può essere efficacemente risolto grazie alla flessibilità che caratterizza tale tipo di struttura. L'aumento del numero dei gradi di libertà in fase progettuale permette, infatti, di ottimizzare con semplicità ogni singolo stadio. Per comprovare limiti e potenzialità di tale tipo di approccio, si è deciso di studiare un ballast (dimensionato per una potenza nominale di 150W) basato sulla topologia a triplo stadio precedentemente menzionata, per applicazioni nell'ambito dell'illuminazione stradale. L'analisi condotta, la procedura di progetto ed i risultati delle simulazioni effettuate verranno discussi nel dettaglio, così come i risultati sperimentali dei test di laboratorio effettuati sul prototipo costruito.

A method to obtain the exact control-to-output and input-to-output transfer functions for switched DC-to-DC pulse-width modulated power converters is applied to different combinations of operating conditions such as continuous conduction mode (CCM), discontinuous conduction mode (DCM), and discontinuous voltage mode (DVM) and methods of control such as normal voltage mode (NVM), current programming mode (CPM), and V-squared control. The majority of these combinations have not previously had their transfer functions of interest derived to the accuracy provided by the method. The derivation of the method is covered, and the results from its application are verified by simulation. The simulation method is also justied and proposed as an improvement to the methods used by simulation engines for switched mode power supply design such as SIMPLIS.

Increasing the power density of power electronic converters while reducing or maintaining the same cost, offers a higher potential to meet the current trend inrelation to various power electronic applications. High power density converters can be achieved by increasing the switching frequency, due to which the bulkiest parts, such as transformer, inductors and the capacitor's size in the convertercircuit can be drastically reduced. In this regard, highly integrated planar magnetics are considered as an effective approach compared to the conventional wire wound transformers in modern switch mode power supplies (SMPS). However, as the operating frequency of the transformers increase from several hundred kHz to MHz, numerous problems arise such as skin and proximity effects due to the induced eddy currents in the windings, leakage inductance and unbalanced magnetic flux distribution. In addition to this, the core losses whichare functional dependent on frequency gets elevated as the operating frequency increases. Therefore, this thesis provides an insight towards the problems related to the high frequency magnetics and proposes a solution with regards to different aspects in relation to designing high power density, energy efficient transformers.The first part of the thesis concentrates on the investigation of high power density and highly energy efficient coreless printed circuit board (PCB) step-down transformers useful for stringent height DC-DC converter applications, where the core losses are being completely eliminated. These transformers also maintain the advantages offered by existing core based transformers such as, high coupling coefficient, sufficient input impedance, high energy efficiency and wide frequencyband width with the assistance of a resonant technique. In this regard, several coreless PCB step down transformers of different turn’s ratio for power transfer applications have been designed and evaluated. The designed multilayered coreless PCB transformers for telecom and PoE applications of 8,15 and 30W show that the volume reduction of approximately 40 - 90% is possible when compared to its existing core based counterparts while maintaining the energy efficiency of the transformers in the range of 90 - 97%. The estimation of EMI emissions from the designed transformers for the given power transfer application proves that the amount of radiated EMI from a multilayered transformer is lessthan that of the two layered transformer because of the decreased radius for thesame amount of inductance.The design guidelines for the multilayered coreless PCB step-down transformer for the given power transfer application has been proposed. The designed transformer of 10mm radius has been characterized up to the power level of 50Wand possesses a record power density of 107W/cm3 with a peak energy efficiency of 96%. In addition to this, the design guidelines of the signal transformer fordriving the high side MOSFET in double ended converter topologies have been proposed. The measured power consumption of the high side gate drive circuitvitogether with the designed signal transformer is 0.37W. Both these signal andpower transformers have been successfully implemented in a resonant converter topology in the switching frequency range of 2.4 – 2.75MHz for the maximum load power of 34.5W resulting in the peak energy efficiency of converter as 86.5%.This thesis also investigates the indirect effect of the dielectric laminate on the magnetic field intensity and current density distribution in the planar power transformers with the assistance of finite element analysis (FEA). The significanceof the high frequency dielectric laminate compared to FR-4 laminate in terms of energy efficiency of planar power transformers in MHz frequency region is also explored.The investigations were also conducted on different winding strategies such as conventional solid winding and the parallel winding strategies, which play an important role in the design and development of a high frequency transformer and suggested a better choice in the case of transformers operating in the MHz frequency region.In the second part of the thesis, a novel planar power transformer with hybrid core structure has been designed and evaluated in the MHz frequency region. The design guidelines of the energy efficient high frequency planar power transformerfor the given power transfer application have been proposed. The designed corebased planar transformer has been characterized up to the power level of 50W and possess a power density of 47W/cm3 with maximum energy efficiency of 97%. This transformer has been evaluated successfully in the resonant converter topology within the switching frequency range of 3 – 4.5MHz. The peak energy efficiency ofthe converter is reported to be 92% and the converter has been tested for the maximum power level of 45W, which is suitable for consumer applications such as laptop adapters. In addition to this, a record power density transformer has been designed with a custom made pot core and has been characterized in thefrequency range of 1 - 10MHz. The power density of this custom core transformer operating at 6.78MHz frequency is 67W/cm3 and with the peak energy efficiency of 98%.In conclusion, the research in this dissertation proposed a solution for obtaining high power density converters by designing the highly integrated, high frequency(1 - 10MHz) coreless and core based planar magnetics with energy efficiencies inthe range of 92 - 97%. This solution together with the latest semiconductor GaN/SiC switching devices provides an excellent choice to meet the requirements of the next generation ultra flat low profile switch mode power supplies (SMPS).

Digitally-controlled, high power universal telecommunication power supply modules have been developed. In this work, the converter control strategy, and its design and implementation first, by means of parallel-operated, dual, 8-bit microcontrollers, and then by using a high processing power digital signal processor (DSP) have been emphasized. The proposed dual-processor based digital controller provides an extended operating output voltage range of the power supplies, user programmable current limit setting, serial communication based active load current sharing with automatic master-slave selection among parallel-operated modules, user selectable number of back-up battery cells, programmable temperature compensation curves, and automatic derating without extra hardware requirement. Overload and output short-circuit protection features are also controlled by software. One of the processors in the digital controller is employed for user interface purposes such as long term records, display, and alarm facilities, and remote control, which are inherently slow processes. The fast processing speed required by output voltage setting, current limit, and load current sharing however is to be fulfilled by a second processor dedicated to the adjustment of output voltages of modules. Tight dynamic load regulation requirement of a telecommunication power supply has been fulfilled by a 150 MIPS DSP, in place of a low cost, 8-bit microcontroller. The implemented digitally-controlled, 1.8 kW, 0-70V telecommunication power supplies have been tested successfully in several locations in the field.

The most essential unit required for all the electronic devices is the Power Supply Unit (PSU). The main objective of power supply designers is to reduce the size, cost and weight, and to increase the power density of the converter. There is also a requirement to have a lower loss in the circuit and hence in the improvement of energy efficiency of the converter circuit. Operating the converter circuits at higher switching frequencies reduces the size of the passive components such as transformers, inductors, and capacitors, which results in a compact size, weight, and increased power density of the converter. At present the switching frequency of the converter circuit is limited due to the increased switching losses in the existing semiconductor devices and in the magnetic area, because of increased hysteresis and eddy current loss in the core based transformer. Based on continuous efforts to improve the new semi conductor materials such as GaN/SiC and with recently developed high frequency multi-layered coreless PCB step down power transformers, it is now feasible to design ultra-low profile, high power density isolated DC/DC and AC/DC power converters. This thesis is focussed on the design, analysis and evaluation of the converters operating in the MHz frequency region with the latest semi conductor devices and multi-layered coreless PCB step-down power and signal transformers. An isolated flyback DC-DC converter operated in the MHz frequency with multi-layered coreless PCB step down 2:1 power transformer has been designed and evaluated. Soft switching techniques have been incorporated in order to reduce the switching loss of the circuit. The flyback converter has been successfully tested up to a power level of 10W, in the switching frequency range of 2.7-4 MHz. The energy efficiency of the quasi resonant flyback converter was found to be in the range of 72-84% under zero voltage switching conditions (ZVS). The output voltage of the converter was regulated by implementing the constant off-time frequency modulation technique. Because of the theoretical limitations of the Si material MOSFETs, new materials such as GaN and SiC are being introduced into the market and these are showing promising results in the converter circuits as described in this thesis. Comparative parameters of the semi conductor materials such as the vi energy band gap, field strengths and figure of merit have been discussed. In this case, the comparison of an existing Si MOSFET with that of a GaN MOSFET has been evaluated using a multi-layered coreless PCB step-down power transformer for the given input/output specifications of the flyback converter circuit. It has been determined that the energy efficiency of the 45 to 15V regulated converter using GaN was improved by 8-10% compared to the converter using the Si MOSFET due to the gate drive power consumption, lower conduction losses and improved rise/fall times of the switch. For some of the AC/DC and DC/DC applications such as laptop adapters, set-top-box, and telecom applications, high voltage power MOSFETs used in converter circuits possess higher gate charges as compared to that of the low voltage rating MOSFETs. In addition, by operating them at higher switching frequencies, the gate drive power consumption, which is a function of frequency, increases. The switching speeds are also reduced due to the increased capacitance. In order to minimize this gate drive power consumption and to increase the frequency of the converter, a cascode flyback converter was built up using a multi-layered coreless PCB transformer and this was then evaluated. Both simulation and experimental results have shown that with the assistance of the cascode flyback converter the switching speeds of the converter were increased including the significant improvement in the energy efficiency compared to that of the single switch flyback converter. In order to further maximize the utilization of the transformer, to reduce the voltage stress on MOSFETs and to obtain the maximum power density from the power converter, double ended topologies were chosen. For this purpose, a gate drive circuitry utilising the multi-layered coreless PCB gate drive transformer was designed and evaluated in both a Half-bridge and a Series resonant converter. It was found that the gate drive power consumption using this transformer was less than 0.8W for the frequency range of 1.5-3.5MHz. In addition, by using this gate drive circuitry, the maximum energy efficiency of the series resonant converter was found to be 86.5% with an output power of 36.5W.

The use of SMPS (Switched mode power supply) in embedded systems is continuously increasing. The technological requirements of these systems include simultaneously a very good voltage regulation and a strong compactness of components. SEPIC ( Single-Ended Primary Inductor Converter) is a DC/DC switching converter which possesses several advantages with regard to the other classical converters. Due to the difficulty in control of its 4th-order and non linear property, it is still not well-exploited. The objective of this work is the development of successful strategies of control for a SEPIC converter on one hand and on the other hand the effective implementation of the control algorithm developed for embedded applications (FPGA, ASIC) where the constraints of Silicon surface and the loss reduction factor are important. To do it, two non linear controls and two observers of states and load have been studied: a control and an observer based on the principle of sliding mode, a deadbeat predictive control and an Extended Kalman observer. The implementation of both control laws and the Extended Kalman observer are implemented in FPGA. An 11-bit digital PWM has been developed by combining a 4-bit Δ-Σ modulation, a 4-bit segmented DCM (Digital Clock Management) phase-shift and a 3-bit counter-comparator. All the proposed approaches are experimentally validated and constitute a good base for the integration of embedded switching mode converters

Orientador: Ernesto Ruppert Filho<br>Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação<br>Made available in DSpace on 2018-08-21T00:56:13Z (GMT). No. of bitstreams: 1 Dias_AgnaldoVieira_M.pdf: 2229736 bytes, checksum: 725a7fa267bc30780c457689e4356336 (MD5) Previous issue date: 2012<br>Resumo: O estudo da utilização de conversores CC/CC isolados e elevadores de tensão para a alimentação de moduladores de pulsos é apresentado neste trabalho. Foi selecionada a topologia em ponte completa, dando-se enfoque ao problema das capacitâncias parasitas envolvidas no circuito, que aparecem de forma acentuada em transformadores elevadores de tensão e filtros indutivos de saída e são altamente indesejáveis quando se opera em regime chaveado. Essas capacitâncias são tratadas através de uma forma de amortecimento, onde a energia armazenada nas mesmas é devolvida à fonte primária ao final de cada semiciclo de chaveamento, tentando obter-se menor volume, maior rendimento e menor dissipação de calor no conversor. Além disso, um circuito de regulação de carga é utilizado para garantir uma maior estabilidade de pulso e contornar problemas típicos de moduladores de pulsos utilizados em radares, como o efeito de backswing. O modulador de pulsos utilizado como carga para esse sistema opera com uma tensão de alimentação de 1kV, frequência de repetição de pulsos (PRF) de 585Hz e consome uma potência da ordem de 2,1kW. O conversor CC/CC é alimentado por um barramento CC não regulado de 280V<br>Abstract: The study of high-voltage isolated DC/DC converters used to supply pulse modulators is presented on this dissertation. The Full Bridge topology was selected, focusing in problems caused by parasitic capacitances in the circuit. This characteristic, which appears sharply in high voltage transformers and in inductors of output filter, is highly undesirable when the circuit is operated in switching mode. These capacitances are handled using a soft commutation technique, where their stored energy are returned to the primary source in the end of each switching cycle, trying to get a low size, high efficiency and low heat dissipation in the converter. Moreover, a charging regulator circuit is used to ensure good pulse stability and avoid typical problems in the pulse modulators use, such as the backswing effect. The pulse modulator used as load for this converter operates with a supply voltage of 1kV, pulse repetition frequency (PRF) of 585Hz and consumes 2.1 kW. The converter input is supplied by a 280V unregulated DC bus<br>Mestrado<br>Energia Eletrica<br>Mestre em Engenharia Elétrica

The Power Supply Unit (PSU) plays a vital role in almost all electronic equipment. The continuous efforts applied to the improvement of semiconductor devices such as MOSFETS, diodes, controllers and MOSFET drivers have led to the increased switching speeds of power supplies. By increasing the switching frequency of the converter, the size of passive elements such as inductors, transformers and capacitors can be reduced. Hence, the high frequency transformer has become the backbone in isolated AC/DC and DC/DC converters. The main features of transformers are to provide isolation for safety purpose, multiple outputs such as in telecom applications, to build step down/step up converters and so on. The core based transformers, when operated at higher frequencies, do have limitations such as core losses which are proportional to the operating frequency. Even though the core materials are available in a few MHz frequency regions, because of the copper losses in the windings of the transformers those which are commercially available were limited from a few hundred kHz to 1MHz. The skin and proximity effects because of induced eddy currents act as major drawbacks while operating these transformers at higher frequencies. Therefore, it is necessary to mitigate these core losses, skin and proximity effects while operating the transformers at very high frequencies. This can be achieved by eliminating the magnetic cores of transformers and by introducing a proper winding structure. A new multi-layered coreless printed circuit board (PCB) step down transformer for power transfer applications has been designed and this maintains the advantages offered by existing core based transformers such as, high voltage gain, high coupling coefficient, sufficient input impedance and high energy efficiency with the assistance of a resonant technique. In addition, different winding structures have been studied and analysed for higher step down ratios in order to reduce copper losses in the windings and to achieve a higher coupling coefficient. The advantage of increasing the layer for the given power transfer application in terms of the coupling coefficient, resistance and energy efficiency has been reported. The maximum energy efficiency of the designed three layered transformers was found to be within the range of 90%-97% for power transfer applications operated in a few MHz frequency regions. The designed multi-layered coreless PCB transformers for given power applications of 8, 15 and 30W show that the volume reduction of approximately 40-90% is possible when compared to its existing core based counterparts. The estimation of EMI emissions from the designed transformers proves that the amount of radiated EMI from a three layered transformer is less than that of the two layered transformer because of the decreased radius for the same amount of inductance. Multi-layered coreless PCB gate drive transformers were designed for signal transfer applications and have successfully driven the double ended topologies such as the half bridge, the two switch flyback converter and resonant converters with low gate drive power consumption of about half a watt. The performance characteristics of these transformers have also been evaluated using the high frequency magnetic material made up of NiZn and operated in the 2-4MHz frequency region. These multi-layered coreless PCB power and signal transformers together with the latest semiconductor switching devices such as SiC and GaN MOSFETs and the SiC schottky diode are an excellent choice for the next generation compact SMPS.

This thesis presents an active clamp forward converter for use in the Energy Harvesting From Exercise Machines project. Ideally, this converter will find use as the centerpiece in a process that links elliptical trainers to the California grid. This active clamp forward converter boasts a 14V-60V input voltage range and 150W power rating, which closely match the output voltage and power levels from the elliptical trainer. The isolated topology outputs 51V, higher than previous, non-isolated attempts, which allows the elliptical trainers to interact with a central grid-tied inverter instead of many small ones. The final converter operated at greater than 86% efficiency over most of the elliptical trainer’s input range, and produced very little noise, making it a solid choice for this implementation.

Les travaux présentés ici proposent des convertisseurs d’énergie à haut rendement et très large dynamique de tension d’entrée, c'est-à-dire capables de fonctionner avec un rendement énergétique élevé sur une plage de tension d’entrée étendue (typiquement de 9V à 200V). De multiples tensions de réseaux sont standards dans l’industrie : elles sont spécifiques à un domaine (aéronautique, ferroviaire, …) et dépendent de la source primaire d’alimentation électrique (batterie d’accumulateurs, génératrice, …). Au sein d’un équipement embarqué, plusieurs réseaux peuvent cohabiter : une alimentation principale 110V et une alimentation de secours sur batterie 12V, par exemple. Le besoin de convertisseurs large dynamique d’entrée est donc une réalité, mais il n’existe sur le marché que peu de convertisseurs capables de réaliser une dynamique d’entrée supérieure à dix. Dans un premier temps, nous avons étudié les enjeux et les problématiques liés à la large dynamique d’entrée, afin de mieux cerner les limitations des topologies de puissance classiques. Nous avons ensuite traité le cas d’une architecture de conversion d’énergie de type série, dont nous avons amélioré le rendement énergétique grâce à l’utilisation de circuits d’aide à la commutation. Cette solution ayant des performances limitées, nous avons proposé de nouvelles architectures de convertisseurs DC/DC, de type parallèle, capables de supporter des dynamiques de tension d’entrée supérieures à vingt et ayant un rendement énergétique élevé (supérieur à 80%). Nous avons également étudié et mis en œuvre des stratégies de commande, numériques et analogiques, permettant de contrôler ces nouvelles topologies complexes<br>Power converters are present in virtually every embedded system, but many standards of DC networks exist: the supply voltage is depending on how the power is generated (battery, alternator …) and can range from 12V to more than 115V. When an equipment must comply with a 110V main supply and 12V back-up supply, the use of a wide input voltage range DC/DC converter is mandatory. Since classical switched mode power converters cannot achieve simultaneously high efficiency and wide input voltage range, manufacturers rarely propose DC/DC converters with an input voltage range greater than 10. This work tackles the issue of wide input voltage power conversion. After discussing about designs trade off and problems that stem from a wide input range, we try to improve the overall efficiency of a classical buck-boost converter, by using non dissipative switching-aid circuits. We also proposed a novel two stages power converter capable of dealing with very wide input voltage ranges (more than 20), without a reduction of the power efficiency. Since those new converters are far more difficult to control, some theoretical analysis was performed and some practical tests were done using complex controls laws

The aim of this thesis is design of adjustable switched mode power supply with symmetrical output of 25 V, and switched mode power supply with fixed output voltage of 5 V. Required maximum output current of each outputs is 3 A. At the beginning of the paper function of the basic SMPS topologies is described. Next all reqiured SMPSs are designed and chosen parts of the design are simulated. In the second half of the thesis assembly and testing of PCB are described as well as functions of programs. Last chapter contains results of meassurement of power supply paramters.

The thesis begins with a general introduction to switched-mode power conversion. The main application areas of the technique are outlined and a summary is presented of current research work. The following chapters then focus on one recent development in the field, the Cuk converter and integrated magnetics. First, the steady-state performance limitations of the Cuk converter are explored through a comparison with the basic switched-mode converter topologies. The circuit is seen to possess several attractive properties including input and output current waveforms which are continuous rather than pulsating. However, the switching losses are shown to be high. A regenerative snubber is presented which reduces the transistor turn-off loss whilst preserving the high-quality input and output current waveforms of the converter. The integrated magnetics technique is discussed in the following chapter. This is the technique whereby converter magnetic components are coupled to eliminate input and output ripple currents and therefore improve steady-state performance. The possible problems are highlighted of attempting to couple transformers and inductors on a single core and an alternative coupling technique is outlined which uses an auxiliary electric circuit. The introduction of magnetic coupling in the Cuk converter to eliminate input and output ripple currents and improve steady-state performance results in more complicated dynamic characteristics and a more complex control problem. The state-space averaging technique is used in chapter 4 with the aid of a control engineering design package, CLADP, to analyse the problem. The impact of component coupling on the converter dynamic characteristics is explained and possible control strategies are suggested and verified. Finally, the Cuk converter with component coupling is assessed as a large-signal waveshaper. Several inverter configurations are examined in which a switched-mode converter operating under closed-loop control is used as a waveshaper to synthesise high-quality sinusoidal output currents. The implementation of the schemes using a Cuk converter with component coupling is described.

This thesis entails the design and fabrication of a smartphone charger that is powered by a bicycle dynamo hub. In addition to the design and validation of the charger prototype, this thesis involves the testing and characterization of the dynamo hub power source, the design and construction of specialized test equipment, and the design and prototyping of a handlebar-mounted case for the smartphone and charging electronics. With the intention of making the device a commercial product, price, aesthetics, and marketability are of importance to the design. An appropriate description of the charger circuit is a microcontroller-based energy management system, tailored to meet strict power demands of current smartphones. The system incorporates a switched-mode power supply, lithium polymer battery, microcontroller, and specialized protection circuitry. Prototype testing confirms that the circuit meets the charging requirements of the smartphone at bicycle speeds ranging from 7 miles per hour to as high as 55 miles per hour.

The thesis consists of an introduction and four appended papers. In the introduction we give an overview of pulse-modulated systems and provide a few examples of such systems. Furthermore, we introduce the so-called dynamic phasor model which is used as a basis for analysis in two of the appended papers. We also introduce the harmonic transfer function and finally we provide a summary of the appended papers. The first paper considers stability analysis of a class of pulse-width modulated systems based on a discrete time model. The systems considered typically have periodic solutions. Stability of a periodic solution is equivalent to stability of a fixed point of a discrete time model of the system dynamics. Conditions for global and local exponential stability of the discrete time model are derived using quadratic and piecewise quadratic Lyapunov functions. A griding procedure is used to develop a systematic method to search for the Lyapunov functions. The second paper considers the dynamic phasor model as a tool for stability analysis of a general class of pulse-modulated systems. The analysis covers both linear time periodic systems and systems where the pulse modulation is controlled by feedback. The dynamic phasor model provides an $\textbf{L}_2$-equivalent description of the system dynamics in terms of an infinite dimensional dynamic system. The infinite dimensional phasor system is approximated via a skew truncation. The truncated system is used to derive a systematic method to compute time periodic quadratic Lyapunov functions. The third paper considers the dynamic phasor model as a tool for harmonic analysis of a class of pulse-width modulated systems. The analysis covers both linear time periodic systems and non-periodic systems where the switching is controlled by feedback. As in the second paper of the thesis, we represent the switching system using the L_2-equivalent infinite dimensional system provided by the phasor model. It is shown that there is a connection between the dynamic phasor model and the harmonic transfer function of a linear time periodic system and this connection is used to extend the notion of harmonic transfer function to describe periodic solutions of non-periodic systems. The infinite dimensional phasor system is approximated via a square truncation. We assume that the response of the truncated system to a periodic disturbance is also periodic and we consider the corresponding harmonic balance equations. An approximate solution of these equations is stated in terms of a harmonic transfer function which is analogous to the harmonic transfer function of a linear time periodic system. The aforementioned assumption is proved to hold for small disturbances by proving the existence of a solution to a fixed point equation. The proof implies that for small disturbances, the approximation is good. Finally, the fourth paper considers control synthesis for switched mode DC-DC converters. The synthesis is based on a sampled data model of the system dynamics. The sampled data model gives an exact description of the converter state at the switching instances, but also includes a lifted signal which represents the inter-sampling behavior. Within the sampled data framework we consider H-infinity control design to achieve robustness to disturbances and load variations. The suggested controller is applied to two benchmark examples; a step-down and a step-up converter. Performance is verified in both simulations and in experiments.<br>QC 20100628

L’augmentation des performances des produits portables requièrent une exploitation la plus efficace possible de la batterie afin de permettre à ces produits d’être utilisés le plus longtemps possible avant d’être rechargés. Les circuits en aval ont besoin d’une source de tension stable qui peut varier pour chacun d’entre eux entre 1.0 V et 5.5 V à partir d’une tension d’entrée pouvant varier entre 2.5V et 5V. Un convertisseur DC-DC à 4 interrupteurs de type dévolteur-survolteur apparait comme une solution intéressante permettant des opérations de diminutions et d’augmentations de tension d’une part, et d’autres part le meilleur compromis entre rendement, performances dynamiques et coûts (en termes de place occupée sur le Silicium et sur la carte). ON Semiconductor a développé et produit un prototype en technologie CMOS 0.25 µm (procédé propriétaire) d’un tel convertisseur qui sert d’étude de cas pour la thèse. Le convertisseur opère selon plusieurs modes de fonctionnement (mode dévolteur, mode survolteur et mode dévolteur-survolteur) à cause d’un impératif de fonctionnement en fréquence de commutation fixe. Le mode dévolteur-survolteur est le sujet principal traité dans la thèse. Le mode dévolteur-survolteur, aussi appelé mode de transition, peut être implémenté via plusieurs Séquences de Topologie (SdT) possibles. Trois SdTs sont comparées en termes de rendement parmi lesquelles figure la SdT implémentée par le prototype. Les performances dynamiques du convertisseur dans ses différents mode de fonctionnement sont ensuite étudiées en dérivant les expressions analytiques des fonctions de transfert qui les caractérisent. Les modèles dérivés dans Matlab et Mathcad pour évaluer le rendement et les performances dynamiques du convertisseur sont ensuite utilisés pour développer un outil servant à obtenir un dimensionnement rapide de la boucle de contrôle du convertisseur. À partir de cette étape, la stabilité du convertisseur dans ses différents modes de fonctionnement est analysée en utilisant la théorie de Floquet et un modèle échantillonné-linéarisé du convertisseur permettant l’établissement d’une méthodologie de conception d’un tel convertisseur. Enfin, pour améliorer le rendement en mode de transition pour tous les points de fonctionnement, un algorithme contrôlant la valeur de l’hystérésis du comparateur utilisé dans la boucle de contrôle a été développé en Verilog, simulé dans l’environnement CADENCE et implémenté en FPGA. Cet algorithme peut améliorer le rendement de près de 3% en mode de transition comparé au réglage initial de la valeur d’hystérésis<br>The increase in the performances of the portable devices calls for an energy conversion from the battery that is the most efficient as possible in order to make the devices last as long as possible. The downstream circuits need a steady voltage supply which can vary for each one of them from 1.0 V to 5.5 V from an input voltage varying between 2.5 V and 5 V. A 4-Switch Buck-Boost (4SBB) DC-DC converter appears to be the solution which can perform step-up and step-down voltage perations and get the best trade-off between fficiency, dynamic performances and costs (in terms of Silicium and Board area). ON Semiconductor has developed and taped out in CMOS 0.25 µm (ON Semiconductor process) a 4SBB converter which serves as the case study of the thesis. The converter operates in multiple modes (namely Buck mode, Boost mode and Buck-Boost mode) due to fixed frequency operations. The Buck-Boost mode is the main topic dealt with in the thesis. The Buck-Boost mode, also called "transition mode", can be implemented using several possible Sequences of Topologies (SoT). Three SoTs are compared in terms of efficiency among which the one implemented in the converter. Then the dynamical performances of the converter are studied for the different modes of operations by deriving the analytical expressions of the relevant transfer functions. The models derived in Matlab and Mathcad to evaluate efficiency and dynamical performances are then used to develop a tool to get a rapid sizing of the converter’s control loop components. From this step, the stability of the converter is analyzed using Floquet’s theory and Sampled-Data modeling enabling the building of a design methodology to design such a converter. Finally, to enhance efficiency in Buck-Boost mode whatever the working conditions, an algorithm controlling the hysteresis value of the control loop’s comparator has been developed in Verilog, simulated in CADENCE and implemented in FPGA. This algorithm can improve efficiency by almost 3% in Buck-Boost mode compared to its default setting

Peak current mode control is a popular method of SMPS control due the inherent cycle-by- cycle current limiting, feed-forward control and current sharing ability it provides. However, the subharmonic oscillations which plague peak current mode control must be removed using slope compensation. Until the work presented in this thesis, there have been no true digital implementations of peak current mode control due to the difficulties associated with implementing a digital form of slope compensation. This thesis introduces a complete digital peak current mode converter which uses a novel method of digital slope compensation to remove the subharmonic oscillations observed when using peak current mode control. The digital implementation of peak current mode control is applied to a Buck converter design example which directly compares the proposed digital scheme with an equivalent analog scheme. Exact analytical design equations are derived which allow a specified crossover frequency and phase margin to be achieved concurrently. The l6W Buck converter design example compares the digital peak current mode controlled converter with an analog converter designed to the same specification and tested on the same power stage PCB. The detailed steady state, transient and frequency response results from the hardware experimentations show excellent correlation with the MATLAB simulated converter and are in good agreement with the equivalent analog converter. The crossover frequency is specified as 15kHz and is measured as 14.71kHz on the proposed digital converter with a measured phase margin only 5' less than the specification. The results confirm that the operation of the proposed digital peak current mode control scheme is functionally similar to analog peak current mode control.

High-power, high-voltage and high voltage-conversion ratio DC-DC converters are an enabling technology for offshore DC grids of the future. These converters are required to interface between offshore wind farms and an offshore DC grid and a key design issue is the size and weight of the converter, which significantly impacts the cost of the associated off-shore platform. In addition to this application, some rural communities, particularly in Canada, Australia and South Africa,which are located far away from the electrical power generators, can take the advantages of this technology by tapping into existing HVDC transmission line using a high voltage-conversion ratio DC-DC converter. The work described in this thesis is an investigation as to how such DC-DC converters may be realised for these applications. First a review of existing DC-DC converters was carried out to assess their suitability for the target applications. A classification of DC-DC converters into Direct and Indirect converters was proposed in this work based on the manner in which the energy is transferred from the input to the output terminal of the converter. Direct DC-DC converters, particularly Switched Capacitor(SC) converters are more promising for high-voltage, high-power and high voltage-conversion ratio applications, since the converter can interface between the low-voltage and the high-voltage terminals using low-voltage and low-power power electronic modules. Existing SC topologies were examined to identify the most promising candidate circuits for the target applications. Four SC synthesis techniques were proposed in order to derive new SC circuits from existing topologies. A new 2-Leg Ladder, modular 2-Leg Ladder and bi-pole 2-Leg Ladder were devised, which had significant benefits in terms of size and weight when compared with existing circuits. A scaled power 1 kW converter was built in the laboratory in order to validate the analysis and compare the performance of the new 2-Leg ladder circuit against a conventional Ladder circuit, where it was shown that the new circuit had higher efficiency, smaller size and lower output voltage ripple than the Ladder converter.

En matière de production énergétique, les tendances actuelles indiquent que la part de marché mondiale des énergies renouvelables continuera d’augmenter du fait de l’amélioration continue de l’efficacité des équipements et de la réduction de leurs coûts. Les convertisseurs de puissance jouent un rôle fondamental dans le fonctionnement des réseaux électriques car ils permettent les transferts d'énergie entre les sources, les éléments de stockage et les charges. Ces dispositifs doivent répondre à des exigences particulières d'efficacité, de robustesse et de stabilité pour garantir un fonctionnement correct. Le travail présenté dans ce mémoire est centré sur deux problèmes particuliers liés au comportement des convertisseurs de puissance : la commande et l’observation. Ces problèmes sont difficiles à résoudre en raison des non-linéarités et des phénomènes physiques complexes présents dans ces composants. Le modèle mathématique utilisé pour représenter les convertisseurs de puissance est le modèle dit à commutation. Sur la base de ce modèle, nous exploitons des outils abordés dans des problématiques telles que la stabilité de Lyapunov, la méthode des moments, la géométrie algébrique et le filtrage direct. Nous proposons des approches novatrices pour commander et observer ces systèmes commutés. Nous introduisons notamment la notion de moments de relaxation pour les systèmes commutés. Ces représentations permettent d’obtenir des modèles permettant d'établir une cartographie de l’entrée de commutations dans l'espace des moments. Cette carte supprime la non-linéarité associée à l'entrée de commutation et fournit un modèle plus approprié pour effectuer les calculs numériques de la commande. C'est l'idée fondamentale de la méthode de commande à variation de paramètres proposée. Après avoir calculé un signal de commande pour le modèle relaxé, le signal d'entrée pour le système commuté peut alors être déduit. Cette approche a montré de bonnes performances en termes de suivi de référence et de stabilité. Une approche reposant sur les données pour l'observation des systèmes commutés est proposée. Cette méthode implique la synthèse d'un filtre direct qui calcule les limites du cas le plus défavorable sur l'erreur d'estimation. Cette méthode est appliquée au cas des convertisseurs de puissance fonctionnant en mode continu et discontinu. Une mise en oeuvre pratique est effectuée et ses performances sont comparées à d’autres méthodes d’estimation<br>Current trends in global energy production indicate that renewables will continue to increase their market share due to continuous efficiency improvements and cost reductions. Power converters constitute the interfaces that enable energy transfers in microgrids between sources, storage and loads, playing a fundamental role in their operation. These devices are required to meet particular efficiency, robustness and stability requirements to guarantee a proper operation. The present work is focused on two particular problems present in the operation of power converters: control and observation. These problems are hard to solve because of the nonlinearities and complex behaviors present in power converters. The mathematical model used to represent power converters is the switched system. Based on this model we take elements from subjects like Lyapunov stability, the method of moments, algebraic geometry and direct filtering, and propose novel approaches to control and observation of switched systems. We introduce moment relaxations of switched systems. These representations allow to obtain models where the switching input is mapped to a moment space. This map removes the nonlinearity associated to the switching input and yields a model which is more suitable for performing numerical computations. This is the fundamental idea in the proposed parameter-varying control method. After computing a control signal for the relaxed model, the control signal for the switched system can be recovered. This approach has shown good performance with respect to reference tracking and stability. A data-driven approach for the observation of switched systems is proposed. This method involves the design of a direct filter that computes worst-case bounds on the estimation error. This method is applied to the case of power converters operating in continuous and discontinuous modes. A practical implementation is described, and its performance is compared with other estimation approaches

The design of power electronic systems requires wide ranging expertise in complex and often tedious tasks, such as the design of the power circuit, selection of power semiconductor devices, design of the feedback loop, design of wound components, and design for Electromagnetic Compatibility (EMC). Many of the tasks rely heavily on the experience of the designer, and cannot be solved analytically. This makes the design iterative, time consuming, and heavily dependent on the designer's experience. At present, circuit simulation packages such as SPICE or SABER are used to test a design in software. Even with these tools, it is still necessary to build a prototype to verify the design, usually followed by several test-modify-retest cycles before a final design is reached. This process involves considerable decision making, which requires substantial expertise in all aspects of power electronics. This thesis investigates the use of expert system technology, one of many artificial intelligence techniques, to assist in the design of power electronic systems. Faster design times and a more efficient design are among the advantages that can be achieved using an expert system based design. In this study, Switched Mode Power Supplies have been chosen as a typical power electronic system. An expert system (developed using wxCLIPS) has been linked with a circuit simulator (SPICE), extensive databases and a graphical display system to provide a comprehensive design environment. The techniques used in the system cover all facets of the design: preliminary circuit design, component selection, circuit simulation, control loop design, and design for EMC. Extensive knowledge bases covering the various design rules are built into the expert system. The design methodology aims to give a near complete system design with an optimum configuration produced at minimum time and cost. The investigated techniques could readily be adapted to other power electronic applications, such as Uninterruptible Power Supplies and motor drives.

The following work deals with a design of power supply testbench with design of their replaceable modules and circuits for their measurement. The final product should be used for faster design and tuning of switching power supplies. In this essay, there is detailed description of switching power supplies, analysis of support circuits and calculations for design. Based on theoretical background and selected parameters, a connection concept will be created. This concept will be validated by a device that will consist of main board, changeable modules and measurement circuits.

Switched-capacitor (SC) DC-DC converters provide a viable solution for on-chip DC-DC conversion as all the components required are available in most processes. However, power efficiency, power density characteristics of SC converters are adversely affected by the integration, and characteristics such as response time and noise can be further improved with an on-chip converter. An analysis on speed, power efficiency, and noise performance of SC converters is presented and verified using simulations. Based on the analysis two techniques, converter-gating and adaptive gain control, are developed. Converter-gating uses a combination of smaller stages and reconfiguration during transient load steps to improve the power efficiency and transient response speed. The stages of the converter are also distributed across the die to reduce the voltage drop and noise on power supply. Adaptive gain control improves transient response through manipulation of the gain of the integrator in the control loop. This technique focuses on improving the response time during converter reconfiguration and offers a general solution to transient response improvement instead of focusing on the worst case scenario which is usually the largest transient load step. The techniques developed are then implemented in ST 28nm FDSOI process and test methodologies are discussed.

Modern electronics continues to push past boundaries of integration and functional density toward elusive, completely autonomous, self-powered microsystems. As systems continue to shrink, however, less energy is available on board, leading to short device lifetimes (run-time or battery life). Extended battery life is particularly advantageous in the systems with limited accessibility, such as biomedical implants and structure-embedded micro-sensors. The power management process usually requires compact and efficient power converters to be embedded in these microsystems. This dissertation introduces switched-capacitor (SC) power converter designs that make all these techniques realizable on silicon.Four different integrated SC power converters with multiple control schemes are designed here to provide low-power high-efficient power sources. First, a monolithic step-down power converter with subthreshold z-domain digital pulse-width modulation (DPWM) controller is proposed for ultra-low power microsystems. The subthreshold design significantly reduces the power dissipation in the controller. Second, an efficient monolithic master-slave complementary power converter with a feedback controller that purely operates in subthreshold operation region is discussed to tailor for the aforementioned ultra-low power applications. Third, we introduce an efficient monolithic step-down SC power stage with multiple-gain control and on-chip capacitor sizing for self-powered microsystems. The multiple-gain control helps the converter to constantly maintain high efficiency over a large input/output range. The size-adjustable pumping capacitors allow the output voltage to be regulated at different desired levels, with a constant 50% duty ratio. The monolithic implementations in these three integrated CMOS power converters effectively suppress noise and glitches caused by parasitic components due to bonding, packaging and PCB wiring. Fourth, an efficient step-up and step-down SC power converter with multiple-gain closed-loop controller is presented. The measurements and simulation results in these four power converters demonstrate the techniques proposed in this research. The approaches presented in this dissertation are evidently viable for realizing compact and high efficient SC power converters, contributing to next generation power-efficient microsystems designs.

<p>Vid tidpunkten för seminariet var följande delarbeten opublicerade: delarbete 4 under granskning.</p><p>At the time of the licentiate seminar the following papers were unpublished: paper 4 under review.</p>

A power electronic switch-mode three-leg converter is a flexible converter and hence very useful for practical teaching of several disciplines within electric power engineering. It can be used as a half-bridge, full-bridge and three-phase converter, to mention a few, and enables the user to study many different power electronic topologies. The converter, controlled by a microcontroller, can also be used for teaching digital control of power electronics. Its output can be varied in frequency, magnitude and waveforms, and can also be measured by the microcontroller. The flexibility of the converter makes it possible to utilize it in drive circuits for a wide range of loads and can therefore also be used for teaching electric drive systems.This thesis shows a solution of how to design the switch-mode three-leg power electronic converter. The converter is designed and implemented on a printed circuit board (PCB) together with other necessary components. To meet the safety requirements of the problem description, the power rating is low, 12 A * 50 V, and the power circuit is isolated from the microcontroller on the PCB. The microcontroller chosen is the Texas Instruments PiccoloTM ControlCARD and pulse-width modulation and analog-to-digital conversion is implemented with real-time programming.This system developed is verified, except for the MOSFET drivers and measurement circuits. As time was limited, the laboratory work had to be ended in favor of writing the report. Unfortunately, this made it impossible to test the full system setup. A full description of the changes to be implemented for the whole system to be functioning and further tested is provided.A system for using the converter designed in a DC motor drive, by utilizing two of the bridge-legs as a full-bridge converter, is studied. The programming code is tailored for the specific purpose and speed measurements and control algorithms were added. Due to the converter not functioning, the testing of the DC motor drive could not be performed. However, full planning and controller implementation was done.

<p>This work focuses on different kinds of Switch Mode Power Amplifiers (SMPAs) using LDMOS technologies. It involves a literature study of different SMPA concepts. Choosing the suitable class that achieves the high efficiency was the base stone of this</p><p>work. A push-pull class J power amplifier (PA) was designed with an integrated LC resonator inside the package using the bondwires and die capacitances. Analysis and motivation of the chosen class is included. Designing the suitable Input/Output printed circuit board (PCB) external circuits (i.e.; BALUN circuit, Matching network and DC</p><p>bias network) was part of the work. This work is done by ADS simulation and showed a simulated result of about 70% drain efficiency for 34 W output power and 16 dB gain at 2.14 GHz. Study of the losses in each part of the design elements is also included.</p><p>Another design at lower frequency (i.e.; at 0.94 GHz) was also simulated and compared to the previous design. The drain efficiency was 83% for 32 W output power and 15.4 dB Gain.</p>

<p>Switch Mode Power Supplies are very important components in present day electronics and have continued to thrive and grow over the past 25 years. This thesis looks inside how the SMPS have evolved over the passage of years with special emphasis to the Synchronous Buck Converter. It also discusses why there is a strong potential to further the study related to designs based around a Synchronous Buck Converter for portable applications. The main objective of the thesis is to look into the controller design for minimizing size, enhancing efficiency and reliability of power converters in portable electronic equipment such as mobile phones and PDAs. The thesis aims to achieve this using a 90 nm process with an input voltage of 1.55V and an output of 1V with a power dissipation of 200mW.</p>

<p>Power-amplifier efficiency is a significant issue for the overall efficiency of most wireless system. Therefore, currently there are different kind of Switched mode power amplifiers are developed which are showing very high efficiency also at higher frequencies but all of these amplifiers are subjected to drive with the constant envelope signals. Whereas, for the increasing demand of high data rate transmissions in wireless communication there are some new modulation schemes are introduced and which are generating no more a constant envelope signal but a high peak to average power signal. Therefore, recently a new technique is proposed called the burst mode operation for operating the switched mode power amplifiers efficiently while driven by a high peak to average power signal.</p><p> </p><p>The purpose of this master thesis work was to review the theory of this burst mode operation and some basic investigations of this theory on switched mode power amplifiers were performed in simulation environments. The amplifiers of class D, inverse D, DE and J are studied. The thesis work was mainly carried out by ADS and partly in MATLAB SIMULINK environment. Since this burst mode operation is a completely new technique therefore a new Harmonic balance simulation setups in ADS and Microwave Office are developed to generate the RF burst signals.</p><p> </p><p>A Class J amplifier based on LDMOS technique is measured by a 16 carrier multi-tone signal having peak to average power ratio of 7 dB and achieved the drain efficiency of 50% with -30 dBc linearity at 946 MHz.</p><p> </p><p> </p>

Thesis (Masters Diploma (Electricity Engineering) -- Cape Technikon, Cape Town,1991<br>At the time of the design the maximum allowable operating frequency for an output power of between 200 and 250 watts was 100 kHz. Although a 600 kHz operating frequency could have been achieved, it would only be at a very low output power level. To maximise the current components available, a 210 watt 100 kHz direct-off-line switched-mode power supply was developed. The design presented can be used to power any compatible IBM XT/AT personal computer. The prototype was tested. An overall efficiency of 61% was achieved. The final prototype required 1 521 cm3 and weighed approximately 980 g, representing a power to volume ratio of 0.14 W/cm3 (2.26 W/inch3). Detailed procedures are also presented to help with the design and selection of the reactive components. Special design features include the half-bridge push-pull topology, MOSFETS as power switches, digital current limiting, primary power limiting, multiple outputs and fault counting to name but a few.

This Thesis examines the operation and dynamic performance of a single-stage, single-switch power factor corrector, S4 PFC, with an integrated magnetic device, IM. Also detailed isthe development and analysis of a high power light emitting diode, HP LED, power factorcorrection converter and proposed voltage regulation band control approach.The S4 PFC consists of a cascaded discontinuous current mode, DCM, boost stage anda continuous current mode, CCM, forward converter. The S4 PFC achieves a high powerfactor, low input current harmonics and a regulated voltage output, utilising a singleMOSFET. A steady-state analysis of the S4 PFC with the IM is performed, identifying theoperating boundary conditions for the DCM power factor correction stage and the CCMoutput voltage regulation stage. Integrated magnetic analysis focuses on understanding theperformance, operation and generated flux paths within the IM core, ensuring the device doesnot affect the normal operation of the converter power stage. A design method for the S4 PFCwith IM component is developed along with a cost analysis of this approach. Analysis predictsthe performance of the S4 PFC and the IM, and the theoretical work is validated by MATLABand SABER simulations and measurements of a 180 W prototype converter.It is not only the development of new topological approaches that drives theadvancement of power electronic techniques. The recent emergence of HP LEDs has led to aflurry of new application areas for these devices. A DCM buck-boost converter performs thepower factor correction and energy storage, and a cascaded boundary conduction current modebuck converter regulates the current through the LED arrays. To match the useful operatinglifetime of the HP LEDs, electrolytic capacitors are not used in the PFC converter. Analysisexamines the operation and dynamic characteristics of a PFC converter with low capacitiveenergy storage capacity and its implications on the control method. A modified regulationband control approach is proposed to ensure a high power factor, low input current harmonicsand output voltage regulation of the PFC stage. Small signal analysis describes the dynamicperformance of the PFC converter, Circle Criterion is used to determine the loop stability.Theoretical work is validated by SABER and MATLAB simulations and measurements of a180 W prototype street luminaire.

A method to reduce Electromagnetic Interference (EMI) of multiple switching waveforms by harmonic cancellation is presented. The waveforms considered are input currents generated by 'n' Discontinuous Mode (DCM) Flyback Switched Mode Power Supplies (SMPS) that share a common source. The waveforms are modeled as ideal triangular waveforms and a Fourier analysis is performed to determine the phase relationship, θ, that minimizes the EMI. The combined EMI is minimum when θ=360°/n and maximum when θ=0°. A system of two DCM Flyback SMPS is designed in such a way that both 0° and 180° phase shifts between input current waveforms are possible. In both cases EMI filters are designed to meet EMI standard MIL-STD-461. The system is simulated and constructed and the experimental results are presented. These results demonstrate the accuracy of the modeled waveform and the reduction of conducted EMI when optimal phasing is achieved.

The application of the sliding mode control in power converters has a well-known inconvenient from the practical point of view, which is to obtain fixed switching frequency implementations. This thesis deals with the development of a hysteresis band controller in charge of fixing the switching frequency of a sliding motion in power electronics applications. The proposed control measures the switching period of the control signal and modifies the hysteresis band of the comparator in order to regulate the switching frequency of the sliding motion. The proposed structure becomes in an additional control loop aside from main control loop implementing the sliding mode controller. In the first part of the thesis, the switching frequency control system is modelled and a design criteria for the control parameters are derived for guaranteeing closed loop stability, under different approaches and taking into account the most expectable working scenarios. In the second part of the thesis, the proposed strategies are applied to several power converters prototypes. Specifically, DC-to-DC and DC-to-AC power converters are built and the experimental results are shown. In this part, the strategies used for implementing the controllers are also deeply discussed.<br>La aplicación del control en modo deslizante en el ámbito de la electrónica de potencia presente una problemática ampliamente conocida, obtener aplicaciones a frecuencia fija de operación. Es esta tesis se estudia el desarrollo de un comparador con histéresis variable encargado de regular el periodo de conmutación de controladores bajo regímenes deslizantes en convertidores de potencia. La estructura propuesta mide el periodo de conmutación de la señal de control y actualiza, de manera adecuada, la banda de histéresis del comparador a tal fin de regular la frecuencia de conmutación al valor deseado. La solución propuesta forma un segundo lazo de control, además del lazo de control principal que implementa el controlador en modo deslizante. En la primera parte de la tesis, éste segundo lazo es modelado, haciendo posible el estudio de las condiciones de estabilidad bajo realizaciones en tiempo continuo y en tiempo discreto. Además, se estudian las condiciones típicas de trabajo de los controladores utilizados en convertidores de potencia, como son los esquemas de regulación y de seguimiento de señales variantes en el tiempo. La segunda parte de la tesis se centra en evaluar, de manera experimental, los desarrollos teóricos de los controladores propuestos en convertidores de potencia. Concretamente, en la tesis se presentan los resultados experimentales obtenidos con diversos convertidores DC-DC y DC-AC. Adicionalmente, las metodologías y técnicas de implementación de los controladores son, de igual modo, ampliamente descritas.

Smart power supply grids may be required to link future energy production and consumers. Multilevel converters are a building block for smart grids. There are several structures of multilevel converters, for example the Neutral Point Clamped (NPC), the Flying Capacitor Circuit and the Cascaded H-Bridge (CHB) converter. The modular structure of the CHB multilevel converter makes it one of the best options for smart grids. Using modular converter structures reduces production and maintenance costs. Implementation of efficient and fast controllers for multilevel converters requires accurate measurement of the voltages and currents for the system feedback loops. Knowledge of the DC link voltages is necessary to construct voltage control loops. In a typical CHB multilevel converter there are many DC links which means that a lot of voltage transducers maybe required. Voltage transducers at medium voltage are not easy to implement and add to system cost. This thesis presents an efficient way to observe the DC link voltages and hence eliminate the cost associated with voltage transducers. A “Sliding Mode Observer (SMO) using the Equivalent Control Method” has been chosen because of its robustness against system uncertainties. Simulation and practical work has been performed on a three-phase, three-cell multilevel converter to validate the use of this observer.

The use of variable speed drive (VSD) systems in the appliance industry is growing due to emerging high volume of fractional horsepower VSD applications. Almost all of the appliance VSDs have no input power factor correction (PFC) circuits. This results in harmonic pollution of the utility supply which could be avoided. The impact of the PFC circuit in the overall drive system efficiency, harmonic content, magnitude of the system input current and input power factor is particularly addressed in this dissertation along with the development of analytical methods applicable to the steady-state analysis of input power factor corrected VSD systems. Three different types of motors - the switched reluctance motor (SRM), permanent magnet brushless dc motor (PMBDC) and dc motor (DCM) are employed in this study. The C-dump converter topology, a single switch per phase converter, is adopted for the prototype SRM- and PMBDC-based VSD systems. The conventional full-bridge converter is used for DCM-based VSD systems. Four-quadrant controllers, utilizing PI speed and current control loops for the PMBDC- and DCM-based VSD system, are developed and their design results are verified with experiment and simulation. A single-quadrant controller with a PI speed feedback loop is employed for the SRM-based VSD system. The analysis of each type of VSD system includes development of loss models and establishment of proper operational modes. The magnitude of the input current harmonic spectra is measured and compared with and without a front-end PFC converter. One electromagnetic compatibility (EMC) standard, IEC 1000-3-2 which describes the limitation on harmonic current emission is modified for 120V ac system. This modified standard is utilized as the reference to evaluate the measured input current harmonics. The magnitude of input current harmonics for a VSD system are greatly reduced with PFC preregulators. While the input PFC circuit draws a near sinusoidal current from an ac source, it lowers the overall VSD system efficiency and increases cost of the overall system.<br>Ph. D.