Academic literature on the topic 'Switching Frequency Hysteresis Current Controller'

Renewable energy sources have power quality and stability issues despite having vast benefits when integrated with the utility grid. High currents and voltages are introduced during the disconnection or injection from or into the power system. Due to excessive inverter switching frequencies, distorted voltage waveforms and high distortions in the output current may be observed. Hence, advancing intelligent and robust optimization techniques along with advanced controllers is the need of the hour. Therefore, this article presents an improved arithmetic optimization algorithm and an offset hysteresis band current controller. Conventional hysteresis band current controllers (CHCCs) offer substantial advantages such as fast dynamic response, over-current, and robustness in response to impedance variations, but they suffer from variable switching frequency. The offset hysteresis band current controller utilizes the zero-crossing time of the current error for calculating the lower/upper hysteresis bands after the measurement of half of the error current period. The duty cycle and hysteresis bands are considered as design variables and are optimally designed by minimizing the current error and the switching frequency. It is observed that the proposed controller yields a minimum average switching frequency of 2.33 kHz and minimum average switching losses of 9.07 W in comparison to other suggested controllers. Results are validated using MATLAB/Simulink environment followed by real-time simulator OPAL-RT 4510.

In accordance with the advantage of conventional hysteresis current control method, this paper advances a novel control method for APF. In conventional hysteresis current control, the hysteresis band (HB) is fixed and actual compensating current is limited in a fixed HB. Firstly, the connection between HB and switching frequency must be found correctly. Then, the variable hysteresis band current controller is designed according to the connection. Finally, the Matlab simulation results show that the switching frequency of VSI is held nearly constant and the proposed controller can track reference current well[1]. The problems of increasing switching losses and audible noise which happened in high-frequency state can be resolved in conventional hysteresis current control.

Hysteresis current controllers are widely used in PV inverters. The main drawback of conventional hysteresis current control is that the switching frequency is variable, as the hysteresis band is fixed. In this paper an adaptive band hysteresis control algorithm with no derivative calculation is presented. As it will be shown, this algorithm can limit the switching frequency variation within a small range and the algorithm itself is simple and easy to be implemented. The performance of this algorithm, together with the one [10] and conventional hysteresis control has been evaluated by means of simulations performed with PSIM and SIMULINK. Simulation results show the effectiveness of the suggested hysteresis current controller.

to hold the merits of the traditional hysteresis controller, and at the same time, hold back the change of switching frequency and reduce the switching power loss in hysteresis control of PWM rectifier, based on the relationship between line currents and switching status, an improved algorithm of double-hysteresis current control method for three-phase voltage-type PWM converter was proposed. In the strategy, the position of reference voltage vector can be detected by double hysteresis, PLL circuit can detect the output of switching states. The proposed algorithms not only hold the merits of traditional hysteresis, such as quick current response and current limited capacity, but also, it can overcome the drawback of non-fixed switching frequency of traditional hysteresis. The algorithm has been simulated and verified by MATLAB/simulink platform, and the system operates stably.

In this paper, adaptive hysteresis band current controller is implemented to control the current injected into the grid. Initially it was implemented by B.K Bose for control of the machine drive. Now it is implemented for the grid connected PV inverter, to control the current injected into Grid. It is well suitable for the distribution generation. The adaptive hysteresis band controller changes the bandwidth based on the modulating frequency, supply voltage, input DC voltage and slope of the reference current. Consequently, the controller generates pulses to the inverter. It is advantageous over the conventional hysteresis controller, as the switching frequency is maintained almost constant. Thereby quality of grid current is also improved. It is verified in time domain analysis of simulation using MATLAB.

Abstract This paper presents the control of IPMSM drive in flux weakening region, for high speed applications. An adaptive hysteresis band current controller has been designed and implemented in this work to overcome the drawbacks which are present in case of conventional hysteresis band current controllers such as: high torque ripple, more current error, large variation in switching frequency etc. The proposed current controller is a hysteresis controller in which the hysteresis band is programmed as a function of variation of motor speed and load current. Any variation in those parameters causes an appropriate change in the band which in turns reduces the torque ripple as well as current error of the machine. The proposed scheme is modeled and tested in the MATLAB-Simulink environment for the effectiveness of the study. Further, the result is validated experimentally by using TMS320F2812 digital signal processor.

In this paper, a digital hysteresis current limit controller is developed for Switched Inductor Quasi Z-Source Inverter (SLQZSI). Traditional methods like hysteresis current fixed limit and adjustable hysteresis current limit techniques changes the hysteresis bandwidth in accordance to modulating frequency and gradient of reference current. The operating shifting frequency of typical approaches oscillates and crosses the intended steady shifting frequency under noise. It leads to undesirable heavy interference between the phases and more power loss. In the planned digital hysteresis current limit technique, the hysteresis current limit is calculated by resolving the optimization problem. In the proposed approach the operating shifting frequency is kept same or inferior to the intended steady shifting frequency even under noise. Hence the planned digital hysteresis current limit algorithm maintains the output current steady and power loss is minimized which is not promised by the conservative techniques. To compare different control strategies in terms of nature of operating switching frequency and harmonic performance simulations are built on the MATLAB/SIMULINK

Photovoltaic inverters are important solar energy application. This paper presents a novel Fuzzy Adaptive Hysteresis Current Controller to control the inverter, used in the non-linear time-variant solar photovoltaic cell. The proposed controller has the advantages of both fuzzy as well as adaptive controller. It is capable of reducing the total harmonic distortion and to provide acceptable switching frequency. The mathematical model of Photovoltaic array is developed using the Newton’s method using the parameter obtained from a commercial photovoltaic data sheet under variable weather conditions, in which the effect of irradiance and temperature are considered. The modeled Photovoltaic array is interfaced with DC-DC boost converter, AC-DC inverter and load. A DC-DC boost converter is used to step up the input DC voltage of the Photovoltaic array while the DC-AC single-phase inverter converts the input DC comes from boost converter into AC. The performance of the proposed controller of inverter is evaluated through MATLAB-Simulation. Unlike standard adaptive controller designs, this adaptive fuzzy controller does not require an explicit mathematical model of the system. The results obtained with the proposed algorithm are compared with those obtained when using conventional fixed hysteresis current controller for single-phase photovoltaic inverter in terms of THD and switching frequency.

Current control has, for decades, been one of the more challenging research fields in the development of power converters. Simple and robust nonlinear methods like hysteresis or sigma-delta controllers have been commonly used, while sophisticated linear controllers based on classical control theory have been developed for PWM-based converters. The one-cycle current control technique is a nonlinear technique based on cycle-by-cycle calculation of the ON time of the converter switches for the next switching period. This kind of controller requires accurate measurement of voltages and currents in order achieve a precise current tracking. These techniques have been frequently used in the control of power converters generating low-frequency currents, where the reference varies slowly compared with the switching frequency. Its application is not so common in active power filter current controllers due to the fast variation of the references that demands not only accurate measurements but also high-speed computing. This paper proposes a novel one-cycle digital current controller based on the minimization of the integral error of the current. Its application in a three-leg four-wire shunt active power filter is presented, including a stability analysis considering the switching pattern selection. Furthermore, simulated and experimental results are presented to validate the proposed controller.

The Queensland University of Technology (QUT) allows the presentation of theses for the Degree of Doctor of Philosophy in the format of published or submitted papers, where such papers have been published, accepted or submitted during the period of candidature. This thesis is composed of ten published /submitted papers and book chapters of which nine have been published and one is under review. This project is financially supported by an Australian Research Council (ARC) Discovery Grant with the aim of investigating multilevel topologies for high quality and high power applications, with specific emphasis on renewable energy systems. The rapid evolution of renewable energy within the last several years has resulted in the design of efficient power converters suitable for medium and high-power applications such as wind turbine and photovoltaic (PV) systems. Today, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements controlled by powerful processor systems. However, it is hard to connect the traditional converters to the high and medium voltage grids, as a single power switch cannot stand at high voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Besides this important feature, multilevel converters have the capability to generate stepped waveforms. Consequently, in comparison with conventional two-level inverters, they present lower switching losses, lower voltage stress across loads, lower electromagnetic interference (EMI) and higher quality output waveforms. These properties enable the connection of renewable energy sources directly to the grid without using expensive, bulky, heavy line transformers. Additionally, they minimize the size of the passive filter and increase the durability of electrical devices. However, multilevel converters have only been utilised in very particular applications, mainly due to the structural limitations, high cost and complexity of the multilevel converter system and control. New developments in the fields of power semiconductor switches and processors will favor the multilevel converters for many other fields of application. The main application for the multilevel converter presented in this work is the front-end power converter in renewable energy systems. Diode-clamped and cascade converters are the most common type of multilevel converters widely used in different renewable energy system applications. However, some drawbacks – such as capacitor voltage imbalance, number of components, and complexity of the control system – still exist, and these are investigated in the framework of this thesis. Various simulations using software simulation tools are undertaken and are used to study different cases. The feasibility of the developments is underlined with a series of experimental results. This thesis is divided into two main sections. The first section focuses on solving the capacitor voltage imbalance for a wide range of applications, and on decreasing the complexity of the control strategy on the inverter side. The idea of using sharing switches at the output structure of the DC-DC front-end converters is proposed to balance the series DC link capacitors. A new family of multioutput DC-DC converters is proposed for renewable energy systems connected to the DC link voltage of diode-clamped converters. The main objective of this type of converter is the sharing of the total output voltage into several series voltage levels using sharing switches. This solves the problems associated with capacitor voltage imbalance in diode-clamped multilevel converters. These converters adjust the variable and unregulated DC voltage generated by renewable energy systems (such as PV) to the desirable series multiple voltage levels at the inverter DC side. A multi-output boost (MOB) converter, with one inductor and series output voltage, is presented. This converter is suitable for renewable energy systems based on diode-clamped converters because it boosts the low output voltage and provides the series capacitor at the output side. A simple control strategy using cross voltage control with internal current loop is presented to obtain the desired voltage levels at the output voltage. The proposed topology and control strategy are validated by simulation and hardware results. Using the idea of voltage sharing switches, the circuit structure of different topologies of multi-output DC-DC converters – or multi-output voltage sharing (MOVS) converters – have been proposed. In order to verify the feasibility of this topology and its application, steady state and dynamic analyses have been carried out. Simulation and experiments using the proposed control strategy have verified the mathematical analysis. The second part of this thesis addresses the second problem of multilevel converters: the need to improve their quality with minimum cost and complexity. This is related to utilising asymmetrical multilevel topologies instead of conventional multilevel converters; this can increase the quality of output waveforms with a minimum number of components. It also allows for a reduction in the cost and complexity of systems while maintaining the same output quality, or for an increase in the quality while maintaining the same cost and complexity. Therefore, the asymmetrical configuration for two common types of multilevel converters – diode-clamped and cascade converters – is investigated. Also, as well as addressing the maximisation of the output voltage resolution, some technical issues – such as adjacent switching vectors – should be taken into account in asymmetrical multilevel configurations to keep the total harmonic distortion (THD) and switching losses to a minimum. Thus, the asymmetrical diode-clamped converter is proposed. An appropriate asymmetrical DC link arrangement is presented for four-level diode-clamped converters by keeping adjacent switching vectors. In this way, five-level inverter performance is achieved for the same level of complexity of the four-level inverter. Dealing with the capacitor voltage imbalance problem in asymmetrical diodeclamped converters has inspired the proposal for two different DC-DC topologies with a suitable control strategy. A Triple-Output Boost (TOB) converter and a Boost 3-Output Voltage Sharing (Boost-3OVS) converter connected to the four-level diode-clamped converter are proposed to arrange the proposed asymmetrical DC link for the high modulation indices and unity power factor. Cascade converters have shown their abilities and strengths in medium and high power applications. Using asymmetrical H-bridge inverters, more voltage levels can be generated in output voltage with the same number of components as the symmetrical converters. The concept of cascading multilevel H-bridge cells is used to propose a fifteen-level cascade inverter using a four-level H-bridge symmetrical diode-clamped converter, cascaded with classical two-level Hbridge inverters. A DC voltage ratio of cells is presented to obtain maximum voltage levels on output voltage, with adjacent switching vectors between all possible voltage levels; this can minimize the switching losses. This structure can save five isolated DC sources and twelve switches in comparison to conventional cascade converters with series two-level H bridge inverters. To increase the quality in presented hybrid topology with minimum number of components, a new cascade inverter is verified by cascading an asymmetrical four-level H-bridge diode-clamped inverter. An inverter with nineteen-level performance was achieved. This synthesizes more voltage levels with lower voltage and current THD, rather than using a symmetrical diode-clamped inverter with the same configuration and equivalent number of power components. Two different predictive current control methods for the switching states selection are proposed to minimise either losses or THD of voltage in hybrid converters. High voltage spikes at switching time in experimental results and investigation of a diode-clamped inverter structure raised another problem associated with high-level high voltage multilevel converters. Power switching components with fast switching, combined with hard switched-converters, produce high di/dt during turn off time. Thus, stray inductance of interconnections becomes an important issue and raises overvoltage and EMI issues correlated to the number of components. Planar busbar is a good candidate to reduce interconnection inductance in high power inverters compared with cables. The effect of different transient current loops on busbar physical structure of the high-voltage highlevel diode-clamped converters is highlighted. Design considerations of proper planar busbar are also presented to optimise the overall design of diode-clamped converters.

In DC to AC power conversion, voltage source inverters (VSI) based current controllers are usually preferred for today’s high performance AC drive which requires excellent dynamic and steady state performances at different transient and load conditions, with the additional advantages like inherent short circuit and over current protection. Out of different types of current controllers, hysteresis controllers are widely used due to their simplicity and ability to meet the requirements for a high performance AC drives. But the conventional hysteresis controllers suffers from wide variation of PWM switching frequency, overshoot in current errors, sub-harmonic components in the current waveform and non-optimum switching at different operating point of the drive system. To mitigate these problems, particularly to control the switching frequency variation, which is the root cause of all other problems, several methodologies like ramp comparison based controller, predictive current controller, etc. were proposed in the literature. But amplitude and phase offset error in the ramp comparison based controllers and complexities involved in the predictive controllers have limited the use of these controllers. Moreover, these type of controllers, which uses three separate and independently controlled tolerance band (sinusoidal type or adaptive) to control the 3-phase currents, shows limited dynamic responses and they are not simple to implement. To tackle the problem of controlling 3-phase currents simultaneously, space vector based hysteresis current controller is very effective as it combines the current errors of all the three phases as a single entity called current error space vector. It has a single controller’s logic with a hysteresis boundary for controlling this current error space vector. Several papers on space vector based hysteresis controllers for 2-level inverter with constant switching frequency have been published, but the application of the constant switching frequency based hysteresis current controllers for multi¬level inverter fed drive system, has not been addressed properly. Use of multi-level inverter in modern high performance drive for medium and high voltage levels is more prominent because of multi-level’s inherent advantages like good power quality, good electromagnetic compatibility (EMC), better DC link voltage utilization, reduced device voltage rating, so on. Even though some of the earlier works describe three-level space vector based hysteresis current controller techniques, they are specific to the particular level of inverters and does not demonstrate constant switching frequency of operation. This thesis proposes a novel approach where nearly constant switching frequency based hysteresis controller can be implemented for any general n-level inverter and it is also independent of inverter topology. In this work, varying parabolic boundary is used as the hysteresis current error boundary for controlling the current in a multi-level space vector structure. The computation of the parabolic boundary is accomplished offline and all the necessary boundary parameters at different operating points are stored in the look-up tables. The varying parabolic boundary for the multi-level space vector structure depends on the sampled reference phase voltage values which are estimated from stator current error information and then using the equivalent circuit model of induction motors. Here, a mapping technique is adopted to bring down all the three phase references to the inner- most carrier region, which results in mapping any outer triangular structure where tip of the voltage space vector is located, to one of the sectors of the inner most hexagon of the multi-level space vector structure. In this way, the required mapped sector information is easily found out to fix the correct orientation of the parabolic boundary in the space vector plane. This mapping technique simplifies the controller’s logic similar to that of a 2-level inverter. For online identification of the inverter switching voltage vectors constructing the present outer triangle of the multi-level space vector structure, the proposed controller utilizes the sampled phase voltage references. This identification technique is novel and also generic for any n-level inverter structure. This controller is having all the advantages of a space vector based hysteresis current controller and that of a multi-level inverter apart from having a nearly constant switching frequency spectrum similar to that of a voltage controlled space vector PWM (VC-SVPWM). Using the proposed controller, simulation study of a five-level inverter fed induction motor (IM) drive scheme, was carried out using Matlab-Simulink. Simulation study showed that the switching frequency variations in a fundamental cycle and over the entire speed range of the linear modulation region, is similar to that of a VC-SVPWM based multi-level VSI. The proposed hysteresis controller is experimentally verified on a 7.5 kW IM vector control drive fed with a five-level VSI. The proposed current error space vector based hysteresis controller providing nearly constant switching frequency is implemented on a TI TMS320LF2812 DSP and Xilinx XC3S200FT256 FPGA based platform. The three-phase reference currents are generated depending on the frequency command and the controller is tested with the drive for the entire operating speed range of the machine in forward and reverse directions. Steady state and quick transient results of the proposed drive are presented in this thesis. This thesis also proposes another type of hysteresis controller, firstly for 2-level inverter and then for general n-level multi-level inverter, which eliminates the parabolic boundary and replaces it with a boundary which is computed online and does not use any look up table for boundary selection. The current error boundary for the proposed hysteresis controller is computed online in a very simple way, using the information of estimated fundamental stator voltages along α and β axes of space vector plane. The method adopted for the proposed controller to compute the boundary does not involve any complicated computations and it selects the optimal vector for switching when current error space vector crosses the boundary. This way adjacent voltage vector switching similar to VC-SVPWM can be ensured. For 2-level inverter, it precisely determines the sector, in which reference voltage vector is present. In multi-level inverter, this controller also finds out the mapped sector information using the same mapping techniques as explained in the first part of this thesis. In both 2-level and multi-level inverter, the proposed controller does not use any look up table for finding individual voltage vector switching times from the estimated voltage references. These switching times are used for the computation of hysteresis boundary for individual vectors. Thus the hysteresis boundary for individual vectors is exactly calculated and the boundary is similar to that of VC-SVPWM scheme for the respective levels of inverter. In the present scheme, the phase voltage harmonic spectrum is very close to that of a constant switching frequency VC-SVPWM inverter. In this thesis, at first, the proposed on line boundary computation scheme is implemented for a 2-level inverter based controller for the initial study, so that it can be executed as fast as 10 µs in a DSP platform, which is required for accurate current control. Then the same algorithm of 2-level inverter is extended for multi-level inverter with the additional logic for online identification of nearest switching voltage vectors (also used in the parabolic boundary case) for the present sampling interval. Previously mentioned mapping technique for multi-level inverter, is also implemented here to bring down the phase voltage references to the inner-most carrier region to realize the multi-level current control strategy equivalent to that of a 2-level inverter PWM current control. Simulation study to verify the steady state as well as transient performance of the proposed controller for both 2-level as well as five-level VSI fed IM drive is carried out using Simulink tool box of MATLAB Simulation Software. The proposed hysteresis controllers are experimentally verified on a 7.5 kW IM vector control drive fed with a two-level VSI and five-level VSI separately. The proposed current error space vector based hysteresis controller providing nearly constant switching frequency profile for phase voltage is implemented on the TI TMS320LF2812 DSP and Xilinx XC3S200FT256 FPGA based platform. The three-phase reference currents are generated depending on the frequency command and the proposed hysteresis controllers are tested with drive for the entire operating speed range of the machine in forward and reverse directions. Steady state and transient results of the proposed drive are also presented for different operating conditions, through the simulation study followed by experimental verifications. Even though the simulation and experimental verifications are done on a 5-level inverter to explain the proposed hysteresis controller, it can be easily implemented for any general n-level inverter, as described in this thesis.

Current-Controlled Pulse Width Modulated (CC-PWM) Voltage Source Inverters (VSIs) are extensively employed in high performance drives (HPD) because of the considerable advantages offered by them, such as, excellent dynamic response and inherent over-current protection, as compared to the voltage-controlled PWM (VC-PWM) VSIs. Amongst the different types of CC-PWM techniques, hysteresis current controllers offer significant simplicity in implementation. However, conventional type of hysteresis controllers (with independent comparators) suffers from some well-known drawbacks, such as, limit cycle oscillations (especially at lower speeds of operation of machine), overshoot in current error, generation of sub-harmonic components in the current, and random (non-optimum) switching of inverter voltage vectors. Common problems associated with the conventional, as well as current error space phasor based hysteresis controllers with fixed bands (boundary), are the wide variation of switching frequency in the fundamental output cycle and variation of switching frequency with the change in speed of the load motor. These problems cause increased switching losses in the inverter, non-optimum current ripple, excess harmonics in the load current and subsequent additional machine heating. A continuously varying parabolic boundary for the current error space phasor is proposed previously to get the switching frequency variation pattern of the output voltage of the hysteresis controller based PWM inverter similar to that of voltage controlled space vector PWM (VC SVPWM) based VSI. But the major problem associated with this technique is the requirement of two outer parabolas outside the current error space phasor boundary for the identification of sector change which gives rise to some switching frequency variations in one fundamental cycle and over the entire operating speed range. It also introduces 5th and 7th harmonic components in the voltage causing 5th and 7th harmonic currents in the induction motor. These harmonic currents causes 6th harmonic torque pulsations in the machine. This thesis proposes a new technique which replaces the outer parabolas and uses current errors along orthogonal axes for detecting the sector change, so that a fast and accurate detection of sector change is possible. This makes the voltage harmonic spectrum of the proposed hysteresis controller based inverter exactly matching with that of a constant switching frequency SVPWM based inverter. This technique uses the property that the current error along one of the orthogonal axis changes its direction during sector change. So the current error never goes outside the parabolic boundary as in the case of outer parabolas based sector change technique. So the proposed new technique for sector change eliminates the 5th and 7th harmonic components from the applied voltage and thus eliminates the 5th and 7th harmonic currents in the motor. So there will be no introduction of 6th harmonic torque pulsations in the motor. Using the proposed scheme for sector change and parabolic boundary for current error space phasor, simulation study was carried out using Matlab-Simulink. Simulation study showed that the switching frequency variations in a fundamental cycle and over the entire speed range of the machine upto six step mode operation is similar to that of a VC-SVPWM based VSI. The proposed hysteresis controller is experimentally verified on a 3.7 kW IM drive fed with a two-level VSI using vector control. The proposed current error space phasor based hysteresis controller providing constant switching frequency is completely implemented on the TI TMS320LF2812 DSP controller platform. The three-phase reference currents are generated depending on the frequency command and the controller is tested with drive for the entire operating speed range of the machine in forward and reverse directions. Steady state and transient results of the proposed drive are presented in this thesis. This thesis also proposes a new hysteresis controller which eliminates parabolic boundary and replaces it with a simple online computation of the boundary. In this proposed new hysteresis controller the boundary computed in the present sampling interval is used for identifying next vector to be switched. This thesis gives a detailed mathematical explanation of how the boundary is computed and how it is used for selecting vector to be switched in a sector. It also explains how the sector in which stator voltage vector is present is determined. The most important part of this proposed hysteresis controller is the estimation of stator voltages along alpha and beta axes during active and zero vector periods. Estimation of stator voltages are carried out using current errors along alpha and beta axes and steady state equivalent circuit of induction motor. Using this estimated stator voltages along alpha and beta axes, instantaneous phase voltages are computed and used for finding individual voltage vector switching times. These switching times are used for the computation of hysteresis boundary for individual vectors. So the hysteresis boundary for individual vectors are exactly calculated and used for vector change detection, making phase voltage harmonic spectrum exactly similar to that of constant switching frequency VC SVPWM inverter. Sector change detection is very simple, since we have the estimated stator voltages along alpha and beta axes to give exact position of stator voltage vector. Simulation study to verify the steady state as well as transient performance of the proposed controller based VSI fed IM drive is carried out using Simulink tool box of Matlab Simulation Software. The proposed hysteresis controller is experimentally verified on a 3.7 kW IM drive fed with a two-level VSI using vector control. The proposed current error space phasor based hysteresis controller providing constant switching frequency profile for phase voltage is implemented on the TI TMS320LF2812 DSP controller platform. The three-phase reference currents are generated depending on the frequency command and the proposed hysteresis controller is tested with drive for the entire operating speed range of the machine in forward and reverse directions. Steady state and transient results of the proposed drive are presented for different operating conditions.

碩士
國立清華大學
電機工程學系
91
Recently, due to the rapid progress in high technology industry, much better power quality is required to meet the need of highly accurate automation machinery. As a result, how to eliminate the harmonics to achieve high power quality in a rectifier has been discussed in many literatures. Owing to the fast response, easy implementation and with fixed bounded errors, the hysteresis current controller has been widely used in various applications. However, the variable switching frequency has rendered the increasing switching loss and the harder design of the filter. Hence, how to achieve fixed switching frequency control is one of the hot topics in the literature. In fact, it is the main object of this thesis to propose a novel control strategy of constant switching frequency hysteresis current controller. First at all, the operation principle of the traditional hysteresis current controller and the corresponding controllable condition under different output DC voltages are introduced. The inequality constraint of the controllability is obtained through the derived model. Second, the closed form expression of switch turn-on time and the corresponding partition into proper sequence are obtained to achieve constant switching frequency and with fixed error bound at the same time. Third, by modifying the formula derived before, the error due to transient and nonideal switch characteristics can be corrected at the same time while calculating the turn-on time. By this way, one can not only avoid the accumulation of the error but also can reduce unnecessary computing time for additional error correction. Fourth, the control strategy is further refined to reduce half of the computing time and make the current error distribution more uniformly inside the error bound. Hence, one can achieve a better performance without increasing the switching frequency. Finally, a prototype is constructed and some experimental results are presented for verifying the feasibility of the proposed controller.

abstract: Point of Load (PoL) converters are important components to the power distribution system in computer power supplies as well as automotive, space, nuclear, and medical electronics. These converters often require high output current capability, low form factor, and high conversion ratios (step-down) without sacrificing converter efficiency. This work presents hybrid silicon/gallium nitride (CMOS/GaN) power converter architectures as a solution for high-current, small form-factor PoL converters. The presented topologies use discrete GaN power devices and CMOS integrated drivers and controller loop. The presented power converters operate in the tens of MHz range to reduce the form factor by reducing the size of the off-chip passive inductor and capacitor. Higher conversion ratio is achieved through a fast control loop and the use of GaN power devices that exhibit low parasitic gate capacitance and minimize pulse swallowing. This work compares three discrete buck power converter architectures: single-stage, multi-phase with 2 phases, and stacked-interleaved, using components-off-the-shelf (COTS). Each of the implemented power converters achieves over 80% peak efficiency with switching speeds up-to 10MHz for high conversion ratio from 24V input to 5V output and maximum load current of 10A. The performance of the three architectures is compared in open loop and closed loop configurations with respect to efficiency, output voltage ripple, and power stage form factor. Additionally, this work presents an integrated CMOS gate driver solution in CMOS 0.35um technology. The CMOS integrated circuit (IC) includes the gate driver and the closed loop controller for directly driving a single-stage GaN architecture. The designed IC efficiently drives the GaN devices up to 20MHz switching speeds. The presented controller technique uses voltage mode control with an innovative cascode driver architecture to allow a 3.3V CMOS devices to effectively drive GaN devices that require 5V gate signal swing. Furthermore, the designed power converter is expected to operate under 400MRad of total dose, thus enabling its use in high-radiation environments for the large hadron collider at CERN and nuclear facilities.
Dissertation/Thesis
Masters Thesis Electrical Engineering 2018

Series active filters, besides the dc voltage regulators, incorporate controller such as voltage controller and hysteresis band controllers, etc.. The conventional PI controller suffers from the significant drawback of having a high content of ripples and the low speed due to variable switching frequency caused by the usage of hysteresis controllers. In order to overcome this shortcoming, two different control strategies (i.e., sinusoidal fryze voltage control and adaptive tabu search-sinusoidal fryze voltage control strategy) have been developed in this research work. The performance of SAFs has been analyzed by using these current control strategies. The proposed ATS-SFV control strategy based voltage controller yielded better performance as compared to those obtainable from the SFV control strategy. The comparisons of the proposed strategies among themselves facilitate a need-based selection of them for the supply system. To realize these control strategies, MATLAB/Simulink-based models have been developed for simulation.

In this chapter, we introduce the concept of the Inherited Automatic Current Sharing Mechanism (ACSM) in a two-phase series capacitor buck topology (2-pscB). This topology was introduced to power laptops as low-voltage and high-current Voltage Regulator Modules as well as non-isolated Point-of-Load converters (Vin < 12 V). To satisfy the converter stability, a state-space modeling technique of switching intervals coupled with parasitic component linearization is developed. Due to the series capacitor charging period miscalculation, the applicability of the ACSM of 2-pscB switching topology for high-power electronic applications is still very limited. Inserting a series capacitor between power switches of phase A increases loop parasitic inductance, introduces a time delay mismatch between the gate voltages of the two switches, and causes interference with the synchronization of the dead time between both phases of 2-pscB converters since the phase B has no series capacitor. This mismatch reduces the heat distribution efficiency and lifetime. As such, a complete model study delivered by the converter is required to design a robust controller. Driven to explore the series capacitor voltage feedback mechanism, frequency analysis of transfer functions, and filter behavior with experimental prototype examples (Vin < 120 V) have been presented for the first time to demonstrate the theoretical analysis. Obtained efficiency was up to 94.9% at full load.