To see the other types of publications on this topic, follow the link: Synchronous buck dc-dc converter.

Dissertations / Theses on the topic 'Synchronous buck dc-dc converter'

Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles

Select a source type:

Consult the top 50 dissertations / theses for your research on the topic 'Synchronous buck dc-dc converter.'

Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.

You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.

Browse dissertations / theses on a wide variety of disciplines and organise your bibliography correctly.

1

Nguyen, Huy. "Design, Analysis and Implementation of Multiphase Synchronous Buck DC-DC Converter for Transportable Processor." Thesis, Virginia Tech, 2004. http://hdl.handle.net/10919/32139.

Full text
Abstract:
As laptop mobile users expect more application features and long battery life, the processor current has to increase to response the demanding while the voltage has to decease to save the power loss. Therefore, it is necessary for a system designer to improve the efficiency of the voltage regulator converter (VRC) for the processor. Laptop processor architecture is more complicated than desktop because of different mode operations and their transitions. The laptop processor runs at different voltage levels for each operation mode to save the battery life. Therefore, the VRC needs to supply the correct and stable voltage to the processor. In this thesis, an analysis of power loss is derived to estimate the efficiency and switching frequency, three widely current sensing methods are discussed, two methods to compensate for the thermal resistance in loss less current sense methods are proposed, the tolerance of load line base on the componentâ s tolerance in the converter is analyzed, the equation to estimate the output capacitance is derived, and the small signal analysis of multiphase synchronous buck converter with the droop current loop is derived. A hardware prototype was implemented base on 4-phase synchronous buck topology to provide high efficiency and lower cost solution. The results of load line meets the Intel specification in different modes of operation, provides the best transient responses, and meets the specification during the load transient. The control loop lab measurement is also matched with the analysis and simulation.
Master of Science
APA, Harvard, Vancouver, ISO, and other styles
2

Yeh, Chih-Shen. "Synchronous-Conduction-Mode Tapped-Inductor Buck Converter for Low-Power, High-Density Application." Thesis, Virginia Tech, 2017. http://hdl.handle.net/10919/81722.

Full text
Abstract:
General-purpose step-down converter is essential in electronic system for processing energy from high-voltage rail to low-voltage circuits. The applications can be found at the auxiliary supplies in automobile, industrial and communication systems. Buck converter is a common circuit topology to fulfill step-down conversion, especially in low-power application since it is well-studied and straightforward. However, it suffers from low duty cycle under high step-down condition, and typically operates in continuous conduction mode (CCM) that generates large switching loss. On the other hand, as an extension of the buck converter, tapped-inductor (TI) buck converter has larger duty cycle while maintaining the structural simplicity. Therefore, the main objective of this thesis is to explore the potential of TI buck converter as a wide conversion range, high power density and high efficiency topology for low power application. To achieve high efficiency at switching frequency of MHz-level, synchronous conduction mode (SCM) is applied for turn-on losses elimination. The operation principle and power stage design of SCM TI buck is first introduced. The design of high switching frequency coupled inductor is emphasized since its size plays a critical role in power density. Loss breakdown is also provided to perform a comprehensive topological study. Secondly, detailed zero-voltage-switching (ZVS) condition of SCM TI buck is derived so that the converter does not experience redundant circulating energy. The experimental results of 15-W SCM TI buck converter prototypes are provided with 90.7% of peak power stage efficiency. The size of coupled inductor is down to 116 mm3. To enhance light-load efficiency, a variable frequency control scheme based on derived ZVS conditions is implemented with the switching frequency ranging from 2 MHz to 2.9 MHz.
Master of Science
General-purpose step-down converter is essential in electronic system for processing energy from high-voltage rail to low-voltage circuits. The applications can be found at the auxiliary supplies in automobile, industrial and communication systems. Typically, the ultimate goals of general-purpose step-down converter are versatility, high efficiency and compact size. Recently, tapped-inductor (TI) buck converter is studied since it could overcome the drawback of commonly used buck converter under high step-down conversion. Therefore, the potential of TI buck converter as a general-purpose step-down converter candidate is explored in this thesis, including control method, hardware design, etc. The thesis verifies that TI buck converter could have compact size while remaining efficient and adaptable.
APA, Harvard, Vancouver, ISO, and other styles
3

Vičar, Ondřej. "Systém napájení s vysokou účinností pro mobilní zařízení." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2014. http://www.nusl.cz/ntk/nusl-221158.

Full text
Abstract:
This Master’s thesis is focused on design of voltage converter’s system operating with supply voltage of batteries. There are selected appropriate types of batteries, converter topologies and modes of their control. The specified output branches are systematically divided into three separate modules. Each module is designed in detail with focus on high efficiency. The modules are implemented and optimized. Parameter of final modules were measured and compared with correctness of design and theoretical assumptions.
APA, Harvard, Vancouver, ISO, and other styles
4

Franzén, Björn. "Designing a brushed DC motor controller : Laying the framework for a lab experiment involving position control with current feedback." Thesis, Linnéuniversitetet, Institutionen för fysik och elektroteknik (IFE), 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-44169.

Full text
Abstract:
In order to provide the means to set up a control theory lab experiment involving position control of a brushed DC motor with current feedback, a pulse-width modulated motor controller was designed. The output voltage is controlled by an analog reference signal and the magnitude of the output current and voltage are measured and output. These inputs and outputs are connected to a DAQ I/O-unit such that the lab experiment can be implemented digitally. In addition, defining equations for the whole system were derived. Comparison between measurements and model showed it possible to use the current as feedback if low-pass filtered and the angular displacement controlled over a small angular interval.
APA, Harvard, Vancouver, ISO, and other styles
5

Saini, Dalvir K. "Gallium Nitride: Analysis of Physical Properties and Performance in High-Frequency Power Electronic Circuits." Wright State University / OhioLINK, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=wright1438013888.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Chadha, Ankit. "Tapped-Inductor Buck DC-DC Converter." Wright State University / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=wright1578488939749599.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Querol, Borràs Jorge. "MCU Controlled DC-DC Buck/Boost Converter for Supercapacitors." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-101205.

Full text
Abstract:
This work is focused on DC to DC conversion, what is a crucial function to enable the use of supercapacitors for energy storage. A theoretical study and comparison of methods, algorithms and techniques for software controlled DC-DC converters have been used to develop a system what can step up or down a DC variable voltage and transform it into a steady state voltage. As a result a new control theory based on Bang-Bang control has been developed with an ARM LPC1768 processor. It was implemented to solve the commercial converters problems because they cannot work with supercapacitors due to their low internal resistance. The outcome is a device what can provide a programmable voltage between 4.5 V and 25 V, hardware can support up to 6 A and it is able to control the operating current owing through the converter. It can be used with the supercapacitors as shown in this work but it can also be used as a general platform for voltage and energy conversion. Furthermore, the designed hardware has the potential to work with smart grids via Ethernet connector, solar panels with MPPT algorithms and, at last, manage energy between dierent kinds of DC voltage sources and devices.
Detta arbete är inriktat på DC till DC konvertering, vad är en viktig funktion för att möjliggöra användningen av superkondensatorer för lagring av energi. En teoretisk studie och jämförelse av metoder, algoritmer och tekniker för program styrs DC-DC omvandlare har använts för att utveckla ett system vad som kan stega upp eller ner en DC variabel spänning och omvandla det till ett stabilt tillstånd spänning. Som ett resultat av en ny kontroll teori bygger på Bang-Bang kontroll har utvecklats med en ARM LPC1768 processor. Det genomfördes för att lösa de kommersiella omformare problemen eftersom de inte kan arbeta med superkondensatorer på grund av deras låga inre motstånd. Resultatet är en anordning vilken kan tillhandahålla en programmerbar spänning mellan 4,5 V och 25 V, kan hårdvaran att stödja upp till 6 A och det är möjligt att styra operativsystemet ström som flyter genom omvandlaren. Den kan användas med de superkondensatorer, såsom visas i detta arbete, men den kan också användas som en allmän plattform för spänning och energiomvandling. Dessutom har hårdvara möjlighet att arbeta med smarta nät via ethernet-uttag, solpaneler med MPPT algoritmer och äntligen, hantera energi mellan olika typer av DC spänningskällor och enheter.
APA, Harvard, Vancouver, ISO, and other styles
8

Al, Kzair Christian. "SiC MOSFET function in DC-DC converter." Thesis, Uppsala universitet, Elektricitetslära, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-415147.

Full text
Abstract:
This thesis evaluate the state of art ROHM SCT3080KR silicon carbide mosfet in a synchronous buck converter. The converter was using the ROHM P02SCT3040KR-EVK-001 evaluation board for driving the mosfets in a half bridge configuration. Evaluation of efficiency, waveforms, temperature and a theoretical comparison between a silicon mosfet (STW12N120K5) is done. For the efficiency test the converter operate at 200 V input voltage and 100 V output voltage at output currents of 7 A to 12 A, this operation was tested at switching frequencies of 50 kHz, 80 kHz and 100 kHz. The result of the efficiency test showed an efficiency of 98-97 % for 50 kHz, 97.7-96.4 % for 80 kHz and 97-96.2 % for the 100 kHz test. The temperature test shows a small difference in comparison of the best case scenario and the worst case scenario, temperature ranges from 25.5 to 33.5 °C for the high side mosfet while the low side mosfet temperature ranges from 29.8 to 35 °C. The waveform test was conducted at 50 kHz and 100 kHz for output currents of 4 A and 12 A (at 200 V input and 100 V output). The result of the waveform test shows a rise and fall time of the voltages in range of 10-12 ns while the current rise and fall time was 16 ns for the 4 A test and 20 ns for the 12 A test. Overall SiC mosfet show a clear advantage over silicon mosfet in terms of efficiency and high power capabilities.
APA, Harvard, Vancouver, ISO, and other styles
9

Lau, Wai Keung. "Current-mode DC-DC buck converter with dynamic zero compensation /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20LAU.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Mai, Yuan Yen. "Current-mode DC-DC buck converter with current-voltage feedforward control /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20MAI.

Full text
APA, Harvard, Vancouver, ISO, and other styles
11

Chudý, Andrej. "DC/DC měniče pro průmyslové napájecí zdroje." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2021. http://www.nusl.cz/ntk/nusl-442795.

Full text
Abstract:
This diploma thesis deals with design and comparison of selected DC/DC converters, where the better of them is practically realized. The first part of the diploma thesis is focused on the general analysis of DC/DC power converters. The following part is theoretical analysis focused on the first selected topology – step-up converter. The second analysed topology is forward converter with full bridge on the primary side. The theoretical analysis also includes a description of synchronous rectifier, the differences between hard and soft switching, and the types of secondary rectifiers. Another part specializes in the detailed calculation of main components of selected converters and their subsequent power dimensioning. Both designed topologies are compared according to the required aspects. The selected better topology is supplemented by the design of control circuits and an auxiliary power supply. Practical realization of converter and commissioning follows. The diploma thesis ends with verification measurements on the realized converter and their subsequent analysis.
APA, Harvard, Vancouver, ISO, and other styles
12

Jia, Hongwei. "Highly Integrated DC-DC Converters." Doctoral diss., University of Central Florida, 2010. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3194.

Full text
Abstract:
A monolithically integrated smart rectifier has been presented first in this work. The smart rectifier, which integrates a power MOSFET, gate driver and control circuitry, operates in a self-synchronized fashion based on its drain-source voltage, and does not need external control input. The analysis, simulation, and design considerations are described in detail. A 5V, 5-μm CMOS process was used to fabricate the prototype. Experimental results show that the proposed rectifier functions as expected in the design. Since no dead-time control needs to be used to switch the sync-FET and ctrl-FET, it is expected that the body diode losses can be reduced substantially, compared to the conventional synchronous rectifier. The proposed self-synchronized rectifier (SSR) can be operated at high frequencies and maintains high efficiency over a wide load range. As an example of the smart rectifier's application in isolated DC-DC converter, a synchronous flyback converter with SSR is analyzed, designed and tested. Experimental results show that the operating frequency could be as high as 4MHz and the efficiency could be improved by more than 10% compared to that when a hyper fast diode rectifier is used. Based on a new current-source gate driver scheme, an integrated gate driver for buck converter is also developed in this work by using a 0.35μm CMOS process with optional high voltage (50V) power MOSFET. The integrated gate driver consists both the current-source driver for high-side power MOSFET and low-power driver for low-side power iv MOSFET. Compared with the conventional gate driver circuit, the current-source gate driver can recovery some gate charging energy and reduce switching loss. So the current-source driver (CSD) can be used to improve the efficiency performance in high frequency power converters. This work also presents a new implementation of a power supply in package (PSiP) 5MHz buck converter, which is different from all the prior-of-art PSiP solutions by using a high-Q bondwire inductor. The high-Q bondwire inductor can be manufactured by applying ferrite epoxy to the common bondwire during standard IC packaging process, so the new implementation of PSiP is expected to be a cost-effective way of power supply integration.
Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
APA, Harvard, Vancouver, ISO, and other styles
13

Mobaraz, Hiwa. "Modelling and Design of Digital DC-DC Converters." Thesis, Linköpings universitet, Institutionen för systemteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-127713.

Full text
Abstract:
Digital Switched mode power supplies are nowadays popular enough to be the obvious choice in many applications. Among all set-up and control techniques, the current mode DC-DC converter is often considered when performance and stability are of interest. This has also motivated all the “on chip” and ASIC implementations seen on the market, where current mode control technique is used. However, the development of FPGAs has created an important alternative to ASICs and DSPs. The flexibility and integration possibility is two important advantages among others. In this thesis report, an FPGA-based current mode buck/boost DC-DC converter is built in a stepwise manner, starting from the mathematical model. The goal is a simulation model which creates a basis for discussion about the advantages and disadvantages of current mode DC-DC converters, implemented in FPGAs.
APA, Harvard, Vancouver, ISO, and other styles
14

Siu, Man. "Design of voltage-mode buck converter with end-point prediction /." View abstract or full-text, 2004. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202004%20SIU.

Full text
APA, Harvard, Vancouver, ISO, and other styles
15

Sikora, Roman. "DC-DC měnič pro matrix beam modul." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2020. http://www.nusl.cz/ntk/nusl-413161.

Full text
Abstract:
The master thesis deals with the development of buck-boost DC-DC converter which supplies matrix beam module. The design is focused on testing two-phase boost converter and three channel buck converter manufactured by NXP Semiconductors. Part of the design is implementation of microcontroller for converter control and communication with computer. Part of the thesis is also to design user interface on Windows platform for easy system configuration. Next thing the thesis deals with is designing load for DC-DC converter that is variable and can make different current consumption. One part of this thesis is focused to achieve the lowest conducted emissions and to maximize conducted immunity. Part of this project is production of a prototype and prototype testing.
APA, Harvard, Vancouver, ISO, and other styles
16

Bezerra, Gabriel Ribeiro. "Modeling and control of The DC-DC Buck-Boost converter using parametric identification techniques." Universidade Federal do CearÃ, 2015. http://www.teses.ufc.br/tde_busca/arquivo.php?codArquivo=14745.

Full text
Abstract:
CoordenaÃÃo de AperfeÃoamento de Pessoal de NÃvel Superior
This work presents procedures for modeling a Buck-Boost converter based on offline parametric identification techniques, with employment of black box and gray box models. For the identification of the control-to-output-voltage transfer function, the nonlinear Hammerstein model is employed, a particularly interesting structure to identify DC-DC converters for its ability to incorporate nonlinear static characteristic aside from the dynamic behavior of the plant. The identification of the mentioned transfer function is achieved from input and output data, obtained in simulations. In order to identify transfer function parameters, a restricted least squares algorithm is used. As for the identification of the control-to-inductor-current transfer function, a linear black box first order model is considered, with its parameters being determined from systemâs frequency response. In order to show the modelâs utility, a control system is designed based on the identified expressions. The control system employed is the digital version of type 3 compensator for the voltage loop and type 2 compensator for the current loop, both operating under or logics. The identification results of the system presented excellent agreement between the obtained parametric models and the converterâs behavior, showing the reliability of the identification techniques employed in this work. Furthermore, the control system designed from the identified transfer functions presented good performance, providing stability and quick disturbance rejection, bolstering the validity of parametric identification methods applied to the Buck-Boost converter.
Este trabalho apresenta procedimentos para a modelagem de um conversor Buck-Boost com base em tÃcnicas de identificaÃÃo paramÃtricas offline com emprego de modelos matemÃticos tipo caixa preta e caixa cinza. Para a identificaÃÃo da funÃÃo de transferÃncia que relaciona a tensÃo de saÃda e a razÃo cÃclica, à empregado o modelo nÃo linear de Hammerstein, estrutura particularmente interessante para aplicaÃÃo em identificaÃÃo de conversores CC-CC por incorporar a caracterÃstica estÃtica nÃo linear da planta de forma dissociada ao seu comportamento dinÃmico. A identificaÃÃo da funÃÃo de transferÃncia citada à feita a partir de dados de entrada e saÃda do sistema, medidos em simulaÃÃo. Para determinaÃÃo dos parÃmetros da funÃÃo de transferÃncia que relaciona a tensÃo de saÃda e a razÃo cÃclica, à utilizado um algoritmo de mÃnimos quadrados nÃo recursivo com restriÃÃes. Quanto à identificaÃÃo da funÃÃo de transferÃncia que relaciona a corrente no indutor e a razÃo cÃclica, à empregado um modelo caixa preta linear de primeira ordem, sendo os parÃmetros de tal modelo determinados a partir da resposta em frequÃncia do sistema. Visando mostrar a utilidade dos modelos paramÃtricos, à realizado um projeto de controle com base nas expressÃes identificadas. O sistema de controle adotado à a versÃo digital de um compensador tipo 3 para a malha de tensÃo e de um compensador tipo 2 para a malha de corrente, que operam de forma alternada segundo a lÃgica ou. Os resultados de identificaÃÃo do sistema apresentam uma excelente concordÃncia entre os modelos paramÃtricos obtidos e o comportamento do conversor, mostrando a confiabilidade das tÃcnicas de identificaÃÃo empregadas nesse trabalho. Adicionalmente, o sistema de controle projetado a partir das funÃÃes de transferÃncia estimadas apresentou bom desempenho, garantindo estabilidade e rÃpida rejeiÃÃo a distÃrbios, reforÃando a validade dos mÃtodos de identificaÃÃo paramÃtrica aplicados ao conversor Buck-Boost.
APA, Harvard, Vancouver, ISO, and other styles
17

Kolakowski, Terry. "Fuzzy Logic Control of a Switched-Inductor PWM DC-DC Buck Converter in CCM." Wright State University / OhioLINK, 2009. http://rave.ohiolink.edu/etdc/view?acc_num=wright1251310342.

Full text
APA, Harvard, Vancouver, ISO, and other styles
18

Huang, Chien-Chung, and 黃建中. "BIPOLAR SYNCHRONOUS DC-DC BUCK CONVERTER DESIGN." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/97013166298125170114.

Full text
Abstract:
碩士
大同大學
電機工程學系(所)
97
A DC-DC synchronous buck converter with soft start has been designed and simulated with 40V bipolar process. The overall circuit is designed based on a voltage-mode PWM controlled converter. The input voltage range is from +4.3V to +20V. Simulation results show that this converter with on-chip current sensor can operate at 200 kHz. The current limit is implemented by sensing the voltage drop across the bottom N-MOSFET RDS (ON). The soft start function is used to prevent large inrush currents upon power-up. The internal thermal protection circuit can protect the system when the temperatures exceed 150°C.
APA, Harvard, Vancouver, ISO, and other styles
19

Tsao, Jiun-Hau, and 曹浚豪. "HIGH FREQUENCY SYNCHRONOUS BUCK BOOST DC-DC CONVERTER." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/88723223904880136792.

Full text
Abstract:
碩士
大同大學
電機工程學系(所)
100
In this thesis, we propose a non-inverting topology for buck-boost converter to extend the battery life of a portable device. Four power MOSFETS switches are used to improve the efficiency, and increase the operation frequency to 1MHz to minimize the inductance. The compensated error amplifier is composed of two blocks, unity-gain zero generation block and gain block, realizing phase shift and gain of the feedback loop, respectively. Therefore, it can reduce the capacitor value for circuit integration. The simulation results show that this buck-boost converter can operate in 1MHz with supply voltage from 4.7V to 2.8V, which is suitable for single-cell lithium-ion battery supply applications. The output voltage regulated in 3.3V with a 10uF off-chip capacitor and 3.3uH off-chip inductor. The power efficiency is over 90% for load current from 50mA to 400mA. The quiescent power dissipation is 3mW. The DC-DC converter has been fabricated with a TSMC 0.35um 2p4m 3.3V/5V Mixed Signal CMOS process provided by National Chip Implementation Center(CIC).
APA, Harvard, Vancouver, ISO, and other styles
20

Chang, Chun-Ping, and 張俊評. "Improving the Efficiency of the Synchronous BUCK DC-DC Converter." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/41454281480277023397.

Full text
Abstract:
碩士
逢甲大學
電子工程所
94
In recent years, because the green energy concept is taken gradually, the key of power transformation efficiency gradually extends from the heavy to light load condition. In various types by the battery in the product as an electric power source, for example: Portable type product, the electric car as well as detached solar energy system and so on, the standby time (light load operation) is usually longer than use time (heavy load operates). Therefore, creating a high transformation efficiency to extend the standby time becomes a topic for study and discussion. This research mainly aims on the improvement regarding the transfer efficiency in the light load situation of synchronous buck converter, and carries on the verification by using the electric circuit simulation and the actual electric circuit. This research suits the use in the synchronized rectification power circuit, especially for those portable type products that need to be operated in a long period of time. We expecting this thesis could have any contribution to power electronic.
APA, Harvard, Vancouver, ISO, and other styles
21

I-TingKo and 柯一鼎. "Synchronous-Switch Average-Current-Mode Buck-BoostDC-DC Converter." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/51328480063062592012.

Full text
APA, Harvard, Vancouver, ISO, and other styles
22

Liang, Chun-Kang, and 梁淳剛. "Design of a Programmable Non-inverting Synchronous Buck-Boost DC-DC Power Converter." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/47886909617999892025.

Full text
Abstract:
碩士
淡江大學
航空太空工程學系碩士班
100
This thesis presents the design of a programmable non-inverting synchronous buck-boost dc-dc power converter. The system contains two major subsystems, namely, a synchronous buck-boost power converter and a control unit. The buck-boost converter is capable of converting the source supply voltage to higher and lower voltages to the load terminal with voltage polarity unchanged. The voltage regulation is achieved through the control of a specially designed feedback circuit using a light dependent resistor from the control unit. A feedback control system to ensure the performance of the power converter is established. The hardware/software integrated and function tested prototype system is built in the laboratory. The system is successfully utilized for the maximum point tracking for the solar power management system using natural sunlight as the irradiance source. The system can be tailored to other power control applications through minor modification to the software of the control unit.
APA, Harvard, Vancouver, ISO, and other styles
23

Wolfe, Brandon Ward. "Voltage-mode controlled synchronous DC-DC buck converter using 0.13[mu] CMOS switches." Thesis, 2011. http://hdl.handle.net/2152/ETD-UT-2011-12-4810.

Full text
Abstract:
This report is a study of the effects of a commercial 0.13[mu] process and automotive temperature corners on a synchronous DC-DC buck converter design. The basics of switching converters will be explored with an emphasis on voltage-mode controlled feedback. A Type-III compensation network is designed using transfer function analysis to compensate for the inherent double pole introduced by an LC network. The output of the compensation network will drive a pulse width modulation comparator to vary the duty cycle of the high-side PMOS and low-side NMOS transistor switches. After the synchronous buck converter design was complete, the effect of process and temperature on efficiency, output voltage ripple, inductor peak to peak current, and output voltage load response was examined.
text
APA, Harvard, Vancouver, ISO, and other styles
24

Kuo, Yu-Hao, and 郭育豪. "Fuzzy Control for a Programmable Non-Inverting Synchronous Buck-Boost DC-DC Power Converter." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/31491607349304371556.

Full text
Abstract:
碩士
淡江大學
航空太空工程學系碩士班
102
This thesis discusses the fuzzy logic control for a programmable non-inverting synchronous buck-boost DC/DC power converter design. The system contains two major subsystems, namely, a non-inverting synchronous buck-boost power converter and a microcontroller based control unit. The system uses a light dependent resistor (LDR) to bridge the control of the power converter. Due to complexities of the dynamic model of the LDR, a comprehensive study of the dynamical behavior of the LDR is conducted. A fuzzy logic controller is then developed to achieve a satisfactory design. The proposed design is successfully verified through a Li-ion battery charging experiment.
APA, Harvard, Vancouver, ISO, and other styles
25

Lin, Wen-bin, and 林文彬. "Application of Three-Leg Buck DC-DC Power Converter to Permanent-Magnet Synchronous Motor Drives with Adjustable DC-Link Voltage." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/cnbjg4.

Full text
Abstract:
碩士
國立臺灣科技大學
電機工程系
95
This thesis is focused on the application of three-leg buck dc-dc power converter for the adjustable dc-link voltage. As to the drive of permanent-magnet synchronous motors, system control is conducted by voltage space vector pulse-width modulation (VSVPWM). Current and rotor-flux-orientation under synchronous frame are introduced to promote the dynamic performances of starting and load variation. Voltage and current closed-loop control with three-leg buck dc-dc power converter is achieved. Interleaved pulse-width modulation is used to control dc-link voltage. The proportional control of the peak electromotive-force versus speed is proposed for three-phase permanent-magnet synchronous motors. Low and high speed controls are conducted by using low and high dc-link voltages, respectively. The proposed adjustable voltage of dc link and current closed-loop strategies can thus reduce voltage ripple and current harmonics. A high performance digital signal processor, TMS320F2812, is used for interleaved pulse-width modulation, voltage and current closed-loop as well as three-leg dc-dc power converter. This reduction of hardware components results in cost lowing and reliability enhancement. A prototype of 900W permanent-magnet synchronous motor is built. The speed range of the motor is 500 2000 rpm. Experimental results indicate that the total harmonic distortion of current is reduced from 11% to 4.3% for 6.2N-m.This justifies the feasibility of the proposed system.
APA, Harvard, Vancouver, ISO, and other styles
26

Liao, Hsiao-Yun, and 廖筱耘. "A Digital-Intensive DC-DC Buck Converter." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/32051473247626262572.

Full text
Abstract:
碩士
國立暨南國際大學
電機工程學系
102
In recent years, integrated circuit process technology improved, circuit density increases, and circuit function powerful. The improving of process technology decreases the operation voltage of circuit. Meanwhile, the portable electronic products are popular today. So, low power consumption and high power efficiency are the primary consideration when designing portable electronic products. To increase the endurance of these portable electronic products, these circuits must operate in a low voltage and low current to reduce the power consumption. In this paper, a full-digital bulk converter controller is proposed. First, using VCO as a comparison circuit. The result of this circuit will not be affected by temperature or process. It is worth to mention that PWS circuit can meet the requirement under the different voltage. Based on the proposed architecture and techniques, an output voltage range between 0.9v~1.8v, load current range between 100mA~500mA digital control bulk converter circuit is realized. In TSMC 0.18-μm 1P6M CMOS process, simulation results show that the circuit in the load current of 100 mA the efficiency up to 86.3% ~ 88.76%, the load current of 500 mA the efficiency up to 91.5% ~ 94.5%.
APA, Harvard, Vancouver, ISO, and other styles
27

Chan, Yan Shuo, and 詹彥碩. "Buck Dc-to-Dc Converter Design and Analysis." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/23392021489825330516.

Full text
Abstract:
碩士
國立中正大學
機械系
92
Today, most industrial and homely load application are all dealing with the electric energy in power electronic systems and controling the flow of power to load.In the progress of technology, Microelectronics and Power Semiconductor technology are continuously improving in recent year. Power electronic systems design face to reduce size, cost, and enhanceperformance as optimum objective. Therefore the power electronic systems development have been respected progressively. DC motors have high start torque, linearly control achievement and high speed response. Therefore, most industrial load drives are use DC motors as actuator. To enhance the systems transmission efficiency, and reduce unnecessary energy loss, the power electronics converters design are very important. The main purpose of this thesis aim at the design and analysis of the normal rated power 450 Watt DC motor on buck dc-to-dc converter. First, we analyze buck dc-to-dc converter principle, and ideal whole converter designsituation. Next, we employ a circuit simulation software PSPICE to design converter and select the circuit element. Based on the simulation design converter, we practically make buck dc-to-dc converter and study the difference between practical design result in non-ideal condition and theoretical design result in ideal condition. Simultaneously, we improve practical design produced non-ideal condition. Finally, the thesis focus on the difference between practical design circuit and theoretical design circuit, and adjust the circuit element range to reach the feasible of practical circuit application and improve the converter non-ideal condition.
APA, Harvard, Vancouver, ISO, and other styles
28

Chen, Shih-Wei, and 陳世偉. "Single-Inductor Tri-Output DC-DC Boost Converter and Dual-Output Quadratic DC-DC Buck Converter." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/uy3282.

Full text
Abstract:
碩士
國立臺北科技大學
電腦與通訊研究所
97
There are two kinds of DC-DC converters presented in this study. One is the single-inductor tri-output (SITO) DC-DC boost converter, and the other one is the dual-output quadratic (DOQ) DC-DC buck converter. The proposed SITO DC-DC boost converter not only provides three output sources but also uses single inductor. The proposed DOQ DC-DC buck converter has a wider conversion ratio with ultra-low voltage for dual-output voltage sources. In this study, the methodology for controller design of DOQ DC-DC buck converter is given using average current-mode control. The proposed circuits have been fabricated with TSMC 0.35mm 2P4M CMOS processes. The experimental results showed that SITO DC-DC boost converter can operate with supply voltage form 2.5V to 3.1V, which is suitable for single-cell lithium-ion battery supply applications. The output ripple voltage is about 40mV with a 220-μF off-chip capacitor and 10-μH off-chip inductor. The output maximum load current is up to 300mA. The output voltage range is from 2.8V to 4.4V. The maximum power efficiency is up to 86.9%. The experimental results showed that DOQ DC-DC buck converter can operate with supply voltage form 4.5V to 5.5V. The output ripple voltage is about 50mV with a 10-μF off-chip capacitor and 5-μH and 6-μH off-chip inductor. The output maximum load current is up to 1A. The output voltage range is from 95mV to 1.25V.
APA, Harvard, Vancouver, ISO, and other styles
29

Yang, Chih-Wei, and 楊智偉. "Terminal Sliding Mode Control of DC-DC Buck Converter." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/40287493094885340856.

Full text
Abstract:
碩士
中原大學
電機工程研究所
97
Sliding mode control is widely used in recent years to deal with the control problems of nonlinear systems. In this dissertation we applied terminal sliding mode control (TSMC) which is different from traditional sliding mode control on DC - DC buck converter design. It not only retains the advantages of sliding mode control but also includes terminal convergence characteristics. Furthermore, the system stability is discussed using Lyapunov function analysis. When considering the actual derivation error uncertainty in passive components, the controller is proceeded by adding an adaptive machine into adaptive terminal sliding mode control (ATSMC). As a result, the system uncertainty is allowed, i.e. the controller provides high robustness. In addition, Barbalat's lemma is also applied for stability analysis. To verify the control performances, we first perform simulations in the output voltage control when the load and input source are uncertain, i.e., the load changes and input changes. Next, the DC-DC Buck converter control is implemented. The adaptive terminal sliding mode controller is realized using dSPACE 1104 and Simulink toolbox. Experiment results show satisfactory performance even under load and the input voltage variations.
APA, Harvard, Vancouver, ISO, and other styles
30

YANG, SHANG-TA, and 楊尚達. "DC-DC Buck Converter with Constant On-Time Control." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/536978.

Full text
Abstract:
碩士
國立臺北科技大學
電機工程系電力電子產業碩士專班
107
This thesis mainly implements a constant on-time controlled buck converter, which uses FPGA controller to regulate the output voltage, and works in a setting frequency range. One of the advantages of the constant on-time control method is that when the load transient, it can quickly respond to rising output voltage to avoid the voltage drop too deep. The MLCC can be used on the output terminal with this method, and keep the output voltage stable, has better efficiency even in the light load. The specification of the implemented constant on-time buck converter developed in this thesis includes output power 90 W, input voltage 6 V, output voltage 1.8 V, and single-phase switching frequency 1~2 MHz. The load varying from 10% to 100% of the actual switching control and load change from 10% to 50% are mwasured. Experimental results show that the output voltage can be regulated well despite of load changes and the transient magnitude of the output voltage response, in PI control is less than 5%, in hybrid PI control is less then 3.1%.
APA, Harvard, Vancouver, ISO, and other styles
31

Chou, Di-Chi, and 周帝吉. "Single-Inductor Dual-Output DC-DC Buck/Boost Converter." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/01129641559018482846.

Full text
Abstract:
碩士
國立臺灣大學
電子工程學研究所
104
A Single-Inductor Dual-Output (SIDO) DC to DC Buck/Boost Converter topology is proposed. The power stage switching sequence is different from conventional type. In addition to three switches, a freewheel switch is used to prevent negative inductor current occurring and degrading the power efficiency. The converter uses ripple-based control method, which facilitates high switching frequency and decreasing the passive components volume. The chip is fabricated in 0.18 μm CMOS, the proposed SIDO DC-DC Buck/Boost Converter can produce 0.95 V buck voltage with 1.4 V boost voltage. The power transfer efficiency could reach 80% in simulation.
APA, Harvard, Vancouver, ISO, and other styles
32

Chen, Lien-Chieh, and 陳聯傑. "H∞ Control Design of PWM Buck DC-DC Converter." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/00619762453291005055.

Full text
Abstract:
碩士
國立成功大學
系統及船舶機電工程學系碩博士班
93
Abstract An H∞-Control design of the Pulse Width Modulator (PWM) switch buck DC-DC converter is studied in this thesis. The AC small-signal mathematical model for the PWM switch buck DC-DC converter is derived in this research and the state space equation of a topological circuit through a DC perturbation operating point is then established and linearized around the operating point. The composite model to be controlled is then composed of a AC small-signal model , a PWM transfer function and a switch transfer function. To minimize the ill-effects of the noises , disturbances and the parameter variations , the H∞-control methodolody is applied on the composite model to achieve the desired performance. Finally , computer simulations results are made to verify the feasibility and the robustness of the proposed control design under the presence of system parameter uncertainties and noises.
APA, Harvard, Vancouver, ISO, and other styles
33

Hsieh, Meng Ting, and 謝孟廷. "All Digital Controlled High Accuracy Buck DC-DC Converter." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/65275255834234271315.

Full text
Abstract:
碩士
長庚大學
電機工程學系
100
This paper presents a fully digital control of DC-DC buck converter circuit. According to the relative relationship between the output voltage and reference voltage, the circuit will control power MOS’s duty cycle by means of DPWM’s signal to achieve the correct voltage. The buck converter has some advantages of high accuracy, low area, and high efficiency. This circuit is achieved by simulation and chip and then compare the results. This all-digital controller buck DC-DC converter is implemented in Taiwan Semiconductor Manufacturing Company (TSMC) 0.35μm CMOS process. Operated from a 3.3±10%V supply voltage, DPWM resolution is 8-bit and power MOS switch’s frequency is 1MHz. The output voltage range is from 0.6V to 3V and the maximum output load current is 400mA . The output voltage accuracy is more than 99% and maximum conversion efficiency is 92.1%. The fully-integrated chip area is 0.972 mm*0.972 mm and the core area is 0.49 mm2.
APA, Harvard, Vancouver, ISO, and other styles
34

Yu-Hui, Sung, and 宋玉惠. "Implementation of 8MHz Current-Mode Buck DC-DC Converter." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/17297645957351678156.

Full text
Abstract:
碩士
國立交通大學
電機學院IC設計產業專班
95
This thesis proposes a new DC-DC switching converter with a high switching frequency for reducing the size of the output filter. Owing to the high switching frequency, the on-chip output filter in DC-DC switching converter is possible in the future. Thus, how to develop a DC-DC switching converter with high switching frequency is important in today’s technology. Therefore, a compact solution is needed to effectively reduce the footprint area of the power management module in system-on-chip (SoC) systems. Furthermore, a high performance power converter module is also needed to provide a regulated and stable supply voltage to the SoC systems because the operation voltage of the SoC systems is too low to have a good signal-to-noise ratio. For providing a high performance supply voltage, the current-mode technique is utilized to get better line and load regulations. However, the current sensing accuracy and response time is seriously affected by the high switching frequency. A high accuracy and small response time current sensor is also proposed in this thesis. In thesis, we implement an 8 MHz current-mode buck DC-DC converter with good line and load regulations. The chip is implemented by tsmc 2P4M 0.35u CMOS process. The range of the operation voltage is from 2.6V to 3.3V. The load regulation and line regulation are 0.88uV/mA and 4.67mV/V. The chip features smaller output filter elements and fast response, which makes it suitable for power management in the portable devices.
APA, Harvard, Vancouver, ISO, and other styles
35

Wu, Kun You, and 吳坤祐. "Sliding-Mode Control Applied to Buck DC-DC Converter Design." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/90185981336242031257.

Full text
Abstract:
碩士
國立交通大學
電機學院碩士在職專班電機與控制組
95
A sliding mode controller with the error integration between output voltage and command voltage for PWM-based Buck DC-DC converter is proposed. Constant switching frequency can be achieved with the proposed approach. For the controller design, this thesis adopts sliding mode control theorem because of its well-know robustness for system uncertainty. Without load estimator in the controller, this closed-loop system ideally should convert power flow into the prescribed form in spite of the load variation. With the unknown load condition we choose a sliding function with an integral term of error function such that the system is stabilized on the sliding surface. Then design the control algorithm such that the system reaches the sliding mode in a finite time. The simulation of the proposed closed-loop control scheme is illustrated to process fast transient response and robustness to load variation.
APA, Harvard, Vancouver, ISO, and other styles
36

Shiau, Jung-yi, and 蕭仲義. "Sliding mode voltage control of DC/DC buck-boost converter." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/99441053412284159291.

Full text
Abstract:
碩士
正修科技大學
機電工程研究所
97
Comparing with the conventional power converters, switching power converters possess the advantages of high efficiency, small size and wide range of voltage operation, so that they are widely applied in the application of portable electronic products and equipment in recent years. This thesis mainly focuses on the development and implementation of Buck/Boost converter with a sliding mode voltage controller, to achieve the stable desired controlled voltage output. Firstly, the stable sliding surface function is designed due to the control system. It can be observed that the entire controlled region can be divided into three subspaces. Based on Lyapunov stable theory, the controller is proposed to enforce the system trajectory from the arbitrary point toward the sliding surface in the finite time, remain on the surface and slides along to equilibrium point exponentially. In addition, based on a fixed frequency pulse width modulation technology, the proposed controller is realized by controlling the duty cycle of switch device to achieve desired stable voltage output under the influence of loading variation. The hardware system includes the integrated design of converters, controller, sawtooth signal generation circuit and drive circuit. According to the simulation software of PSpice, the, the encouraged system performance is validated by the testing of different loadings. Finally, the hardware system is implemented by analogic circuit to verify feasibility of the proposed control structure according to the different voltage inputs and loading uncertainties.
APA, Harvard, Vancouver, ISO, and other styles
37

Chen, Chien-cheng, and 陳建成. "A High Efficiency Current Mode Control DC-DC Buck Converter." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/07494232505610402844.

Full text
Abstract:
碩士
國立中央大學
電機工程研究所
99
In this changing rapidly era of electronic technology, the major demands of portable electronics are short, thin, and full functionalities. These sub-circuits of the portable electronics, which use batteries for power sources, need a stable supply voltage generating by power converters. These power converters must have low power consumption and high efficiency to extend the service time of portable electronics. Thus, a high efficiency current mode buck converter is presented in this thesis. The proposed buck converter uses current-mode controlling mechanism to accelerate the transient response during the transient period. It senses the current variation of the output inductor. Therefore, it achieves low operating current and high efficiency by removing the V-to-I converting circuit. This buck converter has better performance in the specification of efficiency comparing with traditional buck converter with current-mode controlling. This current-mode buck converter is fabricated with TSMC 0.35um 3.3 V CMOS process. In the proposed buck converter, the operation voltage is form 3.8 V to 5.5 V, the output voltage is 3.3 V, the output current is from 0.05 A to 1 A, and the highest efficiency is 97.4 %. The line regulation and load regulation are 17.5 mV/V and 1.15 mV/A, respectively. The chip area is 2.46 mm2.
APA, Harvard, Vancouver, ISO, and other styles
38

LAI, YANG-YUN, and 賴暘允. "Counter-Based Digital Pulsewidth Modulator For DC-DC Buck Converter." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/bz8e9k.

Full text
Abstract:
碩士
國立暨南國際大學
電機工程學系
106
In today's DC-DC buck converter is widely used in a variety of electronic circuits, and I designed the DC buck converter is the use of digital control, and the use of digital pulse width modulator to modulate the voltage. This paper presents a counter-based digital pulse width modulator with high resolution and low hardware costs. The digital DC buck converter in this thesis is composed of the basic structure of the buck converter and digital pulse width modulator. I implemented the digital pulse width modulator in the FPGA development board and integrated it with the PCB of the DC buck converter. Then the digital pulse width modulator to TSMC 180nm process and the use of Cell-Based Design flow design approach to tape-out. Finally, with the PCB of the DC buck converter integration and measurement. The final experimental measurements show that I can drop the input voltage from 1.8V~ 3V to 0.8V~ 2.5V. When operating at 3.3V input voltage and 1.8V output voltage, output ripple voltage is no higher than 100 millivolts and the conversion efficiency can reach 89.5%.
APA, Harvard, Vancouver, ISO, and other styles
39

Chiu, Min-Chun, and 邱閔駿. "Design of CMOS DC-DC Buck Converter with Protection Capability." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/51866157385692987115.

Full text
Abstract:
碩士
國立勤益科技大學
電子工程系
101
Due to convenient operation and friendly user interface, portable electronic products are more popular today. For high efficiency, it is the most important consideration to achieve safety power conversion unit in portable electronic products. In addition, the semiconductor technologies are improved continuously. As a result, more functions can be integrated into a single chip and these electronic products have more functions within a small volume and with light weight. However, power supply units of circuits are needed to supply more various voltage levels to meet the requirements of circuit. In our design, design of CMOS DC-DC buck converter with input/output protection capability is also considered. In this thesis, the architecture is used by both sensed inductor’s current and output voltage feedback to control of switching buck converter. Based on current mode pulse width modulation (PWM), the circuit can improve transient time response comparing to the voltage mode control PWM. This circuit also provides that input over voltage protection, input under voltage protection, and output current over protection. Thus, the power supply unit will operate successfully in a stable condition to avoid components burned and destroyed. The operating life time of auxiliary battery will then be further extended. By using TSMC 0.35-um 3.3 V CMOS technology, the circuit is simulated. Input voltage is ranged of 2.4 V to 3.9 V. The operating frequency is 1 MHz. The capability of load current is ranged from 20 mA to 400 mA. The maximum conversion efficiency is 87.97 % when the circuit operates at 100 mA continuous conduction mode.
APA, Harvard, Vancouver, ISO, and other styles
40

Chin-HongChen and 陳津宏. "Average-Current-Mode Non-inverting Buck-Boost DC-DC Converter." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/77890091296649204660.

Full text
Abstract:
碩士
國立成功大學
電機工程學系碩博士班
98
With the increasing use of electrical portable devices, an efficient power management solution is needed to extend battery life. Generally, basic switching regulators (e.g., buck, boost) are not capable of using the entire battery output characteristics effectively (e.g., 2.7–4.2 V for Li-ion) to provide a fixed output voltage (e.g., 3.3V). In this work, an average-current-mode non-inverting buck-boost dc-dc converter is introduced, which can use the full-range output voltage of Li-ion battery with the advantages of high power efficiency, faster transient response, and excellent noise immunity. The die area of this chip is 1.9x1.7 , which is fabricated by using Taiwan Semiconductor Manufacturing Company (TSMC) 0.35μm 2P4M 5V mixed-signal polycide process. The converter output is set to 3.3V, and can supply up to 300 mA load current. Its input votlage can range from 2.5V to 5V.
APA, Harvard, Vancouver, ISO, and other styles
41

Pai-YiWang and 王派益. "A Current-Mode DC-DC Buck Converter with Variable-Frequency Controller." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/53741969966548917400.

Full text
Abstract:
碩士
國立成功大學
電機工程學系碩博士班
98
A current-mode buck converter with integrated analog variable-frequency controller (VFC) is implemented in this thesis. With the highly growing market of the portable devices, a compact, fast, low cost and high efficiency regulator is needed in power management solutions. Design of the regulator with small inductor can significantly reduce the PCB size and cost; and it is inherently faster than general solutions due to higher filtering bandwidth. But small inductor makes higher output voltage ripple, thus the design of switching frequency is limited by the rated output voltage ripple; faster switching frequency though effectively reduces the output voltage ripple without increasing the output capacitance, but introduces more frequency-dependent power loss such as switching loss and dead-time loss into regulator. By adapting VFC, which can be easily integrated in a chip without complex control circuts, the efficiency can be optimized under rated output voltage ripple with small inductor value. Furthermore, the proposed current-mode regulator provides an improvement of the current sensor, reducing the controller power loss while maintaining sensing accuracy, and eliminating the sensed noise, providing better sensed signal quality to the feedback loop, significantly promoting the performance of current-mode switching regulator. This current-mode buck regulator is fabricated with TSMC 0.35um 3.3/5V Mixed-Signal CMOS process. The total chip area is about 1.06 x 0.995 mm2. Verification results show that power saving at least 5mW and 20mW during light load and heavy load individually.
APA, Harvard, Vancouver, ISO, and other styles
42

Lin, Yu-Min, and 林育民. "DESIGN OF DC/DC BUCK CONVERTER WITH TERMINAL SLIDING MODE CONTROL." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/94567133218679607091.

Full text
APA, Harvard, Vancouver, ISO, and other styles
43

Tzeng, Jun-Jie, and 曾俊傑. "A Voltage Mode DC-DC Buck Converter with Duty Cycle Detector." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/7e7u5q.

Full text
Abstract:
碩士
國立中央大學
電機工程學系
103
The proposed buck converter with duty cycle detector uses the voltage mode control as the feedback loop for system stability. The PID compensator integrated into the chip to reduce the number of passive components. It is good to portable electronic devices design thinness and lightweight. With duty cycle detector, proposed buck converter can detect the load current information to slow down the system operating frequency for reducing power consumption in very light load. The zero current detector prevents the inverse current, and reduces the conduction loss in light load. The dead time detector is used to optimize the dead time of control signal. The efficiency of system can be improved. This buck converter has been fabricated with 0.18 um 3.3 V CMOS process. In the proposed buck converter, the operating voltage is from 2.7 V to 4.2 V, the output voltage is 1 V, the operating frequency is from 0.77 MHz to 1.44 MHz, the load current is from 25 mA to 1 A, and the peak efficiency is 88.87 %. The line regulation and load regulation are 6.67 mV/V and 1.02 mV/A, respectively. The chip area is 1.3225 mm2.
APA, Harvard, Vancouver, ISO, and other styles
44

Li, Kuang-Chieh, and 李光傑. "Research on Current Detection Improvement Method for DC-DC Buck Converter." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/cwjzm6.

Full text
Abstract:
碩士
國立臺灣海洋大學
電機工程學系
105
In recent years, the application of electronic devices is widely spread. DC-DC converters are increasingly important due to their use for power control of the electronic devices. Because current detection significantly affects the quality control of DC-DC buck converters, this thesis is aimed to research an improvement strategy on current detection to overcome the disadvantages of the commonly used current detection scheme. The thesis focuses on finding a current detection scheme, named inductor DC resistance sensing , for the purposes of low cost and low power conversion loss, as well as its strength and weakness as compared to the resistor sensing method. The inductor DC resistance sensing method uses a series resister-capacitor circuit connected with an inductor (parasitic DC resistance) in parallel, which doesn’t alter the converter’s structure and affect little power conversion efficiency, thus is suitable for current detection of low power loss DC-DC converters. Experimental results show that the resistor sensing method is better if system needs precise current detection, available space is large enough and power loss is endurable. Otherwise, the inductor DC resistance sensing method is the better choice for current detection.
APA, Harvard, Vancouver, ISO, and other styles
45

Yeh, Chai-An, and 葉家安. "Design and Implementation of Digital Controller for DC/DC Buck Converter." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/89j7xh.

Full text
Abstract:
碩士
國立臺北科技大學
電機工程系所
94
The main theme of this thesis is to present a digital controller for dc-dc buck converter using peak current mode control based upon estimated current which is derived by the parameter of current slope and valley current sampling. The advantages of this control method include significant reduction of sampling rate of current and providing fast dynamic response. For design the digital controller, the mathematic model of the buck converter using peak current mode is derived and the effects of parameter on system stability is discussed. Simulation results demonstrate the performance of the designed digital controller. The fully digital controller of dc-dc buck converter is implemented using Xilinx® FPGA-based board. The details of the specification are as follows: input voltage 12V, output voltage 2.5V and maximum output current for 20A. The experimental results show that the output voltage is well regulated and its ripple is less the +3%~-3% under both steady state and transient state, and thereby confirming the controller design and implementation.
APA, Harvard, Vancouver, ISO, and other styles
46

Huang, Po-Wen, and 黃柏文. "Design and Implementation of Digital Controlled Interleaved Buck DC/DC Converter." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/hncv2f.

Full text
Abstract:
碩士
國立臺北科技大學
電機工程系研究所
97
The objective of this thesis is to design and implement a digital controlled interleaved buck converter. The details of the specifications are as follows: input voltage is 12V, output voltage is 3.3V, maximum output current is 20A and switching frequency is 300 kHz. The digital control is realized by RENESAS MCU SH7203 and Altera FPGA Stratix EP2S30F484C4N. MCU is used to implement the digital control methodology. FPGA is used to implement the DPWM and converts the serial data to parallel data. The fully digital controlled interleaved buck DC/DC converter with current sharing function is implemented by MCU and FPGA. The experimental results show that the output voltage is well regulated and its ripple is less the ±1% under both light load and full loads, and current sharing is achieved. These results confirm the controller design and implementation.
APA, Harvard, Vancouver, ISO, and other styles
47

Su, Chien-Chung, and 蘇建中. "Design of a Dual-phase Voltage-mode DC-DC Buck Converter." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/264jbg.

Full text
Abstract:
碩士
國立臺灣海洋大學
電機工程學系
107
In recent years, technology has developed rapidly, and electronic products have become thinner and can use many functions at the same time. Lithium batteries need to provide many voltages to different system modules at the same time, and the usage time will be shortened as the power consumption becomes larger. An effective power management system is an important thing in a limited volume and battery capacity. A good power management system can extend the life of the product and reduce the frequency of battery charging. In view of the above mentioned problems, this thesis proposes a dual-phase voltage mode buck converter. The dual-phase converter is connected in parallel with two sets of power transistors. Compared with single phase, it has the advantages of low ripple voltage, large load current, and improving the efficiency of heavy loads. The phase control circuit uses one phase delay circuit to generate another set of switching signals. Since the converter has only one control circuit in dual-phase design, the number of control circuits can be reduced, thus the area of the entire chip can be decreased. The overall design is implemented with the TSMC 0.35um mixed signal 2P4M CMOS 5V process provided by the Taiwan Semiconductor Research Center (TSRI). The converter uses the voltage mode. The input voltage range is 3.3V~4.2V, the output voltage is 1.8V, the operating frequency is 1MHz per phase, the load range is 50mA~1000mA, the output ripple voltage is below 10mV, and the overall maximum efficiency is 92.17%.
APA, Harvard, Vancouver, ISO, and other styles
48

Zheng, Li-Ren, and 鄭力仁. "Design and Implementation of a Bidirectional Buck-Boost DC-DC Converter." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/41810993725827533220.

Full text
Abstract:
碩士
國立臺灣科技大學
電機工程系
103
In this thesis, a digitally-controlled non-isolated bidirectional buck– boost dc–dc converter is studied and implemented. The proposed converter is capable of operating in all power conditions in buck/boost modes. Through a novel modulation strategy and proper design of the buck-boost inductance, zero voltage switching (ZVS) can be achieved and thus high efficiency can be obtained. To further improve the efficiency, an adaptive phase-shift control method which determines the phase shift between gating signals according to the load level is also proposced. A low cost digital signal controller dsPIC33FJ16GS502 is adopted in this thesis to realize the power flow control, DC-bus voltage regulation and adaptive phase shift control. As the modulation strategy is a software-based solution, there are no requirement of additional circuits; therefore, it can be easily implemented and reduces instability and noise susceptibility problems. To validate the correctness and the effectiveness of the proposed method, a 300 W prototyping circuit is implemented and tested. According to the experimental results, the measured efficiencies of all operating modes under different loads are all higher than 90%.
APA, Harvard, Vancouver, ISO, and other styles
49

Hsu, Hsin-Ju, and 許昕茹. "Automatic Layout Synthesis Tool for DC-DC Current-Mode Buck Converter." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/64617872141924593723.

Full text
Abstract:
碩士
國立中央大學
電機工程學系
105
In our days, lots of electronic product are made of analog/mixed-signal (AMS) intergrated circuits (ICs), such as portable devices, medical equipment, communication product and automobile electronics etc. Nowadays, with the growing demands for portable devices, Time-to-Market cycle still keeps shrinking. Electronic design automation (EDA) tools are the keys to speed up the device process. There are many existing EDA tools for digital circuits on the market. However, the EDA tools for AMS circuits are still not popular. Because analog circuits are often sensitive to small signals response, their layouts are often manually designed by experienced designers. Therefore, AMS circuit design has become the bottleneck in SoC design flow. In order to increase the circuit performance and shorten design process, we perpose an automatic layout synthesis tool for DC-DC current-mode control buck converters in the thesis. This synthesis tool is able to generate the final layout of the target circuit automatically from given specification. The design environment is developed with C++ and Tcl/Tk programming language. The required layout can be generated in Laker automatically and pass the DRC/LVS verification. The post-layout simulation results also satisfy the required specification.
APA, Harvard, Vancouver, ISO, and other styles
50

Lian, Bo-Sheng, and 連柏勝. "Design of CMOS DC-DC Buck Converter with Dual Filtering Inductors." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/26602816816547867804.

Full text
Abstract:
碩士
國立勤益科技大學
電子工程系
101
This thesis proposes a novel DC-DC buck converter with dual filtering inductors to reduce the converter power consumption when the converter is operated at light loading. The converter operates in discontinuous conduction mode. Pulse frequency modulation is used as a control mechanism. Based on the loading status, this circuit will automatically switch to select the desired inductor. Comparison with single filter inductor DC-DC buck converter, the converter can effectively reduce power conduction loss. In addition, a block of dead time buffer is designed as the control signal of sample-and-hold circuit. Based on the control signal, the maximum peak voltage of the inductor can be sampled by the sample-and-hold circuit. In this thesis, we have integrated a dc-dc buck converter successfully with dual filtering inductors by using TSMC 0.35-um technology. Using HSPICE simulation, the performance of whole circuit has been verified.
APA, Harvard, Vancouver, ISO, and other styles
We offer discounts on all premium plans for authors whose works are included in thematic literature selections. Contact us to get a unique promo code!

To the bibliography