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Relevant bibliographies by topics / Test pattern generation

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Academic literature on the topic 'Test pattern generation'

Author: Grafiati

Published: 4 June 2021

Last updated: 26 July 2025

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Journal articles on the topic "Test pattern generation"

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Kiran, Kumar Gopathoti, and Sunil Kumar G. "Built-in Self-Test Algorithm for Functional Broadside Tests." Journals of Advancement in Electronics Design 5, no. 3 (2022): 1–9. https://doi.org/10.5281/zenodo.7476638.

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<em>In this paper, we propose a technique for weighted test sequence generation for synchronous sequential circuit’s on-chip. Three weights—0, 0.5, and 1—are adequate for combinational circuits to completely cover stuck-at failures because they can accurately duplicate any given test pattern. We define the weights for sequential circuits based on subsequences of a deterministic test sequence. These weights enable us to partially replicate the test sequence and assure that the resulting weighted test sequences would receive full fault coverage. This accumulator-based 3-weight

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Sikdar, B. K., N. Ganguly, and P. P. Chaudhuri. "Generation of Test Patterns Without Prohibited Pattern Set." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 23, no. 12 (2004): 1650–60. http://dx.doi.org/10.1109/tcad.2004.837730.

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Rajski, J., and J. Tyszer. "Recursive pseudoexhaustive test pattern generation." IEEE Transactions on Computers 42, no. 12 (1993): 1517–21. http://dx.doi.org/10.1109/12.260644.

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Wang, L. T., and E. J. McCluskey. "Circuits for pseudoexhaustive test pattern generation." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 7, no. 10 (1988): 1068–80. http://dx.doi.org/10.1109/43.7806.

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Lisanke, R., F. Brglez, A. J. de Geus, and D. Gregory. "Testability-Driven Random Test-Pattern Generation." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 6, no. 6 (1987): 1082–87. http://dx.doi.org/10.1109/tcad.1987.1270348.

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Larrabee, T. "Test pattern generation using Boolean satisfiability." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 11, no. 1 (1992): 4–15. http://dx.doi.org/10.1109/43.108614.

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Abd-El-Barr, M. H., C. McCrosky, and W. Li. "Less expensive test pattern generation technique." IEE Proceedings - Computers and Digital Techniques 143, no. 1 (1996): 17. http://dx.doi.org/10.1049/ip-cdt:19960065.

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Kirkland, T., and M. R. Mercer. "Algorithms for automatic test-pattern generation." IEEE Design & Test of Computers 5, no. 3 (1988): 43–55. http://dx.doi.org/10.1109/54.7962.

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Mitra, D., S. K. Dey, S. Sur-Kolay, B. B. Bhattacharya, S. Kundu, and A. Nigam. "Test pattern generation for droop faults." IET Computers & Digital Techniques 4, no. 4 (2010): 274–84. http://dx.doi.org/10.1049/iet-cdt.2009.0024.

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Agrawal, Nishant. "Automatic Test Pattern Generation using Grover’s Algorithm." International Journal for Research in Applied Science and Engineering Technology 9, no. VI (2021): 2373–79. http://dx.doi.org/10.22214/ijraset.2021.34837.

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Quantum computing is an exciting new field in the intersection of computer science, physics and mathematics. It refines the central concepts from Quantum mechanics into its least difficult structures, peeling away the complications from the physical world. Any combinational circuit that has only one stuck at fault can be tested by applying a set of inputs that drive the circuit to verify the output response. The outputs of that circuit will be different from the one desired if the faults exist. This project describes a method of generating test patterns using the Boolean satisfaction method. F

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Dissertations / Theses on the topic "Test pattern generation"

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Wong, Mike Wai-Tak. "Test pattern generation for synthesis systems." Thesis, University of Southampton, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.334672.

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Veskoukis, Damianos. "Automatic MC/DC Test Pattern Generation." OpenSIUC, 2018. https://opensiuc.lib.siu.edu/theses/2377.

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Today’s critical systems of military and aviation grade consist of several complex requirements that need to be assessed for a safe and continuous operation before they are deployed for use. Several coverage methodologies have been proposed over the years with Modified Condition / Decision Coverage (MC/DC) being chosen by the aviation industry. This practice is becoming a highly recommended coverage methodology among several modern standards such as the Automotive Safety Integrity Level (ASIL) of automotive standard ISO 26262 and the Safety integrity level (SIL) 4 in part 3 Annex B of the bas

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Vasudevan, Dilip Prasad. "Automatic test pattern generation for asynchronous circuits." Thesis, University of Edinburgh, 2012. http://hdl.handle.net/1842/7670.

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The testability of integrated circuits becomes worse with transistor dimensions reaching nanometer scales. Testing, the process of ensuring that circuits are fabricated without defects, becomes inevitably part of the design process; a technique called design for test (DFT). Asynchronous circuits have a number of desirable properties making them suitable for the challenges posed by modern technologies, but are severely limited by the unavailability of EDA tools for DFT and automatic test-pattern generation (ATPG). This thesis is motivated towards developing test generation methodologies for asy

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Samala, Keerthana. "Test Pattern Generation for Double Transition faults." OpenSIUC, 2018. https://opensiuc.lib.siu.edu/theses/2374.

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Keerthana Samala, for the Master of Science degree in Electrical and Computer, presented on 05/11/2018, at Southern Illinois University Carbondale. TITLE: Test Pattern Generation for Double Transition Faults MAJOR PROFESSOR: Dr. Spyros Tragoudas Under double transition fault model, a fault is associated with a pair of lines and a pair of transitions on these lines. The proposed double transition fault model includes set of cases where the increased delay of a single faulty line may be too small to cause the faulty behavior of the circuit. However, when this delay propagates through another fau

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Abdulrahman, Arkan M. "Test pattern generation techniques that target low test application time /." Available to subscribers only, 2008. http://proquest.umi.com/pqdweb?did=1564033201&sid=10&Fmt=2&clientId=1509&RQT=309&VName=PQD.

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Thesis (Ph. D.)--Southern Illinois University Carbondale, 2008.<br>"Department of Electrical and Computer Engineering." Keywords: Test pattern generation, Test application time Includes bibliographical references (p. 87-95). Also available online.

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Geada, Joao Moreno Colaco. "A study of mixed mode test pattern generation methods." Thesis, University of Newcastle Upon Tyne, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.315547.

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LIU, JIANXUN. "TEST PATTERN GENERATION FOR CROSSTALK FAULT IN DYNAMIC PLA." University of Cincinnati / OhioLINK, 2003. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1069779563.

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Udar, Snehal. "Built-In Schemes for Test Pattern Generation and Fault Location." OpenSIUC, 2011. https://opensiuc.lib.siu.edu/dissertations/410.

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Snehal Udar, for the Doctor of Philosophy degree in Electrical and Computer Engineering, presented on May 4, of 2011, at Southern Illinois University Carbondale. TITLE: BUILT-IN SCHEMES FOR TEST PATTERN GENERATION AND FAULT LOCATION MAJOR PROFESSOR: Dr. D. Kagaris In this dissertation, we studied the areas of test pattern generation and fault location for detecting and diagnosing the faults in today's complex chips. In the first problem, a novel reseeding based test pattern generation scheme is analyzed by proposing a hardware efficient technique that uses irreducible polynomial-primitive elem

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Asokan, Anu. "Signal Integrity - Aware Pattern Generation for Delay Testing." Thesis, Montpellier, 2015. http://www.theses.fr/2015MONTS206/document.

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La miniaturisation des circuits intégrés permet d'avoir une intégration plus élevée dans une même puce. Cela, conduit a des problèmes de qualité dans les signaux de communication et d’alimentation comme le phénomène de bruit de diaphonie entre les interconnections (Crosstalk) et de bruit dans le lignes d'alimentation (PSN, GB). Aussi problèmes de fiabilité peuvent éventuellement arriver a cause des variations dans les paramètres technologiques pendant le processus de fabrication. De ce fait, tout ces phénomènes ont un effet négatif sur le délai dans les circuits embarques (IC) et donnent lieu

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Doshi, Alok Shreekant Agrawal Vishwani D. "Independence fault collapsing and concurrent test generation." Auburn, Ala., 2006. http://repo.lib.auburn.edu/2006%20Spring/master's/DOSHI_ALOK_48.pdf.

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Books on the topic "Test pattern generation"

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Drechsler, Rolf, Stephan Eggersglüβ, Görschwin Fey, and Daniel Tille. Test Pattern Generation using Boolean Proof Engines. Springer Netherlands, 2009. http://dx.doi.org/10.1007/978-90-481-2360-5.

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Drechsler, Rolf. Test pattern generation using Boolean proof engines. Springer, 2009.

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Eggersglüß, Stephan, and Rolf Drechsler. High Quality Test Pattern Generation and Boolean Satisfiability. Springer US, 2012. http://dx.doi.org/10.1007/978-1-4419-9976-4.

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Kelly, David. Parallel test pattern generation for programmable logic devices. University College Dublin, 1995.

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Cosgrove, Steven John. Expert system technology applied to the testing of complex digital electronic architectures: TEXAS : a synergistic test strategy planning and functional test pattern generation methodology applicable to the design, development and testing of complex digital electronic circuits. Brunel University, 1989.

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Trushina, Ekaterina, Aleksey Mitenkov, Elena Sidorova, et al. Fundamentals of production management and lean manufacturing. INFRA-M Academic Publishing LLC., 2024. https://doi.org/10.12737/2091823.

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The textbook will allow students to master the basics of effective production organization, rational and economical use of all types of resources, production program planning, teach methods of planning and organizing the movement of labor items according to technological process operations, planning the number and remuneration of industrial enterprise personnel based on theoretical patterns and industrial management practices. A practice-oriented approach to the education process has been implemented. After each chapter, control questions, calculation and test tasks or cases are presented for

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Os'muhina, Ol'ga, Svetlana Gudkova, Elena Sharonova, and Il'gam Kuryaev. The history of Russian literature of the XX century. INFRA-M Academic Publishing LLC., 2025. https://doi.org/10.12737/2084809.

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The textbook is devoted to the history of Russian literature of the twentieth century, which includes Soviet literature, literature of the Russian diaspora, literature of the domestic underground, literature of the 1990s in all its complexity and heterogeneity. Taking into account the extensive historical and theoretical literary material (monographs, collective collections, textbooks, encyclopedic publications), the textbook authors sought to objectively highlight the literary process, to give an analytical reading of the unified text of Russian literature of the twentieth century, largely go

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Drechsler, Rolf, Görschwin Fey, Stephan Eggersglüß, and Daniel Tille. Test Pattern Generation using Boolean Proof Engines. Springer, 2010.

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Drechsler, Rolf, and Stephan Eggersglüß. High Quality Test Pattern Generation and Boolean Satisfiability. Springer, 2012.

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Drechsler, Rolf, and Stephan Eggersglüß. High Quality Test Pattern Generation and Boolean Satisfiability. Springer, 2012.

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Book chapters on the topic "Test pattern generation"

1

Butler, Kenneth M., and M. Ray Mercer. "Automatic Test Pattern Generation." In Assessing Fault Model and Test Quality. Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3606-2_4.

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Drechsler, Rolf, and Görschwin Fey. "Automatic Test Pattern Generation." In Formal Methods for Hardware Verification. Springer Berlin Heidelberg, 2006. http://dx.doi.org/10.1007/11757283_2.

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Abe, Shigeo. "Generation of Training and Test Data Sets." In Pattern Classification. Springer London, 2001. http://dx.doi.org/10.1007/978-1-4471-0285-4_12.

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Wen, Xiaoqing, and Seongmoon Wang. "Low-Power Test Pattern Generation." In Power-Aware Testing and Test Strategies for Low Power Devices. Springer US, 2009. http://dx.doi.org/10.1007/978-1-4419-0928-2_3.

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Gravagnoli, Tiziana, Fabrizio Ferrandi, Pier Luca Lanzi, and Donatella Sciuto. "Automatic Test Pattern Generation with BOA." In Parallel Problem Solving from Nature - PPSN IX. Springer Berlin Heidelberg, 2006. http://dx.doi.org/10.1007/11844297_43.

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Navabi, Zainalabedin. "Test Pattern Generation Methods and Algorithms." In Digital System Test and Testable Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7548-5_5.

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Feiten, W., and H. Hofestädt. "Embedding test pattern generation into design." In Computer Aided Systems Theory — EUROCAST '89. Springer Berlin Heidelberg, 1990. http://dx.doi.org/10.1007/3-540-52215-8_34.

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Roy, Annu, and J. P. Anita. "Pattern Generation and Test Compression Using PRESTO Generator." In Communications in Computer and Information Science. Springer Singapore, 2017. http://dx.doi.org/10.1007/978-981-10-6898-0_23.

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Marwedel, Peter. "Test." In Embedded Systems. Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-60910-8_8.

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AbstractUnfortunately, we cannot rely on designed and possibly already manufactured systems to operate as expected. These systems may have become defective during their use, or their function may have been compromised during the fabrication or their design. The purpose of testing is to verify whether or not an existing embedded/cyber-physical system can be operated as expected. In this chapter, we will present fundamental terms and techniques for testing. There will be a brief introduction to the aims of test pattern generation and their application. We will be introducing terms such as fault

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Corno, Fulvio, Maurizio Rebaudengo, Matteo Sonza Reorda, and Massimo Violante. "Test Pattern Generation under Low Power Constraints." In Evolutionary Image Analysis, Signal Processing and Telecommunications. Springer Berlin Heidelberg, 1999. http://dx.doi.org/10.1007/10704703_13.

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Conference papers on the topic "Test pattern generation"

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Yadav, Aniruddh Bahadur, and Mudigonda UdayKumar. "Scan and Automated Test Pattern Generation in VLSI." In 2024 5th International Conference on Image Processing and Capsule Networks (ICIPCN). IEEE, 2024. http://dx.doi.org/10.1109/icipcn63822.2024.00075.

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Paria, Sudipta, Pravin Gaikwad, Aritra Dasgupta, and Swarup Bhunia. "LATENT: Leveraging Automated Test Pattern Generation for Hardware Trojan Detection." In 2024 IEEE 33rd Asian Test Symposium (ATS). IEEE, 2024. https://doi.org/10.1109/ats64447.2024.10915238.

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Hong, Le, Qiao Li, and Jian Rao. "Pattern matching assisted modeling test pattern generation." In SPIE Advanced Lithography, edited by Harry J. Levinson and Mircea V. Dusa. SPIE, 2009. http://dx.doi.org/10.1117/12.814302.

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Shahhoseini, H. S., and B. H. Kazerouni. "Semi-Algorithmic Test Pattern Generation." In IEEE International Conference on Computer Systems and Applications, 2006. IEEE, 2006. http://dx.doi.org/10.1109/aiccsa.2006.205126.

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Yiunn, Dennis Bong Yuan, Abu Khari Bin A'ain, Khor, and Jeen Ghee. "Scalable test pattern generation (STPG)." In 2010 IEEE Symposium on Industrial Electronics and Applications (ISIEA 2010). IEEE, 2010. http://dx.doi.org/10.1109/isiea.2010.5679428.

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Shailaja, Undadi, and Mamatha Samson. "Automatic Seed Generation for Weighted Test Pattern Generation." In 2022 International Conference on Augmented Intelligence and Sustainable Systems (ICAISS). IEEE, 2022. http://dx.doi.org/10.1109/icaiss55157.2022.10010866.

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Dilip, Patare Snehal, Geethu Remadevi Somanathan, and Ramesh Bhakthavatchalu. "Gray code for test pattern generation." In PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON MICROELECTRONICS, SIGNALS AND SYSTEMS 2019. AIP Publishing, 2020. http://dx.doi.org/10.1063/5.0004319.

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Bhowmik, Biswajit, Jatindra Kumar Deka, and Santosh Biswas. "Beyond test pattern generation: Coverage analysis." In 2015 International Conference on Industrial Instrumentation and Control (ICIC). IEEE, 2015. http://dx.doi.org/10.1109/iic.2015.7151009.

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Beg, Azam, and Manzoor Khan. "Low Activity-Factor Test Pattern Generation." In 2020 IEEE International Conference on Semiconductor Electronics (ICSE). IEEE, 2020. http://dx.doi.org/10.1109/icse49846.2020.9166893.

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Dilip, Patare Snehal, Geethu Remadevi Somanathan, and Ramesh Bhakthavatchalu. "Reseeding LFSR for Test Pattern Generation." In 2019 International Conference on Communication and Signal Processing (ICCSP). IEEE, 2019. http://dx.doi.org/10.1109/iccsp.2019.8698025.

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Reports on the topic "Test pattern generation"

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Johnson, Barry W., D. T. Smith, and Todd A. DeLong. VHDL Fault Simulation and Automatic Test Pattern Generation Requirements Document. Defense Technical Information Center, 1996. http://dx.doi.org/10.21236/ada304358.

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Boppana, Vamsi, and W. Kent Fuchs. Dynamic Fault Collapsing and Diagnostic Test Pattern Generation for Sequential Circuits. Defense Technical Information Center, 1998. http://dx.doi.org/10.21236/ada351548.

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Martinez, Kimberly D., and Gaojian Huang. Exploring the Effects of Meaningful Tactile Display on Perception and Preference in Automated Vehicles. Mineta Transportation Institute, 2022. http://dx.doi.org/10.31979/mti.2022.2164.

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There is an existing issue in human-machine interaction, such that drivers of semi-autonomous vehicles are still required to take over control of the vehicle during system limitations. A possible solution may lie in tactile displays, which can present status, direction, and position information while avoiding sensory (e.g., visual and auditory) channels overload to reliably help drivers make timely decisions and execute actions to successfully take over. However, limited work has investigated the effects of meaningful tactile signals on takeover performance. This study synthesizes literature i

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Brandenberg, Scott, Jonathan Stewart, Kenneth Hudson, Dong Youp Kwak, Paolo Zimmaro, and Quin Parker. Ground Failure of Hydraulic Fills in Chiba, Japan and Data Archival in Community Database. Pacific Earthquake Engineering Research Center, University of California, Berkeley, CA, 2024. http://dx.doi.org/10.55461/amnh7013.

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This report describes analysis of ground failure and lack thereof observed in the Mihama Ward portion of Chiba, Japan following the 2011 M9.0 Tohoku Earthquake. In conjunction with this work, we have also significantly expanded the laboratory component of the Next Generation Liquefaction (NGL) relational database. The district referred to as Mihama Ward is on ground composed of hydraulic fill sluiced in by pipes, thereby resulting in a gradient of soil coarseness, with coarser soils deposited near the pipes and fine-grained soils carried further away. Observations from local researchers at Chi

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Yogev, David, Ricardo Rosenbusch, Sharon Levisohn, and Eitan Rapoport. Molecular Pathogenesis of Mycoplasma bovis and Mycoplasma agalactiae and its Application in Diagnosis and Control. United States Department of Agriculture, 2000. http://dx.doi.org/10.32747/2000.7573073.bard.

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Mycoplasma bovis and M. agalactiae are two phylogenetically related mycoplasmas which cause economically significant diseases in their respective bovine or small ruminant hosts. These organisms cause persistent asymptomatic infections that can result in severe outbreaks upon introduction of carrier animals into susceptible herds. Little is known about the mechanisms underlying mycoplasma-host interaction, variation in virulence, or of the factors enabling avoidance of the host immune system. In recent years it has become apparent that the ability of pathogenic microorganisms to rapidly alter s

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Soroker, V., and N. C. Rueppell. acterization of the architecture of hygienic behavior of honeybees to enable breeding for improved honeybee health. United States-Israel Binational Agricultural Research and Development Fund, 2021. http://dx.doi.org/10.32747/2021.8134169.bard.

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High honeybee colony losses in the last decade have raised the scientific efforts to determine and mitigate the causes of declining honeybee health. Although honeybees are exposed to a variety of stressors, infestation by the ectoparasitic mite (Varroa destructor) and the viruses it vectors are considered to be the most significant biological problem of A. mellifera worldwide. Management of viral diseases is problematic and mainly focuses on control of Varroa. Current Varroa control suffers from the evolution mite resistance, negative effects on bees and bee products, and other inefficiencies

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Gur, Amit, Edward Buckler, Joseph Burger, Yaakov Tadmor, and Iftach Klapp. Characterization of genetic variation and yield heterosis in Cucumis melo. United States Department of Agriculture, 2016. http://dx.doi.org/10.32747/2016.7600047.bard.

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Project objectives: 1) Characterization of variation for yield heterosis in melon using Half-Diallele (HDA) design. 2) Development and implementation of image-based yield phenotyping in melon. 3) Characterization of genetic, epigenetic and transcriptional variation across 25 founder lines and selected hybrids. The epigentic part of this objective was modified during the course of the project: instead of characterization of chromatin structure in a single melon line through genome-wide mapping of nucleosomes using MNase-seq approach, we took advantage of rapid advancements in single-molecule se

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