Relevant bibliographies by topics / Testing of Digital Circuits

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Testing of Digital Circuits'

Author: Grafiati
Published: 4 June 2025
Last updated: 23 June 2025

Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles

Select a source type:

Consult the lists of relevant articles, books, theses, conference reports, and other scholarly sources on the topic 'Testing of Digital Circuits.'

Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.

You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.

Journal articles on the topic "Testing of Digital Circuits"

1

Semerenko, Vasyl, and Oleksandr Roik. "Testing of digital circuits by cyclic codes." Computational Problems of Electrical Engineering 7, no. 2 (2017): 78–82. https://doi.org/10.23939/jcpee2017.02.078.

Full text
Abstract:
The application of error correction coding theory to the tasks of technical diagnostics is considered. Known methods of testing based on signature analysis allow detecting only the faults in the digital circuit under test (CUT). The purpose of the research is to provide the possibility of an exact localization of the faults in logic subcircuits within the CUT. In the proposed method, a full test T for testing the CUT is subdivided into an input test T1 (supplied to the inputs of the CUT) and an output test T2 of the expected signatures (recorded into a memory block). Tests T1 and T2 are interpreted as a set of information words and a set of check words of the cyclic Hamming code respectively and are generated by the encoder. The decoder decodes words from both tests simultaneously and searches for errors only in the test T1. As a result, full burst errors in the information words of error correcting code are corrected, which is equivalent to the exact localization of the faults within the CUT.
APA, Harvard, Vancouver, ISO, and other styles
2

Falkowski, Bogdan J. "Spectral Testing of Digital Circuits." VLSI Design 14, no. 1 (2002): 83–105. http://dx.doi.org/10.1080/10655140290009828.

Full text
Abstract:
Fault detection techniques using data compression methods have evolved during the last few years. Considerable work using individual Walsh spectral coefficients has been reported. In this paper, the application of spectral methods in testing of digital circuits with the emphasis on their usage for both input and output test compaction of digital circuits is described. Two closely related testing methods are discussed: syndrome testing and spectral testing as well as an overview of syndrome-testing and syndrome-testable design is presented. The necessary background and notation on Walsh spectral coefficients as well as their meaning in classical logic terms is shown.
APA, Harvard, Vancouver, ISO, and other styles
3

Bradshaw, GeorgeM, PeterL L. Desyllas, and Keit McLaren. "4566104 Testing digital electronic circuits." Microelectronics Reliability 26, no. 5 (1986): 998. http://dx.doi.org/10.1016/0026-2714(86)90248-9.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Moussa, Mahmoud, and Atef Salama. "Digital Testing of Analog Circuits." Fayoum University Journal of Engineering 7, no. 2 (2024): 45–52. http://dx.doi.org/10.21608/fuje.2024.343764.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Rajeswaran, N., T. Madhu, and M. Suryakalavathi. "Hardware Testable Design of Genetic Algorithm for VLSI Circuits." Applied Mechanics and Materials 367 (August 2013): 245–49. http://dx.doi.org/10.4028/www.scientific.net/amm.367.245.

Full text
Abstract:
Accurate and fast testing of digital circuits is very much essential in real time applications. Hardware analysis of digital circuits, which is otherwise very tedious and time consuming, is attempted using the artificial intelligence technique: Genetic Algorithms (GA). GA is used to find an input sequence to a digital circuit for testing, as it reduces the hardware utilization, complexity and computational time of the circuits. All the GA processes are simulated and implemented by using Xilinx 10.1 and SPARTAN 3E.
APA, Harvard, Vancouver, ISO, and other styles
6

Mokhtarnia, Hossein, Shahram Etemadi Borujeni, and Mohammad Saeed Ehsani. "Automatic Test Pattern Generation Through Boolean Satisfiability for Testing Bridging Faults." Journal of Circuits, Systems and Computers 28, no. 14 (2019): 1950240. http://dx.doi.org/10.1142/s0218126619502402.

Full text
Abstract:
Automatic test pattern generation (ATPG) is one of the important issues in testing digital circuits. Due to considerable advances made in the past two decades, the ATPG algorithms that are based on Boolean satisfiability have become an integral part of the digital circuits. In this paper, a new method for ATPG for testing bridging faults is introduced. First of all, the application of Boolean satisfiability to circuit modeling is explained. Afterwards, a new method of testing the nonfeedback bridging faults in the combinational circuits is proposed based on Boolean satisfiability. In the proposed method, the faulty circuit is obtained by injecting the faulty gate into the main circuit. Afterwards, the final differential circuit is prepared by using the fault-free and the faulty circuits. Finally, using the resulting differential circuit, the testability of the fault is assessed and the input pattern for detecting the fault in the main circuit is derived. The experimental results presented at the end of this paper indicate the effectiveness and usefulness of this method for testing the bridging faults.
APA, Harvard, Vancouver, ISO, and other styles
7

Gavrilenkov, Sergey I., Elizaveta O. Petrenko, and Evgeny V. Arbuzov. "A Digital Device for Automatic Checking of Homework Assignments in the Digital Circuits Course." ITM Web of Conferences 35 (2020): 04009. http://dx.doi.org/10.1051/itmconf/20203504009.

Full text
Abstract:
This paper considers a digital device for automatic checking of homework assignments in the digital circuits course. The assignment is to make a digital circuit corresponding to a given logical expression; the circuit is comprised of elementary logic gates. The process of manual testing the built circuit is very labor-intensive because checking a circuit with N inputs variables requires checking the correctness of the output variable for 2N cases. We propose automating this pro-cess with a special digital device. The device is comprised of a microcontroller connected to the circuit tested. The microcontroller is connected to a personal computer with an application written in C# for executing the main operations of the testing process. During testing, the student chooses from a database or enters the logical expression corresponding to the circuit tested. For the expression, the software generates truth tables where actual and required responses of the circuit are given. Actual circuit responses are acquired by probing the circuit via the microcontroller, and the expected values are calculated from the logical expression. The truth tables are then presented to the student with a message of whether the circuit works correctly or not. The device was integrated into the process of checking homework assignments in the digital electronics course, and it significantly sped up the process of checking homework assignment circuits, resulting in better education quality.
APA, Harvard, Vancouver, ISO, and other styles
8

Litikov, I. P. "Ring-like testing of digital circuits." Measurement 4, no. 1 (1986): 2–6. http://dx.doi.org/10.1016/0263-2241(86)90023-0.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

El-Mahlawy, M., Sh Mahmoud, E. Gadallah, and E. El-Samahy. "New Digital Testing of Analogue Circuits." International Conference on Aerospace Sciences and Aviation Technology 16, AEROSPACE SCIENCES (2015): 1–24. http://dx.doi.org/10.21608/asat.2015.22880.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Litikov, I. P. "Ring-like testing of digital circuits." Journal of Electronic Testing 1, no. 4 (1991): 301–4. http://dx.doi.org/10.1007/bf00136318.

Full text
APA, Harvard, Vancouver, ISO, and other styles
More sources

Dissertations / Theses on the topic "Testing of Digital Circuits"

1

Damianos, J. "Testing hybrid circuits using digital techniques." Thesis, University of Southampton, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.483107.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Maiuri, Ovidio V. "Testing of digital CMOS integrated circuits : the multidimensional testing paradigm." Thesis, University of Oxford, 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.299132.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Shi, Junhao. "Boolean techniques in testing of digital circuits." [S.l.] : [s.n.], 2006. http://deposit.ddb.de/cgi-bin/dokserv?idn=98361816X.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Joseph, Arun Antony. "Defect-based testing of LTS digital circuits." Enschede : University of Twente [Host], 2006. http://doc.utwente.nl/57765.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Yogi, Nitin Agrawal Vishwani D. "Spectral methods for testing of digital circuits." Auburn, Ala, 2009. http://hdl.handle.net/10415/1750.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Bekheit, Mahmoud A. M. "Digital testing of analogue systems." Thesis, University of Strathclyde, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.275164.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Park, Intaik. "Fault properties and their uses in testing digital integrated circuits /." May be available electronically:, 2009. http://proquest.umi.com/login?COPT=REJTPTU1MTUmSU5UPTAmVkVSPTI=&clientId=12498.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Kelly, Richard Thevenet. "DETERMINING COST EFFECTIVE TEST FLOWS FOR DIGITAL PRINTED CIRCUIT BOARDS." Thesis, The University of Arizona, 1985. http://hdl.handle.net/10150/275385.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Patel, Mayank Raman. "HARDWARE COMPILER DRIVEN HEURISTIC SEARCH FOR DIGITAL IC TEST SEQUENCES." Thesis, The University of Arizona, 1985. http://hdl.handle.net/10150/275246.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Pant, Pankaj. "Automated diagnosis of path delay faults in digital integrated circuits." Diss., Georgia Institute of Technology, 2000. http://hdl.handle.net/1853/13556.

Full text
APA, Harvard, Vancouver, ISO, and other styles
More sources

Books on the topic "Testing of Digital Circuits"

1

Jha, Niraj K. Testing of digital systems. Cambridge University Press, 2003.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
2

René, David. Random testing of digital circuits: Theory & application. Marcel Dekker, 1998.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
3

Hurst, S. L. VLSI testing: Digital and mixed analogue/digital techniques. Institution of Electrical Engineers, 1998.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
4

Miczo, Alexander. Digital logic testing and simulation. John Wiley & Sons, 1986.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
5

Lavagno, Luciano. Algorithms for synthesis and testing of asynchronous circuits. Kluwer Academic, 1993.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
6

Weyerer, Manfred. Testability of electronic circuits. Carl Hanser Verlag, 1992.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
7

Weyerer, Manfred. Testability of electronic circuits. C. Hanser, 1991.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
8

Abramovici, Miron. Digital systems testing and testable design. IEEE Press, 1990.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
9

Chattopadhyay, Santanu. Thermal-Aware Testing of Digital VLSI Circuits and Systems. CRC Press, 2018. http://dx.doi.org/10.1201/9781351227780.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Sachdev, Manoj. Defect Oriented Testing for CMOS Analog and Digital Circuits. Springer US, 1999. http://dx.doi.org/10.1007/978-1-4757-4926-7.

Full text
APA, Harvard, Vancouver, ISO, and other styles
More sources

Book chapters on the topic "Testing of Digital Circuits"

1

Powell, Richard F. "Digital Integrated Circuits." In Testing Active and Passive Electronic Components. Routledge, 2022. http://dx.doi.org/10.1201/9780203737255-9.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Salmani, Hassan. "Trusted Testing Techniques for Hardware Trojan Detection." In Trusted Digital Circuits. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-79081-7_8.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Chakradhar, Srimat T., Vishwani D. Agrawal, and Michael L. Bushneil. "Logic Circuits and Testing." In Neural Models and Algorithms for Digital Testing. Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3958-2_2.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Abbas, Karim. "Testing." In Handbook of Digital CMOS Technology, Circuits, and Systems. Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-37195-1_14.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Petrini, Matteo. "Electrical Testing." In Synthesis Lectures on Digital Circuits & Systems. Springer Nature Switzerland, 2024. http://dx.doi.org/10.1007/978-3-031-60811-7_3.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Chakradhar, Srimat T., Vishwani D. Agrawal, and Michael L. Bushneil. "Neural Modeling for Digital Circuits." In Neural Models and Algorithms for Digital Testing. Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3958-2_5.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Perry, Roger. "IDDQ Testing in CMOS Digital ASICs." In IDDQ Testing of VLSI Circuits. Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3146-3_3.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Sachdev, Manoj. "Testing Defects in Sequential Circuits." In Defect Oriented Testing for CMOS Analog and Digital Circuits. Springer US, 1999. http://dx.doi.org/10.1007/978-1-4757-4926-7_4.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Chattopadhyay, Santanu. "Circuit-Level Testing." In Thermal-Aware Testing of Digital VLSI Circuits and Systems. CRC Press, 2018. http://dx.doi.org/10.1201/9781351227780-2.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Chattopadhyay, Santanu. "VLSI Testing." In Thermal-Aware Testing of Digital VLSI Circuits and Systems. CRC Press, 2018. http://dx.doi.org/10.1201/9781351227780-1.

Full text
APA, Harvard, Vancouver, ISO, and other styles

Conference papers on the topic "Testing of Digital Circuits"

1

Manikandan, Palanichamy, Ramesh Patel, Sundar Gopalakrishnan, and Karthikeyan Palaniswamy. "Advanced Path Delay Fault Testing Strategies in High-Performance Digital Circuits." In 2024 IEEE East-West Design & Test Symposium (EWDTS). IEEE, 2024. https://doi.org/10.1109/ewdts63723.2024.10873667.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Wang, Luhui, Kunfang Wang, Xu Wang, and Hao Hong. "A Design of Digital Tube Driving Chip Automatic Testing System Based on FPGA." In 2024 4th International Conference on Electronics, Circuits and Information Engineering (ECIE). IEEE, 2024. http://dx.doi.org/10.1109/ecie61885.2024.10626819.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Kumari, Puja, and Rahul Bhattacharya. "MATLAB-Simulink based Framework for Combinational ATPG Applied to Testing of Digital Blocks in Analog and Mixed-Signal Circuits." In 2024 28th International Symposium on VLSI Design and Test (VDAT). IEEE, 2024. http://dx.doi.org/10.1109/vdat63601.2024.10705730.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Pramadansyah, Moh Rassel, Hilal Huda, and Muhammad Ali Qureshi. "Implementation of Performance Testing on Digital Kanban Web Application for Circuit Movement Optimization in Production Line." In 2024 IEEE 22nd Student Conference on Research and Development (SCOReD). IEEE, 2024. https://doi.org/10.1109/scored64708.2024.10872741.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Traiola, Marcello, Arnaud Virazel, Patrick Girard, Mario Barbareschi, and Alberto Bosio. "Testing approximate digital circuits: Challenges and opportunities." In 2018 IEEE 19th Latin-American Test Symposium (LATS). IEEE, 2018. http://dx.doi.org/10.1109/latw.2018.8349681.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Thibeault, C. "Improving Digital IC Testing with Analog Circuits." In 2006 IEEE North-East Workshop on Circuits and Systems. IEEE, 2006. http://dx.doi.org/10.1109/newcas.2006.250948.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Al-Sawah, Mahmoud Fathy, Mohamed H. El-Mahlawy, and Mohamed A. Abbass. "Reconfigurable PETPG for External Testing of Digital Circuits." In 2020 15th International Conference on Computer Engineering and Systems (ICCES). IEEE, 2020. http://dx.doi.org/10.1109/icces51560.2020.9334582.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Russell, G., and G. A. Pettit. "A Pragmatic Approach to Testing Mixed Analogue/Digital Circuits." In Eighteenth European Solid-State Circuits Conference (ESSCIRC '92). IEEE, 1992. http://dx.doi.org/10.1109/esscirc.1992.5468414.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Bowman, Tyler, Ross Guttromson, Tim Minteer, Travis Mooney, and Matt Halligan. "Conducted Electromagnetic Pulse Testing of Digital Protective Relay Circuits." In 2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium. IEEE, 2021. http://dx.doi.org/10.1109/emc/si/pi/emceurope52599.2021.9559339.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Bowman, Tyler, Ross Guttromson, Tim Minteer, Travis Mooney, and Matthew Halligan. "Conducted Electromagnetic Pulse Testing of Digital Protective Relay Circuits." In Proposed for presentation at the 2021 Joint IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity & EMC Europe. US DOE, 2021. http://dx.doi.org/10.2172/1873276.

Full text
APA, Harvard, Vancouver, ISO, and other styles

Reports on the topic "Testing of Digital Circuits"

1

Martin, Alain J., and Pieter J. Hazewindus. Testing Delay-Insensitive Circuits. Defense Technical Information Center, 1990. http://dx.doi.org/10.21236/ada447730.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Eckmann, S. T., and G. H. Chisholm. Assigning functional meaning to digital circuits. Office of Scientific and Technical Information (OSTI), 1997. http://dx.doi.org/10.2172/569121.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Averin, D. V. Semiconductor Single-Electron Digital Devices and Circuits. Defense Technical Information Center, 1993. http://dx.doi.org/10.21236/ada278338.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Reddy, Sudhakar M. On Timing Faults in Digital Logic Circuits. Defense Technical Information Center, 1993. http://dx.doi.org/10.21236/ada268714.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Allen, Jonathan. The Design of High-Performance Circuits for Digital Signal Processing. Defense Technical Information Center, 1990. http://dx.doi.org/10.21236/ada217786.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Robson, Christopher L. Testing Ethernet-Over-DWDM Circuits Using Open Source Tools. Defense Technical Information Center, 2012. http://dx.doi.org/10.21236/ada569189.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Debany, Jr, and Warren H. Digital Logic Testing and Testability. Defense Technical Information Center, 1991. http://dx.doi.org/10.21236/ada234123.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Van Duzer, T., Stephen R. Whiteley, Lizhen Zheng, et al. Hybrid Josephson-CMOS Random Access Memory with Interfacing to Josephson Digital Circuits. Defense Technical Information Center, 2013. http://dx.doi.org/10.21236/ada596658.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Stokesberry, Daniel P., Daniel P. Stokesberry, and Kathleen M. Roberts. Integrated services digital network conformance testing. National Institute of Standards and Technology, 1992. http://dx.doi.org/10.6028/nist.sp.823-2.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Stokesberry, Daniel P., Daniel P. Stokesberry, Leslie Collica, and Kathleen M. Roberts. Integrated services digital network conformance testing. National Institute of Standards and Technology, 1993. http://dx.doi.org/10.6028/nist.sp.823-4.

Full text
APA, Harvard, Vancouver, ISO, and other styles
You might also be interested in the extended bibliographies on the topic 'Testing of Digital Circuits' for particular source types:
Journal articles Dissertations / Theses Books
We offer discounts on all premium plans for authors whose works are included in thematic literature selections. Contact us to get a unique promo code!

To the bibliography