Academic literature on the topic 'Three-dimensional integrated circuit'

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Journal articles on the topic "Three-dimensional integrated circuit"

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Koo, Jae-Mo, Sungjun Im, Linan Jiang, and Kenneth E. Goodson. "Integrated Microchannel Cooling for Three-Dimensional Electronic Circuit Architectures." Journal of Heat Transfer 127, no. 1 (2005): 49–58. http://dx.doi.org/10.1115/1.1839582.

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The semiconductor community is developing three-dimensional circuits that integrate logic, memory, optoelectronic and radio-frequency devices, and microelectromechanical systems. These three-dimensional (3D) circuits pose important challenges for thermal management due to the increasing heat load per unit surface area. This paper theoretically studies 3D circuit cooling by means of an integrated microchannel network. Predictions are based on thermal models solving one-dimensional conservation equations for boiling convection along microchannels, and are consistent with past data obtained from
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Zeping Zhao, Zeping Zhao, Jiaojiao Wang Jiaojiao Wang, Xueyan Han Xueyan Han, Zhike Zhang Zhike Zhang, and Jianguo Liu Jianguo Liu. "Ultra-compact four-lane hybrid-integrated ROSA based on three-dimensional microwave circuit design." Chinese Optics Letters 17, no. 3 (2019): 030401. http://dx.doi.org/10.3788/col201917.030401.

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Hübler, A. C., G. C. Schmidt, H. Kempa, K. Reuter, M. Hambsch, and M. Bellmann. "Three-dimensional integrated circuit using printed electronics." Organic Electronics 12, no. 3 (2011): 419–23. http://dx.doi.org/10.1016/j.orgel.2010.12.010.

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Wilson, R. Mark. "The carbon nanotube integrated circuit goes three-dimensional." Physics Today 70, no. 9 (2017): 14–16. http://dx.doi.org/10.1063/pt.3.3680.

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Akasaka, Yoichi. "Three-dimensional integrated circuit: technology and application prospect." Microelectronics Journal 20, no. 1-2 (1989): 105–12. http://dx.doi.org/10.1016/0026-2692(89)90125-0.

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Wang, Kang-Jia, and Zhong-Liang Pan. "Integrated microchannel cooling in a three dimensional integrated circuit: A thermal management." Thermal Science 20, no. 3 (2016): 899–902. http://dx.doi.org/10.2298/tsci1603899w.

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Microchannel cooling is a promising technology for solving the three-dimensional integrated circuit thermal problems. However, the relationship between the microchannel cooling parameters and thermal behavior of the three dimensional integrated circuit is complex and difficult to understand. In this paper, we perform a detailed evaluation of the influence of the microchannel structure and the parameters of the cooling liquid on steady-state temperature profiles. The results presented in this paper are expected to aid in the development of thermal design guidelines for three dimensional integra
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Fourie, Coenrad J., Olaf Wetzstein, Thomas Ortlepp, and Jürgen Kunert. "Three-dimensional multi-terminal superconductive integrated circuit inductance extraction." Superconductor Science and Technology 24, no. 12 (2011): 125015. http://dx.doi.org/10.1088/0953-2048/24/12/125015.

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Tianming, Ni, Chang Hao, Zhang Xiaoqiang, Xiao Hao, and Huang Zhengfeng. "Research on physical unclonable functions circuit based on three dimensional integrated circuit." IEICE Electronics Express 15, no. 23 (2018): 20180782. http://dx.doi.org/10.1587/elex.15.20180782.

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Kokubun, Y., T. Baba, and K. Iga. "Silicon optical printed circuit board for three-dimensional integrated optics." Electronics Letters 21, no. 11 (1985): 508–9. http://dx.doi.org/10.1049/el:19850360.

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Wu, Banqiu, and Ajay Kumar. "Extreme ultraviolet lithography and three dimensional integrated circuit—A review." Applied Physics Reviews 1, no. 1 (2014): 011104. http://dx.doi.org/10.1063/1.4863412.

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Dissertations / Theses on the topic "Three-dimensional integrated circuit"

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Harter, Andrew Charles. "Three-dimensional integrated circuit layout." Thesis, University of Cambridge, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.335724.

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Megas, Dimitrios, and Kleber Leandro Pizolato Someira. "Data Transformation in a Three Dimensional Integrated Circuit Implementation." Thesis, Monterey, California. Naval Postgraduate School, 2012. http://hdl.handle.net/10945/6834.

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Three-dimensional integration is an emerging chip fabrication technique in which multiple integrated circuit dies are joined using conductive posts. 3D integration offers several performance and security advantages, including extremely high bandwidth between the two dies and the ability to augment a processor with a separate die housing custom security features. This thesis performs a feasibility and requirements analysis of a data transformation coprocessor in a three-dimensional integrated circuit. We propose a novel coprocessor architecture in which one layer (control layer) houses applicat
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Joyner, James W. "Opportunities and limitations of three-dimensional integration for interconnect design." Diss., Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/13763.

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Pine, Shannon Robert. "Manufacturing structurally integrated three dimensional phased array antennas." Thesis, Available online, Georgia Institute of Technology, 2006, 2006. http://etd.gatech.edu/theses/available/etd-04062006-115019/.

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Thesis (M. S.)--Mechanical Engineering, Georgia Institute of Technology, 2006.<br>Dr. Jonathan Colton, Committee Chair ; Dr. John Muzzy, Committee Member ; Dr. Daniel Baldwin, Committee Member ; Dr. John Schultz, Committee Member.
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Zaveri, Jesal. "Electrical and fluidic interconnect design and technology for 3D ICS." Thesis, Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/39550.

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For decades, advances in device scaling has proven to be critical in improving the performance and productivity of 2D systems. In this thesis, we explore how advances in technology have pushed functional integration to such a high-level that interconnection and packaging issues represent real barriers to further progress. While three-dimensional (3D) integration offers to be a potential contender to overcome the barriers of increased energy consumption due to interconnects and bandwidth limitations, there are certain challenges that must be overcome before systems can be successfully stacked.
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Xie, Jianyong. "Electrical-thermal modeling and simulation for three-dimensional integrated systems." Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/50307.

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The continuous miniaturization of electronic systems using the three-dimensional (3D) integration technique has brought in new challenges for the computer-aided design and modeling of 3D integrated circuits (ICs) and systems. The major challenges for the modeling and analysis of 3D integrated systems mainly stem from four aspects: (a) the interaction between the electrical and thermal domains in an integrated system, (b) the increasing modeling complexity arising from 3D systems requires the development of multiscale techniques for the modeling and analysis of DC voltage drop, thermal gradient
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Dilli, Zeynep. "Physical aspects of VLSI design with a focus on three-dimensional integrated circuit applications." College Park, Md.: University of Maryland, 2007. http://hdl.handle.net/1903/7717.

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Thesis (Ph. D.) -- University of Maryland, College Park, 2007.<br>Thesis research directed by: Dept. of Electrical and Computer Engineering. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
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Cho, Minki. "Design methodology to characterize and compensate for process and temperature variation in digital systems." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/50148.

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The main objective of this dissertation is to investigate a design methodology that can characterize and compensate for process and temperature variation. First, a design methodology is discussed to handle process variation in low-power memory for image processing application. This is followed by a design technique to characterize and recover TSV-defect-induced signal degradation in a 3D integrated circuit. For thermal variation, the spatiotemporal power migration is proposed as a methodology to handle thermal issues in digital systems both during the test and normal operation. The power migra
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Han, Ki Jin. "Electromagnetic modeling of interconnections in three-dimensional integration." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/29642.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.<br>Committee Chair: Madhavan Swaminathan; Committee Member: Andrew E. Peterson; Committee Member: Emmanouil M. Tentzeris; Committee Member: Hao-Min Zhou; Committee Member: Saibal Mukhopadhyay. Part of the SMARTech Electronic Thesis and Dissertation Collection.
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Xu, Yuanzhe, and 徐远哲. "Variational analysis for 3D integrated circuit on-chip structures based on process-variation-aware electromagnetic-semiconductor coupledsimulation." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2011. http://hub.hku.hk/bib/B47047616.

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Books on the topic "Three-dimensional integrated circuit"

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G, Friedman Eby, ed. Three-dimensional integrated circuit design. Morgan Kaufmann, 2009.

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Harter, Andrew. Three-dimensional integrated circuit layout. Cambridge University Press, 1991.

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Harter, Andrew. Three-dimensional integrated circuit layout. Cambridge University Press, 2009.

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Xie, Yuan, Jason Cong, and Sachin Sapatnekar, eds. Three Dimensional Integrated Circuit Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-0784-4.

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Three-dimensional molded interconnect devices (3D-MID): Materials, manufacturing, assembly, and applications for injection molded circuit carriers. Hanser Publishers, 2014.

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Shirikon kantsū denkyoku TSV: Handōtai no kōkinōka gijutsu. Tōkyō Denki Daigaku Shuppankyoku, 2011.

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Japan) International Workshop on Stress-Induced Phenomena in Microelectronics (12th 2012 Kyoto. Stress Induced Phenomena and Reliability in 3D Microelectronics: Kyoto, Japan, 28-30 May 2012. Edited by Ho P. S. editor. AIP Publishing, 2014.

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3-jigen shisutemu in pakkēji to zairyō gijutsu: 3D-SiP Technologies and Materials. Shīemushī Shuppan, 2012.

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Westermann, Marc. Solid modeling applied to three-dimensional semiconductor process simulation. Hartung-Gorre, 1995.

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Electrical modeling and design for 3D integration: 3D integrated circuits and packaging signal integrity, power integrity, and EMC. Wiley-IEEE Press, 2011.

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Book chapters on the topic "Three-dimensional integrated circuit"

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Takahashi, Hiroshi, Senling Wang, Shuichi Kameyama, et al. "Trends in 3D Integrated Circuit (3D-IC) Testing Technology." In Three-Dimensional Integration of Semiconductors. Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-18675-7_8.

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Li, Li. "Three-Dimensional System-in-Package for Application-Specific Integrated Circuit and Three-Dimensional Dynamic Random-Access Memory Integration." In 3D Integration in VLSI Circuits. CRC Press, 2018. http://dx.doi.org/10.1201/9781315200699-2.

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Vu, D. P. "Applications Of Lasers in Planar and Three-Dimensional Silicon Integrated Circuit Fabrication." In Applied Laser Tooling. Springer Netherlands, 1987. http://dx.doi.org/10.1007/978-94-009-3569-3_13.

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Li, Peng, Wei Guo, Zhenyu Zhao, and Minxuan Zhang. "Impact of Heavy Ion Species and Energy on SEE Characteristics of Three-Dimensional Integrated Circuit." In Communications in Computer and Information Science. Springer Berlin Heidelberg, 2016. http://dx.doi.org/10.1007/978-3-662-49283-3_16.

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Loh, Gabriel H. "Three-Dimensional Microprocessor Design." In Integrated Circuits and Systems. Springer US, 2009. http://dx.doi.org/10.1007/978-1-4419-0784-4_7.

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Xie, Yuan, Narayanan Vijaykrishnan, and Chita Das. "Three-Dimensional Network-on-Chip Architecture." In Integrated Circuits and Systems. Springer US, 2009. http://dx.doi.org/10.1007/978-1-4419-0784-4_8.

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Feero, Brett Stanley, and Partha Pratim Pande. "Three-Dimensional Networks-on-Chip: Performance Evaluation." In Integrated Circuits and Systems. Springer New York, 2010. http://dx.doi.org/10.1007/978-1-4419-7618-5_6.

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Tan, Chuan Seng. "Three-Dimensional Integration of Integrated Circuits—an Introduction." In Integrated Circuits and Systems. Springer New York, 2010. http://dx.doi.org/10.1007/978-1-4419-7618-5_1.

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Xu, Hu, Vasilis F. Pavlidis, and Giovanni De Micheli. "Repeater Insertion for Two-Terminal Nets in Three-Dimensional Integrated Circuits." In Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering. Springer Berlin Heidelberg, 2009. http://dx.doi.org/10.1007/978-3-642-04850-0_21.

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Ishihara, Ryoichi, M. R. Tajari Mofrad, Ming He, and C. I. M. Beenakker. "Pulsed-Laser-Induced Epitaxial Growth of Silicon for Three-Dimensional Integrated Circuits." In Subsecond Annealing of Advanced Materials. Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-03131-6_7.

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Conference papers on the topic "Three-dimensional integrated circuit"

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Chen, C. K., K. Warner, D. R. W. Yost, et al. "Scaling Three-Dimensional SOI Integrated-Circuit Technology." In 2007 IEEE International SOI Conference. IEEE, 2007. http://dx.doi.org/10.1109/soi.2007.4357865.

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Chen, C. K., B. Wheeler, D. R. W. Yost, J. M. Knecht, C. L. Chen, and C. L. Keast. "SOI-enabled three-dimensional integrated-circuit technology." In 2010 IEEE International SOI Conference. IEEE, 2010. http://dx.doi.org/10.1109/soi.2010.5641367.

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Chen, C. L., C. K. Chen, J. A. Burns, et al. "Thermal Effects of Three Dimensional Integrated Circuit Stacks." In 2007 IEEE International SOI Conference. IEEE, 2007. http://dx.doi.org/10.1109/soi.2007.4357867.

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Qian, Libo, Zhangming Zhu, and Yintang Yang. "System level performance evaluation of three-dimensional integrated circuit." In 2011 IEEE 9th International Conference on ASIC (ASICON 2011). IEEE, 2011. http://dx.doi.org/10.1109/asicon.2011.6157300.

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Chen, C. K., N. Checka, B. M. Tyrrell, et al. "Characterization of a three-dimensional SOI integrated-circuit technology." In 2008 IEEE International SOI Conference. IEEE, 2008. http://dx.doi.org/10.1109/soi.2008.4656318.

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Hwu, R. Jennifer, and Jishi Ren. "Development of three-dimensional monolithic microwave integrated circuit components." In International Symposium on Optical Science and Technology, edited by R. Jennifer Hwu and Ke Wu. SPIE, 2000. http://dx.doi.org/10.1117/12.422145.

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Civale, Yann, Augusto Redolfi, Patrick Jaenen, et al. "Through-silicon via technology for three-dimensional integrated circuit manufacturing." In 2012 35th IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT). IEEE, 2012. http://dx.doi.org/10.1109/iemt.2012.6521827.

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Chen, Lihan, Joe Wood, Sanjay Raman, and N. Scott Barker. "Vertical RF Transition with Mechanical Fit for Three-Dimensional Heterogeneous Integration." In 2008 European Microwave Integrated Circuit Conference (EuMIC). IEEE, 2008. http://dx.doi.org/10.1109/emicc.2008.4772347.

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Lee, Jun Kyu, Sang Yong Park, Young Ho Kim, et al. "Three-Dimensional Integrated Circuit (3D-IC) Package Using Fan-Out Technology." In 2019 IEEE 69th Electronic Components and Technology Conference (ECTC). IEEE, 2019. http://dx.doi.org/10.1109/ectc.2019.00013.

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Mitsumasa Koyanagi, Takafumi Fukushima, and Tetsu Tanaka. "New three-dimensional integration technology using reconfigured wafers." In 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT). IEEE, 2008. http://dx.doi.org/10.1109/icsict.2008.4734759.

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